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RTEMS 6.3
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This group contains register bit definitions. More...
Macros | |
| #define | GRIOMMU_MSTCFG_VENDOR_SHIFT 24 |
| #define | GRIOMMU_MSTCFG_VENDOR_MASK 0xff000000U |
| #define | GRIOMMU_MSTCFG_VENDOR_GET(_reg) |
| #define | GRIOMMU_MSTCFG_VENDOR_SET(_reg, _val) |
| #define | GRIOMMU_MSTCFG_VENDOR(_val) |
| #define | GRIOMMU_MSTCFG_DEVICE_SHIFT 12 |
| #define | GRIOMMU_MSTCFG_DEVICE_MASK 0xfff000U |
| #define | GRIOMMU_MSTCFG_DEVICE_GET(_reg) |
| #define | GRIOMMU_MSTCFG_DEVICE_SET(_reg, _val) |
| #define | GRIOMMU_MSTCFG_DEVICE(_val) |
| #define | GRIOMMU_MSTCFG_BS 0x10U |
| #define | GRIOMMU_MSTCFG_GROUP_SHIFT 0 |
| #define | GRIOMMU_MSTCFG_GROUP_MASK 0xfU |
| #define | GRIOMMU_MSTCFG_GROUP_GET(_reg) |
| #define | GRIOMMU_MSTCFG_GROUP_SET(_reg, _val) |
| #define | GRIOMMU_MSTCFG_GROUP(_val) |
This group contains register bit definitions.
| #define GRIOMMU_MSTCFG_DEVICE | ( | _val | ) |
| #define GRIOMMU_MSTCFG_DEVICE_GET | ( | _reg | ) |
| #define GRIOMMU_MSTCFG_DEVICE_SET | ( | _reg, | |
| _val ) |
| #define GRIOMMU_MSTCFG_GROUP | ( | _val | ) |
| #define GRIOMMU_MSTCFG_GROUP_GET | ( | _reg | ) |
| #define GRIOMMU_MSTCFG_GROUP_SET | ( | _reg, | |
| _val ) |
| #define GRIOMMU_MSTCFG_VENDOR | ( | _val | ) |
| #define GRIOMMU_MSTCFG_VENDOR_GET | ( | _reg | ) |
| #define GRIOMMU_MSTCFG_VENDOR_SET | ( | _reg, | |
| _val ) |