RTEMS 6.3
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EWM Register Masks
Mapping Information » Iomuxc_pads » Device Peripheral Access Layer » EWM Peripheral Access Layer

CTRL - Control Register

#define EWM_CTRL_EWMEN_MASK   (0x1U)
#define EWM_CTRL_EWMEN_SHIFT   (0U)
#define EWM_CTRL_EWMEN(x)
#define EWM_CTRL_ASSIN_MASK   (0x2U)
#define EWM_CTRL_ASSIN_SHIFT   (1U)
#define EWM_CTRL_ASSIN(x)
#define EWM_CTRL_INEN_MASK   (0x4U)
#define EWM_CTRL_INEN_SHIFT   (2U)
#define EWM_CTRL_INEN(x)
#define EWM_CTRL_INTEN_MASK   (0x8U)
#define EWM_CTRL_INTEN_SHIFT   (3U)
#define EWM_CTRL_INTEN(x)
#define EWM_CTRL_EWMEN_MASK   (0x1U)
#define EWM_CTRL_EWMEN_SHIFT   (0U)
#define EWM_CTRL_EWMEN(x)
#define EWM_CTRL_ASSIN_MASK   (0x2U)
#define EWM_CTRL_ASSIN_SHIFT   (1U)
#define EWM_CTRL_ASSIN(x)
#define EWM_CTRL_INEN_MASK   (0x4U)
#define EWM_CTRL_INEN_SHIFT   (2U)
#define EWM_CTRL_INEN(x)
#define EWM_CTRL_INTEN_MASK   (0x8U)
#define EWM_CTRL_INTEN_SHIFT   (3U)
#define EWM_CTRL_INTEN(x)
#define EWM_CTRL_EWMEN_MASK   (0x1U)
#define EWM_CTRL_EWMEN_SHIFT   (0U)
#define EWM_CTRL_EWMEN(x)
#define EWM_CTRL_ASSIN_MASK   (0x2U)
#define EWM_CTRL_ASSIN_SHIFT   (1U)
#define EWM_CTRL_ASSIN(x)
#define EWM_CTRL_INEN_MASK   (0x4U)
#define EWM_CTRL_INEN_SHIFT   (2U)
#define EWM_CTRL_INEN(x)
#define EWM_CTRL_INTEN_MASK   (0x8U)
#define EWM_CTRL_INTEN_SHIFT   (3U)
#define EWM_CTRL_INTEN(x)

SERV - Service Register

#define EWM_SERV_SERVICE_MASK   (0xFFU)
#define EWM_SERV_SERVICE_SHIFT   (0U)
#define EWM_SERV_SERVICE(x)
#define EWM_SERV_SERVICE_MASK   (0xFFU)
#define EWM_SERV_SERVICE_SHIFT   (0U)
#define EWM_SERV_SERVICE(x)
#define EWM_SERV_SERVICE_MASK   (0xFFU)
#define EWM_SERV_SERVICE_SHIFT   (0U)
#define EWM_SERV_SERVICE(x)

CMPL - Compare Low Register

#define EWM_CMPL_COMPAREL_MASK   (0xFFU)
#define EWM_CMPL_COMPAREL_SHIFT   (0U)
#define EWM_CMPL_COMPAREL(x)
#define EWM_CMPL_COMPAREL_MASK   (0xFFU)
#define EWM_CMPL_COMPAREL_SHIFT   (0U)
#define EWM_CMPL_COMPAREL(x)
#define EWM_CMPL_COMPAREL_MASK   (0xFFU)
#define EWM_CMPL_COMPAREL_SHIFT   (0U)
#define EWM_CMPL_COMPAREL(x)

CMPH - Compare High Register

#define EWM_CMPH_COMPAREH_MASK   (0xFFU)
#define EWM_CMPH_COMPAREH_SHIFT   (0U)
#define EWM_CMPH_COMPAREH(x)
#define EWM_CMPH_COMPAREH_MASK   (0xFFU)
#define EWM_CMPH_COMPAREH_SHIFT   (0U)
#define EWM_CMPH_COMPAREH(x)
#define EWM_CMPH_COMPAREH_MASK   (0xFFU)
#define EWM_CMPH_COMPAREH_SHIFT   (0U)
#define EWM_CMPH_COMPAREH(x)

CLKCTRL - Clock Control Register

#define EWM_CLKCTRL_CLKSEL_MASK   (0x3U)
#define EWM_CLKCTRL_CLKSEL_SHIFT   (0U)
#define EWM_CLKCTRL_CLKSEL(x)
#define EWM_CLKCTRL_CLKSEL_MASK   (0x3U)
#define EWM_CLKCTRL_CLKSEL_SHIFT   (0U)
#define EWM_CLKCTRL_CLKSEL(x)
#define EWM_CLKCTRL_CLKSEL_MASK   (0x3U)
#define EWM_CLKCTRL_CLKSEL_SHIFT   (0U)
#define EWM_CLKCTRL_CLKSEL(x)

CLKPRESCALER - Clock Prescaler Register

#define EWM_CLKPRESCALER_CLK_DIV_MASK   (0xFFU)
#define EWM_CLKPRESCALER_CLK_DIV_SHIFT   (0U)
#define EWM_CLKPRESCALER_CLK_DIV(x)
#define EWM_CLKPRESCALER_CLK_DIV_MASK   (0xFFU)
#define EWM_CLKPRESCALER_CLK_DIV_SHIFT   (0U)
#define EWM_CLKPRESCALER_CLK_DIV(x)
#define EWM_CLKPRESCALER_CLK_DIV_MASK   (0xFFU)
#define EWM_CLKPRESCALER_CLK_DIV_SHIFT   (0U)
#define EWM_CLKPRESCALER_CLK_DIV(x)

Detailed Description

Macro Definition Documentation

◆ EWM_CLKCTRL_CLKSEL [1/3]

#define EWM_CLKCTRL_CLKSEL ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CLKCTRL_CLKSEL_SHIFT)) & EWM_CLKCTRL_CLKSEL_MASK)

CLKSEL - CLKSEL

◆ EWM_CLKCTRL_CLKSEL [2/3]

#define EWM_CLKCTRL_CLKSEL ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CLKCTRL_CLKSEL_SHIFT)) & EWM_CLKCTRL_CLKSEL_MASK)

CLKSEL - CLKSEL

◆ EWM_CLKCTRL_CLKSEL [3/3]

#define EWM_CLKCTRL_CLKSEL ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CLKCTRL_CLKSEL_SHIFT)) & EWM_CLKCTRL_CLKSEL_MASK)

CLKSEL - CLKSEL

◆ EWM_CLKPRESCALER_CLK_DIV [1/3]

#define EWM_CLKPRESCALER_CLK_DIV ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CLKPRESCALER_CLK_DIV_SHIFT)) & EWM_CLKPRESCALER_CLK_DIV_MASK)

CLK_DIV - CLK_DIV

◆ EWM_CLKPRESCALER_CLK_DIV [2/3]

#define EWM_CLKPRESCALER_CLK_DIV ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CLKPRESCALER_CLK_DIV_SHIFT)) & EWM_CLKPRESCALER_CLK_DIV_MASK)

CLK_DIV - CLK_DIV

◆ EWM_CLKPRESCALER_CLK_DIV [3/3]

#define EWM_CLKPRESCALER_CLK_DIV ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CLKPRESCALER_CLK_DIV_SHIFT)) & EWM_CLKPRESCALER_CLK_DIV_MASK)

CLK_DIV - CLK_DIV

◆ EWM_CMPH_COMPAREH [1/3]

#define EWM_CMPH_COMPAREH ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CMPH_COMPAREH_SHIFT)) & EWM_CMPH_COMPAREH_MASK)

COMPAREH - COMPAREH

◆ EWM_CMPH_COMPAREH [2/3]

#define EWM_CMPH_COMPAREH ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CMPH_COMPAREH_SHIFT)) & EWM_CMPH_COMPAREH_MASK)

COMPAREH - COMPAREH

◆ EWM_CMPH_COMPAREH [3/3]

#define EWM_CMPH_COMPAREH ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CMPH_COMPAREH_SHIFT)) & EWM_CMPH_COMPAREH_MASK)

COMPAREH - COMPAREH

◆ EWM_CMPL_COMPAREL [1/3]

#define EWM_CMPL_COMPAREL ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CMPL_COMPAREL_SHIFT)) & EWM_CMPL_COMPAREL_MASK)

COMPAREL - COMPAREL

◆ EWM_CMPL_COMPAREL [2/3]

#define EWM_CMPL_COMPAREL ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CMPL_COMPAREL_SHIFT)) & EWM_CMPL_COMPAREL_MASK)

COMPAREL - COMPAREL

◆ EWM_CMPL_COMPAREL [3/3]

#define EWM_CMPL_COMPAREL ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CMPL_COMPAREL_SHIFT)) & EWM_CMPL_COMPAREL_MASK)

COMPAREL - COMPAREL

◆ EWM_CTRL_ASSIN [1/3]

#define EWM_CTRL_ASSIN ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CTRL_ASSIN_SHIFT)) & EWM_CTRL_ASSIN_MASK)

ASSIN - EWM_in's Assertion State Select.

ASSIN - EWM_in's Assertion State Select. 0b0..Default assert state of the EWM_in signal. 0b1..Inverts the assert state of EWM_in signal.

◆ EWM_CTRL_ASSIN [2/3]

#define EWM_CTRL_ASSIN ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CTRL_ASSIN_SHIFT)) & EWM_CTRL_ASSIN_MASK)

ASSIN - EWM_in's Assertion State Select. 0b0..Default assert state of the EWM_in signal. 0b1..Inverts the assert state of EWM_in signal.

◆ EWM_CTRL_ASSIN [3/3]

#define EWM_CTRL_ASSIN ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CTRL_ASSIN_SHIFT)) & EWM_CTRL_ASSIN_MASK)

ASSIN - EWM_in's Assertion State Select. 0b0..Default assert state of the EWM_in signal. 0b1..Inverts the assert state of EWM_in signal.

◆ EWM_CTRL_EWMEN [1/3]

#define EWM_CTRL_EWMEN ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CTRL_EWMEN_SHIFT)) & EWM_CTRL_EWMEN_MASK)

EWMEN - EWM enable.

EWMEN - EWM enable. 0b0..EWM module is disabled. 0b1..EWM module is enabled.

◆ EWM_CTRL_EWMEN [2/3]

#define EWM_CTRL_EWMEN ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CTRL_EWMEN_SHIFT)) & EWM_CTRL_EWMEN_MASK)

EWMEN - EWM enable. 0b0..EWM module is disabled. 0b1..EWM module is enabled.

◆ EWM_CTRL_EWMEN [3/3]

#define EWM_CTRL_EWMEN ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CTRL_EWMEN_SHIFT)) & EWM_CTRL_EWMEN_MASK)

EWMEN - EWM enable. 0b0..EWM module is disabled. 0b1..EWM module is enabled.

◆ EWM_CTRL_INEN [1/3]

#define EWM_CTRL_INEN ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INEN_SHIFT)) & EWM_CTRL_INEN_MASK)

INEN - Input Enable.

INEN - Input Enable. 0b0..EWM_in port is disabled. 0b1..EWM_in port is enabled.

◆ EWM_CTRL_INEN [2/3]

#define EWM_CTRL_INEN ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INEN_SHIFT)) & EWM_CTRL_INEN_MASK)

INEN - Input Enable. 0b0..EWM_in port is disabled. 0b1..EWM_in port is enabled.

◆ EWM_CTRL_INEN [3/3]

#define EWM_CTRL_INEN ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INEN_SHIFT)) & EWM_CTRL_INEN_MASK)

INEN - Input Enable. 0b0..EWM_in port is disabled. 0b1..EWM_in port is enabled.

◆ EWM_CTRL_INTEN [1/3]

#define EWM_CTRL_INTEN ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INTEN_SHIFT)) & EWM_CTRL_INTEN_MASK)

INTEN - Interrupt Enable.

INTEN - Interrupt Enable. 0b1..Generates an interrupt request, when EWM_OUT_b is asserted. 0b0..Deasserts the interrupt request.

◆ EWM_CTRL_INTEN [2/3]

#define EWM_CTRL_INTEN ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INTEN_SHIFT)) & EWM_CTRL_INTEN_MASK)

INTEN - Interrupt Enable. 0b1..Generates an interrupt request, when EWM_OUT_b is asserted. 0b0..Deasserts the interrupt request.

◆ EWM_CTRL_INTEN [3/3]

#define EWM_CTRL_INTEN ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INTEN_SHIFT)) & EWM_CTRL_INTEN_MASK)

INTEN - Interrupt Enable. 0b1..Generates an interrupt request, when EWM_OUT_b is asserted. 0b0..Deasserts the interrupt request.

◆ EWM_SERV_SERVICE [1/3]

#define EWM_SERV_SERVICE ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_SERV_SERVICE_SHIFT)) & EWM_SERV_SERVICE_MASK)

SERVICE - SERVICE

◆ EWM_SERV_SERVICE [2/3]

#define EWM_SERV_SERVICE ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_SERV_SERVICE_SHIFT)) & EWM_SERV_SERVICE_MASK)

SERVICE - SERVICE

◆ EWM_SERV_SERVICE [3/3]

#define EWM_SERV_SERVICE ( x)
Value:
(((uint8_t)(((uint8_t)(x)) << EWM_SERV_SERVICE_SHIFT)) & EWM_SERV_SERVICE_MASK)

SERVICE - SERVICE

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