RTEMS 6.3
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BEE Register Masks
Mapping Information » Iomuxc_pads » Device Peripheral Access Layer » BEE Peripheral Access Layer

CTRL - Control Register

#define BEE_CTRL_BEE_ENABLE_MASK   (0x1U)
#define BEE_CTRL_BEE_ENABLE_SHIFT   (0U)
#define BEE_CTRL_BEE_ENABLE(x)
#define BEE_CTRL_CTRL_CLK_EN_MASK   (0x2U)
#define BEE_CTRL_CTRL_CLK_EN_SHIFT   (1U)
#define BEE_CTRL_CTRL_CLK_EN(x)
#define BEE_CTRL_CTRL_SFTRST_N_MASK   (0x4U)
#define BEE_CTRL_CTRL_SFTRST_N_SHIFT   (2U)
#define BEE_CTRL_CTRL_SFTRST_N(x)
#define BEE_CTRL_KEY_VALID_MASK   (0x10U)
#define BEE_CTRL_KEY_VALID_SHIFT   (4U)
#define BEE_CTRL_KEY_VALID(x)
#define BEE_CTRL_KEY_REGION_SEL_MASK   (0x20U)
#define BEE_CTRL_KEY_REGION_SEL_SHIFT   (5U)
#define BEE_CTRL_KEY_REGION_SEL(x)
#define BEE_CTRL_AC_PROT_EN_MASK   (0x40U)
#define BEE_CTRL_AC_PROT_EN_SHIFT   (6U)
#define BEE_CTRL_AC_PROT_EN(x)
#define BEE_CTRL_LITTLE_ENDIAN_MASK   (0x80U)
#define BEE_CTRL_LITTLE_ENDIAN_SHIFT   (7U)
#define BEE_CTRL_LITTLE_ENDIAN(x)
#define BEE_CTRL_SECURITY_LEVEL_R0_MASK   (0x300U)
#define BEE_CTRL_SECURITY_LEVEL_R0_SHIFT   (8U)
#define BEE_CTRL_SECURITY_LEVEL_R0(x)
#define BEE_CTRL_CTRL_AES_MODE_R0_MASK   (0x400U)
#define BEE_CTRL_CTRL_AES_MODE_R0_SHIFT   (10U)
#define BEE_CTRL_CTRL_AES_MODE_R0(x)
#define BEE_CTRL_SECURITY_LEVEL_R1_MASK   (0x3000U)
#define BEE_CTRL_SECURITY_LEVEL_R1_SHIFT   (12U)
#define BEE_CTRL_SECURITY_LEVEL_R1(x)
#define BEE_CTRL_CTRL_AES_MODE_R1_MASK   (0x4000U)
#define BEE_CTRL_CTRL_AES_MODE_R1_SHIFT   (14U)
#define BEE_CTRL_CTRL_AES_MODE_R1(x)
#define BEE_CTRL_BEE_ENABLE_LOCK_MASK   (0x10000U)
#define BEE_CTRL_BEE_ENABLE_LOCK_SHIFT   (16U)
#define BEE_CTRL_BEE_ENABLE_LOCK(x)
#define BEE_CTRL_CTRL_CLK_EN_LOCK_MASK   (0x20000U)
#define BEE_CTRL_CTRL_CLK_EN_LOCK_SHIFT   (17U)
#define BEE_CTRL_CTRL_CLK_EN_LOCK(x)
#define BEE_CTRL_CTRL_SFTRST_N_LOCK_MASK   (0x40000U)
#define BEE_CTRL_CTRL_SFTRST_N_LOCK_SHIFT   (18U)
#define BEE_CTRL_CTRL_SFTRST_N_LOCK(x)
#define BEE_CTRL_REGION1_ADDR_LOCK_MASK   (0x80000U)
#define BEE_CTRL_REGION1_ADDR_LOCK_SHIFT   (19U)
#define BEE_CTRL_REGION1_ADDR_LOCK(x)
#define BEE_CTRL_KEY_VALID_LOCK_MASK   (0x100000U)
#define BEE_CTRL_KEY_VALID_LOCK_SHIFT   (20U)
#define BEE_CTRL_KEY_VALID_LOCK(x)
#define BEE_CTRL_KEY_REGION_SEL_LOCK_MASK   (0x200000U)
#define BEE_CTRL_KEY_REGION_SEL_LOCK_SHIFT   (21U)
#define BEE_CTRL_KEY_REGION_SEL_LOCK(x)
#define BEE_CTRL_AC_PROT_EN_LOCK_MASK   (0x400000U)
#define BEE_CTRL_AC_PROT_EN_LOCK_SHIFT   (22U)
#define BEE_CTRL_AC_PROT_EN_LOCK(x)
#define BEE_CTRL_LITTLE_ENDIAN_LOCK_MASK   (0x800000U)
#define BEE_CTRL_LITTLE_ENDIAN_LOCK_SHIFT   (23U)
#define BEE_CTRL_LITTLE_ENDIAN_LOCK(x)
#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK_MASK   (0x3000000U)
#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK_SHIFT   (24U)
#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK(x)
#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK_MASK   (0x4000000U)
#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK_SHIFT   (26U)
#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK(x)
#define BEE_CTRL_REGION0_KEY_LOCK_MASK   (0x8000000U)
#define BEE_CTRL_REGION0_KEY_LOCK_SHIFT   (27U)
#define BEE_CTRL_REGION0_KEY_LOCK(x)
#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK_MASK   (0x30000000U)
#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK_SHIFT   (28U)
#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK(x)
#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK_MASK   (0x40000000U)
#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK_SHIFT   (30U)
#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK(x)
#define BEE_CTRL_REGION1_KEY_LOCK_MASK   (0x80000000U)
#define BEE_CTRL_REGION1_KEY_LOCK_SHIFT   (31U)
#define BEE_CTRL_REGION1_KEY_LOCK(x)

ADDR_OFFSET0 - Offset region 0 Register

#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_MASK   (0xFFFFU)
#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_SHIFT   (0U)
#define BEE_ADDR_OFFSET0_ADDR_OFFSET0(x)
#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_MASK   (0xFFFF0000U)
#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_SHIFT   (16U)
#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK(x)

ADDR_OFFSET1 - Offset region 1 Register

#define BEE_ADDR_OFFSET1_ADDR_OFFSET1_MASK   (0xFFFFU)
#define BEE_ADDR_OFFSET1_ADDR_OFFSET1_SHIFT   (0U)
#define BEE_ADDR_OFFSET1_ADDR_OFFSET1(x)
#define BEE_ADDR_OFFSET1_ADDR_OFFSET1_LOCK_MASK   (0xFFFF0000U)
#define BEE_ADDR_OFFSET1_ADDR_OFFSET1_LOCK_SHIFT   (16U)
#define BEE_ADDR_OFFSET1_ADDR_OFFSET1_LOCK(x)

AES_KEY0_W0 - AES Key 0 Register

#define BEE_AES_KEY0_W0_KEY0_MASK   (0xFFFFFFFFU)
#define BEE_AES_KEY0_W0_KEY0_SHIFT   (0U)
#define BEE_AES_KEY0_W0_KEY0(x)

AES_KEY0_W1 - AES Key 1 Register

#define BEE_AES_KEY0_W1_KEY1_MASK   (0xFFFFFFFFU)
#define BEE_AES_KEY0_W1_KEY1_SHIFT   (0U)
#define BEE_AES_KEY0_W1_KEY1(x)

AES_KEY0_W2 - AES Key 2 Register

#define BEE_AES_KEY0_W2_KEY2_MASK   (0xFFFFFFFFU)
#define BEE_AES_KEY0_W2_KEY2_SHIFT   (0U)
#define BEE_AES_KEY0_W2_KEY2(x)

AES_KEY0_W3 - AES Key 3 Register

#define BEE_AES_KEY0_W3_KEY3_MASK   (0xFFFFFFFFU)
#define BEE_AES_KEY0_W3_KEY3_SHIFT   (0U)
#define BEE_AES_KEY0_W3_KEY3(x)

STATUS - Status Register

#define BEE_STATUS_IRQ_VEC_MASK   (0xFFU)
#define BEE_STATUS_IRQ_VEC_SHIFT   (0U)
#define BEE_STATUS_IRQ_VEC(x)
#define BEE_STATUS_BEE_IDLE_MASK   (0x100U)
#define BEE_STATUS_BEE_IDLE_SHIFT   (8U)
#define BEE_STATUS_BEE_IDLE(x)
#define TRNG_STATUS_TF1BR0_MASK   (0x1U)
#define TRNG_STATUS_TF1BR0_SHIFT   (0U)
#define TRNG_STATUS_TF1BR0(x)
#define TRNG_STATUS_TF1BR1_MASK   (0x2U)
#define TRNG_STATUS_TF1BR1_SHIFT   (1U)
#define TRNG_STATUS_TF1BR1(x)
#define TRNG_STATUS_TF2BR0_MASK   (0x4U)
#define TRNG_STATUS_TF2BR0_SHIFT   (2U)
#define TRNG_STATUS_TF2BR0(x)
#define TRNG_STATUS_TF2BR1_MASK   (0x8U)
#define TRNG_STATUS_TF2BR1_SHIFT   (3U)
#define TRNG_STATUS_TF2BR1(x)
#define TRNG_STATUS_TF3BR0_MASK   (0x10U)
#define TRNG_STATUS_TF3BR0_SHIFT   (4U)
#define TRNG_STATUS_TF3BR0(x)
#define TRNG_STATUS_TF3BR1_MASK   (0x20U)
#define TRNG_STATUS_TF3BR1_SHIFT   (5U)
#define TRNG_STATUS_TF3BR1(x)
#define TRNG_STATUS_TF4BR0_MASK   (0x40U)
#define TRNG_STATUS_TF4BR0_SHIFT   (6U)
#define TRNG_STATUS_TF4BR0(x)
#define TRNG_STATUS_TF4BR1_MASK   (0x80U)
#define TRNG_STATUS_TF4BR1_SHIFT   (7U)
#define TRNG_STATUS_TF4BR1(x)
#define TRNG_STATUS_TF5BR0_MASK   (0x100U)
#define TRNG_STATUS_TF5BR0_SHIFT   (8U)
#define TRNG_STATUS_TF5BR0(x)
#define TRNG_STATUS_TF5BR1_MASK   (0x200U)
#define TRNG_STATUS_TF5BR1_SHIFT   (9U)
#define TRNG_STATUS_TF5BR1(x)
#define TRNG_STATUS_TF6PBR0_MASK   (0x400U)
#define TRNG_STATUS_TF6PBR0_SHIFT   (10U)
#define TRNG_STATUS_TF6PBR0(x)
#define TRNG_STATUS_TF6PBR1_MASK   (0x800U)
#define TRNG_STATUS_TF6PBR1_SHIFT   (11U)
#define TRNG_STATUS_TF6PBR1(x)
#define TRNG_STATUS_TFSB_MASK   (0x1000U)
#define TRNG_STATUS_TFSB_SHIFT   (12U)
#define TRNG_STATUS_TFSB(x)
#define TRNG_STATUS_TFLR_MASK   (0x2000U)
#define TRNG_STATUS_TFLR_SHIFT   (13U)
#define TRNG_STATUS_TFLR(x)
#define TRNG_STATUS_TFP_MASK   (0x4000U)
#define TRNG_STATUS_TFP_SHIFT   (14U)
#define TRNG_STATUS_TFP(x)
#define TRNG_STATUS_TFMB_MASK   (0x8000U)
#define TRNG_STATUS_TFMB_SHIFT   (15U)
#define TRNG_STATUS_TFMB(x)
#define TRNG_STATUS_RETRY_CT_MASK   (0xF0000U)
#define TRNG_STATUS_RETRY_CT_SHIFT   (16U)
#define TRNG_STATUS_RETRY_CT(x)

CTR_NONCE0_W0 - NONCE00 Register

#define BEE_CTR_NONCE0_W0_NONCE00_MASK   (0xFFFFFFFFU)
#define BEE_CTR_NONCE0_W0_NONCE00_SHIFT   (0U)
#define BEE_CTR_NONCE0_W0_NONCE00(x)

CTR_NONCE0_W1 - NONCE01 Register

#define BEE_CTR_NONCE0_W1_NONCE01_MASK   (0xFFFFFFFFU)
#define BEE_CTR_NONCE0_W1_NONCE01_SHIFT   (0U)
#define BEE_CTR_NONCE0_W1_NONCE01(x)

CTR_NONCE0_W2 - NONCE02 Register

#define BEE_CTR_NONCE0_W2_NONCE02_MASK   (0xFFFFFFFFU)
#define BEE_CTR_NONCE0_W2_NONCE02_SHIFT   (0U)
#define BEE_CTR_NONCE0_W2_NONCE02(x)

CTR_NONCE0_W3 - NONCE03 Register

#define BEE_CTR_NONCE0_W3_NONCE03_MASK   (0xFFFFFFFFU)
#define BEE_CTR_NONCE0_W3_NONCE03_SHIFT   (0U)
#define BEE_CTR_NONCE0_W3_NONCE03(x)

CTR_NONCE1_W0 - NONCE10 Register

#define BEE_CTR_NONCE1_W0_NONCE10_MASK   (0xFFFFFFFFU)
#define BEE_CTR_NONCE1_W0_NONCE10_SHIFT   (0U)
#define BEE_CTR_NONCE1_W0_NONCE10(x)

CTR_NONCE1_W1 - NONCE11 Register

#define BEE_CTR_NONCE1_W1_NONCE11_MASK   (0xFFFFFFFFU)
#define BEE_CTR_NONCE1_W1_NONCE11_SHIFT   (0U)
#define BEE_CTR_NONCE1_W1_NONCE11(x)

CTR_NONCE1_W2 - NONCE12 Register

#define BEE_CTR_NONCE1_W2_NONCE12_MASK   (0xFFFFFFFFU)
#define BEE_CTR_NONCE1_W2_NONCE12_SHIFT   (0U)
#define BEE_CTR_NONCE1_W2_NONCE12(x)

CTR_NONCE1_W3 - NONCE13 Register

#define BEE_CTR_NONCE1_W3_NONCE13_MASK   (0xFFFFFFFFU)
#define BEE_CTR_NONCE1_W3_NONCE13_SHIFT   (0U)
#define BEE_CTR_NONCE1_W3_NONCE13(x)

REGION1_TOP - Region1 Top Address Register

#define BEE_REGION1_TOP_REGION1_TOP_MASK   (0xFFFFFFFFU)
#define BEE_REGION1_TOP_REGION1_TOP_SHIFT   (0U)
#define BEE_REGION1_TOP_REGION1_TOP(x)

REGION1_BOT - Region1 Bottom Address Register

#define BEE_REGION1_BOT_REGION1_BOT_MASK   (0xFFFFFFFFU)
#define BEE_REGION1_BOT_REGION1_BOT_SHIFT   (0U)
#define BEE_REGION1_BOT_REGION1_BOT(x)

Detailed Description

Macro Definition Documentation

◆ BEE_ADDR_OFFSET0_ADDR_OFFSET0

#define BEE_ADDR_OFFSET0_ADDR_OFFSET0 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET0_ADDR_OFFSET0_SHIFT)) & BEE_ADDR_OFFSET0_ADDR_OFFSET0_MASK)

◆ BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK

#define BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_SHIFT)) & BEE_ADDR_OFFSET0_ADDR_OFFSET0_LOCK_MASK)

◆ BEE_ADDR_OFFSET1_ADDR_OFFSET1

#define BEE_ADDR_OFFSET1_ADDR_OFFSET1 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET1_ADDR_OFFSET1_SHIFT)) & BEE_ADDR_OFFSET1_ADDR_OFFSET1_MASK)

◆ BEE_ADDR_OFFSET1_ADDR_OFFSET1_LOCK

#define BEE_ADDR_OFFSET1_ADDR_OFFSET1_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_ADDR_OFFSET1_ADDR_OFFSET1_LOCK_SHIFT)) & BEE_ADDR_OFFSET1_ADDR_OFFSET1_LOCK_MASK)

◆ BEE_AES_KEY0_W0_KEY0

#define BEE_AES_KEY0_W0_KEY0 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W0_KEY0_SHIFT)) & BEE_AES_KEY0_W0_KEY0_MASK)

KEY0 - AES 128 key from software

◆ BEE_AES_KEY0_W1_KEY1

#define BEE_AES_KEY0_W1_KEY1 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W1_KEY1_SHIFT)) & BEE_AES_KEY0_W1_KEY1_MASK)

KEY1 - AES 128 key from software

◆ BEE_AES_KEY0_W2_KEY2

#define BEE_AES_KEY0_W2_KEY2 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W2_KEY2_SHIFT)) & BEE_AES_KEY0_W2_KEY2_MASK)

KEY2 - AES 128 key from software

◆ BEE_AES_KEY0_W3_KEY3

#define BEE_AES_KEY0_W3_KEY3 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_AES_KEY0_W3_KEY3_SHIFT)) & BEE_AES_KEY0_W3_KEY3_MASK)

KEY3 - AES 128 key from software

◆ BEE_CTR_NONCE0_W0_NONCE00

#define BEE_CTR_NONCE0_W0_NONCE00 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W0_NONCE00_SHIFT)) & BEE_CTR_NONCE0_W0_NONCE00_MASK)

◆ BEE_CTR_NONCE0_W1_NONCE01

#define BEE_CTR_NONCE0_W1_NONCE01 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W1_NONCE01_SHIFT)) & BEE_CTR_NONCE0_W1_NONCE01_MASK)

◆ BEE_CTR_NONCE0_W2_NONCE02

#define BEE_CTR_NONCE0_W2_NONCE02 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W2_NONCE02_SHIFT)) & BEE_CTR_NONCE0_W2_NONCE02_MASK)

◆ BEE_CTR_NONCE0_W3_NONCE03

#define BEE_CTR_NONCE0_W3_NONCE03 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE0_W3_NONCE03_SHIFT)) & BEE_CTR_NONCE0_W3_NONCE03_MASK)

◆ BEE_CTR_NONCE1_W0_NONCE10

#define BEE_CTR_NONCE1_W0_NONCE10 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W0_NONCE10_SHIFT)) & BEE_CTR_NONCE1_W0_NONCE10_MASK)

◆ BEE_CTR_NONCE1_W1_NONCE11

#define BEE_CTR_NONCE1_W1_NONCE11 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W1_NONCE11_SHIFT)) & BEE_CTR_NONCE1_W1_NONCE11_MASK)

◆ BEE_CTR_NONCE1_W2_NONCE12

#define BEE_CTR_NONCE1_W2_NONCE12 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W2_NONCE12_SHIFT)) & BEE_CTR_NONCE1_W2_NONCE12_MASK)

◆ BEE_CTR_NONCE1_W3_NONCE13

#define BEE_CTR_NONCE1_W3_NONCE13 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTR_NONCE1_W3_NONCE13_SHIFT)) & BEE_CTR_NONCE1_W3_NONCE13_MASK)

◆ BEE_CTRL_AC_PROT_EN

#define BEE_CTRL_AC_PROT_EN ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_AC_PROT_EN_SHIFT)) & BEE_CTRL_AC_PROT_EN_MASK)

◆ BEE_CTRL_AC_PROT_EN_LOCK

#define BEE_CTRL_AC_PROT_EN_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_AC_PROT_EN_LOCK_SHIFT)) & BEE_CTRL_AC_PROT_EN_LOCK_MASK)

◆ BEE_CTRL_BEE_ENABLE

#define BEE_CTRL_BEE_ENABLE ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_BEE_ENABLE_SHIFT)) & BEE_CTRL_BEE_ENABLE_MASK)

BEE_ENABLE 0b0..Disable BEE 0b1..Enable BEE

◆ BEE_CTRL_BEE_ENABLE_LOCK

#define BEE_CTRL_BEE_ENABLE_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_BEE_ENABLE_LOCK_SHIFT)) & BEE_CTRL_BEE_ENABLE_LOCK_MASK)

◆ BEE_CTRL_CTRL_AES_MODE_R0

#define BEE_CTRL_CTRL_AES_MODE_R0 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R0_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R0_MASK)

CTRL_AES_MODE_R0 0b0..ECB 0b1..CTR

◆ BEE_CTRL_CTRL_AES_MODE_R0_LOCK

#define BEE_CTRL_CTRL_AES_MODE_R0_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R0_LOCK_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R0_LOCK_MASK)

◆ BEE_CTRL_CTRL_AES_MODE_R1

#define BEE_CTRL_CTRL_AES_MODE_R1 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R1_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R1_MASK)

CTRL_AES_MODE_R1 0b0..ECB 0b1..CTR

◆ BEE_CTRL_CTRL_AES_MODE_R1_LOCK

#define BEE_CTRL_CTRL_AES_MODE_R1_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_AES_MODE_R1_LOCK_SHIFT)) & BEE_CTRL_CTRL_AES_MODE_R1_LOCK_MASK)

◆ BEE_CTRL_CTRL_CLK_EN

#define BEE_CTRL_CTRL_CLK_EN ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_CLK_EN_SHIFT)) & BEE_CTRL_CTRL_CLK_EN_MASK)

◆ BEE_CTRL_CTRL_CLK_EN_LOCK

#define BEE_CTRL_CTRL_CLK_EN_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_CLK_EN_LOCK_SHIFT)) & BEE_CTRL_CTRL_CLK_EN_LOCK_MASK)

◆ BEE_CTRL_CTRL_SFTRST_N

#define BEE_CTRL_CTRL_SFTRST_N ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_SFTRST_N_SHIFT)) & BEE_CTRL_CTRL_SFTRST_N_MASK)

◆ BEE_CTRL_CTRL_SFTRST_N_LOCK

#define BEE_CTRL_CTRL_SFTRST_N_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_CTRL_SFTRST_N_LOCK_SHIFT)) & BEE_CTRL_CTRL_SFTRST_N_LOCK_MASK)

◆ BEE_CTRL_KEY_REGION_SEL

#define BEE_CTRL_KEY_REGION_SEL ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_REGION_SEL_SHIFT)) & BEE_CTRL_KEY_REGION_SEL_MASK)

KEY_REGION_SEL 0b0..Load AES key for region0 0b1..Load AES key for region1

◆ BEE_CTRL_KEY_REGION_SEL_LOCK

#define BEE_CTRL_KEY_REGION_SEL_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_REGION_SEL_LOCK_SHIFT)) & BEE_CTRL_KEY_REGION_SEL_LOCK_MASK)

◆ BEE_CTRL_KEY_VALID

#define BEE_CTRL_KEY_VALID ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_VALID_SHIFT)) & BEE_CTRL_KEY_VALID_MASK)

◆ BEE_CTRL_KEY_VALID_LOCK

#define BEE_CTRL_KEY_VALID_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_KEY_VALID_LOCK_SHIFT)) & BEE_CTRL_KEY_VALID_LOCK_MASK)

◆ BEE_CTRL_LITTLE_ENDIAN

#define BEE_CTRL_LITTLE_ENDIAN ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_LITTLE_ENDIAN_SHIFT)) & BEE_CTRL_LITTLE_ENDIAN_MASK)

LITTLE_ENDIAN 0b0..The input and output data of the AES core is swapped as below: {B15,B14,B13,B12,B11,B10,B9,B8, B7,B6,B5,B4,B3,B2,B1,B0} swap to {B0,B1,B2,B3,B4,B5,B6,B7, B8,B9,B10,B11,B12,B13,B14,B15}, where B0~B15 refers to Byte0 to Byte15. 0b1..The input and output data of AES core is not swapped.

◆ BEE_CTRL_LITTLE_ENDIAN_LOCK

#define BEE_CTRL_LITTLE_ENDIAN_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_LITTLE_ENDIAN_LOCK_SHIFT)) & BEE_CTRL_LITTLE_ENDIAN_LOCK_MASK)

◆ BEE_CTRL_REGION0_KEY_LOCK

#define BEE_CTRL_REGION0_KEY_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION0_KEY_LOCK_SHIFT)) & BEE_CTRL_REGION0_KEY_LOCK_MASK)

◆ BEE_CTRL_REGION1_ADDR_LOCK

#define BEE_CTRL_REGION1_ADDR_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION1_ADDR_LOCK_SHIFT)) & BEE_CTRL_REGION1_ADDR_LOCK_MASK)

◆ BEE_CTRL_REGION1_KEY_LOCK

#define BEE_CTRL_REGION1_KEY_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_REGION1_KEY_LOCK_SHIFT)) & BEE_CTRL_REGION1_KEY_LOCK_MASK)

◆ BEE_CTRL_SECURITY_LEVEL_R0

#define BEE_CTRL_SECURITY_LEVEL_R0 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R0_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R0_MASK)

◆ BEE_CTRL_SECURITY_LEVEL_R0_LOCK

#define BEE_CTRL_SECURITY_LEVEL_R0_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R0_LOCK_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R0_LOCK_MASK)

◆ BEE_CTRL_SECURITY_LEVEL_R1

#define BEE_CTRL_SECURITY_LEVEL_R1 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R1_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R1_MASK)

◆ BEE_CTRL_SECURITY_LEVEL_R1_LOCK

#define BEE_CTRL_SECURITY_LEVEL_R1_LOCK ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_CTRL_SECURITY_LEVEL_R1_LOCK_SHIFT)) & BEE_CTRL_SECURITY_LEVEL_R1_LOCK_MASK)

◆ BEE_REGION1_BOT_REGION1_BOT

#define BEE_REGION1_BOT_REGION1_BOT ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_REGION1_BOT_REGION1_BOT_SHIFT)) & BEE_REGION1_BOT_REGION1_BOT_MASK)

REGION1_BOT - Address lower limit of region1

◆ BEE_REGION1_TOP_REGION1_TOP

#define BEE_REGION1_TOP_REGION1_TOP ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_REGION1_TOP_REGION1_TOP_SHIFT)) & BEE_REGION1_TOP_REGION1_TOP_MASK)

REGION1_TOP - Address upper limit of region1

◆ BEE_STATUS_BEE_IDLE

#define BEE_STATUS_BEE_IDLE ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_STATUS_BEE_IDLE_SHIFT)) & BEE_STATUS_BEE_IDLE_MASK)

◆ BEE_STATUS_IRQ_VEC

#define BEE_STATUS_IRQ_VEC ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << BEE_STATUS_IRQ_VEC_SHIFT)) & BEE_STATUS_IRQ_VEC_MASK)

◆ TRNG_STATUS_RETRY_CT

#define TRNG_STATUS_RETRY_CT ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_RETRY_CT_SHIFT)) & TRNG_STATUS_RETRY_CT_MASK)

◆ TRNG_STATUS_TF1BR0

#define TRNG_STATUS_TF1BR0 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF1BR0_SHIFT)) & TRNG_STATUS_TF1BR0_MASK)

◆ TRNG_STATUS_TF1BR1

#define TRNG_STATUS_TF1BR1 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF1BR1_SHIFT)) & TRNG_STATUS_TF1BR1_MASK)

◆ TRNG_STATUS_TF2BR0

#define TRNG_STATUS_TF2BR0 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF2BR0_SHIFT)) & TRNG_STATUS_TF2BR0_MASK)

◆ TRNG_STATUS_TF2BR1

#define TRNG_STATUS_TF2BR1 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF2BR1_SHIFT)) & TRNG_STATUS_TF2BR1_MASK)

◆ TRNG_STATUS_TF3BR0

#define TRNG_STATUS_TF3BR0 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF3BR0_SHIFT)) & TRNG_STATUS_TF3BR0_MASK)

◆ TRNG_STATUS_TF3BR1

#define TRNG_STATUS_TF3BR1 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF3BR1_SHIFT)) & TRNG_STATUS_TF3BR1_MASK)

◆ TRNG_STATUS_TF4BR0

#define TRNG_STATUS_TF4BR0 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR0_SHIFT)) & TRNG_STATUS_TF4BR0_MASK)

◆ TRNG_STATUS_TF4BR1

#define TRNG_STATUS_TF4BR1 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)

◆ TRNG_STATUS_TF5BR0

#define TRNG_STATUS_TF5BR0 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF5BR0_SHIFT)) & TRNG_STATUS_TF5BR0_MASK)

◆ TRNG_STATUS_TF5BR1

#define TRNG_STATUS_TF5BR1 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF5BR1_SHIFT)) & TRNG_STATUS_TF5BR1_MASK)

◆ TRNG_STATUS_TF6PBR0

#define TRNG_STATUS_TF6PBR0 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF6PBR0_SHIFT)) & TRNG_STATUS_TF6PBR0_MASK)

◆ TRNG_STATUS_TF6PBR1

#define TRNG_STATUS_TF6PBR1 ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF6PBR1_SHIFT)) & TRNG_STATUS_TF6PBR1_MASK)

◆ TRNG_STATUS_TFLR

#define TRNG_STATUS_TFLR ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFLR_SHIFT)) & TRNG_STATUS_TFLR_MASK)

◆ TRNG_STATUS_TFMB

#define TRNG_STATUS_TFMB ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFMB_SHIFT)) & TRNG_STATUS_TFMB_MASK)

◆ TRNG_STATUS_TFP

#define TRNG_STATUS_TFP ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFP_SHIFT)) & TRNG_STATUS_TFP_MASK)

◆ TRNG_STATUS_TFSB

#define TRNG_STATUS_TFSB ( x)
Value:
(((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TFSB_SHIFT)) & TRNG_STATUS_TFSB_MASK)
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