RTEMS: bsps/powerpc/include/libcpu/vectors.h Source File

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vectors.h
1/*
2 * vectors.h Exception frame related contant and API.
3 *
4 * This include file describe the data structure and the functions implemented
5 * by rtems to handle exceptions.
6 *
7 *
8 * MPC5xx port sponsored by Defence Research and Development Canada - Suffield
9 * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
10 *
11 * Derived from libbsp/powerpc/mbx8xx/vectors/vectors.h:
12 *
13 * CopyRight (C) 1999 valette@crf.canon.fr
14 *
15 * The license and distribution terms for this file may be
16 * found in the file LICENSE in this distribution or at
17 * http://www.rtems.org/license/LICENSE.
18 */
19#ifndef _LIBCPU_VECTORS_H
20#define _LIBCPU_VECTORS_H
21
22#include <bsp/vectors.h>
23
24/*
25 * Size of hardware vector table.
26 */
27#define NUM_EXCEPTIONS 0x20
28
29#ifndef ASM
30
31/*
32 * default raw exception handlers
33 */
34
35extern void default_exception_vector_code_prolog(void);
36extern int default_exception_vector_code_prolog_size;
37extern void initialize_exceptions(void);
38
39typedef void rtems_exception_handler_t (CPU_Exception_frame* excPtr);
40
41/*
42 * Exception handler table.
43 *
44 * This table contains pointers to assembly-language exception handlers.
45 * The common exception prologue in vectors.S looks up an entry in this
46 * table and jumps to it. No return address is saved, so the handlers in
47 * this table must return directly to the interrupted code.
48 *
49 * On entry to an exception handler, R1 points to a new exception stack
50 * frame in which R3, R4, and LR have been saved. R4 holds the exception
51 * number.
52 */
53extern rtems_exception_handler_t* exception_handler_table[NUM_EXCEPTIONS];
54
55#endif /* ASM */
56
57#endif /* _LIBCPU_VECTORS_H */
vectors.h
PowerPC Exceptions API.
CPU_Exception_frame
The set of registers that specifies the complete processor state.
Definition: cpu.h:629