RTEMS: bsps/m68k/mrm332/include/mrm332.h Source File

| RTEMS 5.4-rc2

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mrm332.h
1/* mrm332.h
2 */
3
4#ifndef _MRM332_H_
5#define _MRM332_H_
6
7/* SIM_MM (SIM Module Mapping) determines the location of the control
8 register block. When MM=0, register addresses range fom 0x7ff000 to
9 0x7FFFFF. When MM=1, register addresses range from 0xfff000 to
10 0xffffff. */
11#define SIM_MM 1
12
13/* Interrupt related definitions */
14#define SIM_IARB 15
15#define QSM_IARB 10
16
17#define MRM_PIV 64
18#define ISRL_PIT 4 /* zero disables PIT */
19
20#define EFI_QIVR 66 /* 66=>SCI and 67=>QSPI interrupt */
21#define ISRL_QSPI 0
22
23#define EFI_SPINT 24 /* spurious interrupt */
24#define EFI_INT1 25 /* CTS interrupt */
25#define ISRL_SCI 6
26
27/* System Clock definitions */
28#define XTAL 32768.0 /* crystal frequency in Hz */
29
30/* Specify the CPU frequency. Do not specify a faster clock than your */
31/* CPU is rated for! */
32#if 0
33/* Default MRM clock rate (8.388688 MHz) set by CPU32: */
34#define MRM_W 0 /* system clock parameters */
35#define MRM_X 0
36#define MRM_Y 0x3f
37#endif
38
39#if 0
40/* 16.77722 MHz: */
41#define MRM_W 1 /* system clock parameters */
42#define MRM_X 1
43#define MRM_Y 0x0f
44#endif
45
46#if 1
47/* 25.16582 MHz: */
48#define MRM_W 1 /* system clock parameters */
49#define MRM_X 1
50#define MRM_Y 0x17
51#define SET_EDIV
52#endif
53
54#define SYS_CLOCK (XTAL*4.0*(MRM_Y+1)*(1 << (2*MRM_W+MRM_X)))
55#define SCI_BAUD 19200 /* RS232 Baud Rate */
56
57/* macros/functions */
58
59#ifndef ASM
60
61/*
62 * This prototype really should have the noreturn attribute but
63 * that causes a warning. Not sure how to fix that.
64 */
65/* static void reboot(void) __attribute__ ((noreturn)); */
66static void reboot(void);
67__inline__ static void reboot() {__asm__ ("trap #15; .word 0x0063");}
68
69#endif /* ASM */
70
71#endif /* _MRM_H_ */