RTEMS: bsps/include/grlib/grpci2.h Source File

| RTEMS 5.4-rc2

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grpci2.h
1/* GRLIB GRPCI2 PCI HOST driver.
2 *
3 * COPYRIGHT (c) 2011
4 * Cobham Gaisler AB.
5 *
6 * The license and distribution terms for this file may be
7 * found in found in the file LICENSE in this distribution or at
8 * http://www.rtems.org/license/LICENSE.
9 */
10
11#ifndef __GRPCI2_H__
12#define __GRPCI2_H__
13
14#ifdef __cplusplus
15extern "C" {
16#endif
17
18extern void grpci2_register_drv(void);
19
20/* Driver Resources:
21 *
22 * PCI Interrupts
23 * ==============
24 * The interrupt settings are normally autodetected from Plyg&Play, however
25 * if IRQs are routed using custom GPIO pins in order to reduce the PIN count
26 * reserved for PCI, the options below can be used to tell GRPCI2 driver which
27 * System IRQ a PCI interrupt is connected to.
28 * Name="INTA#", Type=INT, System Interrupt number that PCI INTA is connected to
29 * Name="INTB#", Type=INT, System Interrupt number that PCI INTB is connected to
30 * Name="INTC#", Type=INT, System Interrupt number that PCI INTC is connected to
31 * Name="INTD#", Type=INT, System Interrupt number that PCI INTD is connected to
32 *
33 * Name="IRQmask", Type=INT,
34 *
35 * PCI Bytetwisting (endianess)
36 * ============================
37 * Name="byteTwisting", Type=INT, Enable/Disable Bytetwisting by hardware
38 *
39 * PCI Latency timer
40 * ============================
41 * Name="latencyTimer", Type=INT, Set the latency timer
42 *
43 * PCI Host's Target BARs setup
44 * ============================
45 * The Host's BARs are not configured by the configuration routines, by default
46 * the BARs are configured disabled (BAR=0) except for BAR0 which is mapped to
47 * the Main Memory for the Host.
48 * Name="tgtBarCfg", Type=PTR (*grpci2_pcibar_cfg), Target PCI BARs of Host
49 */
50
51/* When the Host acts as a target on the PCI bus, the PCI BARs of the host's
52 * configuration space determine at which PCI address the Host will be accessed
53 * at and when accessing a BAR which AMBA address it will be translated to.
54 */
55 struct grpci2_pcibar_cfg {
56 unsigned int pciadr; /* PCI address of BAR (BAR content) */
57 unsigned int ahbadr; /* 'pciadr' translated to this AHB Address */
58 unsigned int barsize; /* PCI BAR Size, must be a power of 2 */
59};
60
61#ifdef __cplusplus
62}
63#endif
64
65#endif
grpci2_pcibar_cfg
Definition: grpci2.h:55