RTEMS: cpukit/score/cpu/mips/include/rtems/mips/iregdef.h Source File

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iregdef.h
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1
11/*
12 * Copyright 1989 Integrated Device Technology, Inc
13 * All Rights Reserved
14 *
15 * Based upon IDT provided code with the following release:
16 *
17 * This source code has been made available to you by IDT on an AS-IS
18 * basis. Anyone receiving this source is licensed under IDT copyrights
19 * to use it in any way he or she deems fit, including copying it,
20 * modifying it, compiling it, and redistributing it either with or
21 * without modifications. No license under IDT patents or patent
22 * applications is to be implied by the copyright license.
23 *
24 * Any user of this software should understand that IDT cannot provide
25 * technical support for this software and will not be responsible for
26 * any consequences resulting from the use of this software.
27 *
28 * Any person who transfers this source code or any derivative work must
29 * include the IDT copyright notice, this paragraph, and the preceeding
30 * two paragraphs in the transferred software.
31 *
32 * COPYRIGHT IDT CORPORATION 1996
33 * LICENSED MATERIAL - PROGRAM PROPERTY OF IDT
34 */
35
36#ifndef _RTEMS_MIPS_IREGDEF_H
37#define _RTEMS_MIPS_IREGDEF_H
38
47/* register names */
48
49#define r0 $0
50#define r1 $1
51#define r2 $2
52#define r3 $3
53#define r4 $4
54#define r5 $5
55#define r6 $6
56#define r7 $7
57#define r8 $8
58#define r9 $9
59#define r10 $10
60#define r11 $11
61#define r12 $12
62#define r13 $13
63
64#define r14 $14
65#define r15 $15
66#define r16 $16
67#define r17 $17
68#define r18 $18
69#define r19 $19
70#define r20 $20
71#define r21 $21
72#define r22 $22
73#define r23 $23
74#define r24 $24
75#define r25 $25
76#define r26 $26
77#define r27 $27
78#define r28 $28
79#define r29 $29
80#define r30 $30
81#define r31 $31
82
83#define fp0 $f0
84#define fp1 $f1
85#define fp2 $f2
86#define fp3 $f3
87#define fp4 $f4
88#define fp5 $f5
89#define fp6 $f6
90#define fp7 $f7
91#define fp8 $f8
92#define fp9 $f9
93#define fp10 $f10
94#define fp11 $f11
95#define fp12 $f12
96#define fp13 $f13
97#define fp14 $f14
98#define fp15 $f15
99#define fp16 $f16
100#define fp17 $f17
101#define fp18 $f18
102#define fp19 $f19
103#define fp20 $f20
104#define fp21 $f21
105#define fp22 $f22
106#define fp23 $f23
107#define fp24 $f24
108#define fp25 $f25
109#define fp26 $f26
110#define fp27 $f27
111#define fp28 $f28
112#define fp29 $f29
113#define fp30 $f30
114#define fp31 $f31
115
116#define fcr0 $0
117#define fcr30 $30
118#define fcr31 $31
119
120#define zero $0 /* wired zero */
121#define AT $at /* assembler temp */
122#define v0 $2 /* return value */
123#define v1 $3
124#define a0 $4 /* argument registers a0-a3 */
125#define a1 $5
126#define a2 $6
127#define a3 $7
128#define t0 $8 /* caller saved t0-t9 */
129#define t1 $9
130#define t2 $10
131#define t3 $11
132#define t4 $12
133#define t5 $13
134#define t6 $14
135#define t7 $15
136#define s0 $16 /* callee saved s0-s8 */
137#define s1 $17
138#define s2 $18
139#define s3 $19
140#define s4 $20
141#define s5 $21
142#define s6 $22
143#define s7 $23
144#define t8 $24
145#define t9 $25
146#define k0 $26 /* kernel usage */
147#define k1 $27 /* kernel usage */
148#define gp $28 /* sdata pointer */
149#define sp $29 /* stack pointer */
150#define s8 $30 /* yet another saved reg for the callee */
151#define fp $30 /* frame pointer - this is being phased out by MIPS */
152#define ra $31 /* return address */
153
154
155/*
156** relative position of registers in interrupt/exception frame
157*/
158#define R_R0 0
159#define R_R1 1
160#define R_R2 2
161#define R_R3 3
162#define R_R4 4
163#define R_R5 5
164#define R_R6 6
165#define R_R7 7
166#define R_R8 8
167#define R_R9 9
168#define R_R10 10
169#define R_R11 11
170#define R_R12 12
171#define R_R13 13
172#define R_R14 14
173#define R_R15 15
174#define R_R16 16
175#define R_R17 17
176#define R_R18 18
177#define R_R19 19
178#define R_R20 20
179#define R_R21 21
180#define R_R22 22
181#define R_R23 23
182#define R_R24 24
183#define R_R25 25
184#define R_R26 26
185#define R_R27 27
186#define R_R28 28
187#define R_R29 29
188#define R_R30 30
189#define R_R31 31
190
191#define R_SR 32
192#define R_MDLO 33
193#define R_MDHI 34
194#define R_BADVADDR 35
195#define R_CAUSE 36
196#define R_EPC 37
197
198#define R_F0 38
199#define R_F1 39
200#define R_F2 40
201#define R_F3 41
202#define R_F4 42
203#define R_F5 43
204#define R_F6 44
205#define R_F7 45
206#define R_F8 46
207#define R_F9 47
208#define R_F10 48
209#define R_F11 49
210#define R_F12 50
211#define R_F13 41
212#define R_F14 42
213#define R_F15 43
214#define R_F16 44
215#define R_F17 45
216#define R_F18 56
217#define R_F19 57
218#define R_F20 58
219#define R_F21 59
220#define R_F22 60
221#define R_F23 61
222#define R_F24 62
223#define R_F25 63
224#define R_F26 64
225#define R_F27 65
226#define R_F28 66
227#define R_F29 67
228#define R_F30 68
229#define R_F31 69
230#define R_FCSR 70
231#define R_FEIR 71
232#define R_TLBHI 72
233
234#if __mips == 1
235#define R_TLBLO 73
236#endif
237#if (__mips == 3 ) || ( __mips == 32)
238#define R_TLBLO0 73
239#endif
240
241#define R_INX 74
242#define R_RAND 75
243#define R_CTXT 76
244#define R_EXCTYPE 77
245#define R_MODE 78
246#define R_PRID 79
247#define R_TAR 80
248#if __mips == 1
249#define NREGS 81
250#endif
251#if (__mips == 3 ) || ( __mips == 32)
252#define R_TLBLO1 81
253#define R_PAGEMASK 82
254#define R_WIRED 83
255#define R_COUNT 84
256#define R_COMPARE 85
257#define R_CONFIG 86
258#define R_LLADDR 87
259#define R_WATCHLO 88
260#define R_WATCHHI 89
261#define R_ECC 90
262#define R_CACHEERR 91
263#define R_TAGLO 92
264#define R_TAGHI 93
265#define R_ERRPC 94
266#define R_XCTXT 95 /* Ketan added from SIM64bit */
267
268#define NREGS 96
269#endif
270
271/*
272** For those who like to think in terms of the compiler names for the regs
273*/
274#define R_ZERO R_R0
275#define R_AT R_R1
276#define R_V0 R_R2
277#define R_V1 R_R3
278#define R_A0 R_R4
279#define R_A1 R_R5
280#define R_A2 R_R6
281#define R_A3 R_R7
282#define R_T0 R_R8
283#define R_T1 R_R9
284#define R_T2 R_R10
285#define R_T3 R_R11
286#define R_T4 R_R12
287#define R_T5 R_R13
288#define R_T6 R_R14
289#define R_T7 R_R15
290#define R_S0 R_R16
291#define R_S1 R_R17
292#define R_S2 R_R18
293#define R_S3 R_R19
294#define R_S4 R_R20
295#define R_S5 R_R21
296#define R_S6 R_R22
297#define R_S7 R_R23
298#define R_T8 R_R24
299#define R_T9 R_R25
300#define R_K0 R_R26
301#define R_K1 R_R27
302#define R_GP R_R28
303#define R_SP R_R29
304#define R_FP R_R30
305#define R_RA R_R31
306
307/* disabled for RTEMS */
308#if 0
309/* Ketan added the following */
310#if __mips == 1
311#define sreg sw
312#define lreg lw
313#define rmfc0 mfc0
314#define rmtc0 mtc0
315#define R_SZ 4
316#endif /* __mips == 1 */
317
318/* #ifdef __mips == 3 */
319#if __mips < 3
320#define sreg sw
321#define lreg lw
322#define rmfc0 mfc0
323#define rmtc0 mtc0
324#define R_SZ 4
325#else
326#define sreg sd
327#define lreg ld
328#define rmfc0 dmfc0
329#define rmtc0 dmtc0
330#define R_SZ 8
331#endif
332/* #endif __mips == 3 */
333/* Ketan till here */
334#endif
335
337#endif /* _RTEMS_MIPS_IREGDEF_H */