RTEMS: bsps/arm/stm32f4/include/bsp/io.h Source File

| RTEMS 5.4-rc2

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io.h
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1
7/*
8 * Copyright (c) 2012 Sebastian Huber. All rights reserved.
9 *
10 * embedded brains GmbH
11 * Obere Lagerstr. 30
12 * 82178 Puchheim
13 * Germany
14 * <rtems@embedded-brains.de>
15 *
16 * The license and distribution terms for this file may be
17 * found in the file LICENSE in this distribution or at
18 * http://www.rtems.org/license/LICENSE.
19 */
20
21#ifndef LIBBSP_ARM_STM32F4_IO_H
22#define LIBBSP_ARM_STM32F4_IO_H
23
24#include <stdbool.h>
25#include <stdint.h>
26#include <bspopts.h>
27
28#ifdef __cplusplus
29extern "C" {
30#endif /* __cplusplus */
31
39#define STM32F4_GPIO_PIN(port, index) ((((port) << 4) | (index)) & 0xff)
40
41#define STM32F4_GPIO_PORT_OF_PIN(pin) (((pin) >> 4) & 0xf)
42
43#define STM32F4_GPIO_INDEX_OF_PIN(pin) ((pin) & 0xf)
44
45#ifdef STM32F4_FAMILY_F4XXXX
46
52typedef enum {
53 STM32F4_GPIO_MODE_INPUT,
54 STM32F4_GPIO_MODE_OUTPUT,
55 STM32F4_GPIO_MODE_AF,
56 STM32F4_GPIO_MODE_ANALOG
57} stm32f4_gpio_mode;
58
59typedef enum {
60 STM32F4_GPIO_OTYPE_PUSH_PULL,
61 STM32F4_GPIO_OTYPE_OPEN_DRAIN
62} stm32f4_gpio_otype;
63
64typedef enum {
65 STM32F4_GPIO_OSPEED_2_MHZ,
66 STM32F4_GPIO_OSPEED_25_MHZ,
67 STM32F4_GPIO_OSPEED_50_MHZ,
68 STM32F4_GPIO_OSPEED_100_MHZ
69} stm32f4_gpio_ospeed;
70
71typedef enum {
72 STM32F4_GPIO_NO_PULL,
73 STM32F4_GPIO_PULL_UP,
74 STM32F4_GPIO_PULL_DOWN
75} stm32f4_gpio_pull;
76
77typedef enum {
78 STM32F4_GPIO_AF_SYSTEM = 0,
79 STM32F4_GPIO_AF_TIM1 = 1,
80 STM32F4_GPIO_AF_TIM2 = 1,
81 STM32F4_GPIO_AF_TIM3 = 2,
82 STM32F4_GPIO_AF_TIM4 = 2,
83 STM32F4_GPIO_AF_TIM5 = 2,
84 STM32F4_GPIO_AF_TIM8 = 3,
85 STM32F4_GPIO_AF_TIM9 = 3,
86 STM32F4_GPIO_AF_TIM10 = 3,
87 STM32F4_GPIO_AF_TIM11 = 3,
88 STM32F4_GPIO_AF_I2C1 = 4,
89 STM32F4_GPIO_AF_I2C2 = 4,
90 STM32F4_GPIO_AF_I2C3 = 4,
91 STM32F4_GPIO_AF_SPI1 = 5,
92 STM32F4_GPIO_AF_SPI2 = 5,
93 STM32F4_GPIO_AF_SPI3 = 6,
94 STM32F4_GPIO_AF_USART1 = 7,
95 STM32F4_GPIO_AF_USART2 = 7,
96 STM32F4_GPIO_AF_USART3 = 7,
97 STM32F4_GPIO_AF_UART4 = 8,
98 STM32F4_GPIO_AF_UART5 = 8,
99 STM32F4_GPIO_AF_USART6 = 8,
100 STM32F4_GPIO_AF_CAN1 = 9,
101 STM32F4_GPIO_AF_CAN2 = 9,
102 STM32F4_GPIO_AF_TIM12 = 9,
103 STM32F4_GPIO_AF_TIM13 = 9,
104 STM32F4_GPIO_AF_TIM14 = 9,
105 STM32F4_GPIO_AF_OTG_FS = 10,
106 STM32F4_GPIO_AF_OTG_HS = 10,
107 STM32F4_GPIO_AF_ETH = 11,
108 STM32F4_GPIO_AF_FSMC = 12,
109 STM32F4_GPIO_AF_OTG_HS_FS = 12,
110 STM32F4_GPIO_AF_SDIO = 12,
111 STM32F4_GPIO_AF_DCMI = 13,
112 STM32F4_GPIO_AF_EVENTOUT = 15
113} stm32f4_gpio_af;
114
115typedef union {
116 struct {
117 uint32_t pin_first : 8;
118 uint32_t pin_last : 8;
119 uint32_t mode : 2;
120 uint32_t otype : 1;
121 uint32_t ospeed : 2;
122 uint32_t pupd : 2;
123 uint32_t output : 1;
124 uint32_t af : 4;
125 uint32_t reserved : 4;
126 } fields;
127
128 uint32_t value;
129} stm32f4_gpio_config;
130
131#define STM32F4_GPIO_CONFIG_TERMINAL \
132 { { 0xff, 0xff, 0x3, 0x1, 0x3, 0x3, 0x1, 0xf, 0xf } }
133
136#endif /* STM32F4_FAMILY_F4XXXX */
137#ifdef STM32F4_FAMILY_F10XXX
138
144typedef enum {
145 STM32F4_GPIO_MODE_INPUT,
146 STM32F4_GPIO_MODE_OUTPUT_10MHz,
147 STM32F4_GPIO_MODE_OUTPUT_2MHz,
148 STM32F4_GPIO_MODE_OUTPUT_50MHz
149} stm32f4_gpio_mode;
150
151typedef enum {
152 STM32F4_GPIO_CNF_IN_ANALOG = 0,
153 STM32F4_GPIO_CNF_IN_FLOATING = 1,
154 STM32F4_GPIO_CNF_IN_PULL_UPDOWN = 2,
155
156 STM32F4_GPIO_CNF_OUT_GPIO_PP = 0,
157 STM32F4_GPIO_CNF_OUT_GPIO_OD = 1,
158 STM32F4_GPIO_CNF_OUT_AF_PP = 2,
159 STM32F4_GPIO_CNF_OUT_AF_OD = 3,
160} stm32f4_gpio_cnf;
161
162typedef enum {
163 STM32F4_GPIO_REMAP_DONT_CHANGE,
164 STM32F4_GPIO_REMAP_SPI1_0,
165 STM32F4_GPIO_REMAP_SPI1_1,
166 STM32F4_GPIO_REMAP_I2C1_0,
167 STM32F4_GPIO_REMAP_I2C1_1,
168 STM32F4_GPIO_REMAP_USART1_0,
169 STM32F4_GPIO_REMAP_USART1_1,
170 STM32F4_GPIO_REMAP_USART2_0,
171 STM32F4_GPIO_REMAP_USART2_1,
172 STM32F4_GPIO_REMAP_USART3_0,
173 STM32F4_GPIO_REMAP_USART3_1,
174 STM32F4_GPIO_REMAP_USART3_3,
175 STM32F4_GPIO_REMAP_TIM1_0,
176 STM32F4_GPIO_REMAP_TIM1_1,
177 STM32F4_GPIO_REMAP_TIM1_3,
178 STM32F4_GPIO_REMAP_TIM2_0,
179 STM32F4_GPIO_REMAP_TIM2_1,
180 STM32F4_GPIO_REMAP_TIM2_2,
181 STM32F4_GPIO_REMAP_TIM2_3,
182 STM32F4_GPIO_REMAP_TIM3_0,
183 STM32F4_GPIO_REMAP_TIM3_2,
184 STM32F4_GPIO_REMAP_TIM3_3,
185 STM32F4_GPIO_REMAP_TIM4_0,
186 STM32F4_GPIO_REMAP_TIM4_1,
187 STM32F4_GPIO_REMAP_CAN1_0,
188 STM32F4_GPIO_REMAP_CAN1_2,
189 STM32F4_GPIO_REMAP_CAN1_3,
190 STM32F4_GPIO_REMAP_PD01_0,
191 STM32F4_GPIO_REMAP_PD01_1,
192 STM32F4_GPIO_REMAP_TIM5CH4_0,
193 STM32F4_GPIO_REMAP_TIM5CH4_1,
194 STM32F4_GPIO_REMAP_ADC1_ETRGINJ_0,
195 STM32F4_GPIO_REMAP_ADC1_ETRGINJ_1,
196 STM32F4_GPIO_REMAP_ADC1_ETRGREG_0,
197 STM32F4_GPIO_REMAP_ADC1_ETRGREG_1,
198 STM32F4_GPIO_REMAP_ADC2_ETRGINJ_0,
199 STM32F4_GPIO_REMAP_ADC2_ETRGINJ_1,
200 STM32F4_GPIO_REMAP_ADC2_ETRGREG_0,
201 STM32F4_GPIO_REMAP_ADC2_ETRGREG_1,
202 STM32F4_GPIO_REMAP_ETH_0,
203 STM32F4_GPIO_REMAP_ETH_1,
204 STM32F4_GPIO_REMAP_CAN2_0,
205 STM32F4_GPIO_REMAP_CAN2_1,
206 STM32F4_GPIO_REMAP_MII_RMII_0,
207 STM32F4_GPIO_REMAP_MII_RMII_1,
208 STM32F4_GPIO_REMAP_SWJ_0,
209 STM32F4_GPIO_REMAP_SWJ_1,
210 STM32F4_GPIO_REMAP_SWJ_2,
211 STM32F4_GPIO_REMAP_SWJ_4,
212 STM32F4_GPIO_REMAP_SPI3_0,
213 STM32F4_GPIO_REMAP_SPI3_1,
214 STM32F4_GPIO_REMAP_TIM2ITR1_0,
215 STM32F4_GPIO_REMAP_TIM2ITR1_1,
216 STM32F4_GPIO_REMAP_PTP_PPS_0,
217 STM32F4_GPIO_REMAP_PTP_PPS_1,
218 STM32F4_GPIO_REMAP_TIM15_0,
219 STM32F4_GPIO_REMAP_TIM15_1,
220 STM32F4_GPIO_REMAP_TIM16_0,
221 STM32F4_GPIO_REMAP_TIM16_1,
222 STM32F4_GPIO_REMAP_TIM17_0,
223 STM32F4_GPIO_REMAP_TIM17_1,
224 STM32F4_GPIO_REMAP_CEC_0,
225 STM32F4_GPIO_REMAP_CEC_1,
226 STM32F4_GPIO_REMAP_TIM1_DMA_0,
227 STM32F4_GPIO_REMAP_TIM1_DMA_1,
228 STM32F4_GPIO_REMAP_TIM9_0,
229 STM32F4_GPIO_REMAP_TIM9_1,
230 STM32F4_GPIO_REMAP_TIM10_0,
231 STM32F4_GPIO_REMAP_TIM10_1,
232 STM32F4_GPIO_REMAP_TIM11_0,
233 STM32F4_GPIO_REMAP_TIM11_1,
234 STM32F4_GPIO_REMAP_TIM13_0,
235 STM32F4_GPIO_REMAP_TIM13_1,
236 STM32F4_GPIO_REMAP_TIM14_0,
237 STM32F4_GPIO_REMAP_TIM14_1,
238 STM32F4_GPIO_REMAP_FSMC_0,
239 STM32F4_GPIO_REMAP_FSMC_1,
240 STM32F4_GPIO_REMAP_TIM67_DAC_DMA_0,
241 STM32F4_GPIO_REMAP_TIM67_DAC_DMA_1,
242 STM32F4_GPIO_REMAP_TIM12_0,
243 STM32F4_GPIO_REMAP_TIM12_1,
244 STM32F4_GPIO_REMAP_MISC_0,
245 STM32F4_GPIO_REMAP_MISC_1,
246} stm32f4_gpio_remap;
247
248typedef union {
249 struct {
250 uint32_t pin_first : 8;
251 uint32_t pin_last : 8;
252 uint32_t mode : 2;
253 uint32_t cnf : 2;
254 uint32_t output : 1;
255 uint32_t remap : 8;
256 uint32_t reserved : 3;
257 } fields;
258
259 uint32_t value;
260} stm32f4_gpio_config;
261
262#define STM32F4_GPIO_CONFIG_TERMINAL \
263 { { 0xff, 0xff, 0x3, 0x3, 0x1, 0xff, 0x7 } }
264
267#endif /* STM32F4_FAMILY_F10XXX */
268
269extern const stm32f4_gpio_config stm32f4_start_config_gpio [];
270
271void stm32f4_gpio_set_clock(int pin, bool set);
272
273void stm32f4_gpio_set_config(const stm32f4_gpio_config *config);
274
279void stm32f4_gpio_set_config_array(const stm32f4_gpio_config *configs);
280
281void stm32f4_gpio_set_output(int pin, bool set);
282
283bool stm32f4_gpio_get_input(int pin);
284
285#ifdef STM32F4_FAMILY_F4XXXX
286
292#define STM32F4_PIN_USART(port, idx, altfunc) \
293 { \
294 { \
295 .pin_first = STM32F4_GPIO_PIN(port, idx), \
296 .pin_last = STM32F4_GPIO_PIN(port, idx), \
297 .mode = STM32F4_GPIO_MODE_AF, \
298 .otype = STM32F4_GPIO_OTYPE_PUSH_PULL, \
299 .ospeed = STM32F4_GPIO_OSPEED_2_MHZ, \
300 .pupd = STM32F4_GPIO_PULL_UP, \
301 .af = altfunc \
302 } \
303 }
304
305#define STM32F4_PIN_USART1_TX_PA9 STM32F4_PIN_USART(0, 9, STM32F4_GPIO_AF_USART1)
306#define STM32F4_PIN_USART1_TX_PB6 STM32F4_PIN_USART(1, 6, STM32F4_GPIO_AF_USART1)
307#define STM32F4_PIN_USART1_RX_PA10 STM32F4_PIN_USART(0, 10, STM32F4_GPIO_AF_USART1)
308#define STM32F4_PIN_USART1_RX_PB7 STM32F4_PIN_USART(1, 7, STM32F4_GPIO_AF_USART1)
309
310#define STM32F4_PIN_USART2_TX_PA2 STM32F4_PIN_USART(0, 2, STM32F4_GPIO_AF_USART2)
311#define STM32F4_PIN_USART2_TX_PD5 STM32F4_PIN_USART(3, 5, STM32F4_GPIO_AF_USART2)
312#define STM32F4_PIN_USART2_RX_PA3 STM32F4_PIN_USART(0, 3, STM32F4_GPIO_AF_USART2)
313#define STM32F4_PIN_USART2_RX_PD6 STM32F4_PIN_USART(3, 6, STM32F4_GPIO_AF_USART2)
314
315#define STM32F4_PIN_USART3_TX_PC10 STM32F4_PIN_USART(2, 10, STM32F4_GPIO_AF_USART3)
316#define STM32F4_PIN_USART3_TX_PD8 STM32F4_PIN_USART(3, 8, STM32F4_GPIO_AF_USART3)
317#define STM32F4_PIN_USART3_RX_PC11 STM32F4_PIN_USART(2, 11, STM32F4_GPIO_AF_USART3)
318#define STM32F4_PIN_USART3_RX_PD9 STM32F4_PIN_USART(3, 9, STM32F4_GPIO_AF_USART3)
319
320#define STM32F4_PIN_UART4_TX_PA0 STM32F4_PIN_USART(0, 0, STM32F4_GPIO_AF_UART4)
321#define STM32F4_PIN_UART4_TX_PC10 STM32F4_PIN_USART(2, 10, STM32F4_GPIO_AF_UART4)
322#define STM32F4_PIN_UART4_RX_PA1 STM32F4_PIN_USART(0, 1, STM32F4_GPIO_AF_UART4)
323#define STM32F4_PIN_UART4_RX_PC11 STM32F4_PIN_USART(2, 11, STM32F4_GPIO_AF_UART4)
324
325#define STM32F4_PIN_UART5_TX_PC12 STM32F4_PIN_USART(2, 12, STM32F4_GPIO_AF_UART5)
326#define STM32F4_PIN_UART5_RX_PD2 STM32F4_PIN_USART(3, 2, STM32F4_GPIO_AF_UART5)
327
328#define STM32F4_PIN_USART6_TX_PC6 STM32F4_PIN_USART(2, 6, STM32F4_GPIO_AF_USART6)
329#define STM32F4_PIN_USART6_RX_PC7 STM32F4_PIN_USART(2, 7, STM32F4_GPIO_AF_USART6)
330
333#endif /* STM32F4_FAMILY_F4XXXX */
334#ifdef STM32F4_FAMILY_F10XXX
335
341#define STM32F4_PIN_USART_TX(port, idx, remapvalue) \
342 { \
343 { \
344 .pin_first = STM32F4_GPIO_PIN(port, idx), \
345 .pin_last = STM32F4_GPIO_PIN(port, idx), \
346 .mode = STM32F4_GPIO_MODE_OUTPUT_2MHz, \
347 .cnf = STM32F4_GPIO_CNF_OUT_AF_PP, \
348 .output = 0, \
349 .remap = remapvalue \
350 } \
351 }
352
353#define STM32F4_PIN_USART_RX(port, idx, remapvalue) \
354 { \
355 { \
356 .pin_first = STM32F4_GPIO_PIN(port, idx), \
357 .pin_last = STM32F4_GPIO_PIN(port, idx), \
358 .mode = STM32F4_GPIO_MODE_INPUT, \
359 .cnf = STM32F4_GPIO_CNF_IN_FLOATING, \
360 .output = 0, \
361 .remap = remapvalue \
362 } \
363 }
364
365#define STM32F4_PIN_USART1_TX_MAP_0 STM32F4_PIN_USART_TX(0, 9, STM32F4_GPIO_REMAP_USART1_0)
366#define STM32F4_PIN_USART1_RX_MAP_0 STM32F4_PIN_USART_RX(0, 10, STM32F4_GPIO_REMAP_USART1_0)
367#define STM32F4_PIN_USART1_TX_MAP_1 STM32F4_PIN_USART_TX(1, 6, STM32F4_GPIO_REMAP_USART1_1)
368#define STM32F4_PIN_USART1_RX_MAP_1 STM32F4_PIN_USART_RX(1, 7, STM32F4_GPIO_REMAP_USART1_1)
369
370#define STM32F4_PIN_USART2_TX_MAP_0 STM32F4_PIN_USART_TX(0, 2, STM32F4_GPIO_REMAP_USART2_0)
371#define STM32F4_PIN_USART2_RX_MAP_0 STM32F4_PIN_USART_RX(0, 3, STM32F4_GPIO_REMAP_USART2_0)
372#define STM32F4_PIN_USART2_TX_MAP_1 STM32F4_PIN_USART_TX(3, 5, STM32F4_GPIO_REMAP_USART2_1)
373#define STM32F4_PIN_USART2_RX_MAP_1 STM32F4_PIN_USART_RX(3, 6, STM32F4_GPIO_REMAP_USART2_1)
374
375#define STM32F4_PIN_USART3_TX_MAP_0 STM32F4_PIN_USART_TX(1, 10, STM32F4_GPIO_REMAP_USART3_0)
376#define STM32F4_PIN_USART3_RX_MAP_0 STM32F4_PIN_USART_RX(1, 11, STM32F4_GPIO_REMAP_USART3_0)
377#define STM32F4_PIN_USART3_TX_MAP_1 STM32F4_PIN_USART_TX(2, 10, STM32F4_GPIO_REMAP_USART3_1)
378#define STM32F4_PIN_USART3_RX_MAP_1 STM32F4_PIN_USART_RX(2, 11, STM32F4_GPIO_REMAP_USART3_1)
379#define STM32F4_PIN_USART3_TX_MAP_3 STM32F4_PIN_USART_TX(3, 8, STM32F4_GPIO_REMAP_USART3_3)
380#define STM32F4_PIN_USART3_RX_MAP_3 STM32F4_PIN_USART_RX(3, 9, STM32F4_GPIO_REMAP_USART3_3)
381
382#define STM32F4_PIN_UART4_TX STM32F4_PIN_USART_TX(2, 10, STM32F4_GPIO_REMAP_DONT_CHANGE)
383#define STM32F4_PIN_UART4_RX STM32F4_PIN_USART_RX(2, 11, STM32F4_GPIO_REMAP_DONT_CHANGE)
384
385#define STM32F4_PIN_UART5_TX STM32F4_PIN_USART_TX(2, 12, STM32F4_GPIO_REMAP_DONT_CHANGE)
386#define STM32F4_PIN_UART5_RX STM32F4_PIN_USART_RX(3, 2, STM32F4_GPIO_REMAP_DONT_CHANGE)
387
388#define STM32F4_PIN_I2C(port, idx, remapvalue) \
389 { \
390 { \
391 .pin_first = STM32F4_GPIO_PIN(port, idx), \
392 .pin_last = STM32F4_GPIO_PIN(port, idx), \
393 .mode = STM32F4_GPIO_MODE_OUTPUT_2MHz, \
394 .cnf = STM32F4_GPIO_CNF_OUT_AF_OD, \
395 .output = 0, \
396 .remap = remapvalue \
397 } \
398 }
399
400#define STM32F4_PIN_I2C1_SCL_MAP0 STM32F4_PIN_I2C(1, 6, STM32F4_GPIO_REMAP_I2C1_0)
401#define STM32F4_PIN_I2C1_SDA_MAP0 STM32F4_PIN_I2C(1, 7, STM32F4_GPIO_REMAP_I2C1_0)
402#define STM32F4_PIN_I2C1_SCL_MAP1 STM32F4_PIN_I2C(1, 8, STM32F4_GPIO_REMAP_I2C1_1)
403#define STM32F4_PIN_I2C1_SDA_MAP1 STM32F4_PIN_I2C(1, 9, STM32F4_GPIO_REMAP_I2C1_1)
404
405#define STM32F4_PIN_I2C2_SCL STM32F4_PIN_I2C(1, 10, STM32F4_GPIO_REMAP_DONT_CHANGE)
406#define STM32F4_PIN_I2C2_SDA STM32F4_PIN_I2C(1, 11, STM32F4_GPIO_REMAP_DONT_CHANGE)
407
410#endif /* STM32F4_FAMILY_F10XXX */
411
412#ifdef __cplusplus
413}
414#endif /* __cplusplus */
415
416#endif /* LIBBSP_ARM_STM32F4_IO_H */
stm32f4_gpio_set_config_array
void stm32f4_gpio_set_config_array(const stm32f4_gpio_config *configs)
Sets the GPIO configuration of an array terminated by STM32F4_GPIO_CONFIG_TERMINAL.
Definition: io.c:222
config_s
Definition: deflate.c:115