RTEMS: bsps/arm/imx/include/arm/freescale/imx/imx_ecspireg.h Source File

| RTEMS 5.4-rc2

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imx_ecspireg.h
1/*
2 * Copyright (c) 2017 embedded brains GmbH. All rights reserved.
3 *
4 * embedded brains GmbH
5 * Dornierstr. 4
6 * 82178 Puchheim
7 * Germany
8 * <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#ifndef IMX_ECSPIREG_H
16#define IMX_ECSPIREG_H
17
18#include <bsp/utility.h>
19
20 typedef struct {
21 uint32_t rxdata;
22 uint32_t txdata;
23 uint32_t conreg;
24#define IMX_ECSPI_CONREG_BURST_LENGTH(val) BSP_FLD32(val, 20, 31)
25#define IMX_ECSPI_CONREG_BURST_LENGTH_GET(reg) BSP_FLD32GET(reg, 20, 31)
26#define IMX_ECSPI_CONREG_BURST_LENGTH_SET(reg, val) BSP_FLD32SET(reg, val, 20, 31)
27#define IMX_ECSPI_CONREG_CHANNEL_SELECT(val) BSP_FLD32(val, 18, 19)
28#define IMX_ECSPI_CONREG_CHANNEL_SELECT_GET(reg) BSP_FLD32GET(reg, 18, 19)
29#define IMX_ECSPI_CONREG_CHANNEL_SELECT_SET(reg, val) BSP_FLD32SET(reg, val, 18, 19)
30#define IMX_ECSPI_CONREG_DRCTL(val) BSP_FLD32(val, 16, 17)
31#define IMX_ECSPI_CONREG_DRCTL_GET(reg) BSP_FLD32GET(reg, 16, 17)
32#define IMX_ECSPI_CONREG_DRCTL_SET(reg, val) BSP_FLD32SET(reg, val, 16, 17)
33#define IMX_ECSPI_CONREG_PRE_DIVIDER(val) BSP_FLD32(val, 12, 15)
34#define IMX_ECSPI_CONREG_PRE_DIVIDER_GET(reg) BSP_FLD32GET(reg, 12, 15)
35#define IMX_ECSPI_CONREG_PRE_DIVIDER_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
36#define IMX_ECSPI_CONREG_POST_DIVIDER(val) BSP_FLD32(val, 8, 11)
37#define IMX_ECSPI_CONREG_POST_DIVIDER_GET(reg) BSP_FLD32GET(reg, 8, 11)
38#define IMX_ECSPI_CONREG_POST_DIVIDER_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
39#define IMX_ECSPI_CONREG_CHANNEL_MODE(val) BSP_FLD32(val, 4, 7)
40#define IMX_ECSPI_CONREG_CHANNEL_MODE_GET(reg) BSP_FLD32GET(reg, 4, 7)
41#define IMX_ECSPI_CONREG_CHANNEL_MODE_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
42#define IMX_ECSPI_CONREG_SMC BSP_BIT32(3)
43#define IMX_ECSPI_CONREG_XCH BSP_BIT32(2)
44#define IMX_ECSPI_CONREG_HT BSP_BIT32(1)
45#define IMX_ECSPI_CONREG_EN BSP_BIT32(0)
46 uint32_t configreg;
47#define IMX_ECSPI_CONFIGREG_HT_LENGTH(val) BSP_FLD32(val, 24, 28)
48#define IMX_ECSPI_CONFIGREG_HT_LENGTH_GET(reg) BSP_FLD32GET(reg, 24, 28)
49#define IMX_ECSPI_CONFIGREG_HT_LENGTH_SET(reg, val) BSP_FLD32SET(reg, val, 24, 28)
50#define IMX_ECSPI_CONFIGREG_SCLK_CTL(val) BSP_FLD32(val, 20, 23)
51#define IMX_ECSPI_CONFIGREG_SCLK_CTL_GET(reg) BSP_FLD32GET(reg, 20, 23)
52#define IMX_ECSPI_CONFIGREG_SCLK_CTL_SET(reg, val) BSP_FLD32SET(reg, val, 20, 23)
53#define IMX_ECSPI_CONFIGREG_DATA_CTL(val) BSP_FLD32(val, 16, 19)
54#define IMX_ECSPI_CONFIGREG_DATA_CTL_GET(reg) BSP_FLD32GET(reg, 16, 19)
55#define IMX_ECSPI_CONFIGREG_DATA_CTL_SET(reg, val) BSP_FLD32SET(reg, val, 16, 19)
56#define IMX_ECSPI_CONFIGREG_SS_POL(val) BSP_FLD32(val, 12, 15)
57#define IMX_ECSPI_CONFIGREG_SS_POL_GET(reg) BSP_FLD32GET(reg, 12, 15)
58#define IMX_ECSPI_CONFIGREG_SS_POL_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
59#define IMX_ECSPI_CONFIGREG_SS_CTL(val) BSP_FLD32(val, 8, 11)
60#define IMX_ECSPI_CONFIGREG_SS_CTL_GET(reg) BSP_FLD32GET(reg, 8, 11)
61#define IMX_ECSPI_CONFIGREG_SS_CTL_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
62#define IMX_ECSPI_CONFIGREG_SCLK_POL(val) BSP_FLD32(val, 4, 7)
63#define IMX_ECSPI_CONFIGREG_SCLK_POL_GET(reg) BSP_FLD32GET(reg, 4, 7)
64#define IMX_ECSPI_CONFIGREG_SCLK_POL_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
65#define IMX_ECSPI_CONFIGREG_SCLK_PHA(val) BSP_FLD32(val, 0, 3)
66#define IMX_ECSPI_CONFIGREG_SCLK_PHA_GET(reg) BSP_FLD32GET(reg, 0, 3)
67#define IMX_ECSPI_CONFIGREG_SCLK_PHA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
68#define IMX_ECSPI_TC BSP_BIT32(7)
69#define IMX_ECSPI_RO BSP_BIT32(6)
70#define IMX_ECSPI_RF BSP_BIT32(5)
71#define IMX_ECSPI_RDR BSP_BIT32(4)
72#define IMX_ECSPI_RR BSP_BIT32(3)
73#define IMX_ECSPI_TF BSP_BIT32(2)
74#define IMX_ECSPI_TDR BSP_BIT32(1)
75#define IMX_ECSPI_TE BSP_BIT32(0)
76 uint32_t intreg;
77 uint32_t dmareg;
78#define IMX_ECSPI_DMAREG_RXTDEN BSP_BIT32(31)
79#define IMX_ECSPI_DMAREG_RX_DMA_LENGTH(val) BSP_FLD32(val, 24, 29)
80#define IMX_ECSPI_DMAREG_RX_DMA_LENGTH_GET(reg) BSP_FLD32GET(reg, 24, 29)
81#define IMX_ECSPI_DMAREG_RX_DMA_LENGTH_SET(reg, val) BSP_FLD32SET(reg, val, 24, 29)
82#define IMX_ECSPI_DMAREG_RXDEN BSP_BIT32(23)
83#define IMX_ECSPI_DMAREG_RX_THRESHOLD(val) BSP_FLD32(val, 16, 21)
84#define IMX_ECSPI_DMAREG_RX_THRESHOLD_GET(reg) BSP_FLD32GET(reg, 16, 21)
85#define IMX_ECSPI_DMAREG_RX_THRESHOLD_SET(reg, val) BSP_FLD32SET(reg, val, 16, 21)
86#define IMX_ECSPI_DMAREG_TEDEN BSP_BIT32(7)
87#define IMX_ECSPI_DMAREG_TX_THRESHOLD(val) BSP_FLD32(val, 0, 5)
88#define IMX_ECSPI_DMAREG_TX_THRESHOLD_GET(reg) BSP_FLD32GET(reg, 0, 5)
89#define IMX_ECSPI_DMAREG_TX_THRESHOLD_SET(reg, val) BSP_FLD32SET(reg, val, 0, 5)
90 uint32_t statreg;
91 uint32_t periodreg;
92#define IMX_ECSPI_PERIODREG_CSD_CTL(val) BSP_FLD32(val, 16, 21)
93#define IMX_ECSPI_PERIODREG_CSD_CTL_GET(reg) BSP_FLD32GET(reg, 16, 21)
94#define IMX_ECSPI_PERIODREG_CSD_CTL_SET(reg, val) BSP_FLD32SET(reg, val, 16, 21)
95#define IMX_ECSPI_PERIODREG_CSRC BSP_BIT32(15)
96#define IMX_ECSPI_PERIODREG_SAMPLE_PERIOD(val) BSP_FLD32(val, 0, 14)
97#define IMX_ECSPI_PERIODREG_SAMPLE_PERIOD_GET(reg) BSP_FLD32GET(reg, 0, 14)
98#define IMX_ECSPI_PERIODREG_SAMPLE_PERIOD_SET(reg, val) BSP_FLD32SET(reg, val, 0, 14)
99 uint32_t testreg;
100#define IMX_ECSPI_TESTREG_LBC BSP_BIT32(31)
101#define IMX_ECSPI_TESTREG_RXCNT(val) BSP_FLD32(val, 8, 14)
102#define IMX_ECSPI_TESTREG_RXCNT_GET(reg) BSP_FLD32GET(reg, 8, 14)
103#define IMX_ECSPI_TESTREG_RXCNT_SET(reg, val) BSP_FLD32SET(reg, val, 8, 14)
104#define IMX_ECSPI_TESTREG_TXCNT(val) BSP_FLD32(val, 0, 6)
105#define IMX_ECSPI_TESTREG_TXCNT_GET(reg) BSP_FLD32GET(reg, 0, 6)
106#define IMX_ECSPI_TESTREG_TXCNT_SET(reg, val) BSP_FLD32SET(reg, val, 0, 6)
107 uint32_t reserved_24[7];
108 uint32_t msgdata;
109} imx_ecspi;
110
111#endif /* IMX_ECSPIREG_H */
utility.h
Utility macros.
imx_ecspi
Definition: imx_ecspireg.h:20