RTEMS: System Controls not in SCB (SCnSCB)

| RTEMS 5.4-rc2

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Modules | Data Structures
System Controls not in SCB (SCnSCB)
Board Support Packages » ARM » Shared » CMSIS » Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB)

Type definitions for the System Control and ID Register not in the SCB. More...

## Modules
| System Tick Timer (SysTick)
| Type definitions for the System Timer Registers.

## Data Structures
struct | SCnSCB_Type
| Structure type to access the System Control and ID Register not in the SCB. More...
#define | SCnSCB_ICTR_INTLINESNUM_Pos 0U
#define | SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)
#define | SCnSCB_ACTLR_DISITMATBFLUSH_Pos 12U
#define | SCnSCB_ACTLR_DISITMATBFLUSH_Msk (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos)
#define | SCnSCB_ACTLR_DISRAMODE_Pos 11U
#define | SCnSCB_ACTLR_DISRAMODE_Msk (1UL << SCnSCB_ACTLR_DISRAMODE_Pos)
#define | SCnSCB_ACTLR_FPEXCODIS_Pos 10U
#define | SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos)
#define | SCnSCB_ACTLR_DISFOLD_Pos 2U
#define | SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos)
#define | SCnSCB_ACTLR_DISMCYCINT_Pos 0U
#define | SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)

## Detailed Description

Type definitions for the System Control and ID Register not in the SCB.

## Macro Definition Documentation

## ◆ SCnSCB_ACTLR_DISFOLD_Msk

#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos)

ACTLR: DISFOLD Mask

## ◆ SCnSCB_ACTLR_DISFOLD_Pos

#define SCnSCB_ACTLR_DISFOLD_Pos 2U

ACTLR: DISFOLD Position

## ◆ SCnSCB_ACTLR_DISITMATBFLUSH_Msk

#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos)

ACTLR: DISITMATBFLUSH Mask

## ◆ SCnSCB_ACTLR_DISITMATBFLUSH_Pos

#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos 12U

ACTLR: DISITMATBFLUSH Position

## ◆ SCnSCB_ACTLR_DISMCYCINT_Msk

#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)

ACTLR: DISMCYCINT Mask

## ◆ SCnSCB_ACTLR_DISMCYCINT_Pos

#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U

ACTLR: DISMCYCINT Position

## ◆ SCnSCB_ACTLR_DISRAMODE_Msk

#define SCnSCB_ACTLR_DISRAMODE_Msk (1UL << SCnSCB_ACTLR_DISRAMODE_Pos)

ACTLR: DISRAMODE Mask

## ◆ SCnSCB_ACTLR_DISRAMODE_Pos

#define SCnSCB_ACTLR_DISRAMODE_Pos 11U

ACTLR: DISRAMODE Position

## ◆ SCnSCB_ACTLR_FPEXCODIS_Msk

#define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos)

ACTLR: FPEXCODIS Mask

## ◆ SCnSCB_ACTLR_FPEXCODIS_Pos

#define SCnSCB_ACTLR_FPEXCODIS_Pos 10U

ACTLR: FPEXCODIS Position

## ◆ SCnSCB_ICTR_INTLINESNUM_Msk

#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)

ICTR: INTLINESNUM Mask

## ◆ SCnSCB_ICTR_INTLINESNUM_Pos

#define SCnSCB_ICTR_INTLINESNUM_Pos 0U

ICTR: INTLINESNUM Position