RTEMS: bsps/powerpc/include/libcpu/e500_mmu.h Source File

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e500_mmu.h
1#ifndef RTEMS_E500_MMU_DRIVER_H
2#define RTEMS_E500_MMU_DRIVER_H
3
4/*
5 * Routines to manipulate e500 TLBs; TLB0 (fixed 4k page size)
6 * is not very useful so we mostly focus on TLB1 (variable page size)
7 */
8
9/*
10 * Authorship
11 * ----------
12 * This software was created by
13 * Till Straumann <strauman@slac.stanford.edu>, 2005-2007,
14 * Stanford Linear Accelerator Center, Stanford University.
15 *
16 * Acknowledgement of sponsorship
17 * ------------------------------
18 * This software was produced by
19 * the Stanford Linear Accelerator Center, Stanford University,
20 * under Contract DE-AC03-76SFO0515 with the Department of Energy.
21 *
22 * Government disclaimer of liability
23 * ----------------------------------
24 * Neither the United States nor the United States Department of Energy,
25 * nor any of their employees, makes any warranty, express or implied, or
26 * assumes any legal liability or responsibility for the accuracy,
27 * completeness, or usefulness of any data, apparatus, product, or process
28 * disclosed, or represents that its use would not infringe privately owned
29 * rights.
30 *
31 * Stanford disclaimer of liability
32 * --------------------------------
33 * Stanford University makes no representations or warranties, express or
34 * implied, nor assumes any liability for the use of this software.
35 *
36 * Stanford disclaimer of copyright
37 * --------------------------------
38 * Stanford University, owner of the copyright, hereby disclaims its
39 * copyright and all other rights in this software. Hence, anyone may
40 * freely use it for any purpose without restriction.
41 *
42 * Maintenance of notices
43 * ----------------------
44 * In the interest of clarity regarding the origin and status of this
45 * SLAC software, this and all the preceding Stanford University notices
46 * are to remain affixed to any copy or derivative of this software made
47 * or distributed by the recipient and are to be affixed to any copy of
48 * software made or distributed by the recipient that contains a copy or
49 * derivative of this software.
50 *
51 * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
52 */
53
54#include <rtems.h>
55#include <inttypes.h>
56#include <stdio.h>
57
58#ifdef __cplusplus
59extern "C" {
60#endif
61
62/* Some routines require or return a index 'key'. This
63 * is simply the TLB entry # ORed with E500_SELTLB_0
64 * or E500_SELTLB_1 specifying an entry in TLB0 or TLB1,
65 * respectively.
66 */
67typedef int rtems_e500_tlb_idx;
68#define E500_SELTLB_0 0x0000
69#define E500_SELTLB_1 0x1000
70
71/* Cache the relevant TLB1 entries so that we can
72 * make sure the user cannot create conflicting
73 * (overlapping) entries.
74 * Keep them public for informational purposes.
75 */
76 typedef struct {
77 struct {
78 uint32_t va_epn: 20;
79 uint32_t va_tid: 12;
80 } va;
81 uint32_t rpn;
82 struct {
83 uint32_t sz: 4;
84 uint32_t ts: 1;
85 uint32_t v: 1;
86 uint32_t perm: 10;
87 uint32_t wimge: 7;
88 } att;
89} E500_tlb_va_cache_t;
90
91extern E500_tlb_va_cache_t rtems_e500_tlb_va_cache[16];
92
93/*
94 * Dump (cleartext) content info from cached TLB entries
95 * to a file (stdout if f==NULL).
96 */
97void
98rtems_e500_dmptlbc(FILE *f);
99
100/*
101 * Read a TLB entry from the hardware; if it is a TLB1 entry
102 * then the current settings are stored in the
103 * rtems_e500_tlb_va_cache[] structure.
104 *
105 * The routine can perform this operation quietly or
106 * print information to a file.
107 *
108 * 'key': TLB entry index ORed with selector bit
109 * (E500_SELTLB_0 for TLB0, E500_SELTLB_1 for TLB1).
110 * 'quiet': perform operation silently (no info printed)
111 * if nonzero.
112 * 'f': open FILE where to print information. May be
113 * NULL in which case 'stdout' is used.
114 *
115 * RETURNS:
116 * 0: success; TLB entry is VALID
117 * +1: success but TLB entry is INVALID
118 * < 0: error (-1: invalid argument)
119 */
120int
121rtems_e500_prtlb(rtems_e500_tlb_idx key, int quiet, FILE *f);
122
123/* Initialize cache; verify that TLB0 is unused;
124 *
125 * RETURNS: zero on success, nonzero on error (TLB0
126 * seems to be in use); in this case the
127 * driver will refuse to change TLB1 entries
128 * (other than disabling them).
129 */
130int
131rtems_e500_initlb(void);
132
133/*
134 * Write TLB1 entry (can also be used to disable an entry).
135 *
136 * The routine checks against the cached data in
137 * rtems_e500_tlb_va[] to prevent the user from generating
138 * overlapping entries.
139 *
140 * 'idx': TLB 1 entry # to manipulate
141 * 'ea': Effective address (must be page aligned)
142 * 'pa': Physical address (must be page aligned)
143 * 'sz': Page size selector; page size is
144 * 1024 * 2^(2*sz) bytes.
145 * 'sz' may also be one of the following:
146 * - page size in bytes ( >= 1024 ); the selector
147 * value is then computed by this routine.
148 * However, 'sz' must be a valid page size
149 * or -1 will be returned.
150 * - a value < 0 to invalidate/disable the
151 * TLB entry.
152 * 'attr': Page attributes; ORed combination of WIMGE,
153 * PERMissions, TID and TS. Use ATTR_xxx macros
154 *
155 * RETURNS: 0 on success, nonzero on error:
156 *
157 * >0: requested mapping would overlap with
158 * existing mapping in other entry. Return
159 * value gives conflicting entry + 1; i.e.,
160 * if a value of 4 is returned then the request
161 * conflicts with existing mapping in entry 3.
162 * -1: invalid argument
163 * -3: driver not initialized (or initialization
164 * failed because TLB0 is in use).
165 * <0: other error
166 *
167 */
168#define E500_TLB_ATTR_WIMGE(x) ((x)&0x7f) /* includes user bits */
169#define E500_TLB_ATTR_WIMGE_GET(x) ((x)&0x7f)
170#define E500_TLB_ATTR_TS (1<<7)
171#define E500_TLB_ATTR_PERM(x) (((x)&0x3ff)<<8)
172#define E500_TLB_ATTR_PERM_GET(x) (((x)>>8)&0x3ff)
173#define E500_TLB_ATTR_TID(x) (((x)&0xfff)<<20)
174#define E500_TLB_ATTR_TID_GET(x) (((x)>>20)&0xfff)
175
176int
177rtems_e500_wrtlb(int idx, uint32_t ea, uint32_t pa, int sz, uint32_t attr);
178
179/*
180 * Check if a ts/tid/ea/sz mapping overlaps
181 * with an existing entry.
182 *
183 * ASSUMPTION: all TLB0 (fixed 4k pages) are invalid and always unused.
184 *
185 * NOTE: 'sz' is the 'logarithmic' size selector; the page size
186 * is 1024*2^(2*sz).
187 *
188 * RETURNS:
189 * >= 0: index of TLB1 entry that already provides a mapping
190 * which overlaps within the ea range.
191 * -1: SUCCESS (no conflicting entry found)
192 * <=-2: ERROR (invalid input)
193 */
194int
195rtems_e500_matchtlb(uint32_t ea, uint32_t tid, int ts, int sz);
196
197/* Find TLB index that maps 'ea/as' combination
198 *
199 * RETURNS: index 'key'; i.e., the index number plus
200 * a bit (E500_SELTLB_1) which indicates whether
201 * the mapping was found in TLB0 (4k fixed page
202 * size) or in TLB1 (variable page size).
203 *
204 * On error (no mapping) -1 is returned.
205 */
206rtems_e500_tlb_idx
207rtems_e500_ftlb(uint32_t ea, int as);
208
209/* Mark TLB entry as invalid ('disabled'). Unlike
210 * rtems_e500_wrtlb() with a negative size argument
211 * this routine also can disable TLB0 entries.
212 *
213 * 'key': TLB entry index ORed with selector bit
214 * (E500_SELTLB_0 for TLB0, E500_SELTLB_1 for TLB1).
215 *
216 * RETURNS: zero on success, nonzero on error (TLB
217 * unchanged).
218 *
219 * NOTE: If a TLB1 entry is disabled the associated
220 * entry in rtems_e500_va_cache[] is also
221 * marked as disabled.
222 */
223int
224rtems_e500_clrtlb(rtems_e500_tlb_idx key);
225
226#ifdef __cplusplus
227};
228#endif
229
230#endif
inttypes.h
Provide printf() PRIxxx Constante Beyond Standards.
rtems.h
E500_tlb_va_cache_t
Definition: e500_mmu.h:76