RTEMS: bsps/include/grlib/gr_rasta_tmtc.h Source File

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gr_rasta_tmtc.h
1/* GR-RASTA-TMTC PCI Target driver.
2 *
3 * COPYRIGHT (c) 2008.
4 * Cobham Gaisler AB.
5 *
6 * Configures the GR-RASTA-TMTC interface PCI board.
7 * This driver provides a AMBA PnP bus by using the general part
8 * of the AMBA PnP bus driver (ambapp_bus.c).
9 *
10 * Driver resources for the AMBA PnP bus provided can be set using
11 * gr_rasta_tmtc_set_resources().
12 *
13 * The license and distribution terms for this file may be
14 * found in found in the file LICENSE in this distribution or at
15 * http://www.rtems.org/license/LICENSE.
16 */
17
18#ifndef __GR_RASTA_TMTC_H__
19#define __GR_RASTA_TMTC_H__
20
21#include <drvmgr/drvmgr.h>
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* GPIO TM/TC configuration pin definitions
28 * --31 PWRX (1=PW2APB, 0=TM VC3/4)
29 * --30 PWTC (1=APB2PW, 0=TC MAP1/2)
30 * --29 Redundant TM (1=enable, 0=disable)
31 * --28 Redundant TC (1=enable, 0=disable)
32 * --27 Select TM output (1=GRTM, 0=PTME)
33 * --26 Loop back PW (1=enable, 0=disable)
34 * --25 Transponder clock (1=PLL, 0=PLL bypass)
35 * --24 PWTX-SELECT (0=TX0-0, 1=TX0-1)
36 * --23 PDEC Map Switch (1=on, 0=off)
37 * --22 PDEC Ext CPDU (1=on, 0=off)
38 * --21 PDEC Super User (1=on, 0=off)
39 * --20 PDEC RM On (1=on, 0=off)
40 * --19 PDEC AU Enable (1=on, 0=off)
41 * --18 PDEC Dynamic Mode (1=on, 0=off)
42 * --17 PDEC Priority (1=on, 0=off)
43 * --16 TC PSS Support (1=on, 0=off)
44 * --15 TC Mark (1=on, 0=off)
45 * --14 TC Pseudo (1=on, 0=off)
46 * --13 TC Rising Clock (1=rise, 0=fall)
47 * --12 TC Active High (1=high, 0=low)
48 * --11 Bit Lock Positive (1=high, 0=low)
49 * --10 RF Avail Positive (1=high, 0=low)
50 * -- 9 : 0 SpaceCraft ID
51 */
52
53#define GR_TMTC_GPIO_PWRX (1<<31)
54#define GR_TMTC_GPIO_PWTC (1<<30)
55#define GR_TMTC_GPIO_RED_TM (1<<29)
56#define GR_TMTC_GPIO_RED_TC (1<<28)
57#define GR_TMTC_GPIO_GRTM_SEL (1<<27)
58#define GR_TMTC_GPIO_LB_PW (1<<26)
59#define GR_TMTC_GPIO_TRANSP_CLK (1<<25)
60#define GR_TMTC_GPIO_PWTX_SEL (1<<24)
61#define GR_TMTC_GPIO_PDEC_MAP (1<<23)
62#define GR_TMTC_GPIO_PDEC_CPDU (1<<22)
63#define GR_TMTC_GPIO_PDEC_SU (1<<21)
64#define GR_TMTC_GPIO_PDEC_RM (1<<20)
65#define GR_TMTC_GPIO_PDEC_AU (1<<19)
66#define GR_TMTC_GPIO_PDEC_DYN_MODE (1<<18)
67#define GR_TMTC_GPIO_PDEC_PRIO (1<<17)
68#define GR_TMTC_GPIO_TC_PSS (1<<16)
69#define GR_TMTC_GPIO_TC_MARK (1<<15)
70#define GR_TMTC_GPIO_TC_PSEUDO (1<<14)
71#define GR_TMTC_GPIO_TC_RISING_CLK (1<<13)
72#define GR_TMTC_GPIO_TC_ACTIVE_HIGH (1<<12)
73#define GR_TMTC_GPIO_TC_BIT_LOCK (1<<11)
74#define GR_TMTC_GPIO_TC_RF_AVAIL (1<<10)
75#define GR_TMTC_GPIO_SCID (0x000003ff)
76
77/* An array of pointers to GR-RASTA-TMTC bus resources. The resources will be
78 * used by the device drivers controlling the cores on the GR-RASTA-IO target
79 * AMBA bus.
80 *
81 * The array is defined weak, and defaults to no resources. The array must be
82 * terminated with a NULL resource.
83 */
84extern struct drvmgr_bus_res *gr_rasta_tmtc_resources[];
85
86/* Options to gr_rasta_io_print function */
87#define RASTA_TMTC_OPTIONS_AMBA 0x01 /* Print AMBA bus devices */
88#define RASTA_TMTC_OPTIONS_IRQ 0x02 /* Print current IRQ setup */
89
90/* Print information about GR-RASTA-TMTC PCI boards */
91void gr_rasta_tmtc_print(int options);
92
93/* Print information about a GR-RASTA-TMTC PCI boards */
94void gr_rasta_tmtc_print_dev(struct drvmgr_dev *dev, int options);
95
96/* Register GR-RASTA-TMTC driver */
97void gr_rasta_tmtc_register_drv(void);
98
99#ifdef __cplusplus
100}
101#endif
102
103#endif
drvmgr_bus_res
Definition: drvmgr.h:214
drvmgr_dev
Definition: drvmgr.h:273