RTEMS: bsps/arm/xilinx-zynqmp/include/bsp.h Source File

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bsp.h
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1
7/*
8 * SPDX-License-Identifier: BSD-2-Clause
9 *
10 * Copyright (C) 2013, 2014 embedded brains GmbH
11 *
12 * Copyright (C) 2019 DornerWorks
13 *
14 * Written by Jeff Kubascik <jeff.kubascik@dornerworks.com>
15 * and Josh Whitehead <josh.whitehead@dornerworks.com>
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions
19 * are met:
20 * 1. Redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer.
22 * 2. Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
30 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39#ifndef LIBBSP_ARM_XILINX_ZYNQMP_BSP_H
40#define LIBBSP_ARM_XILINX_ZYNQMP_BSP_H
41
52#include <bspopts.h>
53
54#define BSP_FEATURE_IRQ_EXTENSION
55
56#ifndef ASM
57
58#include <rtems.h>
59
60#include <bsp/default-initial-extension.h>
61#include <bsp/start.h>
62
63#ifdef __cplusplus
64extern "C" {
65#endif /* __cplusplus */
66
67#define BSP_ARM_GIC_CPUIF_BASE 0xf9020000
68
69#define BSP_ARM_GIC_DIST_BASE 0xf9010000
70
71#define BSP_ARM_A9MPCORE_SCU_BASE 0
72
73#define BSP_ARM_A9MPCORE_GT_BASE 0
74
80BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void);
81
82void arm_generic_timer_get_config(uint32_t *frequency, uint32_t *irq);
83
84void zynqmp_debug_console_flush(void);
85
86#ifdef __cplusplus
87}
88#endif /* __cplusplus */
89
90#endif /* ASM */
91
94#endif /* LIBBSP_ARM_XILINX_ZYNQMP_BSP_H */
default-initial-extension.h
DEFAULT_INITIAL_EXTENSION Support.
zynqmp_setup_mmu_and_cache
BSP_START_TEXT_SECTION void zynqmp_setup_mmu_and_cache(void)
Zynq UltraScale+ MPSoC specific set up of the MMU.
Definition: bspstartmmu.c:64
rtems.h