RTEMS: bsps/bfin/include/libcpu/mmu.h Source File

| RTEMS 5.4-rc2

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mmu.h
1/* Blackfin MMU Support
2 *
3 * Copyright (c) 2008 Kallisti Labs, Los Gatos, CA, USA
4 * written by Allan Hessenflow <allanh@kallisti.com>
5 *
6 * The license and distribution terms for this file may be
7 * found in the file LICENSE in this distribution or at
8 * http://www.rtems.org/license/LICENSE.
9 */
10
11
12/* NOTE: this currently only implements a static table. It should be made
13 to handle more regions than fit in the CPLBs, with an exception handler
14 to do replacements as needed. This would of course require great care
15 to insure any storage required by the exception handler, including any
16 stack space, the exception handler itself, and the region descriptors
17 it needs to update the CPLBs, are in regions that will never be
18 replaced. */
19
20#ifndef _mmu_h_
21#define _mmu_h_
22
23#include <libcpu/mmuRegs.h>
24
25
26#define INSTR_NOCACHE (ICPLB_DATA_CPLB_USER_RD | \
27 ICPLB_DATA_CPLB_VALID)
28
29#define INSTR_CACHEABLE (ICPLB_DATA_CPLB_L1_CHBL | \
30 ICPLB_DATA_CPLB_USER_RD | \
31 ICPLB_DATA_CPLB_VALID)
32
33#define DATA_NOCACHE (DCPLB_DATA_CPLB_DIRTY | \
34 DCPLB_DATA_CPLB_SUPV_WR | \
35 DCPLB_DATA_CPLB_USER_WR | \
36 DCPLB_DATA_CPLB_USER_RD | \
37 DCPLB_DATA_CPLB_VALID)
38
39#define DATA_WRITEBACK (DCPLB_DATA_CPLB_L1_AOW | \
40 DCPLB_DATA_CPLB_L1_CHBL | \
41 DCPLB_DATA_CPLB_DIRTY | \
42 DCPLB_DATA_CPLB_SUPV_WR | \
43 DCPLB_DATA_CPLB_USER_WR | \
44 DCPLB_DATA_CPLB_USER_RD | \
45 DCPLB_DATA_CPLB_VALID)
46
47
48#ifdef __cplusplus
49extern "C" {
50#endif
51
52
53 typedef struct {
54 struct {
55 void *address;
56 uint32_t flags;
57 } instruction[ICPLB_COUNT];
58 struct {
59 void *address;
60 uint32_t flags;
61 } data[DCPLB_COUNT];
62} bfin_mmu_config_t;
63
64
65void bfin_mmu_init(bfin_mmu_config_t *config);
66
67
68#ifdef __cplusplus
69}
70#endif
71
72#endif /* _mmu_h_ */
73
bfin_mmu_config_t
Definition: mmu.h:53
config_s
Definition: deflate.c:115