RTEMS: bsps/m68k/mvme162/include/bsp.h Source File

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bsp.h
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1
9/*
10 * This include file contains all MVME162fx board IO definitions.
11 */
12
13/*
14 * COPYRIGHT (c) 1989-2014.
15 * On-Line Applications Research Corporation (OAR).
16 *
17 * The license and distribution terms for this file may be
18 * found in the file LICENSE in this distribution or at
19 * http://www.rtems.org/license/LICENSE.
20 *
21 * Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
22 * EISCAT Scientific Association. M.Savitski
23 *
24 * This material is a part of the MVME162 Board Support Package
25 * for the RTEMS executive. Its licensing policies are those of the
26 * RTEMS above.
27 */
28
29#ifndef LIBBSP_M68K_MVME162_BSP_H
30#define LIBBSP_M68K_MVME162_BSP_H
31
42#include <bspopts.h>
43#include <bsp/default-initial-extension.h>
44
45#include <rtems.h>
46
47#include <mvme16x_hw.h>
48
49#ifdef __cplusplus
50extern "C" {
51#endif
52
53/*----------------------------------------------------------------*/
54
55 typedef volatile struct {
56
57 unsigned char chipID;
58 unsigned char chipREV;
59 unsigned char gen_control;
60 unsigned char vector_base;
61
62 unsigned long timer_cmp_1;
63 unsigned long timer_cnt_1;
64 unsigned long timer_cmp_2;
65 unsigned long timer_cnt_2;
66
67 unsigned char LSB_prescaler_count;
68 unsigned char prescaler_clock_adjust;
69 unsigned char time_ctl_2;
70 unsigned char time_ctl_1;
71
72 unsigned char time_int_ctl_4;
73 unsigned char time_int_ctl_3;
74 unsigned char time_int_ctl_2;
75 unsigned char time_int_ctl_1;
76
77 unsigned char dram_err_int_ctl;
78 unsigned char SCC_int_ctl;
79 unsigned char time_ctl_4;
80 unsigned char time_ctl_3;
81
82 unsigned short DRAM_space_base;
83 unsigned short SRAM_space_base;
84
85 unsigned char DRAM_size;
86 unsigned char DRAM_SRAM_opt;
87 unsigned char SRAM_size;
88 unsigned char reserved;
89
90 unsigned char LANC_error;
91 unsigned char reserved1;
92 unsigned char LANC_int_ctl;
93 unsigned char LANC_berr_ctl;
94
95 unsigned char SCSI_error;
96 unsigned char general_inputs;
97 unsigned char MVME_162_version;
98 unsigned char SCSI_int_ctl;
99
100 unsigned long timer_cmp_3;
101 unsigned long timer_cnt_3;
102 unsigned long timer_cmp_4;
103 unsigned long timer_cnt_4;
104
105 unsigned char bus_clk;
106 unsigned char PROM_acc_time_ctl;
107 unsigned char FLASH_acc_time_ctl;
108 unsigned char ABORT_int_ctl;
109
110 unsigned char RESET_ctl;
111 unsigned char watchdog_timer_ctl;
112 unsigned char acc_watchdog_time_base_sel;
113 unsigned char reserved2;
114
115 unsigned char DRAM_ctl;
116 unsigned char reserved4;
117 unsigned char MPU_status;
118 unsigned char reserved3;
119
120 unsigned long prescaler_count;
121
122} mcchip_regs;
123
124#define mcchip ((mcchip_regs * const) 0xFFF42000)
125
126/*----------------------------------------------------------------*/
127
128/*
129 * SCC Z8523(0) defines and macros
130 * -------------------------------
131 * Prototypes for the low-level serial io are also included here,
132 * because such stuff is bsp-specific (yet). The function bodies
133 * are in console.c
134 *
135 * NOTE from Eric Vaitl <evaitl@viasat.com>:
136 *
137 * I dropped RTEMS into a 162FX today (the MVME162-513). The 162FX has a
138 * bug in the MC2 chip (revision 1) such that the SCC data register is
139 * not accessible, it has to be accessed indirectly through the SCC
140 * control register.
141 */
142
143enum {portB, portA};
144
145extern bool char_ready(int port, char *ch);
146extern char char_wait(int port);
147extern void char_put(int port, char ch);
148
149#define TX_BUFFER_EMPTY 0x04
150#define RX_DATA_AVAILABLE 0x01
151#define SCC_VECTOR 0x40
152
153 typedef volatile struct {
154 unsigned char pad1;
155 volatile unsigned char csr;
156 unsigned char pad2;
157 volatile unsigned char buf;
158} scc_regs;
159
160#define scc ((scc_regs * const) 0xFFF45000)
161
162#define ZWRITE0(port, v) (scc[port].csr = (unsigned char)(v))
163#define ZREAD0(port) (scc[port].csr)
164
165#define ZREAD(port, n) (ZWRITE0(port, n), (scc[port].csr))
166#define ZREADD(port) (scc[port].csr=0x08, scc[port].csr )
167
168#define ZWRITE(port, n, v) (ZWRITE0(port, n), ZWRITE0(port, v))
169#define ZWRITED(port, v) (scc[port].csr = 0x08, \
170 scc[port].csr = (unsigned char)(v))
171/*----------------------------------------------------------------*/
172
173#ifdef M162_INIT
174#undef EXTERN
175#define EXTERN
176#else
177#undef EXTERN
178#define EXTERN extern
179#endif
180
181/*
182 * This value is the default address location of the 162Bug vector table
183 * and is also the default start address of the boards DRAM. This value
184 * may be different for your specific board based on a number of factors:
185 *
186 * Default DRAM address: 0x00000000
187 * Default SRAM address: 0xFFE00000
188 *
189 * o If no DRAM can be found by the 162Bug program, it will use SRAM.
190 * o The default SRAM address may be different if SRAM mezzanine boards
191 * are installed on the main board.
192 * o Both the DRAM and SRAM addresses can be modified by changing the
193 * appropriate values in NVRAM using the ENV command at the 162Bug
194 * prompt.
195 *
196 * If your board has different values than the defaults, change the value
197 * of the following define.
198 *
199 */
200#define MOT_162BUG_VEC_ADDRESS 0x00000000
201
202extern rtems_isr_entry M68Kvec[]; /* vector table address */
203
204/* functions */
205
206rtems_isr_entry set_vector(
207 rtems_isr_entry handler,
208 rtems_vector_number vector,
209 int type
210);
211
212/*
213 * Prototypes for methods in the BSP that cross file boundaries.
214 */
215bool char_ready(int port, char *ch);
216
217
218#ifdef __cplusplus
219}
220#endif
221
224#endif
default-initial-extension.h
DEFAULT_INITIAL_EXTENSION Support.
rtems_vector_number
ISR_Vector_number rtems_vector_number
Control block type used to manage the vectors.
Definition: intr.h:47
mvme16x_hw.h
MVME16x IO definitions.
rtems.h
mcchip_regs
Definition: bsp.h:55
scc_regs
Definition: bsp.h:153