RTEMS: cpukit/score/cpu/sh/include/rtems/score/sh.h File Reference

| RTEMS 5.4-rc2

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Macros | Functions
sh.h File Reference

Hitachi SH CPU Department Source. More...

Go to the source code of this file.

## Macros
#define | SH_HAS_FPU 0
#define | CPU_MODEL_NAME "SH-Multilib"
#define | SH_HAS_SEPARATE_STACKS 1
#define | CPU_NAME "Hitachi SH"
#define | SH_IRQDIS_MASK 0xf0
#define | sh_disable_interrupts(_level)
#define | sh_enable_interrupts(_level)
#define | sh_flash_interrupts(_level)
#define | sh_get_interrupt_level(_level)
#define | sh_set_interrupt_level(_newlevel)
#define | CPU_swap_u32(value) sh_swap_u32( value )
#define | CPU_swap_u16(value) sh_swap_u16( value )

## Functions
unsigned int | sh_set_irq_priority (unsigned int irq, unsigned int prio)

## Detailed Description

Hitachi SH CPU Department Source.

This include file contains information pertaining to the Hitachi SH processor.

## Macro Definition Documentation

## ◆ sh_disable_interrupts

#define sh_disable_interrupts | ( |  | _level | ) |

Value:
__asm__ volatile ( \
"stc sr,%0\n\t" \
"mov %0,r5\n\t" \
"or %1,r5\n\t" \
"ldc r5,sr\n\t"\
: "=&r" (_level ) \
: "r" (SH_IRQDIS_MASK) \
: "r5" );

## ◆ sh_enable_interrupts

#define sh_enable_interrupts | ( |  | _level | ) |

Value:
__asm__ volatile( "ldc %0,sr\n\t" \
"nop\n\t" \
:: "r" (_level) );

## ◆ sh_flash_interrupts

#define sh_flash_interrupts | ( |  | _level | ) |

Value:
__asm__ volatile( \
"stc sr,r5\n\t" \
"ldc %1,sr\n\t" \
"nop\n\t" \
"or %0,r5\n\t" \
"ldc r5,sr\n\t" \
"nop\n\t" \
: : "r" (SH_IRQDIS_MASK), "r" (_level) : "r5");

## ◆ sh_get_interrupt_level

#define sh_get_interrupt_level | ( |  | _level | ) |

Value:
{ \
uint32_t _tmpsr ; \
\
__asm__ volatile( "stc sr, %0" : "=r" (_tmpsr) ); \
_level = (_tmpsr & 0xf0) >> 4 ; \
}

## ◆ sh_set_interrupt_level

#define sh_set_interrupt_level | ( |  | _newlevel | ) |

Value:
{ \
uint32_t _tmpsr; \
\
__asm__ volatile ( "stc sr, %0" : "=r" (_tmpsr) ); \
_tmpsr = ( _tmpsr & ~0xf0 ) | ((_newlevel) << 4) ; \
__asm__ volatile( "ldc %0,sr" :: "r" (_tmpsr) ); \
}