RTEMS: bsps/sh/gensh1/include/sh/sh7_pfc.h Source File

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sh7_pfc.h
1/*
2 * Bit values for the pin function controller of the Hitachi SH703X
3 *
4 * From Hitachi tutorials
5 *
6 * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
7 * Bernd Becker (becker@faw.uni-ulm.de)
8 *
9 * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
14 *
15 *
16 * COPYRIGHT (c) 1998.
17 * On-Line Applications Research Corporation (OAR).
18 *
19 * The license and distribution terms for this file may be
20 * found in the file LICENSE in this distribution or at
21 * http://www.rtems.org/license/LICENSE.
22 */
23
24#ifndef _sh7_pfc_h
25#define _sh7_pfc_h
26
27#include <rtems/score/iosh7032.h>
28
29/*
30 * Port B IO Register (PBIOR)
31 */
32#define PBIOR PFC_PBIOR
33#define PB15IOR 0x8000
34#define PB14IOR 0x4000
35#define PB13IOR 0x2000
36#define PB12IOR 0x1000
37#define PB11IOR 0x0800
38#define PB10IOR 0x0400
39#define PB9IOR 0x0200
40#define PB8IOR 0x0100
41#define PB7IOR 0x0080
42#define PB6IOR 0x0040
43#define PB5IOR 0x0020
44#define PB4IOR 0x0010
45#define PB3IOR 0x0008
46#define PB2IOR 0x0004
47#define PB1IOR 0x0002
48#define PB0IOR 0x0001
49
50/*
51 * Port B Control Register (PBCR1)
52 */
53#define PBCR1 PFC_PBCR1
54#define PB15MD1 0x8000
55#define PB15MD0 0x4000
56#define PB14MD1 0x2000
57#define PB14MD0 0x1000
58#define PB13MD1 0x0800
59#define PB13MD0 0x0400
60#define PB12MD1 0x0200
61#define PB12MD0 0x0100
62#define PB11MD1 0x0080
63#define PB11MD0 0x0040
64#define PB10MD1 0x0020
65#define PB10MD0 0x0010
66#define PB9MD1 0x0008
67#define PB9MD0 0x0004
68#define PB8MD1 0x0002
69#define PB8MD0 0x0001
70
71#define PB15MD PB15MD1|PB14MD0
72#define PB14MD PB14MD1|PB14MD0
73#define PB13MD PB13MD1|PB13MD0
74#define PB12MD PB12MD1|PB12MD0
75#define PB11MD PB11MD1|PB11MD0
76#define PB10MD PB10MD1|PB10MD0
77#define PB9MD PB9MD1|PB9MD0
78#define PB8MD PB8MD1|PB8MD0
79
80#define PB_TXD1 PB11MD1
81#define PB_RXD1 PB10MD1
82#define PB_TXD0 PB9MD1
83#define PB_RXD0 PB8MD1
84
85/*
86 * Port B Control Register (PBCR2)
87 */
88#define PBCR2 PFC_PBCR2
89#define PB7MD1 0x8000
90#define PB7MD0 0x4000
91#define PB6MD1 0x2000
92#define PB6MD0 0x1000
93#define PB5MD1 0x0800
94#define PB5MD0 0x0400
95#define PB4MD1 0x0200
96#define PB4MD0 0x0100
97#define PB3MD1 0x0080
98#define PB3MD0 0x0040
99#define PB2MD1 0x0020
100#define PB2MD0 0x0010
101#define PB1MD1 0x0008
102#define PB1MD0 0x0004
103#define PB0MD1 0x0002
104#define PB0MD0 0x0001
105
106#define PB7MD PB7MD1|PB7MD0
107#define PB6MD PB6MD1|PB6MD0
108#define PB5MD PB5MD1|PB5MD0
109#define PB4MD PB4MD1|PB4MD0
110#define PB3MD PB3MD1|PB3MD0
111#define PB2MD PB2MD1|PB2MD0
112#define PB1MD PB1MD1|PB1MD0
113#define PB0MD PB0MD1|PB0MD0
114
115#endif /* _sh7_pfc_h */