RTEMS: cpukit/score/cpu/x86_64/include/rtems/score/cpu.h File Reference

| RTEMS 5.4-rc2

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Data Structures | Macros | Typedefs | Functions
cpu.h File Reference

x86_64 Dependent Source More...

`#include <rtems/score/basedefs.h>`
`#include <rtems/score/cpu_asm.h>`
`#include <rtems/score/x86_64.h>`

Go to the source code of this file.

## Data Structures
struct | Context_Control
| Thread register context. More...
struct | CPU_Interrupt_frame
| Interrupt stack frame (ISF). More...
struct | CPU_Exception_frame
| The set of registers that specifies the complete processor state. More...

## Macros
#define | CPU_SIMPLE_VECTORED_INTERRUPTS FALSE
#define | CPU_ISR_PASSES_FRAME_POINTER FALSE
#define | CPU_HARDWARE_FP FALSE
#define | CPU_SOFTWARE_FP FALSE
#define | CPU_ALL_TASKS_ARE_FP FALSE
#define | CPU_IDLE_TASK_IS_FP FALSE
#define | CPU_USE_DEFERRED_FP_SWITCH FALSE
#define | CPU_ENABLE_ROBUST_THREAD_DISPATCH FALSE
#define | CPU_STACK_GROWS_UP FALSE
#define | CPU_STRUCTURE_ALIGNMENT RTEMS_ALIGNED(64)
#define | CPU_CACHE_LINE_BYTES 64
#define | CPU_MODES_INTERRUPT_MASK 0x00000001
#define | CPU_MAXIMUM_PROCESSORS 32
#define | CPU_EFLAGS_INTERRUPTS_ON 0x00003202
#define | CPU_EFLAGS_INTERRUPTS_OFF 0x00003002
#define | _CPU_Context_Get_SP(_context) (_context)->rsp
#define | CPU_INTERRUPT_FRAME_SIZE 72
#define | CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
#define | CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
#define | CPU_STACK_MINIMUM_SIZE (1024*4)
#define | CPU_SIZEOF_POINTER 8
#define | CPU_ALIGNMENT 8
#define | CPU_HEAP_ALIGNMENT CPU_ALIGNMENT
#define | CPU_STACK_ALIGNMENT 16
#define | CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
#define | _CPU_Initialize_vectors()
#define | _CPU_ISR_Enable(_level)
#define | _CPU_ISR_Disable(_level)
#define | _CPU_ISR_Flash(_level)
#define | _CPU_Context_Destroy(_the_thread, _the_context)
#define | _CPU_Context_Restart_self(_the_context) _CPU_Context_restore( (_the_context) );
#define | _CPU_Context_Initialize_fp(_destination)
#define | _CPU_Fatal_halt(_source, _error)
#define | CPU_USE_GENERIC_BITFIELD_CODE TRUE
#define | _CPU_Bitfield_Find_first_bit(_value, _output)
#define | _CPU_Priority_Mask(_bit_number) ( 1 << (_bit_number) )
#define | _CPU_Priority_bits_index(_priority) (_priority)
#define | CPU_swap_u16(value) (((value&0xff) << 8) | ((value >> 8)&0xff))

## Typedefs
typedef uint32_t | CPU_Counter_ticks
typedef uintptr_t | CPU_Uint32ptr

## Functions
| RTEMS_STATIC_ASSERT (sizeof(CPU_Interrupt_frame)==CPU_INTERRUPT_FRAME_SIZE, CPU_INTERRUPT_FRAME_SIZE)
RTEMS_INLINE_ROUTINE bool | _CPU_ISR_Is_enabled (uint32_t level)
| Returns true if interrupts are enabled in the specified ISR level, otherwise returns false.
RTEMS_INLINE_ROUTINE void | _CPU_ISR_Set_level (uint32_t new_level)
| Sets the hardware interrupt level by the level value.
RTEMS_INLINE_ROUTINE uint32_t | _CPU_ISR_Get_level (void)
| Returns the interrupt level of the executing thread.
void | _CPU_Context_Initialize (Context_Control *the_context, void *stack_area_begin, size_t stack_area_size, uint32_t new_level, void(*entry_point)(void), bool is_fp, void *tls_area)
| Initializes the CPU context.
void | _CPU_Initialize (void)
| CPU initialization.
void * | _CPU_Thread_Idle_body (uintptr_t ignored)
void | _CPU_Context_switch (Context_Control *run, Context_Control *heir)
| CPU switch context.
void | _CPU_Context_restore (Context_Control *new_context) RTEMS_NO_RETURN
| SPARC specific context restore.
void | _CPU_Exception_frame_print (const CPU_Exception_frame *frame)
| Prints the exception frame via printk().
uint32_t | _CPU_Counter_frequency (void)
| Returns the current CPU counter frequency in Hz.
CPU_Counter_ticks | _CPU_Counter_read (void)
| Returns the current CPU counter value.

## Detailed Description

x86_64 Dependent Source

This include file contains information pertaining to the x86_64 processor.

## Macro Definition Documentation

## ◆ _CPU_Bitfield_Find_first_bit

#define _CPU_Bitfield_Find_first_bit | ( |  | _value,
|  |  | _output
| ) |  |

Value:
{ \
(_output) = 0; /* do something to prevent warnings */ \
}

## ◆ _CPU_Context_Destroy

#define _CPU_Context_Destroy | ( |  | _the_thread,
|  |  | _the_context
| ) |  |

Value:
{ \
}

## ◆ _CPU_Context_Initialize_fp

#define _CPU_Context_Initialize_fp | ( |  | _destination | ) |

Value:
{ \
*(*(_destination)) = _CPU_Null_fp_context; \
}

## ◆ _CPU_Fatal_halt

#define _CPU_Fatal_halt | ( |  | _source,
|  |  | _error
| ) |  |

Value:
{ \
}

## ◆ _CPU_ISR_Disable

#define _CPU_ISR_Disable | ( |  | _level | ) |

Value:
{ \
amd64_enable_interrupts(); \
_level = 1; \
(void) _level; /* Prevent -Wunused-but-set-variable */ \
}

## ◆ _CPU_ISR_Enable

#define _CPU_ISR_Enable | ( |  | _level | ) |

Value:
{ \
amd64_enable_interrupts(); \
_level = 0; \
(void) _level; /* Prevent -Wunused-but-set-variable */ \
}

## ◆ _CPU_ISR_Flash

#define _CPU_ISR_Flash | ( |  | _level | ) |

Value:
{ \
amd64_enable_interrupts(); \
amd64_disable_interrupts(); \
_level = 1; \
(void) _level; /* Prevent -Wunused-but-set-variable */ \
}