RTEMS: bsps/arm/tms570/include/bsp/ti_herc/reg_n2het.h Source File

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reg_n2het.h
1/* The header file is generated by make_header.py from N2HET.json */
2/* Current script's version can be found at: */
3/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
4
5/*
6 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
7 *
8 * Czech Technical University in Prague
9 * Zikova 1903/4
10 * 166 36 Praha 6
11 * Czech Republic
12 *
13 * All rights reserved.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions are met:
17 *
18 * 1. Redistributions of source code must retain the above copyright notice, this
19 * list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright notice,
21 * this list of conditions and the following disclaimer in the documentation
22 * and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 * The views and conclusions contained in the software and documentation are those
36 * of the authors and should not be interpreted as representing official policies,
37 * either expressed or implied, of the FreeBSD Project.
38*/
39#ifndef LIBBSP_ARM_TMS570_NHET
40#define LIBBSP_ARM_TMS570_NHET
41
42#include <bsp/utility.h>
43
44 typedef struct{
45 uint32_t GCR; /*Global Configuration Register*/
46 uint32_t PFR; /*Prescale Factor Register*/
47 uint32_t ADDR; /*NHET Current Address Register*/
48 uint32_t OFF1; /*Offset Index Priority Level 1 Register*/
49 uint32_t OFF2; /*Offset Index Priority Level 2 Register*/
50 uint32_t INTENAS; /*Interrupt Enable Set Register*/
51 uint32_t INTENAC; /*Interrupt Enable Clear Register*/
52 uint32_t EXC1; /*Exception Control Register 1*/
53 uint32_t EXC2; /*Exception Control Register 2*/
54 uint32_t PRY; /*Interrupt Priority Register*/
55 uint32_t FLG; /*Interrupt Flag Register*/
56 uint32_t AND; /*AND Share Control Register*/
57 uint8_t reserved1 [4];
58 uint32_t HRSH; /*HR Share Control Register*/
59 uint32_t XOR; /*HR XOR-Share Control Register*/
60 uint32_t REQENS; /*Request Enable Set Register*/
61 uint32_t REQENC; /*Request Enable Clear Register*/
62 uint32_t REQDS; /*Request Destination Select Register*/
63 uint8_t reserved2 [4];
64 uint32_t DIR; /*NHET Direction Register*/
65 uint32_t DIN; /*NHET Data Input Register*/
66 uint32_t DOUT; /*NHET Data Output Register*/
67 uint32_t DSET; /*NHET Data Set Register*/
68 uint32_t DCLR; /*NHET Data Clear Register*/
69 uint32_t PDR; /*NHET Open Drain Register*/
70 uint32_t PULDIS; /*NHET Pull Disable Register*/
71 uint32_t PSL; /*NHET Pull Select Register*/
72 uint8_t reserved3 [8];
73 uint32_t PCR; /*Parity Control Register*/
74 uint32_t PAR; /*Parity Address Register*/
75 uint32_t PPR; /*Parity Pin Register*/
76 uint32_t SFPRLD; /*Suppression Filter Preload Register*/
77 uint32_t SFENA; /*Suppression Filter Enable Register*/
78 uint8_t reserved4 [4];
79 uint32_t LBPSEL; /*Loop Back Pair Select Register*/
80 uint32_t LBPDIR; /*Loop Back Pair Direction Register*/
81 uint32_t PINDIS; /*NHET Pin Disable Register*/
82} tms570_nhet_t;
83
84
85/*----------------------TMS570_NHET_GCR----------------------*/
86/* field: HET_PIN_ENA - Enables the output buffers of the pin structures depending on the value of nDIS and DIR. */
87#define TMS570_NHET_GCR_HET_PIN_ENA BSP_BIT32(24)
88
89/* field: MP - Master Priority */
90#define TMS570_NHET_GCR_MP(val) BSP_FLD32(val,21, 22)
91#define TMS570_NHET_GCR_MP_GET(reg) BSP_FLD32GET(reg,21, 22)
92#define TMS570_NHET_GCR_MP_SET(reg,val) BSP_FLD32SET(reg, val,21, 22)
93
94/* field: PPF - Protect Program Fields */
95#define TMS570_NHET_GCR_PPF BSP_BIT32(18)
96
97/* field: IS - Ignore Suspend */
98#define TMS570_NHET_GCR_IS BSP_BIT32(17)
99
100/* field: CMS - Clk_master/slave */
101#define TMS570_NHET_GCR_CMS BSP_BIT32(16)
102
103
104/*----------------------TMS570_NHET_PFR----------------------*/
105/* field: LRPFC - oop Resolution Pre-scale Factor Code */
106#define TMS570_NHET_PFR_LRPFC(val) BSP_FLD32(val,8, 10)
107#define TMS570_NHET_PFR_LRPFC_GET(reg) BSP_FLD32GET(reg,8, 10)
108#define TMS570_NHET_PFR_LRPFC_SET(reg,val) BSP_FLD32SET(reg, val,8, 10)
109
110/* field: HRPFC - High Resolution Pre-scale Factor Code */
111#define TMS570_NHET_PFR_HRPFC(val) BSP_FLD32(val,0, 5)
112#define TMS570_NHET_PFR_HRPFC_GET(reg) BSP_FLD32GET(reg,0, 5)
113#define TMS570_NHET_PFR_HRPFC_SET(reg,val) BSP_FLD32SET(reg, val,0, 5)
114
115
116/*----------------------TMS570_NHET_ADDR----------------------*/
117/* field: HETADDR - N2HET Current Address */
118#define TMS570_NHET_ADDR_HETADDR(val) BSP_FLD32(val,0, 8)
119#define TMS570_NHET_ADDR_HETADDR_GET(reg) BSP_FLD32GET(reg,0, 8)
120#define TMS570_NHET_ADDR_HETADDR_SET(reg,val) BSP_FLD32SET(reg, val,0, 8)
121
122
123/*----------------------TMS570_NHET_OFF1----------------------*/
124/* field: OFFSET1 - HETOFF1[5:0] indexes the currently pending high-priority interrupt. */
125#define TMS570_NHET_OFF1_OFFSET1(val) BSP_FLD32(val,0, 5)
126#define TMS570_NHET_OFF1_OFFSET1_GET(reg) BSP_FLD32GET(reg,0, 5)
127#define TMS570_NHET_OFF1_OFFSET1_SET(reg,val) BSP_FLD32SET(reg, val,0, 5)
128
129
130/*----------------------TMS570_NHET_OFF2----------------------*/
131/* field: OFFSET2 - HETOFF2[5:0] indexes the currently pending low-priority interrupt. */
132#define TMS570_NHET_OFF2_OFFSET2(val) BSP_FLD32(val,0, 5)
133#define TMS570_NHET_OFF2_OFFSET2_GET(reg) BSP_FLD32GET(reg,0, 5)
134#define TMS570_NHET_OFF2_OFFSET2_SET(reg,val) BSP_FLD32SET(reg, val,0, 5)
135
136
137/*--------------------TMS570_NHET_INTENAS--------------------*/
138/* field: HETINTENAS - Interrupt Enable Set bits. HETINTENAS is readable and writable in any operation mode. */
139/* Whole 32 bits */
140
141/*--------------------TMS570_NHET_INTENAC--------------------*/
142/* field: HETINTENAC - Interrupt Enable Clear bits. HETINTENAC is readable and writable in any operation mode. */
143/* Whole 32 bits */
144
145/*----------------------TMS570_NHET_EXC1----------------------*/
146/* field: APCNT_OVRFL_ENA - APCNT Overflow Enable */
147#define TMS570_NHET_EXC1_APCNT_OVRFL_ENA BSP_BIT32(24)
148
149/* field: APCNT_UNRFL_ENA - APCNT Underflow Enable */
150#define TMS570_NHET_EXC1_APCNT_UNRFL_ENA BSP_BIT32(16)
151
152/* field: PRGM_OVRFL_ENA - Program Overflow Enable */
153#define TMS570_NHET_EXC1_PRGM_OVRFL_ENA BSP_BIT32(8)
154
155/* field: APCNT_OVRFL_PRY - APCNT Overflow Exception Interrupt Priority */
156#define TMS570_NHET_EXC1_APCNT_OVRFL_PRY BSP_BIT32(2)
157
158/* field: APCNT_UNRFL_PRY - APCNT Underflow Exception Interrupt Priority */
159#define TMS570_NHET_EXC1_APCNT_UNRFL_PRY BSP_BIT32(1)
160
161/* field: PRGM_OVRFL_PRY - ProgramOverflow Exception Interrupt Priority */
162#define TMS570_NHET_EXC1_PRGM_OVRFL_PRY BSP_BIT32(0)
163
164
165/*----------------------TMS570_NHET_EXC2----------------------*/
166/* field: DEBUG_STATUS_FLAG - Debug Status Flag. */
167#define TMS570_NHET_EXC2_DEBUG_STATUS_FLAG BSP_BIT32(8)
168
169/* field: APCNT_OVRFL_FLAG - APCNT Overflow Flag */
170#define TMS570_NHET_EXC2_APCNT_OVRFL_FLAG BSP_BIT32(2)
171
172/* field: APCNT_UNDFL_FLAG - APCNT Underflow Flag */
173#define TMS570_NHET_EXC2_APCNT_UNDFL_FLAG BSP_BIT32(1)
174
175/* field: PRGM_OVERFL_FLAG - Program Overflow Flag */
176#define TMS570_NHET_EXC2_PRGM_OVERFL_FLAG BSP_BIT32(0)
177
178
179/*----------------------TMS570_NHET_PRY----------------------*/
180/* field: HETPRY - HET Interrupt Priority Level bits */
181/* Whole 32 bits */
182
183/*----------------------TMS570_NHET_FLG----------------------*/
184/* field: HETFLAG - Interrupt Flag Register Bits */
185/* Whole 32 bits */
186
187/*----------------------TMS570_NHET_AND----------------------*/
188/* field: AND_SHARE - AND Share Enable */
189#define TMS570_NHET_AND_AND_SHARE(val) BSP_FLD32(val,0, 15)
190#define TMS570_NHET_AND_AND_SHARE_GET(reg) BSP_FLD32GET(reg,0, 15)
191#define TMS570_NHET_AND_AND_SHARE_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
192
193
194/*----------------------TMS570_NHET_HRSH----------------------*/
195/* field: HR_SHARE - HR Share Bits */
196#define TMS570_NHET_HRSH_HR_SHARE(val) BSP_FLD32(val,0, 15)
197#define TMS570_NHET_HRSH_HR_SHARE_GET(reg) BSP_FLD32GET(reg,0, 15)
198#define TMS570_NHET_HRSH_HR_SHARE_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
199
200
201/*----------------------TMS570_NHET_XOR----------------------*/
202/* field: XOR_SHARE - XOR Share Enable */
203#define TMS570_NHET_XOR_XOR_SHARE(val) BSP_FLD32(val,0, 15)
204#define TMS570_NHET_XOR_XOR_SHARE_GET(reg) BSP_FLD32GET(reg,0, 15)
205#define TMS570_NHET_XOR_XOR_SHARE_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
206
207
208/*---------------------TMS570_NHET_REQENS---------------------*/
209/* field: REQ_ENA_n - Request Enable Bits */
210#define TMS570_NHET_REQENS_REQ_ENA_n(val) BSP_FLD32(val,0, 7)
211#define TMS570_NHET_REQENS_REQ_ENA_n_GET(reg) BSP_FLD32GET(reg,0, 7)
212#define TMS570_NHET_REQENS_REQ_ENA_n_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
213
214
215/*---------------------TMS570_NHET_REQENC---------------------*/
216/* field: REQ_DIS_n - Request Disable Bits */
217#define TMS570_NHET_REQENC_REQ_DIS_n(val) BSP_FLD32(val,0, 7)
218#define TMS570_NHET_REQENC_REQ_DIS_n_GET(reg) BSP_FLD32GET(reg,0, 7)
219#define TMS570_NHET_REQENC_REQ_DIS_n_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
220
221
222/*---------------------TMS570_NHET_REQDS---------------------*/
223/* field: TDBS_n - HTU, DMA or Both Select Bits */
224#define TMS570_NHET_REQDS_TDBS_n(val) BSP_FLD32(val,16, 23)
225#define TMS570_NHET_REQDS_TDBS_n_GET(reg) BSP_FLD32GET(reg,16, 23)
226#define TMS570_NHET_REQDS_TDBS_n_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
227
228/* field: TDS_n - HTU or DMA Select Bits */
229#define TMS570_NHET_REQDS_TDS_n(val) BSP_FLD32(val,0, 7)
230#define TMS570_NHET_REQDS_TDS_n_GET(reg) BSP_FLD32GET(reg,0, 7)
231#define TMS570_NHET_REQDS_TDS_n_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
232
233
234/*----------------------TMS570_NHET_DIR----------------------*/
235/* field: HETDIR_n - Data direction of NHET pins */
236/* Whole 32 bits */
237
238/*----------------------TMS570_NHET_DIN----------------------*/
239/* field: HETDIN_n - Data input. This bit displays the logic state of the pin. */
240/* Whole 32 bits */
241
242/*----------------------TMS570_NHET_DOUT----------------------*/
243/* field: HETDOUT_n - Data out write. Writes to this bit will only take effect when the pin is configured as an output. */
244/* Whole 32 bits */
245
246/*----------------------TMS570_NHET_DSET----------------------*/
247/* field: HETDSET_n - This register allows bits of HETDOUT to be set while avoiding the pitfalls of a readmodify- write */
248/* Whole 32 bits */
249
250/*----------------------TMS570_NHET_DCLR----------------------*/
251/* field: HETDCLR_n - This register allows bits of HETDOUT to be cleared while avoiding the pitfalls of a read-modifywrite */
252/* Whole 32 bits */
253
254/*----------------------TMS570_NHET_PDR----------------------*/
255/* field: HETPDR_n - Open drain control for HET[n] pins */
256/* Whole 32 bits */
257
258/*---------------------TMS570_NHET_PULDIS---------------------*/
259/* field: HETPULDIS_n - Pull disable for N2HET pins */
260/* Whole 32 bits */
261
262/*----------------------TMS570_NHET_PSL----------------------*/
263/* field: HETPSL_n - Pull select for NHET pins */
264/* Whole 32 bits */
265
266/*----------------------TMS570_NHET_PCR----------------------*/
267/* field: TEST - Test Bit. */
268#define TMS570_NHET_PCR_TEST BSP_BIT32(8)
269
270/* field: PARITY_ENA - Enable/disable parity checking. */
271#define TMS570_NHET_PCR_PARITY_ENA(val) BSP_FLD32(val,0, 3)
272#define TMS570_NHET_PCR_PARITY_ENA_GET(reg) BSP_FLD32GET(reg,0, 3)
273#define TMS570_NHET_PCR_PARITY_ENA_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
274
275
276/*----------------------TMS570_NHET_PAR----------------------*/
277/* field: PAOFF - Parity Error Address Offset. */
278#define TMS570_NHET_PAR_PAOFF(val) BSP_FLD32(val,2, 12)
279#define TMS570_NHET_PAR_PAOFF_GET(reg) BSP_FLD32GET(reg,2, 12)
280#define TMS570_NHET_PAR_PAOFF_SET(reg,val) BSP_FLD32SET(reg, val,2, 12)
281
282
283/*----------------------TMS570_NHET_PPR----------------------*/
284/* field: HETPPR_n - NHET Parity Pin Select Bits - Allows HET[n] pins to be configured to drive to a known state when */
285/* Whole 32 bits */
286
287/*---------------------TMS570_NHET_SFPRLD---------------------*/
288/* field: CCDIV - Counter Clock Divider */
289#define TMS570_NHET_SFPRLD_CCDIV(val) BSP_FLD32(val,16, 17)
290#define TMS570_NHET_SFPRLD_CCDIV_GET(reg) BSP_FLD32GET(reg,16, 17)
291#define TMS570_NHET_SFPRLD_CCDIV_SET(reg,val) BSP_FLD32SET(reg, val,16, 17)
292
293/* field: CPRLD - Counter Preload Value */
294#define TMS570_NHET_SFPRLD_CPRLD(val) BSP_FLD32(val,0, 9)
295#define TMS570_NHET_SFPRLD_CPRLD_GET(reg) BSP_FLD32GET(reg,0, 9)
296#define TMS570_NHET_SFPRLD_CPRLD_SET(reg,val) BSP_FLD32SET(reg, val,0, 9)
297
298
299/*---------------------TMS570_NHET_SFENA---------------------*/
300/* field: HETSFENA_n - Suppression Filter Enable Bits */
301/* Whole 32 bits */
302
303/*---------------------TMS570_NHET_LBPSEL---------------------*/
304/* field: LBPTYPE - Loop Back Pair Type Select Bits */
305#define TMS570_NHET_LBPSEL_LBPTYPE(val) BSP_FLD32(val,16, 31)
306#define TMS570_NHET_LBPSEL_LBPTYPE_GET(reg) BSP_FLD32GET(reg,16, 31)
307#define TMS570_NHET_LBPSEL_LBPTYPE_SET(reg,val) BSP_FLD32SET(reg, val,16, 31)
308
309/* field: LBPSEL - Loop Back Pair Select Bits */
310#define TMS570_NHET_LBPSEL_LBPSEL(val) BSP_FLD32(val,0, 15)
311#define TMS570_NHET_LBPSEL_LBPSEL_GET(reg) BSP_FLD32GET(reg,0, 15)
312#define TMS570_NHET_LBPSEL_LBPSEL_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
313
314
315/*---------------------TMS570_NHET_LBPDIR---------------------*/
316/* field: LBPTSTENA - Loopback Test Enable Key */
317#define TMS570_NHET_LBPDIR_LBPTSTENA(val) BSP_FLD32(val,16, 19)
318#define TMS570_NHET_LBPDIR_LBPTSTENA_GET(reg) BSP_FLD32GET(reg,16, 19)
319#define TMS570_NHET_LBPDIR_LBPTSTENA_SET(reg,val) BSP_FLD32SET(reg, val,16, 19)
320
321/* field: LBPDIR - Loop Back Pair Direction Bits */
322#define TMS570_NHET_LBPDIR_LBPDIR(val) BSP_FLD32(val,0, 15)
323#define TMS570_NHET_LBPDIR_LBPDIR_GET(reg) BSP_FLD32GET(reg,0, 15)
324#define TMS570_NHET_LBPDIR_LBPDIR_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
325
326
327/*---------------------TMS570_NHET_PINDIS---------------------*/
328/* field: HETPINDIS_n - N2HET Pin Disable Bits */
329/* Whole 32 bits */
330
331
332#endif /* LIBBSP_ARM_TMS570_NHET */
PAR
#define PAR
physical addr reg base for rd and wr
Definition: wd80x3.h:113
utility.h
Utility macros.
tms570_nhet_t
Definition: reg_n2het.h:44