RTEMS: bsps/arm/altera-cyclone-v/include/bsp/alt_dma.h Source File

| RTEMS 5.4-rc2

Loading...
Searching...
No Matches
alt_dma.h
Go to the documentation of this file.
1
7/******************************************************************************
8*
9* Copyright 2013 Altera Corporation. All Rights Reserved.
10*
11* Redistribution and use in source and binary forms, with or without
12* modification, are permitted provided that the following conditions are met:
13*
14* 1. Redistributions of source code must retain the above copyright notice,
15* this list of conditions and the following disclaimer.
16*
17* 2. Redistributions in binary form must reproduce the above copyright notice,
18* this list of conditions and the following disclaimer in the documentation
19* and/or other materials provided with the distribution.
20*
21* 3. The name of the author may not be used to endorse or promote products
22* derived from this software without specific prior written permission.
23*
24* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER "AS IS" AND ANY EXPRESS OR
25* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE DISCLAIMED. IN NO
27* EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
28* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
29* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
32* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
33* OF SUCH DAMAGE.
34*
35******************************************************************************/
36
37#ifndef __ALT_DMA_H__
38#define __ALT_DMA_H__
39
40#include "hwlib.h"
41#include "alt_dma_common.h"
42#include "alt_dma_program.h"
43
44#ifdef __cplusplus
45extern "C"
46{
47#endif /* __cplusplus */
48
76#ifndef ALT_DMA_PERIPH_PROVISION_16550_SUPPORT
77#define ALT_DMA_PERIPH_PROVISION_16550_SUPPORT (1)
78#endif
79
80#ifndef ALT_DMA_PERIPH_PROVISION_QSPI_SUPPORT
81#define ALT_DMA_PERIPH_PROVISION_QSPI_SUPPORT (1)
82#endif
83
101 typedef enum ALT_DMA_MANAGER_STATE_e
102{
103 ALT_DMA_MANAGER_STATE_STOPPED = 0,
104 ALT_DMA_MANAGER_STATE_EXECUTING = 1,
105 ALT_DMA_MANAGER_STATE_CACHE_MISS = 2,
106 ALT_DMA_MANAGER_STATE_UPDATING_PC = 3,
107 ALT_DMA_MANAGER_STATE_WFE = 4,
108 ALT_DMA_MANAGER_STATE_FAULTING = 15
109}
110ALT_DMA_MANAGER_STATE_t;
111
116 typedef enum ALT_DMA_CHANNEL_STATE_e
117{
118 ALT_DMA_CHANNEL_STATE_STOPPED = 0,
119 ALT_DMA_CHANNEL_STATE_EXECUTING = 1,
120 ALT_DMA_CHANNEL_STATE_CACHE_MISS = 2,
121 ALT_DMA_CHANNEL_STATE_UPDATING_PC = 3,
122 ALT_DMA_CHANNEL_STATE_WFE = 4,
123 ALT_DMA_CHANNEL_STATE_AT_BARRIER = 5,
124 ALT_DMA_CHANNEL_STATE_WFP = 7,
125 ALT_DMA_CHANNEL_STATE_KILLING = 8,
126 ALT_DMA_CHANNEL_STATE_COMPLETING = 9,
127 ALT_DMA_CHANNEL_STATE_FAULTING_COMPLETING = 14,
128 ALT_DMA_CHANNEL_STATE_FAULTING = 15
129}
130ALT_DMA_CHANNEL_STATE_t;
131
136 typedef enum ALT_DMA_MANAGER_FAULT_e
137{
142 ALT_DMA_MANAGER_FAULT_DBG_INSTR = (int32_t)(1UL << 30),
143
147 ALT_DMA_MANAGER_FAULT_INSTR_FETCH_ERR = (int32_t)(1UL << 16),
148
153 ALT_DMA_MANAGER_FAULT_MGR_EVNT_ERR = (int32_t)(1UL << 5),
154
159 ALT_DMA_MANAGER_FAULT_DMAGO_ERR = (int32_t)(1UL << 4),
160
165 ALT_DMA_MANAGER_FAULT_OPERAND_INVALID = (int32_t)(1UL << 1),
166
170 ALT_DMA_MANAGER_FAULT_UNDEF_INSTR = (int32_t)(1UL << 0)
171}
172ALT_DMA_MANAGER_FAULT_t;
173
178 typedef enum ALT_DMA_CHANNEL_FAULT_e
179{
183 ALT_DMA_CHANNEL_FAULT_LOCKUP_ERR = (int32_t)(1UL << 31),
184
189 ALT_DMA_CHANNEL_FAULT_DBG_INSTR = (int32_t)(1UL << 30),
190
194 ALT_DMA_CHANNEL_FAULT_DATA_READ_ERR = (int32_t)(1UL << 18),
195
199 ALT_DMA_CHANNEL_FAULT_DATA_WRITE_ERR = (int32_t)(1UL << 17),
200
204 ALT_DMA_CHANNEL_FAULT_INSTR_FETCH_ERR = (int32_t)(1UL << 16),
205
209 ALT_DMA_CHANNEL_FAULT_ST_DATA_UNAVAILABLE = (int32_t)(1UL << 13),
210
215 ALT_DMA_CHANNEL_FAULT_MFIFO_ERR = (int32_t)(1UL << 12),
216
221 ALT_DMA_CHANNEL_FAULT_CH_RDWR_ERR = (int32_t)(1UL << 7),
222
227 ALT_DMA_CHANNEL_FAULT_CH_PERIPH_ERR = (int32_t)(1UL << 6),
228
234 ALT_DMA_CHANNEL_FAULT_CH_EVNT_ERR = (int32_t)(1UL << 5),
235
240 ALT_DMA_CHANNEL_FAULT_OPERAND_INVALID = (int32_t)(1UL << 1),
241
245 ALT_DMA_CHANNEL_FAULT_UNDEF_INSTR = (int32_t)(1UL << 0)
246}
247ALT_DMA_CHANNEL_FAULT_t;
248
253 typedef enum ALT_DMA_EVENT_SELECT_e
254{
259 ALT_DMA_EVENT_SELECT_SEND_EVT,
260
265 ALT_DMA_EVENT_SELECT_SIG_IRQ
266}
267ALT_DMA_EVENT_SELECT_t;
268
273 typedef enum ALT_DMA_PERIPH_MUX_e
274{
278 ALT_DMA_PERIPH_MUX_DEFAULT = 0,
279
283 ALT_DMA_PERIPH_MUX_FPGA = 1,
284
288 ALT_DMA_PERIPH_MUX_CAN = 2
289}
290ALT_DMA_PERIPH_MUX_t;
291
297 typedef struct ALT_DMA_CFG_s
298{
302 ALT_DMA_SECURITY_t manager_sec;
303
309 ALT_DMA_SECURITY_t irq_sec[8];
310
316 ALT_DMA_SECURITY_t periph_sec[32];
317
324 ALT_DMA_PERIPH_MUX_t periph_mux[4];
325}
326ALT_DMA_CFG_t;
327
354 ALT_STATUS_CODE alt_dma_init(const ALT_DMA_CFG_t * dma_cfg);
355
365 ALT_STATUS_CODE alt_dma_uninit(void);
366
376 ALT_STATUS_CODE alt_dma_channel_alloc(ALT_DMA_CHANNEL_t channel);
377
390 ALT_STATUS_CODE alt_dma_channel_alloc_any(ALT_DMA_CHANNEL_t * allocated);
391
402 ALT_STATUS_CODE alt_dma_channel_free(ALT_DMA_CHANNEL_t channel);
403
417 ALT_STATUS_CODE alt_dma_channel_exec(ALT_DMA_CHANNEL_t channel,
418 ALT_DMA_PROGRAM_t * pgm);
419
436 ALT_STATUS_CODE alt_dma_channel_kill(ALT_DMA_CHANNEL_t channel);
437
455 ALT_STATUS_CODE alt_dma_channel_reg_get(ALT_DMA_CHANNEL_t channel,
456 ALT_DMA_PROGRAM_REG_t reg, uint32_t * val);
457
493 ALT_STATUS_CODE alt_dma_send_event(ALT_DMA_EVENT_t evt_num);
494
505 ALT_STATUS_CODE alt_dma_manager_state_get(ALT_DMA_MANAGER_STATE_t * state);
506
521 ALT_STATUS_CODE alt_dma_channel_state_get(ALT_DMA_CHANNEL_t channel,
522 ALT_DMA_CHANNEL_STATE_t * state);
523
534 ALT_STATUS_CODE alt_dma_manager_fault_status_get(ALT_DMA_MANAGER_FAULT_t * fault);
535
550 ALT_STATUS_CODE alt_dma_channel_fault_status_get(ALT_DMA_CHANNEL_t channel,
551 ALT_DMA_CHANNEL_FAULT_t * fault);
552
570 ALT_STATUS_CODE alt_dma_event_int_select(ALT_DMA_EVENT_t evt_num,
571 ALT_DMA_EVENT_SELECT_t opt);
572
588 ALT_STATUS_CODE alt_dma_event_int_status_get_raw(ALT_DMA_EVENT_t evt_num);
589
605 ALT_STATUS_CODE alt_dma_int_status_get(ALT_DMA_EVENT_t irq_num);
606
622 ALT_STATUS_CODE alt_dma_int_clear(ALT_DMA_EVENT_t irq_num);
623
704 ALT_STATUS_CODE alt_dma_memory_to_memory(ALT_DMA_CHANNEL_t channel,
705 ALT_DMA_PROGRAM_t * program,
706 void * dest,
707 const void * src,
708 size_t size,
709 bool send_evt,
710 ALT_DMA_EVENT_t evt);
711
741 ALT_STATUS_CODE alt_dma_zero_to_memory(ALT_DMA_CHANNEL_t channel,
742 ALT_DMA_PROGRAM_t * program,
743 void * buf,
744 size_t size,
745 bool send_evt,
746 ALT_DMA_EVENT_t evt);
747
787 ALT_STATUS_CODE alt_dma_memory_to_register(ALT_DMA_CHANNEL_t channel,
788 ALT_DMA_PROGRAM_t * program,
789 void * dst_reg,
790 const void * src_buf,
791 size_t count,
792 uint32_t register_width_bits,
793 bool send_evt,
794 ALT_DMA_EVENT_t evt);
795
835 ALT_STATUS_CODE alt_dma_register_to_memory(ALT_DMA_CHANNEL_t channel,
836 ALT_DMA_PROGRAM_t * program,
837 void * dst_buf,
838 const void * src_reg,
839 size_t count,
840 uint32_t register_width_bits,
841 bool send_evt,
842 ALT_DMA_EVENT_t evt);
843
914 ALT_STATUS_CODE alt_dma_memory_to_periph(ALT_DMA_CHANNEL_t channel,
915 ALT_DMA_PROGRAM_t * program,
916 ALT_DMA_PERIPH_t dest,
917 const void * src,
918 size_t size,
919 void * periph_info,
920 bool send_evt,
921 ALT_DMA_EVENT_t evt);
922
992 ALT_STATUS_CODE alt_dma_periph_to_memory(ALT_DMA_CHANNEL_t channel,
993 ALT_DMA_PROGRAM_t * program,
994 void * dest,
995 ALT_DMA_PERIPH_t src,
996 size_t size,
997 void * periph_info,
998 bool send_evt,
999 ALT_DMA_EVENT_t evt);
1000
1009#ifdef __cplusplus
1010}
1011#endif /* __cplusplus */
1012
1013#endif /* __ALT_DMA_H__ */
alt_dma_common.h
alt_dma_program.h
ALT_DMA_PERIPH_t
enum ALT_DMA_PERIPH_e ALT_DMA_PERIPH_t
ALT_DMA_CHANNEL_t
enum ALT_DMA_CHANNEL_e ALT_DMA_CHANNEL_t
ALT_DMA_EVENT_t
enum ALT_DMA_EVENT_e ALT_DMA_EVENT_t
ALT_DMA_SECURITY_t
enum ALT_DMA_SECURITY_e ALT_DMA_SECURITY_t
alt_dma_int_status_get
ALT_STATUS_CODE alt_dma_int_status_get(ALT_DMA_EVENT_t irq_num)
Definition: alt_dma.c:805
ALT_DMA_PERIPH_MUX_e
ALT_DMA_PERIPH_MUX_e
Definition: alt_dma.h:274
alt_dma_send_event
ALT_STATUS_CODE alt_dma_send_event(ALT_DMA_EVENT_t evt_num)
Definition: alt_dma.c:619
alt_dma_channel_reg_get
ALT_STATUS_CODE alt_dma_channel_reg_get(ALT_DMA_CHANNEL_t channel, ALT_DMA_PROGRAM_REG_t reg, uint32_t *val)
Definition: alt_dma.c:578
ALT_DMA_MANAGER_STATE_e
ALT_DMA_MANAGER_STATE_e
Definition: alt_dma.h:102
alt_dma_channel_alloc
ALT_STATUS_CODE alt_dma_channel_alloc(ALT_DMA_CHANNEL_t channel)
Definition: alt_dma.c:323
alt_dma_event_int_select
ALT_STATUS_CODE alt_dma_event_int_select(ALT_DMA_EVENT_t evt_num, ALT_DMA_EVENT_SELECT_t opt)
Definition: alt_dma.c:735
alt_dma_uninit
ALT_STATUS_CODE alt_dma_uninit(void)
Definition: alt_dma.c:304
alt_dma_event_int_status_get_raw
ALT_STATUS_CODE alt_dma_event_int_status_get_raw(ALT_DMA_EVENT_t evt_num)
Definition: alt_dma.c:772
ALT_DMA_CHANNEL_FAULT_t
enum ALT_DMA_CHANNEL_FAULT_e ALT_DMA_CHANNEL_FAULT_t
ALT_DMA_MANAGER_FAULT_t
enum ALT_DMA_MANAGER_FAULT_e ALT_DMA_MANAGER_FAULT_t
alt_dma_manager_fault_status_get
ALT_STATUS_CODE alt_dma_manager_fault_status_get(ALT_DMA_MANAGER_FAULT_t *fault)
Definition: alt_dma.c:700
alt_dma_channel_fault_status_get
ALT_STATUS_CODE alt_dma_channel_fault_status_get(ALT_DMA_CHANNEL_t channel, ALT_DMA_CHANNEL_FAULT_t *fault)
Definition: alt_dma.c:709
ALT_DMA_PERIPH_MUX_t
enum ALT_DMA_PERIPH_MUX_e ALT_DMA_PERIPH_MUX_t
alt_dma_manager_state_get
ALT_STATUS_CODE alt_dma_manager_state_get(ALT_DMA_MANAGER_STATE_t *state)
Definition: alt_dma.c:661
alt_dma_channel_alloc_any
ALT_STATUS_CODE alt_dma_channel_alloc_any(ALT_DMA_CHANNEL_t *allocated)
Definition: alt_dma.c:355
ALT_DMA_CHANNEL_STATE_e
ALT_DMA_CHANNEL_STATE_e
Definition: alt_dma.h:117
ALT_DMA_EVENT_SELECT_e
ALT_DMA_EVENT_SELECT_e
Definition: alt_dma.h:254
ALT_DMA_MANAGER_FAULT_e
ALT_DMA_MANAGER_FAULT_e
Definition: alt_dma.h:137
ALT_DMA_CFG_t
struct ALT_DMA_CFG_s ALT_DMA_CFG_t
alt_dma_channel_exec
ALT_STATUS_CODE alt_dma_channel_exec(ALT_DMA_CHANNEL_t channel, ALT_DMA_PROGRAM_t *pgm)
Definition: alt_dma.c:424
alt_dma_channel_free
ALT_STATUS_CODE alt_dma_channel_free(ALT_DMA_CHANNEL_t channel)
Definition: alt_dma.c:379
alt_dma_channel_kill
ALT_STATUS_CODE alt_dma_channel_kill(ALT_DMA_CHANNEL_t channel)
Definition: alt_dma.c:501
ALT_DMA_EVENT_SELECT_t
enum ALT_DMA_EVENT_SELECT_e ALT_DMA_EVENT_SELECT_t
alt_dma_init
ALT_STATUS_CODE alt_dma_init(const ALT_DMA_CFG_t *dma_cfg)
Definition: alt_dma.c:213
ALT_DMA_MANAGER_STATE_t
enum ALT_DMA_MANAGER_STATE_e ALT_DMA_MANAGER_STATE_t
ALT_DMA_CHANNEL_STATE_t
enum ALT_DMA_CHANNEL_STATE_e ALT_DMA_CHANNEL_STATE_t
alt_dma_int_clear
ALT_STATUS_CODE alt_dma_int_clear(ALT_DMA_EVENT_t irq_num)
Definition: alt_dma.c:838
alt_dma_channel_state_get
ALT_STATUS_CODE alt_dma_channel_state_get(ALT_DMA_CHANNEL_t channel, ALT_DMA_CHANNEL_STATE_t *state)
Definition: alt_dma.c:672
ALT_DMA_CHANNEL_FAULT_e
ALT_DMA_CHANNEL_FAULT_e
Definition: alt_dma.h:179
ALT_DMA_PERIPH_MUX_DEFAULT
@ ALT_DMA_PERIPH_MUX_DEFAULT
Definition: alt_dma.h:278
ALT_DMA_PERIPH_MUX_FPGA
@ ALT_DMA_PERIPH_MUX_FPGA
Definition: alt_dma.h:283
ALT_DMA_PERIPH_MUX_CAN
@ ALT_DMA_PERIPH_MUX_CAN
Definition: alt_dma.h:288
ALT_DMA_MANAGER_STATE_CACHE_MISS
@ ALT_DMA_MANAGER_STATE_CACHE_MISS
Definition: alt_dma.h:105
ALT_DMA_MANAGER_STATE_WFE
@ ALT_DMA_MANAGER_STATE_WFE
Definition: alt_dma.h:107
ALT_DMA_MANAGER_STATE_FAULTING
@ ALT_DMA_MANAGER_STATE_FAULTING
Definition: alt_dma.h:108
ALT_DMA_MANAGER_STATE_STOPPED
@ ALT_DMA_MANAGER_STATE_STOPPED
Definition: alt_dma.h:103
ALT_DMA_MANAGER_STATE_EXECUTING
@ ALT_DMA_MANAGER_STATE_EXECUTING
Definition: alt_dma.h:104
ALT_DMA_MANAGER_STATE_UPDATING_PC
@ ALT_DMA_MANAGER_STATE_UPDATING_PC
Definition: alt_dma.h:106
ALT_DMA_CHANNEL_STATE_FAULTING_COMPLETING
@ ALT_DMA_CHANNEL_STATE_FAULTING_COMPLETING
Definition: alt_dma.h:127
ALT_DMA_CHANNEL_STATE_STOPPED
@ ALT_DMA_CHANNEL_STATE_STOPPED
Definition: alt_dma.h:118
ALT_DMA_CHANNEL_STATE_FAULTING
@ ALT_DMA_CHANNEL_STATE_FAULTING
Definition: alt_dma.h:128
ALT_DMA_CHANNEL_STATE_WFP
@ ALT_DMA_CHANNEL_STATE_WFP
Definition: alt_dma.h:124
ALT_DMA_CHANNEL_STATE_KILLING
@ ALT_DMA_CHANNEL_STATE_KILLING
Definition: alt_dma.h:125
ALT_DMA_CHANNEL_STATE_UPDATING_PC
@ ALT_DMA_CHANNEL_STATE_UPDATING_PC
Definition: alt_dma.h:121
ALT_DMA_CHANNEL_STATE_AT_BARRIER
@ ALT_DMA_CHANNEL_STATE_AT_BARRIER
Definition: alt_dma.h:123
ALT_DMA_CHANNEL_STATE_EXECUTING
@ ALT_DMA_CHANNEL_STATE_EXECUTING
Definition: alt_dma.h:119
ALT_DMA_CHANNEL_STATE_COMPLETING
@ ALT_DMA_CHANNEL_STATE_COMPLETING
Definition: alt_dma.h:126
ALT_DMA_CHANNEL_STATE_WFE
@ ALT_DMA_CHANNEL_STATE_WFE
Definition: alt_dma.h:122
ALT_DMA_CHANNEL_STATE_CACHE_MISS
@ ALT_DMA_CHANNEL_STATE_CACHE_MISS
Definition: alt_dma.h:120
ALT_DMA_EVENT_SELECT_SEND_EVT
@ ALT_DMA_EVENT_SELECT_SEND_EVT
Definition: alt_dma.h:259
ALT_DMA_EVENT_SELECT_SIG_IRQ
@ ALT_DMA_EVENT_SELECT_SIG_IRQ
Definition: alt_dma.h:265
ALT_DMA_MANAGER_FAULT_UNDEF_INSTR
@ ALT_DMA_MANAGER_FAULT_UNDEF_INSTR
Definition: alt_dma.h:170
ALT_DMA_MANAGER_FAULT_OPERAND_INVALID
@ ALT_DMA_MANAGER_FAULT_OPERAND_INVALID
Definition: alt_dma.h:165
ALT_DMA_MANAGER_FAULT_DBG_INSTR
@ ALT_DMA_MANAGER_FAULT_DBG_INSTR
Definition: alt_dma.h:142
ALT_DMA_MANAGER_FAULT_DMAGO_ERR
@ ALT_DMA_MANAGER_FAULT_DMAGO_ERR
Definition: alt_dma.h:159
ALT_DMA_MANAGER_FAULT_INSTR_FETCH_ERR
@ ALT_DMA_MANAGER_FAULT_INSTR_FETCH_ERR
Definition: alt_dma.h:147
ALT_DMA_MANAGER_FAULT_MGR_EVNT_ERR
@ ALT_DMA_MANAGER_FAULT_MGR_EVNT_ERR
Definition: alt_dma.h:153
ALT_DMA_CHANNEL_FAULT_OPERAND_INVALID
@ ALT_DMA_CHANNEL_FAULT_OPERAND_INVALID
Definition: alt_dma.h:240
ALT_DMA_CHANNEL_FAULT_MFIFO_ERR
@ ALT_DMA_CHANNEL_FAULT_MFIFO_ERR
Definition: alt_dma.h:215
ALT_DMA_CHANNEL_FAULT_UNDEF_INSTR
@ ALT_DMA_CHANNEL_FAULT_UNDEF_INSTR
Definition: alt_dma.h:245
ALT_DMA_CHANNEL_FAULT_CH_RDWR_ERR
@ ALT_DMA_CHANNEL_FAULT_CH_RDWR_ERR
Definition: alt_dma.h:221
ALT_DMA_CHANNEL_FAULT_CH_EVNT_ERR
@ ALT_DMA_CHANNEL_FAULT_CH_EVNT_ERR
Definition: alt_dma.h:234
ALT_DMA_CHANNEL_FAULT_LOCKUP_ERR
@ ALT_DMA_CHANNEL_FAULT_LOCKUP_ERR
Definition: alt_dma.h:183
ALT_DMA_CHANNEL_FAULT_DBG_INSTR
@ ALT_DMA_CHANNEL_FAULT_DBG_INSTR
Definition: alt_dma.h:189
ALT_DMA_CHANNEL_FAULT_CH_PERIPH_ERR
@ ALT_DMA_CHANNEL_FAULT_CH_PERIPH_ERR
Definition: alt_dma.h:227
ALT_DMA_CHANNEL_FAULT_INSTR_FETCH_ERR
@ ALT_DMA_CHANNEL_FAULT_INSTR_FETCH_ERR
Definition: alt_dma.h:204
ALT_DMA_CHANNEL_FAULT_DATA_READ_ERR
@ ALT_DMA_CHANNEL_FAULT_DATA_READ_ERR
Definition: alt_dma.h:194
ALT_DMA_CHANNEL_FAULT_DATA_WRITE_ERR
@ ALT_DMA_CHANNEL_FAULT_DATA_WRITE_ERR
Definition: alt_dma.h:199
ALT_DMA_CHANNEL_FAULT_ST_DATA_UNAVAILABLE
@ ALT_DMA_CHANNEL_FAULT_ST_DATA_UNAVAILABLE
Definition: alt_dma.h:209
ALT_DMA_PROGRAM_REG_t
enum ALT_DMA_PROGRAM_REG_e ALT_DMA_PROGRAM_REG_t
alt_dma_memory_to_register
ALT_STATUS_CODE alt_dma_memory_to_register(ALT_DMA_CHANNEL_t channel, ALT_DMA_PROGRAM_t *program, void *dst_reg, const void *src_buf, size_t count, uint32_t register_width_bits, bool send_evt, ALT_DMA_EVENT_t evt)
Definition: alt_dma.c:1504
alt_dma_register_to_memory
ALT_STATUS_CODE alt_dma_register_to_memory(ALT_DMA_CHANNEL_t channel, ALT_DMA_PROGRAM_t *program, void *dst_buf, const void *src_reg, size_t count, uint32_t register_width_bits, bool send_evt, ALT_DMA_EVENT_t evt)
Definition: alt_dma.c:1780
alt_dma_memory_to_memory
ALT_STATUS_CODE alt_dma_memory_to_memory(ALT_DMA_CHANNEL_t channel, ALT_DMA_PROGRAM_t *program, void *dest, const void *src, size_t size, bool send_evt, ALT_DMA_EVENT_t evt)
Definition: alt_dma.c:866
alt_dma_memory_to_periph
ALT_STATUS_CODE alt_dma_memory_to_periph(ALT_DMA_CHANNEL_t channel, ALT_DMA_PROGRAM_t *program, ALT_DMA_PERIPH_t dest, const void *src, size_t size, void *periph_info, bool send_evt, ALT_DMA_EVENT_t evt)
Definition: alt_dma.c:3508
alt_dma_zero_to_memory
ALT_STATUS_CODE alt_dma_zero_to_memory(ALT_DMA_CHANNEL_t channel, ALT_DMA_PROGRAM_t *program, void *buf, size_t size, bool send_evt, ALT_DMA_EVENT_t evt)
Definition: alt_dma.c:1269
alt_dma_periph_to_memory
ALT_STATUS_CODE alt_dma_periph_to_memory(ALT_DMA_CHANNEL_t channel, ALT_DMA_PROGRAM_t *program, void *dest, ALT_DMA_PERIPH_t src, size_t size, void *periph_info, bool send_evt, ALT_DMA_EVENT_t evt)
Definition: alt_dma.c:3601
hwlib.h
ALT_STATUS_CODE
int32_t ALT_STATUS_CODE
Definition: hwlib.h:60
ALT_DMA_CFG_s
Definition: alt_dma.h:298
ALT_DMA_CFG_s::periph_sec
ALT_DMA_SECURITY_t periph_sec[32]
Definition: alt_dma.h:316
ALT_DMA_CFG_s::periph_mux
ALT_DMA_PERIPH_MUX_t periph_mux[4]
Definition: alt_dma.h:324
ALT_DMA_CFG_s::irq_sec
ALT_DMA_SECURITY_t irq_sec[8]
Definition: alt_dma.h:309
ALT_DMA_CFG_s::manager_sec
ALT_DMA_SECURITY_t manager_sec
Definition: alt_dma.h:302
ALT_DMA_PROGRAM_s
Definition: alt_dma_program.h:111