RTEMS: cpukit/score/cpu/or1k/include/rtems/score/cpu.h File Reference

| RTEMS 5.4-rc2

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Data Structures | Macros | Typedefs | Functions
cpu.h File Reference
`#include <rtems/score/or1k.h>`
`#include <rtems/score/or1k-utility.h>`
`#include <rtems/score/basedefs.h>`
`#include <rtems/bspIo.h>`
`#include <stdint.h>`
`#include <stdio.h>`
`#include <inttypes.h>`

Go to the source code of this file.

## Data Structures
struct | Context_Control
| Thread register context. More...
struct | CPU_Exception_frame
| The set of registers that specifies the complete processor state. More...

## Macros
#define | CPU_ISR_PASSES_FRAME_POINTER TRUE
#define | CPU_HARDWARE_FP FALSE
#define | CPU_SOFTWARE_FP FALSE
#define | CPU_ALL_TASKS_ARE_FP FALSE
#define | CPU_IDLE_TASK_IS_FP FALSE
#define | CPU_USE_DEFERRED_FP_SWITCH TRUE
#define | CPU_ENABLE_ROBUST_THREAD_DISPATCH FALSE
#define | CPU_STACK_GROWS_UP FALSE
#define | CPU_CACHE_LINE_BYTES 32
#define | CPU_STRUCTURE_ALIGNMENT RTEMS_ALIGNED( CPU_CACHE_LINE_BYTES )
#define | CPU_MODES_INTERRUPT_MASK 0x00000001
#define | or1kreg uint32_t
#define | _CPU_Context_Get_SP(_context) (_context)->r1
#define | CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
#define | CPU_STACK_MINIMUM_SIZE 4096
#define | CPU_ALIGNMENT 8
#define | CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
#define | CPU_SIZEOF_POINTER 4
#define | CPU_HEAP_ALIGNMENT CPU_ALIGNMENT
#define | CPU_STACK_ALIGNMENT 0
#define | CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
#define | _CPU_Initialize_vectors()
#define | _CPU_ISR_Disable(_level) _level = or1k_interrupt_disable()
#define | _CPU_ISR_Enable(_level) or1k_interrupt_enable( _level )
#define | _CPU_ISR_Flash(_level)
#define | OR1K_FAST_CONTEXT_SWITCH_ENABLED FALSE
#define | _CPU_Context_Restart_self(_the_context) _CPU_Context_restore( (_the_context) );
#define | _CPU_Fatal_halt(_source, _error)
#define | CPU_USE_GENERIC_BITFIELD_CODE TRUE
#define | CPU_SIZEOF_POINTER 4
#define | CPU_MAXIMUM_PROCESSORS 32
#define | CPU_swap_u16(value) (((value&0xff) << 8) | ((value >> 8)&0xff))

## Typedefs
typedef Context_Control | CPU_Interrupt_frame
typedef void(* | CPU_ISR_raw_handler) (uint32_t, CPU_Exception_frame *)
typedef void(* | CPU_ISR_handler) (uint32_t)
typedef uint32_t | CPU_Counter_ticks
typedef uintptr_t | CPU_Uint32ptr

## Functions
RTEMS_INLINE_ROUTINE bool | _CPU_ISR_Is_enabled (uint32_t level)
| Returns true if interrupts are enabled in the specified ISR level, otherwise returns false.
void | _CPU_ISR_Set_level (uint32_t level)
| Sets the interrupt level for the executing thread.
uint32_t | _CPU_ISR_Get_level (void)
| Returns the interrupt level of the executing thread.
void | _CPU_Context_Initialize (Context_Control *context, void *stack_area_begin, size_t stack_area_size, uint32_t new_level, void(*entry_point)(void), bool is_fp, void *tls_area)
| Initializes the CPU context.
void | _CPU_Exception_frame_print (const CPU_Exception_frame *frame)
| Prints the exception frame via printk().
void | _CPU_Initialize (void)
| CPU initialization.
void | _CPU_ISR_install_raw_handler (uint32_t vector, CPU_ISR_raw_handler new_handler, CPU_ISR_raw_handler *old_handler)
RTEMS_INLINE_ROUTINE void | _CPU_ISR_install_vector (uint32_t vector, CPU_ISR_handler new_handler, CPU_ISR_handler *old_handler)
| SPARC specific RTEMS ISR installer.
void * | _CPU_Thread_Idle_body (uintptr_t ignored)
void | _CPU_Context_switch (Context_Control *run, Context_Control *heir)
| CPU switch context.
void | _CPU_Context_restore (Context_Control *new_context) RTEMS_NO_RETURN
void | _CPU_Context_save_fp (void **fp_context_ptr)
void | _CPU_Context_restore_fp (void **fp_context_ptr)
uint32_t | _CPU_Counter_frequency (void)
| Returns the current CPU counter frequency in Hz.
CPU_Counter_ticks | _CPU_Counter_read (void)
| Returns the current CPU counter value.

## Macro Definition Documentation

## ◆ _CPU_Fatal_halt

#define _CPU_Fatal_halt | ( |  | _source,
|  |  | _error
| ) |  |

Value:
printk("Fatal Error %d.%" PRId32 " Halted\n",_source, _error); \
_OR1KSIM_CPU_Halt(); \
for(;;)

## ◆ _CPU_ISR_Flash

#define _CPU_ISR_Flash | ( |  | _level | ) |

Value:
do{ \
_CPU_ISR_Enable( _level ); \
_OR1K_mtspr(CPU_OR1K_SPR_SR, (_level & ~CPU_OR1K_SPR_SR_IEE)); \
} while(0)

## ◆ CPU_SIZEOF_POINTER [1/2]

#define CPU_SIZEOF_POINTER 4

Size of a pointer.

This must be an integer literal that can be used by the assembler. This value will be used to calculate offsets of structure members. These offsets will be used in assembler code.

## ◆ CPU_SIZEOF_POINTER [2/2]

#define CPU_SIZEOF_POINTER 4

Size of a pointer.

This must be an integer literal that can be used by the assembler. This value will be used to calculate offsets of structure members. These offsets will be used in assembler code.

## Typedef Documentation

## ◆ CPU_Uint32ptr

typedef uintptr_t CPU_Uint32ptr

Type that can store a 32-bit integer or a pointer.