RTEMS: bsps/powerpc/ss555/include/bsp/irq.h Source File

| RTEMS 5.4-rc2

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irq.h
1/* irq.h
2 *
3 * This include file describe the data structure and the functions implemented
4 * by rtems to write interrupt handlers.
5 *
6 *
7 * SS555 port sponsored by Defence Research and Development Canada - Suffield
8 * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
9 *
10 * Derived from libbsp/powerpc/mbx8xx/irq/irq.h:
11 *
12 * CopyRight (C) 1999 valette@crf.canon.fr
13 *
14 * This code is heavilly inspired by the public specification of STREAM V2
15 * that can be found at :
16 *
17 * <http://www.chorus.com/Documentation/index.html> by following
18 * the STREAM API Specification Document link.
19 *
20 * The license and distribution terms for this file may be
21 * found in the file LICENSE in this distribution or at
22 * http://www.rtems.org/license/LICENSE.
23 */
24
25#ifndef LIBBSP_POWERPC_SS555_IRQ_IRQ_H
26#define LIBBSP_POWERPC_SS555_IRQ_IRQ_H
27
28#include <libcpu/irq.h>
29
30#ifndef ASM
31
32#include <bsp/irq-default.h>
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
38/*
39 * These are no longer prototyped anywhere else. This appears to be
40 * remnants of the IRQ code upgrade.
41 *
42 * --joel 28 April 2010
43 */
44int CPU_install_rtems_irq_handler(const rtems_irq_connect_data* irq);
45int CPU_get_current_rtems_irq_handler(rtems_irq_connect_data* irq);
46int CPU_remove_rtems_irq_handler(const rtems_irq_connect_data* irq);
47int CPU_rtems_irq_mngt_set(rtems_irq_global_settings* config);
48int CPU_rtems_irq_mngt_get(rtems_irq_global_settings** config);
49void C_default_exception_handler(CPU_Exception_frame* excPtr);
50
51/*
52 * The SS555 has no external interrupt controller chip, so use the standard
53 * routines from the CPU-dependent code.
54 */
55#define BSP_install_rtems_irq_handler(ptr) CPU_install_rtems_irq_handler(ptr)
56#define BSP_get_current_rtems_irq_handler(ptr) CPU_get_current_rtems_irq_handler(ptr)
57#define BSP_remove_rtems_irq_handler(ptr) CPU_remove_rtems_irq_handler(ptr)
58#define BSP_rtems_irq_mngt_set(config) CPU_rtems_irq_mngt_set(config)
59#define BSP_rtems_irq_mngt_get(config) CPU_rtems_irq_mngt_get(config)
60#define BSP_rtems_irq_mng_init(cpuId) CPU_rtems_irq_mng_init(cpuId)
61
62#ifdef __cplusplus
63}
64#endif
65
66#endif /* ASM */
67
68#endif /* LIBBSP_POWERPC_SS555_IRQ_IRQ_H */
irq-default.h
CPU_Exception_frame
The set of registers that specifies the complete processor state.
Definition: cpu.h:629
__rtems_irq_connect_data__
Definition: irq.h:45
config_s
Definition: deflate.c:115
rtems_irq_global_settings
Definition: irq.h:92