RTEMS: bsps/powerpc/include/libcpu/bat.h Source File

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bat.h
1/*
2 * bat.h
3 *
4 * This file contains declaration of C function to
5 * Instantiate 60x/7xx ppc Block Address Translation (BAT) registers.
6 * More detailed information can be found on motorola
7 * site and more precisely in the following book :
8 *
9 * MPC750
10 * Risc Microporcessor User's Manual
11 * Motorola REF : MPC750UM/AD 8/97
12 *
13 * Copyright (C) 1999 Eric Valette (valette@crf.canon.fr)
14 * Canon Centre Recherche France.
15 *
16 * The license and distribution terms for this file may be
17 * found in the file LICENSE in this distribution or at
18 * http://www.rtems.org/license/LICENSE.
19 */
20
21#ifndef _LIBCPU_BAT_H
22#define _LIBCPU_BAT_H
23
24#include <libcpu/mmu.h>
25#include <libcpu/pgtable.h>
26
27#define IO_PAGE (_PAGE_NO_CACHE | _PAGE_GUARDED | _PAGE_RW)
28
29#ifndef ASM
30/* Take no risks -- the essential parts of this routine run with
31 * interrupts disabled!
32 *
33 * The routine does basic parameter checks:
34 * - Index must be 0..3 (0..7 on 7455, 7457).
35 * If an index > 3 is requested the 745x is
36 * programmed to enable the higher BATs.
37 * - Size must be a power of two and <= 1<<28
38 * (<=1<<31 on 7455, 7457. Also, on these processors
39 * the special value 0xffffffff is allowed which stands
40 * for 1<<32).
41 * If a size > 1<<28 is requested, the 745x is
42 * programmed to enable the larger block sizes.
43 * - Bat ranges must not overlap.
44 * - Physical & virtual addresses must be aligned
45 * to the size.
46 *
47 * RETURNS: zero on success, nonzero on failure.
48 */
49extern int setdbat(int bat_index, unsigned long virt, unsigned long phys,
50 unsigned int size, int flags);
51
52/* Same as setdbat but sets IBAT */
53extern int setibat(int bat_index, unsigned long virt, unsigned long phys,
54 unsigned int size, int flags);
55
56/* read DBAT # 'idx' into *pu / *pl. NULL pointers may be passed.
57 * If pu and pl are NULL, the bat contents are dumped to the console (printk).
58 *
59 * RETURNS: upper BAT contents or (-1) if index is invalid
60 */
61extern int getdbat(int bat_index, unsigned long *pu, unsigned long *pl);
62
63/* Same as getdbat but reads IBAT */
64extern int getibat(int bat_index, unsigned long *pu, unsigned long *pl);
65
66/* Do not use the asm-routines; they are obsolete; use setdbat() instead */
67extern void asm_setdbat0(unsigned int uperPart, unsigned int lowerPart);
68extern void asm_setdbat1(unsigned int uperPart, unsigned int lowerPart);
69extern void asm_setdbat2(unsigned int uperPart, unsigned int lowerPart);
70extern void asm_setdbat3(unsigned int uperPart, unsigned int lowerPart);
71#else
72
73/* Initialize all bats (upper and lower) to zero. This routine should *only*
74 * be called during early BSP initialization when no C-ABI is available
75 * yet.
76 * This routine clobbers r3 and r4.
77 * NOTE: on 7450 CPUs all 8 dbat/ibat units are cleared. On 601 CPUs only
78 * 4 ibats.
79 */
80 .globl CPU_clear_bats_early
81 .type CPU_clear_bats_early,@function
82
83#endif
84
85#endif /* _LIBCPU_BAT_H */