RTEMS: ALT_DMA_CFG_s Struct Reference

| RTEMS 5.4-rc2

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Data Fields
ALT_DMA_CFG_s Struct Reference
Board Support Packages » ARM » Intel Cyclone V » Contributed Code » DMA Controller API » DMA API for Configuration, Control, and Status

`#include <alt_dma.h>`

## Data Fields
ALT_DMA_SECURITY_t | manager_sec
ALT_DMA_SECURITY_t | irq_sec [8]
ALT_DMA_SECURITY_t | periph_sec [32]
ALT_DMA_PERIPH_MUX_t | periph_mux [4]

## Detailed Description

This type defines the structure used to specify the configuration of the security states and peripheral interface MUX selections for the DMA controller.

## Field Documentation

## ◆ irq_sec

ALT_DMA_SECURITY_t ALT_DMA_CFG_s::irq_sec[8]

DMA interrupt output security state configurations. Security state configurations are 0-based index-aligned with the enumeration values ALT_DMA_EVENT_0 through ALT_DMA_EVENT_7 of the ALT_DMA_EVENT_t type.

## ◆ manager_sec

ALT_DMA_SECURITY_t ALT_DMA_CFG_s::manager_sec

DMA Manager security state configuration.

## ◆ periph_mux

ALT_DMA_PERIPH_MUX_t ALT_DMA_CFG_s::periph_mux[4]

DMA Peripheral Register Interface MUX Selections. MUX selections are 0-based index-aligned with the enumeration values ALT_DMA_PERIPH_FPGA_4_OR_CAN0_IF1 through ALT_DMA_PERIPH_FPGA_7_OR_CAN1_IF2 of the ALT_DMA_PERIPH_t type.

## ◆ periph_sec

ALT_DMA_SECURITY_t ALT_DMA_CFG_s::periph_sec[32]

Peripheral request interface security state configurations. Security state configurations are 0-based index-aligned with the enumeration values of the ALT_DMA_PERIPH_t type.

The documentation for this struct was generated from the following file:

- bsps/arm/altera-cyclone-v/include/bsp/alt_dma.h