RTEMS: bsps/arm/beagle/include/bsp/i2c.h Source File

| RTEMS 5.4-rc2

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i2c.h
Go to the documentation of this file.
1
9/*
10 * Copyright (c) 2012 Claas Ziemke. All rights reserved.
11 *
12 * Claas Ziemke
13 * Kernerstrasse 11
14 * 70182 Stuttgart
15 * Germany
16 * <claas.ziemke@gmx.net>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.org/license/LICENSE.
21 */
22
23#ifndef LIBBSP_ARM_BEAGLE_I2C_H
24#define LIBBSP_ARM_BEAGLE_I2C_H
25
26#include <rtems.h>
27#include <bsp.h>
28#include <dev/i2c/i2c.h>
29
30#ifdef __cplusplus
31extern "C" {
32#endif /* __cplusplus */
33
34#define BBB_I2C_SYSCLK 48000000
35#define BBB_I2C_INTERNAL_CLK 12000000
36
37#define BBB_I2C_0_BUS_PATH "/dev/i2c-0"
38#define BBB_I2C_1_BUS_PATH "/dev/i2c-1"
39#define BBB_I2C_2_BUS_PATH "/dev/i2c-2"
40
41#define BBB_I2C0_IRQ 70
42#define BBB_I2C1_IRQ 71
43#define BBB_I2C2_IRQ 30
44
45typedef enum {
46 I2C0,
47 I2C1,
48 I2C2,
49 I2C_COUNT
50} bbb_i2c_id_t;
51
52 typedef struct i2c_regs {
53 uint32_t BBB_I2C_REVNB_LO;
54 uint32_t BBB_I2C_REVNB_HI;
55 uint32_t dummy1[ 2 ];
56 uint32_t BBB_I2C_SYSC;
57 uint32_t dummy2[ 4 ];
58 uint32_t BBB_I2C_IRQSTATUS_RAW;
59 uint32_t BBB_I2C_IRQSTATUS;
60 uint32_t BBB_I2C_IRQENABLE_SET;
61 uint32_t BBB_I2C_IRQENABLE_CLR;
62 uint32_t BBB_I2C_WE;
63 uint32_t BBB_I2C_DMARXENABLE_SET;
64 uint32_t BBB_I2C_DMATXENABLE_SET;
65 uint32_t BBB_I2C_DMARXENABLE_CLR;
66 uint32_t BBB_I2C_DMATXENABLE_CLR;
67 uint32_t BBB_I2C_DMARXWAKE_EN;
68 uint32_t BBB_I2C_DMATXWAKE_EN;
69 uint32_t dummy3[ 16 ];
70 uint32_t BBB_I2C_SYSS;
71 uint32_t BBB_I2C_BUF;
72 uint32_t BBB_I2C_CNT;
73 uint32_t BBB_I2C_DATA;
74 uint32_t dummy4;
75 uint32_t BBB_I2C_CON;
76 uint32_t BBB_I2C_OA;
77 uint32_t BBB_I2C_SA;
78 uint32_t BBB_I2C_PSC;
79 uint32_t BBB_I2C_SCLL;
80 uint32_t BBB_I2C_SCLH;
81 uint32_t BBB_I2C_SYSTEST;
82 uint32_t BBB_I2C_BUFSTAT;
83 uint32_t BBB_I2C_OA1;
84 uint32_t BBB_I2C_OA2;
85 uint32_t BBB_I2C_OA3;
86 uint32_t BBB_I2C_ACTOA;
87 uint32_t BBB_I2C_SBLOCK;
88} bbb_i2c_regs;
89
90int am335x_i2c_bus_register(
91 const char *bus_path,
92 uintptr_t register_base,
93 uint32_t input_clock, /* FIXME: Unused. Left for compatibility. */
94 rtems_vector_number irq
95);
96
97static inline int bbb_register_i2c_1( void )
98{
99 return am335x_i2c_bus_register(
100 BBB_I2C_1_BUS_PATH,
101 AM335X_I2C1_BASE,
102 I2C_BUS_CLOCK_DEFAULT,
103 BBB_I2C1_IRQ
104 );
105}
106
107static inline int bbb_register_i2c_2( void )
108{
109 return am335x_i2c_bus_register(
110 BBB_I2C_2_BUS_PATH,
111 AM335X_I2C2_BASE,
112 I2C_BUS_CLOCK_DEFAULT,
113 BBB_I2C2_IRQ
114 );
115}
116
117#ifdef __cplusplus
118}
119#endif /* __cplusplus */
120
121#endif /* LIBBSP_ARM_BEAGLE_I2C_H */
i2c.h
Inter-Integrated Circuit (I2C) Driver API.
rtems_vector_number
ISR_Vector_number rtems_vector_number
Control block type used to manage the vectors.
Definition: intr.h:47
I2C_BUS_CLOCK_DEFAULT
#define I2C_BUS_CLOCK_DEFAULT
Default I2C bus clock in Hz.
Definition: i2c.h:105
rtems.h
i2c_regs
Definition: i2c.h:52