RTEMS: bsps/arm/tms570/include/bsp/ti_herc/reg_esm.h Source File

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reg_esm.h
1/* The header file is generated by make_header.py from ESM.json */
2/* Current script's version can be found at: */
3/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
4
5/*
6 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
7 *
8 * Czech Technical University in Prague
9 * Zikova 1903/4
10 * 166 36 Praha 6
11 * Czech Republic
12 *
13 * All rights reserved.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions are met:
17 *
18 * 1. Redistributions of source code must retain the above copyright notice, this
19 * list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright notice,
21 * this list of conditions and the following disclaimer in the documentation
22 * and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 * The views and conclusions contained in the software and documentation are those
36 * of the authors and should not be interpreted as representing official policies,
37 * either expressed or implied, of the FreeBSD Project.
38*/
39#ifndef LIBBSP_ARM_TMS570_ESM
40#define LIBBSP_ARM_TMS570_ESM
41
42#include <bsp/utility.h>
43
44 typedef struct{
45 uint32_t EEPAPR1; /*ESM Enable ERROR Pin Action/Response Register 1*/
46 uint32_t DEPAPR1; /*ESM Disable ERROR Pin Action/Response Register 1*/
47 uint32_t IESR1; /*ESM Interrupt Enable Set/Status Register 1*/
48 uint32_t IECR1; /*ESM Interrupt Enable Clear/Status Register 1*/
49 uint32_t ILSR1; /*Interrupt Level Set/Status Register 1*/
50 uint32_t ILCR1; /*Interrupt Level Clear/Status Register 1*/
51 uint32_t SR[3]; /*ESM Status Register*/
52 uint32_t EPSR; /*ESM ERROR Pin Status Register*/
53 uint32_t IOFFHR; /*ESM Interrupt Offset High Register*/
54 uint32_t IOFFLR; /*ESM Interrupt Offset Low Register*/
55 uint32_t LTCR; /*ESM Low-Time Counter Register*/
56 uint32_t LTCPR; /*ESM Low-Time Counter Preload Register*/
57 uint32_t EKR; /*ESM Error Key Register*/
58 uint32_t SSR2; /*ESM Status Shadow Register 2*/
59 uint32_t IEPSR4; /*ESM Influence ERROR Pin Set/Status Register 4*/
60 uint32_t IEPCR4; /*ESM Influence ERROR Pin Clear/Status Register 4*/
61 uint32_t IESR4; /*ESM Interrupt Enable Set/Status Register 4*/
62 uint32_t IECR4; /*ESM Interrupt Enable Clear/Status Register 4*/
63 uint32_t ILSR4; /*Interrupt Level Set/Status Register 4*/
64 uint32_t ILCR4; /*Interrupt Level Clear/Status Register 4*/
65 uint32_t SR4; /*ESM Status Register 4*/
66} tms570_esm_t;
67
68
69/*---------------------TMS570_ESM_EEPAPR1---------------------*/
70/* field: IEPSET - Enable ERROR Pin Action/Response on Group 1. */
71/* Whole 32 bits */
72
73/*---------------------TMS570_ESM_DEPAPR1---------------------*/
74/* field: IEPCLR - Disable ERROR Pin Action/Response on Group 1. */
75/* Whole 32 bits */
76
77/*----------------------TMS570_ESM_IESR1----------------------*/
78/* field: INTENSET - Set interrupt Enable */
79/* Whole 32 bits */
80
81/*----------------------TMS570_ESM_IECR1----------------------*/
82/* field: INTENCLR - Clear Interrupt Enable */
83/* Whole 32 bits */
84
85/*----------------------TMS570_ESM_ILSR1----------------------*/
86/* field: INTLVLSET - Set Interrupt Priority */
87/* Whole 32 bits */
88
89/*----------------------TMS570_ESM_ILCR1----------------------*/
90/* field: INTLVLCLR - Clear Interrupt Priority. */
91/* Whole 32 bits */
92
93/*-----------------------TMS570_ESM_SR-----------------------*/
94/* field: ESF - Error Status Flag. Provides status information on a pending error. */
95/* Whole 32 bits */
96
97/*----------------------TMS570_ESM_EPSR----------------------*/
98/* field: EPSF - ERROR Pin Status Flag. Provides status information for the ERROR Pin. */
99#define TMS570_ESM_EPSR_EPSF BSP_BIT32(0)
100
101
102/*---------------------TMS570_ESM_IOFFHR---------------------*/
103/* field: INTOFFH - Offset High Level Interrupt. */
104#define TMS570_ESM_IOFFHR_INTOFFH(val) BSP_FLD32(val,0, 6)
105#define TMS570_ESM_IOFFHR_INTOFFH_GET(reg) BSP_FLD32GET(reg,0, 6)
106#define TMS570_ESM_IOFFHR_INTOFFH_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
107
108
109/*---------------------TMS570_ESM_IOFFLR---------------------*/
110/* field: INTOFFL - Offset Low Level Interrupt. */
111#define TMS570_ESM_IOFFLR_INTOFFL(val) BSP_FLD32(val,0, 6)
112#define TMS570_ESM_IOFFLR_INTOFFL_GET(reg) BSP_FLD32GET(reg,0, 6)
113#define TMS570_ESM_IOFFLR_INTOFFL_SET(reg,val) BSP_FLD32SET(reg, val,0, 6)
114
115
116/*----------------------TMS570_ESM_LTCR----------------------*/
117/* field: LTC - ERROR Pin Low-Time Counter */
118#define TMS570_ESM_LTCR_LTC(val) BSP_FLD32(val,0, 15)
119#define TMS570_ESM_LTCR_LTC_GET(reg) BSP_FLD32GET(reg,0, 15)
120#define TMS570_ESM_LTCR_LTC_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
121
122
123/*----------------------TMS570_ESM_LTCPR----------------------*/
124/* field: LTCP - ERROR Pin Low-Time Counter Pre-load Value */
125#define TMS570_ESM_LTCPR_LTCP(val) BSP_FLD32(val,0, 15)
126#define TMS570_ESM_LTCPR_LTCP_GET(reg) BSP_FLD32GET(reg,0, 15)
127#define TMS570_ESM_LTCPR_LTCP_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
128
129
130/*-----------------------TMS570_ESM_EKR-----------------------*/
131/* field: EKEY - Error Key. The key to reset the ERROR pin or to force an error on the ERROR pin. */
132#define TMS570_ESM_EKR_EKEY(val) BSP_FLD32(val,0, 3)
133#define TMS570_ESM_EKR_EKEY_GET(reg) BSP_FLD32GET(reg,0, 3)
134#define TMS570_ESM_EKR_EKEY_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
135
136
137/*----------------------TMS570_ESM_SSR2----------------------*/
138/* field: ESF - Error Status Flag. Shadow register for status information on pending error. */
139/* Whole 32 bits */
140
141/*---------------------TMS570_ESM_IEPSR4---------------------*/
142/* field: IEPSET - Set Influence on ERROR Pin */
143/* Whole 32 bits */
144
145/*---------------------TMS570_ESM_IEPCR4---------------------*/
146/* field: IEPCLR - Clear Influence on ERROR Pin */
147/* Whole 32 bits */
148
149/*----------------------TMS570_ESM_IESR4----------------------*/
150/* field: INTENSET - Set Interrupt Enable */
151/* Whole 32 bits */
152
153/*----------------------TMS570_ESM_IECR4----------------------*/
154/* field: INTENCLR - Clear Interrupt Enable */
155/* Whole 32 bits */
156
157/*----------------------TMS570_ESM_ILSR4----------------------*/
158/* field: INTLVLSET - Set Interrupt Level */
159/* Whole 32 bits */
160
161/*----------------------TMS570_ESM_ILCR4----------------------*/
162/* field: INTLVLCLR - Clear Interrupt Level */
163/* Whole 32 bits */
164
165/*-----------------------TMS570_ESM_SR4-----------------------*/
166/* field: ESF - Error Status Flag. Provides status information on a pending error. */
167/* Whole 32 bits */
168
169
170#endif /* LIBBSP_ARM_TMS570_ESM */
utility.h
Utility macros.
tms570_esm_t
Definition: reg_esm.h:44