RTEMS: bsps/arm/include/bsp/arm-cp15-start.h Source File

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arm-cp15-start.h
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1
10/*
11 * Copyright (c) 2013 Hesham AL-Matary.
12 * Copyright (c) 2009-2019 embedded brains GmbH. All rights reserved.
13 *
14 * embedded brains GmbH
15 * Dornierstr. 4
16 * 82178 Puchheim
17 * Germany
18 * <info@embedded-brains.de>
19 *
20 * The license and distribution terms for this file may be
21 * found in the file LICENSE in this distribution or at
22 * http://www.rtems.org/license/LICENSE.
23 */
24
25#ifndef LIBBSP_ARM_SHARED_ARM_CP15_START_H
26#define LIBBSP_ARM_SHARED_ARM_CP15_START_H
27
28#include <libcpu/arm-cp15.h>
29#include <bsp/start.h>
30#include <bsp/linker-symbols.h>
31#include <bspopts.h>
32
33#ifdef __cplusplus
34extern "C" {
35#endif /* __cplusplus */
36
37 typedef struct {
38 uint32_t begin;
39 uint32_t end;
40 uint32_t flags;
41} arm_cp15_start_section_config;
42
43#define ARMV7_CP15_START_DEFAULT_SECTIONS \
44 { \
45 .begin = (uint32_t) bsp_section_fast_text_begin, \
46 .end = (uint32_t) bsp_section_fast_text_end, \
47 .flags = ARMV7_MMU_CODE_CACHED \
48 }, { \
49 .begin = (uint32_t) bsp_section_fast_data_begin, \
50 .end = (uint32_t) bsp_section_fast_data_end, \
51 .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
52 }, { \
53 .begin = (uint32_t) bsp_section_start_begin, \
54 .end = (uint32_t) bsp_section_start_end, \
55 .flags = ARMV7_MMU_CODE_CACHED \
56 }, { \
57 .begin = (uint32_t) bsp_section_vector_begin, \
58 .end = (uint32_t) bsp_section_vector_end, \
59 .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
60 }, { \
61 .begin = (uint32_t) bsp_section_text_begin, \
62 .end = (uint32_t) bsp_section_text_end, \
63 .flags = ARMV7_MMU_CODE_CACHED \
64 }, { \
65 .begin = (uint32_t) bsp_section_rodata_begin, \
66 .end = (uint32_t) bsp_section_rodata_end, \
67 .flags = ARMV7_MMU_DATA_READ_ONLY_CACHED \
68 }, { \
69 .begin = (uint32_t) bsp_section_data_begin, \
70 .end = (uint32_t) bsp_section_data_end, \
71 .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
72 }, { \
73 .begin = (uint32_t) bsp_section_bss_begin, \
74 .end = (uint32_t) bsp_section_bss_end, \
75 .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
76 }, { \
77 .begin = (uint32_t) bsp_section_rtemsstack_begin, \
78 .end = (uint32_t) bsp_section_rtemsstack_end, \
79 .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
80 }, { \
81 .begin = (uint32_t) bsp_section_work_begin, \
82 .end = (uint32_t) bsp_section_work_end, \
83 .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
84 }, { \
85 .begin = (uint32_t) bsp_section_stack_begin, \
86 .end = (uint32_t) bsp_section_stack_end, \
87 .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
88 }, { \
89 .begin = (uint32_t) bsp_section_nocache_begin, \
90 .end = (uint32_t) bsp_section_nocache_end, \
91 .flags = ARMV7_MMU_DEVICE \
92 }, { \
93 .begin = (uint32_t) bsp_section_nocachenoload_begin, \
94 .end = (uint32_t) bsp_section_nocachenoload_end, \
95 .flags = ARMV7_MMU_DEVICE \
96 }, { \
97 .begin = (uint32_t) bsp_translation_table_base, \
98 .end = (uint32_t) bsp_translation_table_end, \
99 .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
100 }
101
102#define ARMV7_CP15_START_WORKSPACE_ENTRY_INDEX 9
103
104BSP_START_DATA_SECTION extern const arm_cp15_start_section_config
105 arm_cp15_start_mmu_config_table[];
106
107BSP_START_DATA_SECTION extern const size_t
108 arm_cp15_start_mmu_config_table_size;
109
110BSP_START_TEXT_SECTION static inline void
111arm_cp15_start_set_translation_table_entries(
112 uint32_t *ttb,
113 const arm_cp15_start_section_config *config
114)
115{
116 if (config->begin != config->end) {
117 uint32_t i;
118 uint32_t iend;
119 uint32_t index_mask;
120 uint32_t flags;
121#ifdef ARM_MMU_USE_SMALL_PAGES
122 uint32_t *pt;
123
124 pt = &ttb[ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT];
125 i = ARM_MMU_SMALL_PAGE_GET_INDEX(config->begin);
126 iend = ARM_MMU_SMALL_PAGE_GET_INDEX(ARM_MMU_SMALL_PAGE_MVA_ALIGN_UP(config->end));
127 index_mask = (1U << (32 - ARM_MMU_SMALL_PAGE_BASE_SHIFT)) - 1U;
128 flags = ARM_MMU_SECT_FLAGS_TO_SMALL_PAGE(config->flags);
129
130 while (i != iend) {
131 pt[i] = (i << ARM_MMU_SMALL_PAGE_BASE_SHIFT) | flags;
132 i = (i + 1U) & index_mask;
133 }
134#else
135 i = ARM_MMU_SECT_GET_INDEX(config->begin);
136 iend = ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(config->end));
137 index_mask = (1U << (32 - ARM_MMU_SECT_BASE_SHIFT)) - 1U;
138 flags = config->flags;
139
140 while (i != iend) {
141 ttb[i] = (i << ARM_MMU_SECT_BASE_SHIFT) | flags;
142 i = (i + 1U) & index_mask;
143 }
144#endif
145 }
146}
147
148BSP_START_TEXT_SECTION static inline void
149arm_cp15_start_setup_translation_table(
150 uint32_t *ttb,
151 uint32_t client_domain,
152 const arm_cp15_start_section_config *config_table,
153 size_t config_count
154)
155{
156#ifdef ARM_MMU_USE_SMALL_PAGES
157 uint32_t *pt;
158#endif
159 uint32_t dac;
160 size_t i;
161
162 dac = ARM_CP15_DAC_DOMAIN(client_domain, ARM_CP15_DAC_CLIENT);
163 arm_cp15_set_domain_access_control(dac);
164 arm_cp15_set_translation_table_base(ttb);
165
166 /* Initialize translation table with invalid entries */
167#ifdef ARM_MMU_USE_SMALL_PAGES
168 pt = &ttb[ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT];
169 for (i = 0; i < ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT; ++i) {
170 size_t j;
171
172 for (j = 0; j < ARM_MMU_SMALL_PAGE_TABLE_ENTRY_COUNT; ++j) {
173 pt[j] = 0;
174 }
175
176 ttb[i] = (uint32_t) pt | (client_domain << ARM_MMU_SECT_DOMAIN_SHIFT)
177 | ARM_MMU_PAGE_TABLE_DEFAULT;
178 pt += ARM_MMU_SMALL_PAGE_TABLE_ENTRY_COUNT;
179 }
180#else
181 for (i = 0; i < ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT; ++i) {
182 ttb[i] = 0;
183 }
184#endif
185
186 for (i = 0; i < config_count; ++i) {
187 arm_cp15_start_set_translation_table_entries(ttb, &config_table [i]);
188 }
189}
190
191BSP_START_TEXT_SECTION static inline void
192arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
193 uint32_t ctrl,
194 uint32_t *ttb,
195 uint32_t client_domain,
196 const arm_cp15_start_section_config *config_table,
197 size_t config_count
198)
199{
200 arm_cp15_start_setup_translation_table(
201 ttb,
202 client_domain,
203 config_table,
204 config_count
205 );
206
207 /* Enable MMU and cache */
208 ctrl |= ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M;
209
210 arm_cp15_set_control(ctrl);
211}
212
213BSP_START_TEXT_SECTION static inline uint32_t
214arm_cp15_start_setup_mmu_and_cache(uint32_t ctrl_clear, uint32_t ctrl_set)
215{
216 uint32_t ctrl = arm_cp15_get_control();
217
218 ctrl &= ~ctrl_clear;
219 ctrl |= ctrl_set;
220
221 arm_cp15_set_control(ctrl);
222
223 arm_cp15_tlb_invalidate();
224
225 return ctrl;
226}
227
228#ifdef __cplusplus
229}
230#endif /* __cplusplus */
231
232#endif /* LIBBSP_ARM_SHARED_ARM_CP15_START_H */
arm-cp15.h
ARM co-processor 15 (CP15) API.
arm_cp15_start_section_config
Definition: arm-cp15-start.h:37
config_s
Definition: deflate.c:115