RTEMS: bsps/powerpc/beatnik/net/if_em/if_em.h Source File

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if_em.h
1/**************************************************************************
2
3Copyright (c) 2001-2005, Intel Corporation
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30POSSIBILITY OF SUCH DAMAGE.
31
32***************************************************************************/
33
34/*$FreeBSD: /repoman/r/ncvs/src/sys/dev/em/if_em.h,v 1.31 2005/05/26 23:32:02 tackerman Exp $*/
35
36#ifndef _EM_H_DEFINED_
37#define _EM_H_DEFINED_
38
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/mbuf.h>
43#include <sys/protosw.h>
44#include <sys/socket.h>
45#include <sys/malloc.h>
46#include <sys/kernel.h>
47#ifndef __rtems__
48#include <sys/module.h>
49#endif
50#include <sys/sockio.h>
51#include <sys/sysctl.h>
52
53#include <net/if.h>
54#include <net/if_arp.h>
55#include <net/ethernet.h>
56#include <net/if_dl.h>
57#include <net/if_media.h>
58#ifndef __rtems__
59
60#include <net/bpf.h>
61#include <net/if_types.h>
62#include <net/if_vlan_var.h>
63#else
64#include <net/if_types.h>
65#endif
66
67#include <netinet/in_systm.h>
68#include <netinet/in.h>
69#include <netinet/ip.h>
70#include <netinet/tcp.h>
71#include <netinet/udp.h>
72
73#ifndef __rtems__
74#include <sys/bus.h>
75#include <machine/bus.h>
76#include <sys/rman.h>
77#include <machine/resource.h>
78#include <vm/vm.h>
79#include <vm/pmap.h>
80#include <machine/clock.h>
81#include <dev/pci/pcivar.h>
82#include <dev/pci/pcireg.h>
83#else
84#include <netinet/if_ether.h>
85#include <bsp/pci.h>
86#endif
87
88#ifndef __rtems__
89#include <sys/endian.h>
90#include <sys/proc.h>
91#include "opt_bdg.h"
92
93
94#include <dev/em/if_em_hw.h>
95#else
96#include "if_em_hw.h"
97#endif
98
99/* Tunables */
100
101/*
102 * EM_MAX_TXD: Maximum number of Transmit Descriptors
103 * Valid Range: 80-256 for 82542 and 82543-based adapters
104 * 80-4096 for others
105 * Default Value: 256
106 * This value is the number of transmit descriptors allocated by the driver.
107 * Increasing this value allows the driver to queue more transmits. Each
108 * descriptor is 16 bytes.
109 */
110#define EM_MAX_TXD 256
111
112/*
113 * EM_MAX_RXD - Maximum number of receive Descriptors
114 * Valid Range: 80-256 for 82542 and 82543-based adapters
115 * 80-4096 for others
116 * Default Value: 256
117 * This value is the number of receive descriptors allocated by the driver.
118 * Increasing this value allows the driver to buffer more incoming packets.
119 * Each descriptor is 16 bytes. A receive buffer is also allocated for each
120 * descriptor. The maximum MTU size is 16110.
121 *
122 */
123#define EM_MAX_RXD 80
124
125/*
126 * EM_TIDV - Transmit Interrupt Delay Value
127 * Valid Range: 0-65535 (0=off)
128 * Default Value: 64
129 * This value delays the generation of transmit interrupts in units of
130 * 1.024 microseconds. Transmit interrupt reduction can improve CPU
131 * efficiency if properly tuned for specific network traffic. If the
132 * system is reporting dropped transmits, this value may be set too high
133 * causing the driver to run out of available transmit descriptors.
134 */
135#define EM_TIDV 64
136
137/*
138 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544)
139 * Valid Range: 0-65535 (0=off)
140 * Default Value: 64
141 * This value, in units of 1.024 microseconds, limits the delay in which a
142 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
143 * this value ensures that an interrupt is generated after the initial
144 * packet is sent on the wire within the set amount of time. Proper tuning,
145 * along with EM_TIDV, may improve traffic throughput in specific
146 * network conditions.
147 */
148#define EM_TADV 64
149
150/*
151 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
152 * Valid Range: 0-65535 (0=off)
153 * Default Value: 0
154 * This value delays the generation of receive interrupts in units of 1.024
155 * microseconds. Receive interrupt reduction can improve CPU efficiency if
156 * properly tuned for specific network traffic. Increasing this value adds
157 * extra latency to frame reception and can end up decreasing the throughput
158 * of TCP traffic. If the system is reporting dropped receives, this value
159 * may be set too high, causing the driver to run out of available receive
160 * descriptors.
161 *
162 * CAUTION: When setting EM_RDTR to a value other than 0, adapters
163 * may hang (stop transmitting) under certain network conditions.
164 * If this occurs a WATCHDOG message is logged in the system event log.
165 * In addition, the controller is automatically reset, restoring the
166 * network connection. To eliminate the potential for the hang
167 * ensure that EM_RDTR is set to 0.
168 */
169#define EM_RDTR 0
170
171/*
172 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
173 * Valid Range: 0-65535 (0=off)
174 * Default Value: 64
175 * This value, in units of 1.024 microseconds, limits the delay in which a
176 * receive interrupt is generated. Useful only if EM_RDTR is non-zero,
177 * this value ensures that an interrupt is generated after the initial
178 * packet is received within the set amount of time. Proper tuning,
179 * along with EM_RDTR, may improve traffic throughput in specific network
180 * conditions.
181 */
182#define EM_RADV 64
183
184
185/*
186 * This parameter controls the maximum no of times the driver will loop
187 * in the isr.
188 * Minimum Value = 1
189 */
190#define EM_MAX_INTR 3
191
192/*
193 * Inform the stack about transmit checksum offload capabilities.
194 */
195#define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP)
196
197/*
198 * This parameter controls the duration of transmit watchdog timer.
199 */
200#define EM_TX_TIMEOUT 5 /* set to 5 seconds */
201
202/*
203 * This parameter controls when the driver calls the routine to reclaim
204 * transmit descriptors.
205 */
206#ifndef __rtems__
207#define EM_TX_CLEANUP_THRESHOLD EM_MAX_TXD / 8
208#else
209#define EM_TX_CLEANUP_THRESHOLD (adapter->tx_cleanup_threshold)
210#endif
211
212/*
213 * This parameter controls whether or not autonegotation is enabled.
214 * 0 - Disable autonegotiation
215 * 1 - Enable autonegotiation
216 */
217#define DO_AUTO_NEG 1
218
219/*
220 * This parameter control whether or not the driver will wait for
221 * autonegotiation to complete.
222 * 1 - Wait for autonegotiation to complete
223 * 0 - Don't wait for autonegotiation to complete
224 */
225#define WAIT_FOR_AUTO_NEG_DEFAULT 0
226
227/*
228 * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue
229 * with 82541/82547 devices and some switches. See the "Known Limitations" section of
230 * the README file for a complete description and a list of affected switches.
231 *
232 * 0 = Hardware default
233 * 1 = Master mode
234 * 2 = Slave mode
235 * 3 = Auto master/slave
236 */
237/* #define EM_MASTER_SLAVE 2 */
238
239/* Tunables -- End */
240
241#define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
242 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
243 ADVERTISE_1000_FULL)
244
245#define EM_VENDOR_ID 0x8086
246#define EM_MMBA 0x0010 /* Mem base address */
247#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
248
249#define EM_JUMBO_PBA 0x00000028
250#define EM_DEFAULT_PBA 0x00000030
251#define EM_SMARTSPEED_DOWNSHIFT 3
252#define EM_SMARTSPEED_MAX 15
253
254
255#define MAX_NUM_MULTICAST_ADDRESSES 128
256#define PCI_ANY_ID (~0U)
257#define ETHER_ALIGN 2
258
259/* Defines for printing debug information */
260#define DEBUG_INIT 0
261#define DEBUG_IOCTL 0
262#define DEBUG_HW 0
263
264#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
265#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
266#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
267#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
268#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
269#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
270#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
271#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
272#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
273
274
275/* Supported RX Buffer Sizes */
276#define EM_RXBUFFER_2048 2048
277#define EM_RXBUFFER_4096 4096
278#define EM_RXBUFFER_8192 8192
279#define EM_RXBUFFER_16384 16384
280
281#define EM_MAX_SCATTER 64
282
283/* ******************************************************************************
284 * vendor_info_array
285 *
286 * This array contains the list of Subvendor/Subdevice IDs on which the driver
287 * should load.
288 *
289 * ******************************************************************************/
290 typedef struct _em_vendor_info_t {
291 unsigned int vendor_id;
292 unsigned int device_id;
293 unsigned int subvendor_id;
294 unsigned int subdevice_id;
295 unsigned int index;
296} em_vendor_info_t;
297
298
299 struct em_buffer {
300 struct mbuf *m_head;
301#ifndef __rtems__
302 bus_dmamap_t map; /* bus_dma map for packet */
303#endif
304};
305
306/*
307 * Bus dma allocation structure used by
308 * em_dma_malloc and em_dma_free.
309 */
310 struct em_dma_alloc {
311 bus_addr_t dma_paddr; /* 64bit in descriptors */
312#ifndef __rtems__
313 caddr_t dma_vaddr;
314 bus_dma_tag_t dma_tag;
315 bus_dmamap_t dma_map;
316 bus_dma_segment_t dma_seg;
317 bus_size_t dma_size;
318 int dma_nseg;
319#else
320 caddr_t dma_vaddr;
321 caddr_t malloc_base;
322#endif
323};
324
325typedef enum _XSUM_CONTEXT_T {
326 OFFLOAD_NONE,
327 OFFLOAD_TCP_IP,
328 OFFLOAD_UDP_IP
329} XSUM_CONTEXT_T;
330
331struct adapter;
332 struct em_int_delay_info {
333 struct adapter *adapter; /* Back-pointer to the adapter struct */
334 int offset; /* Register offset to read/write */
335 int value; /* Current value in usecs */
336};
337
338/* For 82544 PCIX Workaround */
339 typedef struct _ADDRESS_LENGTH_PAIR
340{
341 u_int64_t address;
342 u_int32_t length;
343} ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR;
344
345 typedef struct _DESCRIPTOR_PAIR
346{
347 ADDRESS_LENGTH_PAIR descriptor[4];
348 u_int32_t elements;
349} DESC_ARRAY, *PDESC_ARRAY;
350
351/* Our adapter structure */
352 struct adapter {
353 struct arpcom interface_data;
354 struct adapter *next;
355 struct adapter *prev;
356 struct em_hw hw;
357
358 /* FreeBSD operating-system-specific structures */
359 struct em_osdep osdep;
360#ifndef __rtems__
361 struct device *dev;
362 struct resource *res_memory;
363 struct resource *res_ioport;
364 struct resource *res_interrupt;
365 void *int_handler_tag;
366 struct ifmedia media;
367 struct callout timer;
368 struct callout tx_fifo_timer;
369 int io_rid;
370 struct ifmedia media;
371#endif
372 u_int8_t unit;
373#ifndef __rtems__
374 struct mtx mtx;
375 int em_insert_vlan_header;
376#else
377 device_t dev;
378 unsigned char irq_no;
379 unsigned char b,d,f;
380 rtems_id tid;
381#endif
382
383 /* Info about the board itself */
384#ifndef __rtems__
385 u_int32_t part_num;
386#else
387 uint32_t part_num;
388#endif
389 u_int8_t link_active;
390 u_int16_t link_speed;
391 u_int16_t link_duplex;
392 u_int32_t smartspeed;
393 struct em_int_delay_info tx_int_delay;
394 struct em_int_delay_info tx_abs_int_delay;
395 struct em_int_delay_info rx_int_delay;
396 struct em_int_delay_info rx_abs_int_delay;
397
398 XSUM_CONTEXT_T active_checksum_context;
399
400 /*
401 * Transmit definitions
402 *
403 * We have an array of num_tx_desc descriptors (handled
404 * by the controller) paired with an array of tx_buffers
405 * (at tx_buffer_area).
406 * The index of the next available descriptor is next_avail_tx_desc.
407 * The number of remaining tx_desc is num_tx_desc_avail.
408 */
409 struct em_dma_alloc txdma; /* bus_dma glue for tx desc */
410 struct em_tx_desc *tx_desc_base;
411 u_int32_t next_avail_tx_desc;
412 u_int32_t oldest_used_tx_desc;
413 volatile u_int16_t num_tx_desc_avail;
414 u_int16_t num_tx_desc;
415 u_int32_t txd_cmd;
416 struct em_buffer *tx_buffer_area;
417#ifndef __rtems__
418 bus_dma_tag_t txtag; /* dma tag for tx */
419#endif
420#ifdef __rtems__
421 u_int16_t tx_cleanup_threshold;
422#endif
423
424 /*
425 * Receive definitions
426 *
427 * we have an array of num_rx_desc rx_desc (handled by the
428 * controller), and paired with an array of rx_buffers
429 * (at rx_buffer_area).
430 * The next pair to check on receive is at offset next_rx_desc_to_check
431 */
432 struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */
433 struct em_rx_desc *rx_desc_base;
434 u_int32_t next_rx_desc_to_check;
435 u_int16_t num_rx_desc;
436 u_int32_t rx_buffer_len;
437 struct em_buffer *rx_buffer_area;
438#ifndef __rtems__
439 bus_dma_tag_t rxtag;
440#endif
441
442 /* Jumbo frame */
443 struct mbuf *fmp;
444 struct mbuf *lmp;
445
446 /* Misc stats maintained by the driver */
447 unsigned long dropped_pkts;
448 unsigned long mbuf_alloc_failed;
449 unsigned long mbuf_cluster_failed;
450 unsigned long no_tx_desc_avail1;
451 unsigned long no_tx_desc_avail2;
452 unsigned long no_tx_map_avail;
453 unsigned long no_tx_dma_setup;
454
455 /* Used in for 82547 10Mb Half workaround */
456 #define EM_PBA_BYTES_SHIFT 0xA
457 #define EM_TX_HEAD_ADDR_SHIFT 7
458 #define EM_PBA_TX_MASK 0xFFFF0000
459 #define EM_FIFO_HDR 0x10
460
461 #define EM_82547_PKT_THRESH 0x3e0
462
463 u_int32_t tx_fifo_size;
464 u_int32_t tx_fifo_head;
465 u_int32_t tx_fifo_head_addr;
466 u_int64_t tx_fifo_reset_cnt;
467 u_int64_t tx_fifo_wrk_cnt;
468 u_int32_t tx_head_addr;
469
470 /* For 82544 PCIX Workaround */
471 boolean_t pcix_82544;
472 boolean_t in_detach;
473
474 struct em_hw_stats stats;
475};
476
477#define EM_LOCK_INIT(_sc, _name) \
478 mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
479#define EM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx)
480#define EM_LOCK(_sc) mtx_lock(&(_sc)->mtx)
481#define EM_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
482#define EM_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED)
483
484#ifdef __rtems__
485/* Initialize bare minimals so we can check the phy link status;
486 * 'rtems_em_pci_setup()' must have been run on the device already!
487 */
488int
489em_hw_early_init(device_t dev);
490#endif
491
492
493#endif /* _EM_H_DEFINED_ */
rtems_id
Objects_Id rtems_id
Used to manage and manipulate RTEMS object identifiers.
Definition: types.h:83
_ADDRESS_LENGTH_PAIR
Definition: if_em.h:340
_DESCRIPTOR_PAIR
Definition: if_em.h:346
_em_vendor_info_t
Definition: if_em.h:290
_map
Definition: mm.c:60
adapter
Definition: if_em.h:352
bus_dma_segment_t
Definition: rtemscompat_defs.h:91
callout
Definition: rtemsmain.c:734
device
Definition: rtemscompat1.h:15
em_buffer
Definition: if_em.h:299
em_dma_alloc
Definition: if_em.h:310
em_hw_stats
Definition: if_em_hw.h:1212
em_hw
Definition: if_em_hw.h:1283
em_int_delay_info
Definition: if_em.h:332
em_osdep
Definition: if_em_osdep.h:88
em_rx_desc
Definition: if_em_hw.h:577
em_tx_desc
Definition: if_em_hw.h:696
gfe_dmamem
Definition: if_gfevar.h:58
mtx
Definition: if_fxpvar.h:78