RTEMS: cpukit/score/cpu/sparc64/cpu.c File Reference

| RTEMS 5.4-rc2

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Macros | Functions | Variables
cpu.c File Reference

SPARC64 CPU Dependent Source. More...

`#include <rtems/score/isr.h>`
`#include <rtems/score/tls.h>`
`#include <rtems/rtems/cache.h>`

## Macros
#define | HI_BITS_SHIFT 10
#define | HM_BITS_SHIFT 32
#define | HH_BITS_SHIFT 42
#define | IMM_MASK 0x000003FF
#define | HH_BITS_MASK 0xFFFFFC0000000000
#define | HM_BITS_MASK 0x000003FF00000000
#define | HI_BITS_MASK 0x00000000FFFFFC00
#define | LO_BITS_MASK 0x00000000000003FF

## Functions
void | _CPU_Initialize (void)
| CPU initialization.
void | _CPU_Context_Initialize (Context_Control *the_context, void *stack_base, uint32_t size, uint32_t new_level, void *entry_point, bool is_fp, void *tls_area)
uint32_t | _CPU_ISR_Get_level (void)
| Returns the interrupt level of the executing thread.
void | _CPU_ISR_install_raw_handler (uint32_t vector, CPU_ISR_raw_handler new_handler, CPU_ISR_raw_handler *old_handler)
| SPARC specific raw ISR installer.
void | _CPU_ISR_install_vector (uint32_t vector, CPU_ISR_handler new_handler, CPU_ISR_handler *old_handler)
| SPARC specific RTEMS ISR installer.

## Variables
volatile uint32_t | _CPU_ISR_Dispatch_disable
const CPU_Trap_table_entry | _CPU_Trap_slot_template

## Detailed Description

SPARC64 CPU Dependent Source.

## Variable Documentation

## ◆ _CPU_Trap_slot_template

const CPU_Trap_table_entry _CPU_Trap_slot_template

Initial value:
= {
0x89508000,
0x05000000,
0x8410a000,
0x8528b020,
0x07000000,
0x8610c002,
0x81c0e000,
0x84102000
}

This is the set of opcodes for the instructions loaded into a trap table entry. The routine which installs a handler is responsible for filling in the fields for the _handler address and the _vector trap type.

The constants following this structure are masks for the fields which must be filled in when the handler is installed.