RTEMS: General Control and Status Functions

| RTEMS 5.4-rc2

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Typedefs | Enumerations | Functions
General Control and Status Functions
Board Support Packages » ARM » Intel Cyclone V » Contributed Code » QSPI Flash Controller Module

## Typedefs
typedef enum ALT_QSPI_INT_STATUS_e | ALT_QSPI_INT_STATUS_t

## Enumerations
enum | ALT_QSPI_INT_STATUS_e { ALT_QSPI_INT_STATUS_MODE_FAIL = (0x1 << 0) , ALT_QSPI_INT_STATUS_UFL = (0x1 << 1) , ALT_QSPI_INT_STATUS_IDAC_OP_COMPLETE = (0x1 << 2) , ALT_QSPI_INT_STATUS_IDAC_OP_REJECT = (0x1 << 3) , ALT_QSPI_INT_STATUS_WR_PROT_VIOL = (0x1 << 4) , ALT_QSPI_INT_STATUS_ILL_AHB_ACCESS = (0x1 << 5) , ALT_QSPI_INT_STATUS_IDAC_WTRMK_TRIG = (0x1 << 6) , ALT_QSPI_INT_STATUS_RX_OVF = (0x1 << 7) , ALT_QSPI_INT_STATUS_TX_FIFO_NOT_FULL = (0x1 << 8) , ALT_QSPI_INT_STATUS_TX_FIFO_FULL = (0x1 << 9) , ALT_QSPI_INT_STATUS_RX_FIFO_NOT_EMPTY = (0x1 << 10) , ALT_QSPI_INT_STATUS_RX_FIFO_FULL = (0x1 << 11) , ALT_QSPI_INT_STATUS_IDAC_RD_FULL = (0x1 << 12) }

## Functions
ALT_STATUS_CODE | alt_qspi_init (void)
ALT_STATUS_CODE | alt_qspi_uninit (void)
ALT_STATUS_CODE | alt_qspi_disable (void)
ALT_STATUS_CODE | alt_qspi_enable (void)
uint32_t | alt_qspi_int_status_get (void)
ALT_STATUS_CODE | alt_qspi_int_clear (const uint32_t mask)
ALT_STATUS_CODE | alt_qspi_int_disable (const uint32_t mask)
ALT_STATUS_CODE | alt_qspi_int_enable (const uint32_t mask)
bool | alt_qspi_is_idle (void)

## Detailed Description

The declarations and functions in this group provide general purpose control and status functions for the QSPI Flash Controller.

## Typedef Documentation

## ◆ ALT_QSPI_INT_STATUS_t

typedef enum ALT_QSPI_INT_STATUS_e ALT_QSPI_INT_STATUS_t

This type definition enumerates the interrupt status conditions for the QSPI controller.

The enumerations serve as masks for the QSPI controller events that can be set when the designated conditions occur and the corresponding event is enabled. When any of these event source conditions are true, the ALT_INT_INTERRUPT_QSPI_IRQ interrupt output is asserted high.

Interrupt sources are cleared when software calls alt_qspi_int_clear(). The interrupt sources are individually maskable using alt_qspi_int_disable() and alt_qspi_int_enable().

## Enumeration Type Documentation

## ◆ ALT_QSPI_INT_STATUS_e

enum ALT_QSPI_INT_STATUS_e

This type definition enumerates the interrupt status conditions for the QSPI controller.

The enumerations serve as masks for the QSPI controller events that can be set when the designated conditions occur and the corresponding event is enabled. When any of these event source conditions are true, the ALT_INT_INTERRUPT_QSPI_IRQ interrupt output is asserted high.

Interrupt sources are cleared when software calls alt_qspi_int_clear(). The interrupt sources are individually maskable using alt_qspi_int_disable() and alt_qspi_int_enable().

Enumerator
ALT_QSPI_INT_STATUS_MODE_FAIL | Mode fail M - indicates the voltage on pin n_ss_in is inconsistent with the SPI mode. Set = 1 if n_ss_in is low in master mode (multi-master contention). These conditions will clear the spi_enable bit and disable the SPI. 0 = no mode fault has been detected. 1 = a mode fault has occurred.
ALT_QSPI_INT_STATUS_UFL | Underflow Detected. 0 = no underflow has been detected. 1 = underflow is detected and an attempt to transfer data is made when the small TX FIFO is empty. This may occur when AHB write data is being supplied too slowly to keep up with the requested write operation.
ALT_QSPI_INT_STATUS_IDAC_OP_COMPLETE | Controller has completed last triggered indirect operation.
ALT_QSPI_INT_STATUS_IDAC_OP_REJECT | Indirect operation was requested but could not be accepted. Two indirect operations already in storage.
ALT_QSPI_INT_STATUS_WR_PROT_VIOL | Write to protected area was attempted and rejected.
ALT_QSPI_INT_STATUS_ILL_AHB_ACCESS | Illegal AHB Access Detected. AHB write wrapping bursts and the use of SPLIT/RETRY accesses will cause this interrupt to trigger.
ALT_QSPI_INT_STATUS_IDAC_WTRMK_TRIG | Indirect Transfer Watermark Level Breached.
ALT_QSPI_INT_STATUS_RX_OVF | Receive Overflow. This should only occur in Legacy SPI mode. Set if an attempt is made to push the RX FIFO when it is full. This bit is reset only by a system reset and cleared only when this register is read. If a new push to the RX FIFO occurs coincident with a register read this flag will remain set. 0 = no overflow has been detected. 1 = an overflow has occurred.
ALT_QSPI_INT_STATUS_TX_FIFO_NOT_FULL | Small TX FIFO not full (current FIFO status). Can be ignored in non-SPI legacy mode. 0 = FIFO has >= THRESHOLD entries. 1 = FIFO has < THRESHOLD entries.
ALT_QSPI_INT_STATUS_TX_FIFO_FULL | Small TX FIFO full (current FIFO status). Can be ignored in non-SPI legacy mode. 0 = FIFO is not full. 1 = FIFO is full.
ALT_QSPI_INT_STATUS_RX_FIFO_NOT_EMPTY | Small RX FIFO not empty (current FIFO status). Can be ignored in non-SPI legacy mode. 0 = FIFO has < RX THRESHOLD entries. 1 = FIFO has >= THRESHOLD entries.
ALT_QSPI_INT_STATUS_RX_FIFO_FULL | Small RX FIFO full (current FIFO status). Can be ignored in non-SPI legacy mode. 0 = FIFO is not full. 1 = FIFO is full.
ALT_QSPI_INT_STATUS_IDAC_RD_FULL | Indirect Read partition of SRAM is full and unable to immediately complete indirect operation.

## Function Documentation

## ◆ alt_qspi_disable()

ALT_STATUS_CODE alt_qspi_disable | ( | void |  | ) |

Disable the QSPI Controller.

Disable the QSPI once the current transfer of the data word (FF_W) is complete. All output enables are inactive and all pins are set to input mode.

Return values

  ALT_E_SUCCESS | Indicates successful completion.
  ALT_E_ERROR | Indicates an error occurred.

## ◆ alt_qspi_enable()

ALT_STATUS_CODE alt_qspi_enable | ( | void |  | ) |

Enable the QSPI Controller.

Return values

  ALT_E_SUCCESS | Indicates successful completion.
  ALT_E_ERROR | Indicates an error occurred.

## ◆ alt_qspi_init()

ALT_STATUS_CODE alt_qspi_init | ( | void |  | ) |

Initialize the QSPI flash controller for use.

Return values

  ALT_E_SUCCESS | Indicates successful completion.
  ALT_E_ERROR | Indicates an error occurred.

## ◆ alt_qspi_int_clear()

ALT_STATUS_CODE alt_qspi_int_clear | ( | const uint32_t | mask | ) |

Clears the specified QSPI controller interrupt status conditions identified in the mask.

This function clears one or more of the status conditions as contributors to the ALT_INT_INTERRUPT_QSPI_IRQ interrupt signal state.

Parameters

  mask | Specifies the QSPI interrupt status conditions to clear. mask is a mask of logically OR'ed ALT_QSPI_INT_STATUS_t values that designate the status conditions to clear.

Return values

  ALT_E_SUCCESS | Indicates successful completion.
  ALT_E_ERROR | Indicates an error occurred.

## ◆ alt_qspi_int_disable()

ALT_STATUS_CODE alt_qspi_int_disable | ( | const uint32_t | mask | ) |

Disable the specified QSPI controller interrupt status conditions identified in the mask.

This function disables one or more of the status conditions as contributors to the ALT_INT_INTERRUPT_QSPI_IRQ interrupt signal state.

This API requires that the QSPI controller be idle, as determined by alt_qspi_is_idle().

NOTE: A cleared bit for any status condition in the mask value does not have the effect of enabling it as a contributor to the ALT_INT_INTERRUPT_QSPI_IRQ interrupt signal state. The function alt_qspi_int_enable() is used to enable status source conditions.

Parameters

  mask | Specifies the status conditions to disable as interrupt source contributors. mask is a mask of logically OR'ed ALT_QSPI_INT_STATUS_t values that designate the status conditions to disable.

Return values

  ALT_E_SUCCESS | Indicates successful completion.
  ALT_E_ERROR | Indicates an error occurred.

## ◆ alt_qspi_int_enable()

ALT_STATUS_CODE alt_qspi_int_enable | ( | const uint32_t | mask | ) |

Enable the specified QSPI controller interrupt status conditions identified in the mask.

This function enables one or more of the status conditions as contributors to the ALT_INT_INTERRUPT_QSPI_IRQ interrupt signal state.

This API requires that the QSPI controller be idle, as determined by alt_qspi_is_idle().

NOTE: A cleared bit for any status condition in the mask value does not have the effect of disabling it as a contributor to the ALT_INT_INTERRUPT_QSPI_IRQ interrupt signal state. The function alt_qspi_int_disable() is used to disable status source conditions.

Parameters

  mask | Specifies the status conditions to enable as interrupt source contributors. mask is a mask of logically OR'ed ALT_QSPI_INT_STATUS_t values that designate the status conditions to enable.

Return values

  ALT_E_SUCCESS | Indicates successful completion.
  ALT_E_ERROR | Indicates an error occurred.

## ◆ alt_qspi_int_status_get()

uint32_t alt_qspi_int_status_get | ( | void |  | ) |

Returns the QSPI controller interrupt status register value.

This function returns the current value of the QSPI controller interrupt status register value which reflects the current QSPI controller status conditions.

Returns
  The current value of the QSPI controller interrupt status register value which reflects the current QSPI controller status conditions as defined by the ALT_QSPI_INT_STATUS_t mask. If the corresponding bit is set then the condition is asserted.

## ◆ alt_qspi_is_idle()

bool alt_qspi_is_idle | ( | void |  | ) |

Returns true the serial interface and QSPI pipeline is IDLE.

Returns
  Returns true the serial interface and QSPI pipeline is IDLE.

## ◆ alt_qspi_uninit()

ALT_STATUS_CODE alt_qspi_uninit | ( | void |  | ) |

Uninitialize the QSPI flash controller.

Uninitialize the QSPI flash controller by cancelling any indirect transfers in progress and putting the QSPI controller into reset.

Return values

  ALT_E_SUCCESS | Indicates successful completion.
  ALT_E_ERROR | Indicates an error occurred.