RTEMS: bsps/arm/tms570/include/bsp/ti_herc/reg_pbist.h Source File

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reg_pbist.h
1/* The header file is generated by make_header.py from PBIST.json */
2/* Current script's version can be found at: */
3/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
4
5/*
6 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
7 *
8 * Czech Technical University in Prague
9 * Zikova 1903/4
10 * 166 36 Praha 6
11 * Czech Republic
12 *
13 * All rights reserved.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions are met:
17 *
18 * 1. Redistributions of source code must retain the above copyright notice, this
19 * list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright notice,
21 * this list of conditions and the following disclaimer in the documentation
22 * and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 * The views and conclusions contained in the software and documentation are those
36 * of the authors and should not be interpreted as representing official policies,
37 * either expressed or implied, of the FreeBSD Project.
38*/
39#ifndef LIBBSP_ARM_TMS570_PBIST
40#define LIBBSP_ARM_TMS570_PBIST
41
42#include <bsp/utility.h>
43
44 typedef struct{
45 uint32_t DNW[88]; /*Reserved DO NOT WRITE*/
46 uint32_t RAMT; /*RAM Configuration Register*/
47 uint32_t DLR; /*Datalogger Register*/
48 uint8_t reserved1 [24];
49 uint32_t PACT; /*PBIST Activate/ROM Clock Enable Register*/
50 uint32_t PBISTID; /*PBIST ID Register*/
51 uint32_t OVER; /*Override Register*/
52 uint8_t reserved2 [4];
53 uint32_t FSRF0; /*Fail Status Fail Register 0*/
54 uint8_t reserved3 [4];
55 uint32_t FSRC0; /*Fail Status Count Register 0*/
56 uint32_t FSRC1; /*Fail Status Count Register 1*/
57 uint32_t FSRA0; /*Fail Status Address 0 Register*/
58 uint32_t FSRA1; /*Fail Status Address 1 Register*/
59 uint32_t FSRDL0; /*Fail Status Data Register 0*/
60 uint8_t reserved4 [4];
61 uint32_t FSRDL1; /*Fail Status Data Register 1*/
62 uint8_t reserved5 [12];
63 uint32_t ROM; /*ROM Mask Register*/
64 uint32_t ALGO; /*ROM Algorithm Mask Register*/
65 uint32_t RINFOL; /*RAM Info Mask Lower Register*/
66 uint32_t RINFOUL; /*RAM Info Mask Lower Register*/
67} tms570_pbist_t;
68
69
70/*----------------------TMS570_PBIST_DNW----------------------*/
71/* field: Reserved - Do not write */
72/* Whole 32 bits */
73
74/*---------------------TMS570_PBIST_RAMT---------------------*/
75/* field: RGS - Ram Group Select. Refer Table 2-5 for information on the RGS value for each memory. */
76#define TMS570_PBIST_RAMT_RGS(val) BSP_FLD32(val,24, 31)
77#define TMS570_PBIST_RAMT_RGS_GET(reg) BSP_FLD32GET(reg,24, 31)
78#define TMS570_PBIST_RAMT_RGS_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
79
80/* field: RDS - Return Data Select. Refer Table 2-5 for information on the RDS values for each memory. */
81#define TMS570_PBIST_RAMT_RDS(val) BSP_FLD32(val,16, 23)
82#define TMS570_PBIST_RAMT_RDS_GET(reg) BSP_FLD32GET(reg,16, 23)
83#define TMS570_PBIST_RAMT_RDS_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
84
85/* field: DWR - Data Width Register */
86#define TMS570_PBIST_RAMT_DWR(val) BSP_FLD32(val,8, 15)
87#define TMS570_PBIST_RAMT_DWR_GET(reg) BSP_FLD32GET(reg,8, 15)
88#define TMS570_PBIST_RAMT_DWR_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
89
90/* field: SMS - Sense Margin Select Register */
91#define TMS570_PBIST_RAMT_SMS(val) BSP_FLD32(val,6, 7)
92#define TMS570_PBIST_RAMT_SMS_GET(reg) BSP_FLD32GET(reg,6, 7)
93#define TMS570_PBIST_RAMT_SMS_SET(reg,val) BSP_FLD32SET(reg, val,6, 7)
94
95/* field: PLS - Pipeline Latency Select */
96#define TMS570_PBIST_RAMT_PLS(val) BSP_FLD32(val,2, 5)
97#define TMS570_PBIST_RAMT_PLS_GET(reg) BSP_FLD32GET(reg,2, 5)
98#define TMS570_PBIST_RAMT_PLS_SET(reg,val) BSP_FLD32SET(reg, val,2, 5)
99
100/* field: RLS - RAM Latency Select */
101#define TMS570_PBIST_RAMT_RLS(val) BSP_FLD32(val,0, 1)
102#define TMS570_PBIST_RAMT_RLS_GET(reg) BSP_FLD32GET(reg,0, 1)
103#define TMS570_PBIST_RAMT_RLS_SET(reg,val) BSP_FLD32SET(reg, val,0, 1)
104
105
106/*----------------------TMS570_PBIST_DLR----------------------*/
107/* field: DLR4 - Config access: setting this bit allows the host processor to configure the PBIST controller registers */
108#define TMS570_PBIST_DLR_DLR4 BSP_BIT32(4)
109
110/* field: DLR2 - ROM-based testing: setting this bit enables the PBIST controller to execute test algorithms that are */
111#define TMS570_PBIST_DLR_DLR2 BSP_BIT32(2)
112
113
114/*---------------------TMS570_PBIST_PACT---------------------*/
115/* field: PACT1 - PBIST Activate */
116#define TMS570_PBIST_PACT_PACT1 BSP_BIT32(1)
117
118/* field: PACT0 - ROM Clock Enable Register */
119#define TMS570_PBIST_PACT_PACT0 BSP_BIT32(0)
120
121
122/*--------------------TMS570_PBIST_PBISTID--------------------*/
123/* field: PBIST_ID - This is a unique ID assigned to each PBIST controller in a device with multiple PBIST controllers. */
124#define TMS570_PBIST_PBISTID_PBIST_ID(val) BSP_FLD32(val,0, 7)
125#define TMS570_PBIST_PBISTID_PBIST_ID_GET(reg) BSP_FLD32GET(reg,0, 7)
126#define TMS570_PBIST_PBISTID_PBIST_ID_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
127
128
129/*---------------------TMS570_PBIST_OVER---------------------*/
130/* field: OVER0 - RINFO Override Bit */
131#define TMS570_PBIST_OVER_OVER0 BSP_BIT32(0)
132
133
134/*---------------------TMS570_PBIST_FSRF0---------------------*/
135/* field: FSRF0 - Fail Status 0. */
136#define TMS570_PBIST_FSRF0_FSRF0 BSP_BIT32(0)
137
138
139/*---------------------TMS570_PBIST_FSRC0---------------------*/
140/* field: FSRC0 - Fail Status Count 0. Indicates the number of failures on port 0. */
141#define TMS570_PBIST_FSRC0_FSRC0(val) BSP_FLD32(val,0, 7)
142#define TMS570_PBIST_FSRC0_FSRC0_GET(reg) BSP_FLD32GET(reg,0, 7)
143#define TMS570_PBIST_FSRC0_FSRC0_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
144
145
146/*---------------------TMS570_PBIST_FSRC1---------------------*/
147/* field: FSRC1 - Fail Status Count 1. Indicates the number of failures on port 1. */
148#define TMS570_PBIST_FSRC1_FSRC1(val) BSP_FLD32(val,0, 7)
149#define TMS570_PBIST_FSRC1_FSRC1_GET(reg) BSP_FLD32GET(reg,0, 7)
150#define TMS570_PBIST_FSRC1_FSRC1_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
151
152
153/*---------------------TMS570_PBIST_FSRA0---------------------*/
154/* field: FSRA0 - Fail Status Address 0. Contains the address of the first failure. */
155#define TMS570_PBIST_FSRA0_FSRA0(val) BSP_FLD32(val,0, 15)
156#define TMS570_PBIST_FSRA0_FSRA0_GET(reg) BSP_FLD32GET(reg,0, 15)
157#define TMS570_PBIST_FSRA0_FSRA0_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
158
159
160/*---------------------TMS570_PBIST_FSRA1---------------------*/
161/* field: FSRA1 - Fail Status Address 1. Contains the address of the first failure. */
162#define TMS570_PBIST_FSRA1_FSRA1(val) BSP_FLD32(val,0, 15)
163#define TMS570_PBIST_FSRA1_FSRA1_GET(reg) BSP_FLD32GET(reg,0, 15)
164#define TMS570_PBIST_FSRA1_FSRA1_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
165
166
167/*--------------------TMS570_PBIST_FSRDL0--------------------*/
168/* field: FSRDL1 - Failure data on port 1 */
169/* Whole 32 bits */
170
171/*--------------------TMS570_PBIST_FSRDL1--------------------*/
172/* field: FSRDL1 - Failure data on port 1 */
173/* Whole 32 bits */
174
175/*----------------------TMS570_PBIST_ROM----------------------*/
176/* field: ROM - ROM Mask */
177#define TMS570_PBIST_ROM_ROM(val) BSP_FLD32(val,0, 1)
178#define TMS570_PBIST_ROM_ROM_GET(reg) BSP_FLD32GET(reg,0, 1)
179#define TMS570_PBIST_ROM_ROM_SET(reg,val) BSP_FLD32SET(reg, val,0, 1)
180
181
182/*---------------------TMS570_PBIST_ALGO---------------------*/
183/* field: ROM_ALG_MASK - Each bit corresponds to a specific algorithm */
184/* Whole 32 bits */
185
186/*--------------------TMS570_PBIST_RINFOL--------------------*/
187/* field: RAM_ALG_MASK_LOW - Each bit corresponds to a specific algorithm */
188/* Whole 32 bits */
189
190/*--------------------TMS570_PBIST_RINFOUL--------------------*/
191/* field: RAM_ALG_MASK_UP - Each bit corresponds to a specific algorithm */
192/* Whole 32 bits */
193
194
195#endif /* LIBBSP_ARM_TMS570_PBIST */
utility.h
Utility macros.
tms570_pbist_t
Definition: reg_pbist.h:44