RTEMS: bsps/m68k/mvme147/include/bsp.h Source File

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bsp.h
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1
9/* bsp.h
10 *
11 * This include file contains all MVME147 board IO definitions.
12 *
13 * COPYRIGHT (c) 1989-1999.
14 * On-Line Applications Research Corporation (OAR).
15 *
16 * The license and distribution terms for this file may be
17 * found in the file LICENSE in this distribution or at
18 * http://www.rtems.org/license/LICENSE.
19 *
20 * MVME147 port for TNI - Telecom Bretagne
21 * by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
22 * May 1996
23 */
24
25#ifndef LIBBSP_M68K_MVME147_BSP_H
26#define LIBBSP_M68K_MVME147_BSP_H
27
38#include <bspopts.h>
39#include <bsp/default-initial-extension.h>
40
41#include <rtems.h>
42
43#ifdef __cplusplus
44extern "C" {
45#endif
46
47/* Constants */
48
49#define RAM_START 0x00005000
50#define RAM_END 0x00400000
51
52 /* MVME 147 Peripheral controller chip
53 see MVME147/D1, 3.4 */
54
55 struct pcc_map {
56 /* 32 bit registers */
57 uint32_t dma_table_address; /* 0xfffe1000 */
58 uint32_t dma_data_address; /* 0xfffe1004 */
59 uint32_t dma_bytecount; /* 0xfffe1008 */
60 uint32_t dma_data_holding; /* 0xfffe100c */
61
62 /* 16 bit registers */
63 uint16_t timer1_preload; /* 0xfffe1010 */
64 uint16_t timer1_count; /* 0xfffe1012 */
65 uint16_t timer2_preload; /* 0xfffe1014 */
66 uint16_t timer2_count; /* 0xfffe1016 */
67
68 /* 8 bit registers */
69 uint8_t timer1_int_control; /* 0xfffe1018 */
70 uint8_t timer1_control; /* 0xfffe1019 */
71 uint8_t timer2_int_control; /* 0xfffe101a */
72 uint8_t timer2_control; /* 0xfffe101b */
73
74 uint8_t acfail_int_control; /* 0xfffe101c */
75 uint8_t watchdog_control; /* 0xfffe101d */
76
77 uint8_t printer_int_control; /* 0xfffe101e */
78 uint8_t printer_control; /* 0xfffe102f */
79
80 uint8_t dma_int_control; /* 0xfffe1020 */
81 uint8_t dma_control; /* 0xfffe1021 */
82 uint8_t bus_error_int_control; /* 0xfffe1022 */
83 uint8_t dma_status; /* 0xfffe1023 */
84 uint8_t abort_int_control; /* 0xfffe1024 */
85 uint8_t table_address_function_code; /* 0xfffe1025 */
86 uint8_t serial_port_int_control; /* 0xfffe1026 */
87 uint8_t general_purpose_control; /* 0xfffe1027 */
88 uint8_t lan_int_control; /* 0xfffe1028 */
89 uint8_t general_purpose_status; /* 0xfffe1029 */
90 uint8_t scsi_port_int_control; /* 0xfffe102a */
91 uint8_t slave_base_address; /* 0xfffe102b */
92 uint8_t software_int_1_control; /* 0xfffe102c */
93 uint8_t int_base_vector; /* 0xfffe102d */
94 uint8_t software_int_2_control; /* 0xfffe102e */
95 uint8_t revision_level; /* 0xfffe102f */
96};
97
98#define pcc ((volatile struct pcc_map * const) 0xfffe1000)
99
100#define z8530 0xfffe3001
101
102/* interrupt vectors - see MVME146/D1 4.14 */
103#define PCC_BASE_VECTOR 0x40 /* First user int */
104#define SCC_VECTOR PCC_BASE_VECTOR+3
105#define TIMER_1_VECTOR PCC_BASE_VECTOR+8
106#define TIMER_2_VECTOR PCC_BASE_VECTOR+9
107#define SOFT_1_VECTOR PCC_BASE_VECTOR+10
108#define SOFT_2_VECTOR PCC_BASE_VECTOR+11
109
110#define USE_CHANNEL_A 1 /* 1 = use channel A for console */
111#define USE_CHANNEL_B 0 /* 1 = use channel B for console */
112
113#if (USE_CHANNEL_A == 1)
114#define CONSOLE_CONTROL 0xfffe3002
115#define CONSOLE_DATA 0xfffe3003
116#elif (USE_CHANNEL_B == 1)
117#define CONSOLE_CONTROL 0xfffe3000
118#define CONSOLE_DATA 0xfffe3001
119#endif
120
121extern rtems_isr_entry M68Kvec[]; /* vector table address */
122
123/* functions */
124
125rtems_isr_entry set_vector(
126 rtems_isr_entry handler,
127 rtems_vector_number vector,
128 int type
129);
130
131#ifdef __cplusplus
132}
133#endif
134
137#endif
default-initial-extension.h
DEFAULT_INITIAL_EXTENSION Support.
rtems_vector_number
ISR_Vector_number rtems_vector_number
Control block type used to manage the vectors.
Definition: intr.h:47
rtems.h
pcc_map
Definition: bsp.h:55