RTEMS: CMSIS Core Instruction Interface

| RTEMS 5.4-rc2

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Modules | Macros | Variables
CMSIS Core Instruction Interface
Board Support Packages » ARM » Shared » CMSIS » Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick) » Instrumentation Trace Macrocell (ITM) » Data Watchpoint and Trace (DWT) » Trace Port Interface (TPI) » Core Debug Registers (CoreDebug) » Core register bit field macros » Core Definitions » Functions and Instructions Reference » CMSIS Core Register Access Functions | Board Support Packages » ARM » Shared » CMSIS

## Modules
| CMSIS SIMD Intrinsics

## Macros
#define | __CMSIS_GCC_OUT_REG(r) "=r" (r)
#define | __CMSIS_GCC_USE_REG(r) "r" (r)
#define | __BKPT(value) __ASM volatile ("bkpt "#value)
| Breakpoint.
#define | __CLZ __builtin_clz
| Count leading zeros.

## Variables
uint32_t | op2

## Detailed Description

Access to dedicated instructions

## Macro Definition Documentation

## ◆ __BKPT

#define __BKPT | ( |  | value | ) | __ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

  [in] | value | is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

## ◆ __CLZ

#define __CLZ __builtin_clz

Count leading zeros.

Counts the number of leading zeros of a data value.

Parameters

  [in] | value | Value to count the leading zeros

Returns
  number of leading zeros in value

## Variable Documentation

## ◆ op2

uint32_t op2

Initial value:
{
return (op1 >> op2) | (op1 << (32U - op2))