RTEMS: Core Definitions

| RTEMS 5.4-rc2

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Core Definitions
Board Support Packages » ARM » Shared » CMSIS » Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick) » Instrumentation Trace Macrocell (ITM) » Data Watchpoint and Trace (DWT) » Trace Port Interface (TPI) » Core Debug Registers (CoreDebug) » Core register bit field macros

Definitions for base addresses, unions, and structures. More...

## Modules
| Functions and Instructions Reference
| NVIC Functions
| Functions that manage interrupts and exceptions via the NVIC.
#define | SCS_BASE (0xE000E000UL)
#define | ITM_BASE (0xE0000000UL)
#define | DWT_BASE (0xE0001000UL)
#define | TPI_BASE (0xE0040000UL)
#define | CoreDebug_BASE (0xE000EDF0UL)
#define | SysTick_BASE (SCS_BASE + 0x0010UL)
#define | NVIC_BASE (SCS_BASE + 0x0100UL)
#define | SCB_BASE (SCS_BASE + 0x0D00UL)
#define | SCnSCB ((SCnSCB_Type *) SCS_BASE )
#define | SCB ((SCB_Type *) SCB_BASE )
#define | SysTick ((SysTick_Type *) SysTick_BASE )
#define | NVIC ((NVIC_Type *) NVIC_BASE )
#define | ITM ((ITM_Type *) ITM_BASE )
#define | DWT ((DWT_Type *) DWT_BASE )
#define | TPI ((TPI_Type *) TPI_BASE )
#define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE)

## Detailed Description

Definitions for base addresses, unions, and structures.

## Macro Definition Documentation

## ◆ CoreDebug

#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE)

Core Debug configuration struct

## ◆ CoreDebug_BASE

#define CoreDebug_BASE (0xE000EDF0UL)

Core Debug Base Address

## ◆ DWT

#define DWT ((DWT_Type *) DWT_BASE )

DWT configuration struct

## ◆ DWT_BASE

#define DWT_BASE (0xE0001000UL)

DWT Base Address

## ◆ ITM

#define ITM ((ITM_Type *) ITM_BASE )

ITM configuration struct

## ◆ ITM_BASE

#define ITM_BASE (0xE0000000UL)

ITM Base Address

## ◆ NVIC

#define NVIC ((NVIC_Type *) NVIC_BASE )

NVIC configuration struct

## ◆ NVIC_BASE

#define NVIC_BASE (SCS_BASE + 0x0100UL)

NVIC Base Address

## ◆ SCB

#define SCB ((SCB_Type *) SCB_BASE )

SCB configuration struct

## ◆ SCB_BASE

#define SCB_BASE (SCS_BASE + 0x0D00UL)

System Control Block Base Address

## ◆ SCnSCB

#define SCnSCB ((SCnSCB_Type *) SCS_BASE )

System control Register not in SCB

## ◆ SCS_BASE

#define SCS_BASE (0xE000E000UL)

System Control Space Base Address

## ◆ SysTick

#define SysTick ((SysTick_Type *) SysTick_BASE )

SysTick configuration struct

## ◆ SysTick_BASE

#define SysTick_BASE (SCS_BASE + 0x0010UL)

SysTick Base Address

## ◆ TPI

#define TPI ((TPI_Type *) TPI_BASE )

TPI configuration struct

## ◆ TPI_BASE

#define TPI_BASE (0xE0040000UL)

TPI Base Address