RTEMS: bsps/or1k/generic_or1k/include/bsp/generic_or1k.h Source File

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generic_or1k.h
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1
9/*
10 * COPYRIGHT (c) 2014-2015 Hesham ALMatary <heshamelmatary@gmail.com>
11 *
12 * The license and distribution terms for this file may be
13 * found in the file LICENSE in this distribution or at
14 * http://www.rtems.org/license/LICENSE
15 */
16
17#ifndef LIBBSP_GENERIC_OR1K_H
18#define LIBBSP_GENERIC_OR1K_H
19
20#include <stdint.h>
21
38 #define OR1K_REG(x) (*((volatile unsigned char *) (x)))
39 #define OR1K_BIT(n) (1 << (n))
40
48#define OR1K_BSP_CLOCK_FREQ 50000000UL
49#define OR1K_BSP_UART_BASE 0x90000000
50
51#define OR1K_BSP_UART_REG_TX (OR1K_BSP_UART_BASE+0)
52#define OR1K_BSP_UART_REG_RX (OR1K_BSP_UART_BASE+0)
53#define OR1K_BSP_UART_REG_DEV_LATCH_LOW (OR1K_BSP_UART_BASE+0)
54#define OR1K_BSP_UART_REG_DEV_LATCH_HIGH (OR1K_BSP_UART_BASE+1)
55#define OR1K_BSP_UART_REG_INT_ENABLE (OR1K_BSP_UART_BASE+1)
56#define OR1K_BSP_UART_REG_INT_ID (OR1K_BSP_UART_BASE+2)
57#define OR1K_BSP_UART_REG_FIFO_CTRL (OR1K_BSP_UART_BASE+2)
58#define OR1K_BSP_UART_REG_LINE_CTRL (OR1K_BSP_UART_BASE+3)
59#define OR1K_BSP_UART_REG_MODEM_CTRL (OR1K_BSP_UART_BASE+4)
60#define OR1K_BSP_UART_REG_LINE_STATUS (OR1K_BSP_UART_BASE+5)
61#define OR1K_BSP_UART_REG_MODEM_STATUS (OR1K_BSP_UART_BASE+6)
62#define OR1K_BSP_UART_REG_SCRATCH (OR1K_BSP_UART_BASE+7)
63
64/* FIFO Control Register */
65#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_1 (0x00)
66#define OR1K_BSP_UART_REG_FIFO_CTRL_ENABLE_FIFO (0x01)
67#define OR1K_BSP_UART_REG_FIFO_CTRL_CLEAR_RCVR (0x02)
68#define OR1K_BSP_UART_REG_FIFO_CTRL_CLEAR_XMIT (0x03)
69#define OR1K_BSP_UART_REG_FIFO_CTRL_DMA_SELECT (0x08)
70#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_4 (0x40)
71#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_8 (0x80)
72#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_14 (0xC0)
73#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_MASK (0xC0)
74
75/* Line Control Register */
76#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN5 (0x00)
77#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN6 (0x01)
78#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN7 (0x02)
79#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN8 (0x03)
80#define OR1K_BSP_UART_REG_LINE_CTRL_STOP (0x04)
81#define OR1K_BSP_UART_REG_LINE_CTRL_PARITY (0x08)
82#define OR1K_BSP_UART_REG_LINE_CTRL_EPAR (0x10)
83#define OR1K_BSP_UART_REG_LINE_CTRL_SPAR (0x20)
84#define OR1K_BSP_UART_REG_LINE_CTRL_SBC (0x40)
85#define OR1K_BSP_UART_REG_LINE_CTRL_DLAB (0x80)
86
87/* Line Status Register */
88#define OR1K_BSP_UART_REG_LINE_STATUS_DR (0x01)
89#define OR1K_BSP_UART_REG_LINE_STATUS_OE (0x02)
90#define OR1K_BSP_UART_REG_LINE_STATUS_PE (0x04)
91#define OR1K_BSP_UART_REG_LINE_STATUS_FE (0x08)
92#define OR1K_BSP_UART_REG_LINE_STATUS_BI (0x10)
93#define OR1K_BSP_UART_REG_LINE_STATUS_THRE (0x20)
94#define OR1K_BSP_UART_REG_LINE_STATUS_TEMT (0x40)
95
96/* Modem Control Register */
97#define OR1K_BSP_UART_REG_MODEM_CTRL_DTR (0x01)
98#define OR1K_BSP_UART_REG_MODEM_CTRL_RTS (0x02)
99#define OR1K_BSP_UART_REG_MODEM_CTRL_OUT1 (0x04)
100#define OR1K_BSP_UART_REG_MODEM_CTRL_OUT2 (0x08)
101#define OR1K_BSP_UART_REG_MODEM_CTRL_LOOP (0x10)
102
103/* Modem Status Register */
104#define OR1K_BSP_UART_REG_MODEM_STATUS_DCTS (0x01)
105#define OR1K_BSP_UART_REG_MODEM_STATUS_DDSR (0x02)
106#define OR1K_BSP_UART_REG_MODEM_STATUS_TERI (0x04)
107#define OR1K_BSP_UART_REG_MODEM_STATUS_DDCD (0x08)
108#define OR1K_BSP_UART_REG_MODEM_STATUS_CTS (0x10)
109#define OR1K_BSP_UART_REG_MODEM_STATUS_DSR (0x20)
110#define OR1K_BSP_UART_REG_MODEM_STATUS_RI (0x40)
111#define OR1K_BSP_UART_REG_MODEM_STATUS_DCD (0x80)
112#define OR1K_BSP_UART_REG_MODEM_STATUS_ANY_DELTA (0x0F)
113
118#endif /* LIBBSP_GENERIC_OR1K_H */