RTEMS: bsps/arm/altera-cyclone-v/include/bsp/alt_reset_manager.h Source File

| RTEMS 5.4-rc2

Loading...
Searching...
No Matches
alt_reset_manager.h
Go to the documentation of this file.
1
11/******************************************************************************
12*
13* Copyright 2013 Altera Corporation. All Rights Reserved.
14*
15* Redistribution and use in source and binary forms, with or without
16* modification, are permitted provided that the following conditions are met:
17*
18* 1. Redistributions of source code must retain the above copyright notice,
19* this list of conditions and the following disclaimer.
20*
21* 2. Redistributions in binary form must reproduce the above copyright notice,
22* this list of conditions and the following disclaimer in the documentation
23* and/or other materials provided with the distribution.
24*
25* 3. The name of the author may not be used to endorse or promote products
26* derived from this software without specific prior written permission.
27*
28* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER "AS IS" AND ANY EXPRESS OR
29* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE DISCLAIMED. IN NO
31* EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
32* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
33* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
37* OF SUCH DAMAGE.
38*
39******************************************************************************/
40
41#ifndef __ALT_RESET_MGR_H__
42#define __ALT_RESET_MGR_H__
43
44#include "hwlib.h"
45#include <stdbool.h>
46
47#ifdef __cplusplus
48extern "C"
49{
50#endif /* __cplusplus */
51
59/******************************************************************************/
68/******************************************************************************/
73 typedef enum ALT_RESET_EVENT_e
74{
76 ALT_RESET_EVENT_PORVOLTRST = 0x00000001,
77
79 ALT_RESET_EVENT_NPORPINRST = 0x00000002,
80
82 ALT_RESET_EVENT_FPGACOLDRST = 0x00000004,
83
85 ALT_RESET_EVENT_CONFIGIOCOLDRST = 0x00000008,
86
88 ALT_RESET_EVENT_SWCOLDRST = 0x00000010,
89
91 ALT_RESET_EVENT_NRSTPINRST = 0x00000100,
92
94 ALT_RESET_EVENT_FPGAWARMRST = 0x00000200,
95
97 ALT_RESET_EVENT_SWWARMRST = 0x00000400,
98
100 ALT_RESET_EVENT_MPUWD0RST = 0x00001000,
101
103 ALT_RESET_EVENT_MPUWD1RST = 0x00002000,
104
106 ALT_RESET_EVENT_L4WD0RST = 0x00004000,
107
109 ALT_RESET_EVENT_L4WD1RST = 0x00008000,
110
112 ALT_RESET_EVENT_FPGADBGRST = 0x00040000,
113
115 ALT_RESET_EVENT_CDBGREQRST = 0x00080000,
116
118 ALT_RESET_EVENT_SDRSELFREFTIMEOUT = 0x01000000,
119
121 ALT_RESET_EVENT_FPGAMGRHSTIMEOUT = 0x02000000,
122
124 ALT_RESET_EVENT_SCANHSTIMEOUT = 0x04000000,
125
127 ALT_RESET_EVENT_FPGAHSTIMEOUT = 0x08000000,
128
130 ALT_RESET_EVENT_ETRSTALLTIMEOUT = 0x10000000
131} ALT_RESET_EVENT_t;
132
133/******************************************************************************/
143uint32_t alt_reset_event_get(void);
144
145/******************************************************************************/
157 ALT_STATUS_CODE alt_reset_event_clear(uint32_t event_mask);
158
161/******************************************************************************/
170/******************************************************************************/
179 ALT_STATUS_CODE alt_reset_cold_reset(void);
180
181/******************************************************************************/
240 ALT_STATUS_CODE alt_reset_warm_reset(uint32_t warm_reset_delay,
241 uint32_t nRST_pin_clk_assertion,
242 bool sdram_refresh,
243 bool fpga_mgr_handshake,
244 bool scan_mgr_handshake,
245 bool fpga_handshake,
246 bool etr_stall);
247
248#if 0
288#endif
289
294#ifdef __cplusplus
295}
296#endif /* __cplusplus */
297#endif /* __ALT_RESET_MGR_H__ */
alt_reset_cold_reset
ALT_STATUS_CODE alt_reset_cold_reset(void)
Definition: alt_reset_manager.c:63
alt_reset_warm_reset
ALT_STATUS_CODE alt_reset_warm_reset(uint32_t warm_reset_delay, uint32_t nRST_pin_clk_assertion, bool sdram_refresh, bool fpga_mgr_handshake, bool scan_mgr_handshake, bool fpga_handshake, bool etr_stall)
Definition: alt_reset_manager.c:69
alt_reset_event_get
uint32_t alt_reset_event_get(void)
Definition: alt_reset_manager.c:52
alt_reset_event_clear
ALT_STATUS_CODE alt_reset_event_clear(uint32_t event_mask)
Definition: alt_reset_manager.c:57
ALT_RESET_EVENT_t
enum ALT_RESET_EVENT_e ALT_RESET_EVENT_t
ALT_RESET_EVENT_e
ALT_RESET_EVENT_e
Definition: alt_reset_manager.h:74
ALT_RESET_EVENT_L4WD1RST
@ ALT_RESET_EVENT_L4WD1RST
Definition: alt_reset_manager.h:109
ALT_RESET_EVENT_NRSTPINRST
@ ALT_RESET_EVENT_NRSTPINRST
Definition: alt_reset_manager.h:91
ALT_RESET_EVENT_CDBGREQRST
@ ALT_RESET_EVENT_CDBGREQRST
Definition: alt_reset_manager.h:115
ALT_RESET_EVENT_FPGACOLDRST
@ ALT_RESET_EVENT_FPGACOLDRST
Definition: alt_reset_manager.h:82
ALT_RESET_EVENT_FPGADBGRST
@ ALT_RESET_EVENT_FPGADBGRST
Definition: alt_reset_manager.h:112
ALT_RESET_EVENT_SWWARMRST
@ ALT_RESET_EVENT_SWWARMRST
Definition: alt_reset_manager.h:97
ALT_RESET_EVENT_ETRSTALLTIMEOUT
@ ALT_RESET_EVENT_ETRSTALLTIMEOUT
Definition: alt_reset_manager.h:130
ALT_RESET_EVENT_FPGAHSTIMEOUT
@ ALT_RESET_EVENT_FPGAHSTIMEOUT
Definition: alt_reset_manager.h:127
ALT_RESET_EVENT_L4WD0RST
@ ALT_RESET_EVENT_L4WD0RST
Definition: alt_reset_manager.h:106
ALT_RESET_EVENT_MPUWD0RST
@ ALT_RESET_EVENT_MPUWD0RST
Definition: alt_reset_manager.h:100
ALT_RESET_EVENT_NPORPINRST
@ ALT_RESET_EVENT_NPORPINRST
Definition: alt_reset_manager.h:79
ALT_RESET_EVENT_SDRSELFREFTIMEOUT
@ ALT_RESET_EVENT_SDRSELFREFTIMEOUT
Definition: alt_reset_manager.h:118
ALT_RESET_EVENT_SWCOLDRST
@ ALT_RESET_EVENT_SWCOLDRST
Definition: alt_reset_manager.h:88
ALT_RESET_EVENT_MPUWD1RST
@ ALT_RESET_EVENT_MPUWD1RST
Definition: alt_reset_manager.h:103
ALT_RESET_EVENT_FPGAMGRHSTIMEOUT
@ ALT_RESET_EVENT_FPGAMGRHSTIMEOUT
Definition: alt_reset_manager.h:121
ALT_RESET_EVENT_CONFIGIOCOLDRST
@ ALT_RESET_EVENT_CONFIGIOCOLDRST
Definition: alt_reset_manager.h:85
ALT_RESET_EVENT_FPGAWARMRST
@ ALT_RESET_EVENT_FPGAWARMRST
Definition: alt_reset_manager.h:94
ALT_RESET_EVENT_PORVOLTRST
@ ALT_RESET_EVENT_PORVOLTRST
Definition: alt_reset_manager.h:76
ALT_RESET_EVENT_SCANHSTIMEOUT
@ ALT_RESET_EVENT_SCANHSTIMEOUT
Definition: alt_reset_manager.h:124
hwlib.h
ALT_STATUS_CODE
int32_t ALT_STATUS_CODE
Definition: hwlib.h:60