RTEMS: PowerPC Assembler Support

| RTEMS 5.4-rc2

Loading...
Searching...
No Matches
Macros
PowerPC Assembler Support
Internal » SuperCore » CPU Architecture Support » PowerPC

PowerPC Assembler Support. More...

## Macros
#define | __USER_LABEL_PREFIX__
#define | __REGISTER_PREFIX__
#define | __FLOAT_REGISTER_PREFIX__ __REGISTER_PREFIX__
#define | __PROC_LABEL_PREFIX__ __USER_LABEL_PREFIX__
#define | SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
#define | PROC(x) CONCAT1 (__PROC_LABEL_PREFIX__, x)
#define | REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
#define | FREG(x) CONCAT1 (__FLOAT_REGISTER_PREFIX__, x)
#define | r0 REG(0)
#define | r1 REG(1)
#define | r2 REG(2)
#define | r3 REG(3)
#define | r4 REG(4)
#define | r5 REG(5)
#define | r6 REG(6)
#define | r7 REG(7)
#define | r8 REG(8)
#define | r9 REG(9)
#define | r10 REG(10)
#define | r11 REG(11)
#define | r12 REG(12)
#define | r13 REG(13)
#define | r14 REG(14)
#define | r15 REG(15)
#define | r16 REG(16)
#define | r17 REG(17)
#define | r18 REG(18)
#define | r19 REG(19)
#define | r20 REG(20)
#define | r21 REG(21)
#define | r22 REG(22)
#define | r23 REG(23)
#define | r24 REG(24)
#define | r25 REG(25)
#define | r26 REG(26)
#define | r27 REG(27)
#define | r28 REG(28)
#define | r29 REG(29)
#define | r30 REG(30)
#define | r31 REG(31)
#define | f0 FREG(0)
#define | f1 FREG(1)
#define | f2 FREG(2)
#define | f3 FREG(3)
#define | f4 FREG(4)
#define | f5 FREG(5)
#define | f6 FREG(6)
#define | f7 FREG(7)
#define | f8 FREG(8)
#define | f9 FREG(9)
#define | f10 FREG(10)
#define | f11 FREG(11)
#define | f12 FREG(12)
#define | f13 FREG(13)
#define | f14 FREG(14)
#define | f15 FREG(15)
#define | f16 FREG(16)
#define | f17 FREG(17)
#define | f18 FREG(18)
#define | f19 FREG(19)
#define | f20 FREG(20)
#define | f21 FREG(21)
#define | f22 FREG(22)
#define | f23 FREG(23)
#define | f24 FREG(24)
#define | f25 FREG(25)
#define | f26 FREG(26)
#define | f27 FREG(27)
#define | f28 FREG(28)
#define | f29 FREG(29)
#define | f30 FREG(30)
#define | f31 FREG(31)
#define | v0 0
#define | v1 1
#define | v2 2
#define | v3 3
#define | v4 4
#define | v5 5
#define | v6 6
#define | v7 7
#define | v8 8
#define | v9 9
#define | v10 10
#define | v11 11
#define | v12 12
#define | v13 13
#define | v14 14
#define | v15 15
#define | v16 16
#define | v17 17
#define | v18 18
#define | v19 19
#define | v20 20
#define | v21 21
#define | v22 22
#define | v23 23
#define | v24 24
#define | v25 25
#define | v26 26
#define | v27 27
#define | v28 28
#define | v29 29
#define | v30 30
#define | v31 31
#define | srr0 0x01a
#define | srr1 0x01b
#define | srr2 0x3de /* IBM 400 series only */
#define | srr3 0x3df /* IBM 400 series only */
#define | csrr0 58 /* Book E */
#define | csrr1 59 /* Book E */
#define | mcsrr0 570 /* e500 */
#define | mcsrr1 571 /* e500 */
#define | dsrr0 574 /* e200 */
#define | dsrr1 575 /* e200 */
#define | sprg0 0x110
#define | sprg1 0x111
#define | sprg2 0x112
#define | sprg3 0x113
#define | sprg4 276
#define | sprg5 277
#define | sprg6 278
#define | sprg7 279
#define | usprg0 256
#define | dar 0x013 /* Data Address Register */
#define | dec 0x016 /* Decrementer Register */
#define | PUBLIC_VAR(sym) .globl SYM (sym)
#define | EXTERN_VAR(sym) .extern SYM (sym)
#define | PUBLIC_PROC(sym) .globl PROC (sym)
#define | EXTERN_PROC(sym) .extern PROC (sym)
#define | ALIGN(n, p) .align p
#define | DESCRIPTOR(x)
#define | EXT_SYM_REF(x) .long x
#define | EXT_PROC_REF(x) .long x
#define | BEGIN_CODE_DCL .text
#define | END_CODE_DCL
#define | BEGIN_DATA_DCL .data
#define | END_DATA_DCL
#define | BEGIN_CODE .text
#define | END_CODE
#define | BEGIN_DATA .data
#define | END_DATA
#define | BEGIN_BSS .bss
#define | END_BSS
#define | END
#define | PPC64_NOP_FOR_LINKER_TOC_POINTER_RESTORE

## Detailed Description

PowerPC Assembler Support.

## Macro Definition Documentation

## ◆ DESCRIPTOR

#define DESCRIPTOR | ( |  | x | ) |

Value:
.section .descriptors,"aw"; \
PUBLIC_VAR (x); \
SYM (x):; \
.long PROC (x); \
.long s.got; \
.long 0