RTEMS: bsps/arm/altera-cyclone-v/include/bsp/alt_dma_common.h Source File

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alt_dma_common.h
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1
7/******************************************************************************
8 *
9 * Copyright 2013 Altera Corporation. All Rights Reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1. Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3. The name of the author may not be used to endorse or promote products
22 * derived from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER "AS IS" AND ANY EXPRESS OR
25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE DISCLAIMED. IN NO
27 * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
28 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
29 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
32 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
33 * OF SUCH DAMAGE.
34 *
35 ******************************************************************************/
36
37#ifndef __ALT_DMA_COMMON_H__
38#define __ALT_DMA_COMMON_H__
39
40#ifdef __cplusplus
41extern "C"
42{
43#endif /* __cplusplus */
44
57 typedef enum ALT_DMA_CHANNEL_e
58{
59 ALT_DMA_CHANNEL_0 = 0,
60 ALT_DMA_CHANNEL_1 = 1,
61 ALT_DMA_CHANNEL_2 = 2,
62 ALT_DMA_CHANNEL_3 = 3,
63 ALT_DMA_CHANNEL_4 = 4,
64 ALT_DMA_CHANNEL_5 = 5,
65 ALT_DMA_CHANNEL_6 = 6,
66 ALT_DMA_CHANNEL_7 = 7
67}
68ALT_DMA_CHANNEL_t;
69
83 typedef enum ALT_DMA_PERIPH_e
84{
85 ALT_DMA_PERIPH_FPGA_0 = 0,
86 ALT_DMA_PERIPH_FPGA_1 = 1,
87 ALT_DMA_PERIPH_FPGA_2 = 2,
88 ALT_DMA_PERIPH_FPGA_3 = 3,
90 ALT_DMA_PERIPH_FPGA_4_OR_CAN0_IF1 = 4,
91 ALT_DMA_PERIPH_FPGA_5_OR_CAN0_IF2 = 5,
92 ALT_DMA_PERIPH_FPGA_6_OR_CAN1_IF1 = 6,
93 ALT_DMA_PERIPH_FPGA_7_OR_CAN1_IF2 = 7,
95 ALT_DMA_PERIPH_FPGA_4 = 4,
96 ALT_DMA_PERIPH_FPGA_5 = 5,
97 ALT_DMA_PERIPH_FPGA_6 = 6,
98 ALT_DMA_PERIPH_FPGA_7 = 7,
100 ALT_DMA_PERIPH_CAN0_IF1 = 4,
101 ALT_DMA_PERIPH_CAN0_IF2 = 5,
102 ALT_DMA_PERIPH_CAN1_IF1 = 6,
103 ALT_DMA_PERIPH_CAN1_IF2 = 7,
105 ALT_DMA_PERIPH_I2C0_TX = 8,
106 ALT_DMA_PERIPH_I2C0_RX = 9,
107 ALT_DMA_PERIPH_I2C1_TX = 10,
108 ALT_DMA_PERIPH_I2C1_RX = 11,
109 ALT_DMA_PERIPH_I2C2_TX = 12,
110 ALT_DMA_PERIPH_I2C2_RX = 13,
111 ALT_DMA_PERIPH_I2C3_TX = 14,
112 ALT_DMA_PERIPH_I2C3_RX = 15,
113 ALT_DMA_PERIPH_SPI0_MASTER_TX = 16,
114 ALT_DMA_PERIPH_SPI0_MASTER_RX = 17,
115 ALT_DMA_PERIPH_SPI0_SLAVE_TX = 18,
116 ALT_DMA_PERIPH_SPI0_SLAVE_RX = 19,
117 ALT_DMA_PERIPH_SPI1_MASTER_TX = 20,
118 ALT_DMA_PERIPH_SPI1_MASTER_RX = 21,
119 ALT_DMA_PERIPH_SPI1_SLAVE_TX = 22,
120 ALT_DMA_PERIPH_SPI1_SLAVE_RX = 23,
121 ALT_DMA_PERIPH_QSPI_FLASH_TX = 24,
122 ALT_DMA_PERIPH_QSPI_FLASH_RX = 25,
123 ALT_DMA_PERIPH_STM = 26,
124 ALT_DMA_PERIPH_RESERVED = 27,
125 ALT_DMA_PERIPH_UART0_TX = 28,
126 ALT_DMA_PERIPH_UART0_RX = 29,
127 ALT_DMA_PERIPH_UART1_TX = 30,
128 ALT_DMA_PERIPH_UART1_RX = 31
129}
130ALT_DMA_PERIPH_t;
131
135 typedef enum ALT_DMA_SECURITY_e
136{
137 ALT_DMA_SECURITY_DEFAULT = 0,
138 ALT_DMA_SECURITY_SECURE = 1,
139 ALT_DMA_SECURITY_NONSECURE = 2
140}
141ALT_DMA_SECURITY_t;
142
146 typedef enum ALT_DMA_EVENT_e
147{
148 ALT_DMA_EVENT_0 = 0,
149 ALT_DMA_EVENT_1 = 1,
150 ALT_DMA_EVENT_2 = 2,
151 ALT_DMA_EVENT_3 = 3,
152 ALT_DMA_EVENT_4 = 4,
153 ALT_DMA_EVENT_5 = 5,
154 ALT_DMA_EVENT_6 = 6,
155 ALT_DMA_EVENT_7 = 7,
156 ALT_DMA_EVENT_ABORT = 8
157}
158ALT_DMA_EVENT_t;
159
164#ifdef __cplusplus
165}
166#endif /* __cplusplus */
167
168#endif /* __ALT_DMA_COMMON_H__ */
ALT_DMA_EVENT_e
ALT_DMA_EVENT_e
Definition: alt_dma_common.h:147
ALT_DMA_SECURITY_e
ALT_DMA_SECURITY_e
Definition: alt_dma_common.h:136
ALT_DMA_CHANNEL_e
ALT_DMA_CHANNEL_e
Definition: alt_dma_common.h:58
ALT_DMA_PERIPH_t
enum ALT_DMA_PERIPH_e ALT_DMA_PERIPH_t
ALT_DMA_CHANNEL_t
enum ALT_DMA_CHANNEL_e ALT_DMA_CHANNEL_t
ALT_DMA_EVENT_t
enum ALT_DMA_EVENT_e ALT_DMA_EVENT_t
ALT_DMA_PERIPH_e
ALT_DMA_PERIPH_e
Definition: alt_dma_common.h:84
ALT_DMA_SECURITY_t
enum ALT_DMA_SECURITY_e ALT_DMA_SECURITY_t
ALT_DMA_EVENT_ABORT
@ ALT_DMA_EVENT_ABORT
Definition: alt_dma_common.h:156
ALT_DMA_EVENT_3
@ ALT_DMA_EVENT_3
Definition: alt_dma_common.h:151
ALT_DMA_EVENT_2
@ ALT_DMA_EVENT_2
Definition: alt_dma_common.h:150
ALT_DMA_EVENT_4
@ ALT_DMA_EVENT_4
Definition: alt_dma_common.h:152
ALT_DMA_EVENT_1
@ ALT_DMA_EVENT_1
Definition: alt_dma_common.h:149
ALT_DMA_EVENT_0
@ ALT_DMA_EVENT_0
Definition: alt_dma_common.h:148
ALT_DMA_EVENT_6
@ ALT_DMA_EVENT_6
Definition: alt_dma_common.h:154
ALT_DMA_EVENT_7
@ ALT_DMA_EVENT_7
Definition: alt_dma_common.h:155
ALT_DMA_EVENT_5
@ ALT_DMA_EVENT_5
Definition: alt_dma_common.h:153
ALT_DMA_SECURITY_SECURE
@ ALT_DMA_SECURITY_SECURE
Definition: alt_dma_common.h:138
ALT_DMA_SECURITY_NONSECURE
@ ALT_DMA_SECURITY_NONSECURE
Definition: alt_dma_common.h:139
ALT_DMA_SECURITY_DEFAULT
@ ALT_DMA_SECURITY_DEFAULT
Definition: alt_dma_common.h:137
ALT_DMA_CHANNEL_2
@ ALT_DMA_CHANNEL_2
Definition: alt_dma_common.h:61
ALT_DMA_CHANNEL_5
@ ALT_DMA_CHANNEL_5
Definition: alt_dma_common.h:64
ALT_DMA_CHANNEL_3
@ ALT_DMA_CHANNEL_3
Definition: alt_dma_common.h:62
ALT_DMA_CHANNEL_0
@ ALT_DMA_CHANNEL_0
Definition: alt_dma_common.h:59
ALT_DMA_CHANNEL_4
@ ALT_DMA_CHANNEL_4
Definition: alt_dma_common.h:63
ALT_DMA_CHANNEL_1
@ ALT_DMA_CHANNEL_1
Definition: alt_dma_common.h:60
ALT_DMA_CHANNEL_6
@ ALT_DMA_CHANNEL_6
Definition: alt_dma_common.h:65
ALT_DMA_CHANNEL_7
@ ALT_DMA_CHANNEL_7
Definition: alt_dma_common.h:66
ALT_DMA_PERIPH_FPGA_6
@ ALT_DMA_PERIPH_FPGA_6
Definition: alt_dma_common.h:97
ALT_DMA_PERIPH_FPGA_5_OR_CAN0_IF2
@ ALT_DMA_PERIPH_FPGA_5_OR_CAN0_IF2
Definition: alt_dma_common.h:91
ALT_DMA_PERIPH_CAN1_IF2
@ ALT_DMA_PERIPH_CAN1_IF2
Definition: alt_dma_common.h:103
ALT_DMA_PERIPH_I2C3_TX
@ ALT_DMA_PERIPH_I2C3_TX
Definition: alt_dma_common.h:111
ALT_DMA_PERIPH_RESERVED
@ ALT_DMA_PERIPH_RESERVED
Definition: alt_dma_common.h:124
ALT_DMA_PERIPH_FPGA_1
@ ALT_DMA_PERIPH_FPGA_1
Definition: alt_dma_common.h:86
ALT_DMA_PERIPH_I2C1_RX
@ ALT_DMA_PERIPH_I2C1_RX
Definition: alt_dma_common.h:108
ALT_DMA_PERIPH_I2C2_RX
@ ALT_DMA_PERIPH_I2C2_RX
Definition: alt_dma_common.h:110
ALT_DMA_PERIPH_UART1_TX
@ ALT_DMA_PERIPH_UART1_TX
Definition: alt_dma_common.h:127
ALT_DMA_PERIPH_QSPI_FLASH_TX
@ ALT_DMA_PERIPH_QSPI_FLASH_TX
Definition: alt_dma_common.h:121
ALT_DMA_PERIPH_UART1_RX
@ ALT_DMA_PERIPH_UART1_RX
Definition: alt_dma_common.h:128
ALT_DMA_PERIPH_I2C3_RX
@ ALT_DMA_PERIPH_I2C3_RX
Definition: alt_dma_common.h:112
ALT_DMA_PERIPH_CAN0_IF1
@ ALT_DMA_PERIPH_CAN0_IF1
Definition: alt_dma_common.h:100
ALT_DMA_PERIPH_SPI1_MASTER_RX
@ ALT_DMA_PERIPH_SPI1_MASTER_RX
Definition: alt_dma_common.h:118
ALT_DMA_PERIPH_UART0_TX
@ ALT_DMA_PERIPH_UART0_TX
Definition: alt_dma_common.h:125
ALT_DMA_PERIPH_FPGA_6_OR_CAN1_IF1
@ ALT_DMA_PERIPH_FPGA_6_OR_CAN1_IF1
Definition: alt_dma_common.h:92
ALT_DMA_PERIPH_FPGA_3
@ ALT_DMA_PERIPH_FPGA_3
Definition: alt_dma_common.h:88
ALT_DMA_PERIPH_SPI0_SLAVE_RX
@ ALT_DMA_PERIPH_SPI0_SLAVE_RX
Definition: alt_dma_common.h:116
ALT_DMA_PERIPH_SPI1_SLAVE_TX
@ ALT_DMA_PERIPH_SPI1_SLAVE_TX
Definition: alt_dma_common.h:119
ALT_DMA_PERIPH_I2C0_RX
@ ALT_DMA_PERIPH_I2C0_RX
Definition: alt_dma_common.h:106
ALT_DMA_PERIPH_SPI1_SLAVE_RX
@ ALT_DMA_PERIPH_SPI1_SLAVE_RX
Definition: alt_dma_common.h:120
ALT_DMA_PERIPH_I2C2_TX
@ ALT_DMA_PERIPH_I2C2_TX
Definition: alt_dma_common.h:109
ALT_DMA_PERIPH_SPI0_MASTER_RX
@ ALT_DMA_PERIPH_SPI0_MASTER_RX
Definition: alt_dma_common.h:114
ALT_DMA_PERIPH_FPGA_5
@ ALT_DMA_PERIPH_FPGA_5
Definition: alt_dma_common.h:96
ALT_DMA_PERIPH_I2C0_TX
@ ALT_DMA_PERIPH_I2C0_TX
Definition: alt_dma_common.h:105
ALT_DMA_PERIPH_UART0_RX
@ ALT_DMA_PERIPH_UART0_RX
Definition: alt_dma_common.h:126
ALT_DMA_PERIPH_SPI0_MASTER_TX
@ ALT_DMA_PERIPH_SPI0_MASTER_TX
Definition: alt_dma_common.h:113
ALT_DMA_PERIPH_CAN1_IF1
@ ALT_DMA_PERIPH_CAN1_IF1
Definition: alt_dma_common.h:102
ALT_DMA_PERIPH_I2C1_TX
@ ALT_DMA_PERIPH_I2C1_TX
Definition: alt_dma_common.h:107
ALT_DMA_PERIPH_FPGA_7
@ ALT_DMA_PERIPH_FPGA_7
Definition: alt_dma_common.h:98
ALT_DMA_PERIPH_STM
@ ALT_DMA_PERIPH_STM
Definition: alt_dma_common.h:123
ALT_DMA_PERIPH_SPI0_SLAVE_TX
@ ALT_DMA_PERIPH_SPI0_SLAVE_TX
Definition: alt_dma_common.h:115
ALT_DMA_PERIPH_FPGA_4
@ ALT_DMA_PERIPH_FPGA_4
Definition: alt_dma_common.h:95
ALT_DMA_PERIPH_FPGA_0
@ ALT_DMA_PERIPH_FPGA_0
Definition: alt_dma_common.h:85
ALT_DMA_PERIPH_FPGA_2
@ ALT_DMA_PERIPH_FPGA_2
Definition: alt_dma_common.h:87
ALT_DMA_PERIPH_SPI1_MASTER_TX
@ ALT_DMA_PERIPH_SPI1_MASTER_TX
Definition: alt_dma_common.h:117
ALT_DMA_PERIPH_FPGA_7_OR_CAN1_IF2
@ ALT_DMA_PERIPH_FPGA_7_OR_CAN1_IF2
Definition: alt_dma_common.h:93
ALT_DMA_PERIPH_FPGA_4_OR_CAN0_IF1
@ ALT_DMA_PERIPH_FPGA_4_OR_CAN0_IF1
Definition: alt_dma_common.h:90
ALT_DMA_PERIPH_CAN0_IF2
@ ALT_DMA_PERIPH_CAN0_IF2
Definition: alt_dma_common.h:101
ALT_DMA_PERIPH_QSPI_FLASH_RX
@ ALT_DMA_PERIPH_QSPI_FLASH_RX
Definition: alt_dma_common.h:122