RTEMS: bsps/arm/xilinx-zynq/include/bsp.h Source File

| RTEMS 5.4-rc2

Loading...
Searching...
No Matches
bsp.h
Go to the documentation of this file.
1
7/*
8 * SPDX-License-Identifier: BSD-2-Clause
9 *
10 * Copyright (C) 2013, 2014 embedded brains GmbH
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#ifndef LIBBSP_ARM_XILINX_ZYNQ_BSP_H
35#define LIBBSP_ARM_XILINX_ZYNQ_BSP_H
36
47#include <bspopts.h>
48
49#define BSP_FEATURE_IRQ_EXTENSION
50
51#ifndef ASM
52
53#include <rtems.h>
54
55#include <bsp/default-initial-extension.h>
56#include <bsp/start.h>
57#include <bsp/zynq-uart.h>
58
59#ifdef __cplusplus
60extern "C" {
61#endif /* __cplusplus */
62
63#define BSP_ARM_A9MPCORE_SCU_BASE 0xf8f00000
64
65#define BSP_ARM_GIC_CPUIF_BASE 0xf8f00100
66
67#define BSP_ARM_A9MPCORE_GT_BASE 0xf8f00200
68
69#define BSP_ARM_A9MPCORE_PT_BASE 0xf8f00600
70
71#define BSP_ARM_GIC_DIST_BASE 0xf8f01000
72
73#define BSP_ARM_L2C_310_BASE 0xf8f02000
74
75#define BSP_ARM_L2C_310_ID 0x410000c8
76
77extern zynq_uart_context zynq_uart_instances[2];
78
87BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void);
88
89uint32_t zynq_clock_cpu_1x(void);
90
91#ifdef __cplusplus
92}
93#endif /* __cplusplus */
94
95#endif /* ASM */
96
99#endif /* LIBBSP_ARM_XILINX_ZYNQ_BSP_H */
default-initial-extension.h
DEFAULT_INITIAL_EXTENSION Support.
zynq_setup_mmu_and_cache
BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void)
Zynq specific set up of the MMU.
Definition: bspstartmmu.c:59
rtems.h
zynq_uart_context
Definition: zynq-uart.h:49
zynq-uart.h
UART support.