RTEMS: bsps/powerpc/mpc55xxevb/include/mpc55xx/emios.h Source File

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emios.h
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1
9/*
10 * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved.
11 *
12 * embedded brains GmbH
13 * Obere Lagerstr. 30
14 * 82178 Puchheim
15 * Germany
16 * <rtems@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.org/license/LICENSE.
21 */
22
23#ifndef LIBCPU_POWERPC_MPC55XX_EMIOS_H
24#define LIBCPU_POWERPC_MPC55XX_EMIOS_H
25
26#include <mpc55xx/regs.h>
27
28#ifdef __cplusplus
29extern "C" {
30#endif /* __cplusplus */
31
32#ifdef MPC55XX_HAS_EMIOS
33
40#define MPC55XX_EMIOS_MODE_GPIO_INPUT 0U
41#define MPC55XX_EMIOS_MODE_GPIO_OUTPUT 1U
42#define MPC55XX_EMIOS_MODE_SAIC 2U
43#define MPC55XX_EMIOS_MODE_SAOC 3U
44#define MPC55XX_EMIOS_MODE_IPWM 4U
45#define MPC55XX_EMIOS_MODE_IPM 5U
46#define MPC55XX_EMIOS_MODE_DAOC_SECOND 6U
47#define MPC55XX_EMIOS_MODE_DAOC_BOTH 7U
48#define MPC55XX_EMIOS_MODE_PEA_ACCU_CONT 8U
49#define MPC55XX_EMIOS_MODE_PEA_ACCU_SINGLE 9U
50#define MPC55XX_EMIOS_MODE_PEA_COUNT_CONT 10U
51#define MPC55XX_EMIOS_MODE_PEA_COUNT_SINGLE 11U
52#define MPC55XX_EMIOS_MODE_QDEC_COUNT_DIR 12U
53#define MPC55XX_EMIOS_MODE_QDEC_PHASE 13U
54#define MPC55XX_EMIOS_MODE_WPTA 14U
55#define MPC55XX_EMIOS_MODE_RESERVED_15 15U
56#define MPC55XX_EMIOS_MODE_MC_UP_INT_CLK 16U
57#define MPC55XX_EMIOS_MODE_MC_UP_EXT_CLK 17U
58#define MPC55XX_EMIOS_MODE_RESERVED_18 18U
59#define MPC55XX_EMIOS_MODE_RESERVED_19 19U
60#define MPC55XX_EMIOS_MODE_MC_UP_DOWN_INT_CLK 20U
61#define MPC55XX_EMIOS_MODE_MC_UP_DOWN_EXT_CLK 21U
62#define MPC55XX_EMIOS_MODE_MC_UP_DOWN_CHANGE_INT_CLK 22U
63#define MPC55XX_EMIOS_MODE_MC_UP_DOWN_CHANGE_EXT_CLK 23U
64#define MPC55XX_EMIOS_MODE_OPWFM_B_IMMEDIATE 24U
65#define MPC55XX_EMIOS_MODE_OPWFM_B_NEXT_PERIOD 25U
66#define MPC55XX_EMIOS_MODE_OPWFM_AB_IMMEDIATE 26U
67#define MPC55XX_EMIOS_MODE_OPWFM_AB_NEXT_PERIOD 27U
68#define MPC55XX_EMIOS_MODE_OPWMC_TRAIL_TRAIL 28U
69#define MPC55XX_EMIOS_MODE_OPWMC_TRAIL_LEAD 29U
70#define MPC55XX_EMIOS_MODE_OPWMC_BOTH_TRAIL 30U
71#define MPC55XX_EMIOS_MODE_OPWMC_BOTH_LEAD 31U
72#define MPC55XX_EMIOS_MODE_OPWM_B_IMMEDIATE 32U
73#define MPC55XX_EMIOS_MODE_OPWM_B_NEXT_PERIOD 33U
74#define MPC55XX_EMIOS_MODE_OPWM_AB_IMMEDIATE 34U
75#define MPC55XX_EMIOS_MODE_OPWM_AB_NEXT_PERIOD 35U
76#define MPC55XX_EMIOS_MODE_RESERVED_36 36U
77#define MPC55XX_EMIOS_MODE_RESERVED_37 37U
78#define MPC55XX_EMIOS_MODE_RESERVED_38 38U
79#define MPC55XX_EMIOS_MODE_RESERVED_39 39U
80#define MPC55XX_EMIOS_MODE_RESERVED_40 40U
81#define MPC55XX_EMIOS_MODE_RESERVED_41 41U
82#define MPC55XX_EMIOS_MODE_RESERVED_42 42U
83#define MPC55XX_EMIOS_MODE_RESERVED_43 43U
84#define MPC55XX_EMIOS_MODE_RESERVED_44 44U
85#define MPC55XX_EMIOS_MODE_RESERVED_45 45U
86#define MPC55XX_EMIOS_MODE_RESERVED_46 46U
87#define MPC55XX_EMIOS_MODE_RESERVED_47 47U
88#define MPC55XX_EMIOS_MODE_RESERVED_48 48U
89#define MPC55XX_EMIOS_MODE_RESERVED_49 49U
90#define MPC55XX_EMIOS_MODE_RESERVED_50 50U
91#define MPC55XX_EMIOS_MODE_RESERVED_51 51U
92#define MPC55XX_EMIOS_MODE_RESERVED_52 52U
93#define MPC55XX_EMIOS_MODE_RESERVED_53 53U
94#define MPC55XX_EMIOS_MODE_RESERVED_54 54U
95#define MPC55XX_EMIOS_MODE_RESERVED_55 55U
96#define MPC55XX_EMIOS_MODE_RESERVED_56 56U
97#define MPC55XX_EMIOS_MODE_RESERVED_57 57U
98#define MPC55XX_EMIOS_MODE_RESERVED_58 58U
99#define MPC55XX_EMIOS_MODE_RESERVED_59 59U
100#define MPC55XX_EMIOS_MODE_RESERVED_60 60U
101#define MPC55XX_EMIOS_MODE_RESERVED_61 61U
102#define MPC55XX_EMIOS_MODE_RESERVED_62 62U
103#define MPC55XX_EMIOS_MODE_RESERVED_63 63U
104#define MPC55XX_EMIOS_MODE_RESERVED_64 64U
105#define MPC55XX_EMIOS_MODE_RESERVED_65 65U
106#define MPC55XX_EMIOS_MODE_RESERVED_66 66U
107#define MPC55XX_EMIOS_MODE_RESERVED_67 67U
108#define MPC55XX_EMIOS_MODE_RESERVED_68 68U
109#define MPC55XX_EMIOS_MODE_RESERVED_69 69U
110#define MPC55XX_EMIOS_MODE_RESERVED_70 70U
111#define MPC55XX_EMIOS_MODE_RESERVED_71 71U
112#define MPC55XX_EMIOS_MODE_RESERVED_72 72U
113#define MPC55XX_EMIOS_MODE_RESERVED_73 73U
114#define MPC55XX_EMIOS_MODE_RESERVED_74 74U
115#define MPC55XX_EMIOS_MODE_RESERVED_75 75U
116#define MPC55XX_EMIOS_MODE_RESERVED_76 76U
117#define MPC55XX_EMIOS_MODE_RESERVED_77 77U
118#define MPC55XX_EMIOS_MODE_RESERVED_78 78U
119#define MPC55XX_EMIOS_MODE_RESERVED_79 79U
120#define MPC55XX_EMIOS_MODE_MCB_UP_INT_CLK 80U
121#define MPC55XX_EMIOS_MODE_MCB_UP_EXT_CLK 81U
122#define MPC55XX_EMIOS_MODE_RESERVED_82 82U
123#define MPC55XX_EMIOS_MODE_RESERVED_83 83U
124#define MPC55XX_EMIOS_MODE_MCB_UP_DOWN_ONE_INT_CLK 84U
125#define MPC55XX_EMIOS_MODE_MCB_UP_DOWN_ONE_EXT_CLK 85U
126#define MPC55XX_EMIOS_MODE_MCB_UP_DOWN_BOTH_INT_CLK 86U
127#define MPC55XX_EMIOS_MODE_MCB_UP_DOWN_BOTH_EXT_CLK 87U
128#define MPC55XX_EMIOS_MODE_OPWFMB_B 88U
129#define MPC55XX_EMIOS_MODE_RESERVED_89 89U
130#define MPC55XX_EMIOS_MODE_OPWFMB_AB 90U
131#define MPC55XX_EMIOS_MODE_RESERVED_91 91U
132#define MPC55XX_EMIOS_MODE_OPWMCB_TRAIL_TRAIL 92U
133#define MPC55XX_EMIOS_MODE_OPWMCB_TRAIL_LEAD 93U
134#define MPC55XX_EMIOS_MODE_OPWMCB_BOTH_TRAIL 94U
135#define MPC55XX_EMIOS_MODE_OPWMCB_BOTH_LEAD 95U
136#define MPC55XX_EMIOS_MODE_OPWMB_SECOND 96U
137#define MPC55XX_EMIOS_MODE_RESERVED_97 97U
138#define MPC55XX_EMIOS_MODE_OPWMB_BOTH 98U
139#define MPC55XX_EMIOS_MODE_RESERVED_99 99U
140#define MPC55XX_EMIOS_MODE_RESERVED_100 100U
141#define MPC55XX_EMIOS_MODE_RESERVED_101 101U
142#define MPC55XX_EMIOS_MODE_RESERVED_102 102U
143#define MPC55XX_EMIOS_MODE_RESERVED_103 103U
144#define MPC55XX_EMIOS_MODE_RESERVED_104 104U
145#define MPC55XX_EMIOS_MODE_RESERVED_105 105U
146#define MPC55XX_EMIOS_MODE_RESERVED_106 106U
147#define MPC55XX_EMIOS_MODE_RESERVED_107 107U
148#define MPC55XX_EMIOS_MODE_RESERVED_108 108U
149#define MPC55XX_EMIOS_MODE_RESERVED_109 109U
150#define MPC55XX_EMIOS_MODE_RESERVED_110 110U
151#define MPC55XX_EMIOS_MODE_RESERVED_111 111U
152#define MPC55XX_EMIOS_MODE_RESERVED_112 112U
153#define MPC55XX_EMIOS_MODE_RESERVED_113 113U
154#define MPC55XX_EMIOS_MODE_RESERVED_114 114U
155#define MPC55XX_EMIOS_MODE_RESERVED_115 115U
156#define MPC55XX_EMIOS_MODE_RESERVED_116 116U
157#define MPC55XX_EMIOS_MODE_RESERVED_117 117U
158#define MPC55XX_EMIOS_MODE_RESERVED_118 118U
159#define MPC55XX_EMIOS_MODE_RESERVED_119 119U
160#define MPC55XX_EMIOS_MODE_RESERVED_120 120U
161#define MPC55XX_EMIOS_MODE_RESERVED_121 121U
162#define MPC55XX_EMIOS_MODE_RESERVED_122 122U
163#define MPC55XX_EMIOS_MODE_RESERVED_123 123U
164#define MPC55XX_EMIOS_MODE_RESERVED_124 124U
165#define MPC55XX_EMIOS_MODE_RESERVED_125 125U
166#define MPC55XX_EMIOS_MODE_RESERVED_126 126U
167#define MPC55XX_EMIOS_MODE_RESERVED_127 127U
168
171#if MPC55XX_CHIP_FAMILY == 566 || MPC55XX_CHIP_FAMILY == 567
172 #define MPC55XX_EMIOS_CHANNEL_NUMBER 32U
173#else
174 #define MPC55XX_EMIOS_CHANNEL_NUMBER 24U
175#endif
176
177#define MPC55XX_EMIOS_VALUE_MAX 0x00ffffffU
178
179#define MPC55XX_EMIOS_IS_CHANNEL_VALID( c) \
180 ((unsigned) (c) < MPC55XX_EMIOS_CHANNEL_NUMBER)
181
182#define MPC55XX_EMIOS_IS_CHANNEL_INVALID( c) \
183 (!MPC55XX_EMIOS_IS_CHANNEL_VALID( c))
184
185void mpc55xx_emios_initialize( unsigned prescaler);
186
187unsigned mpc55xx_emios_global_prescaler( void);
188
189void mpc55xx_emios_set_global_prescaler( unsigned prescaler);
190
191#endif /* MPC55XX_HAS_EMIOS */
192
193#ifdef __cplusplus
194}
195#endif /* __cplusplus */
196
197#endif /* LIBCPU_POWERPC_MPC55XX_EMIOS_H */
regs.h
Register definitions for the MPC55xx and MPC56xx microcontroller family.