RTEMS: bsps/m68k/gen68340/include/m340timer.h Source File

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m340timer.h
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1
9/*
10 * Header file for timer driver
11 * defines for accessing M68340 timer registers
12 *
13 * Author:
14 * Geoffroy Montel
15 * France Telecom - CNET/DSM/TAM/CAT
16 * 4, rue du Clos Courtel
17 * 35512 CESSON-SEVIGNE
18 * FRANCE
19 *
20 * e-mail: g_montel@yahoo.com
21 *
22 * COPYRIGHT (c) 1989-1999.
23 * On-Line Applications Research Corporation (OAR).
24 *
25 * The license and distribution terms for this file may be
26 * found in the file LICENSE in this distribution or at
27 * http://www.rtems.org/license/LICENSE.
28 */
29
30#ifndef __m340timer_H__
31#define __m340timer_H__
32
33extern void Fifo_Full_benchmark_timer_initialize (void);
34
35extern void (*Restart_Fifo_Full_A_Timer)(void);
36extern void (*Restart_Check_A_Timer)(void);
37extern void (*Restart_Fifo_Full_B_Timer)(void);
38extern void (*Restart_Check_B_Timer)(void);
39
40/* CR */
41#define m340_SWR (1<<15)
42#define m340_Polling_Mode (0<<12)
43#define m340_TC_Enabled (1<<12)
44#define m340_TG_Enabled (2<<12)
45#define m340_TG_TC_Enabled (3<<12)
46#define m340_TO_Enabled (4<<12)
47#define m340_TO_TC_Enabled (5<<12)
48#define m340_TG_TG_Enabled (6<<12)
49#define m340_TO_TG_TG_Enabled (7<<12)
50#define m340_TGE (1<<11)
51#define m340_PSE (1<<10)
52#define m340_CPE (1<<9)
53#define m340_CLK (1<<8)
54#define m340_Divide_by_2 (1<<5)
55#define m340_Divide_by_4 (2<<5)
56#define m340_Divide_by_8 (3<<5)
57#define m340_Divide_by_16 (4<<5)
58#define m340_Divide_by_32 (5<<5)
59#define m340_Divide_by_64 (6<<5)
60#define m340_Divide_by_128 (7<<5)
61#define m340_Divide_by_256 (0<<5)
62#define m340_ICOC (0<<2)
63#define m340_SWG (1<<2)
64#define m340_VDCSWG (2<<2)
65#define m340_VWSSPG (3<<2)
66#define m340_PWM (4<<2)
67#define m340_PM (5<<2)
68#define m340_EC (6<<2)
69#define m340_TB (7<<2)
70#define m340_Disabled 0
71#define m340_Toggle_Mode 1
72#define m340_Zero_Mode 2
73#define m340_One_Mode 3
74
75/* SR */
76#define m340_IRQ (1<<15)
77#define m340_TO (1<<14)
78#define m340_TG (1<<13)
79#define m340_TC (1<<12)
80#define m340_TGL (1<<11)
81#define m340_ON (1<<10)
82#define m340_OUT (1<<9)
83#define m340_COM (1<<8)
84
85#endif