RTEMS: bsps/arm/tms570/start/init_system.c File Reference

| RTEMS 5.4-rc2

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Enumerations | Functions
init_system.c File Reference
`#include <stdint.h>`
`#include <stdbool.h>`
`#include <bsp/tms570.h>`
`#include <bsp/tms570-pinmux.h>`
`#include <bsp/tms570_selftest.h>`
`#include <bsp/tms570_hwinit.h>`

## Enumerations
enum | tms570_flash_power_modes { TMS570_FLASH_SYS_SLEEP = 0U , TMS570_FLASH_SYS_STANDBY = 1U , TMS570_FLASH_SYS_ACTIVE = 3U }
enum | tms570_system_clock_source { TMS570_SYS_CLK_SRC_OSC = 0U , TMS570_SYS_CLK_SRC_PLL1 = 1U , TMS570_SYS_CLK_SRC_EXTERNAL1 = 3U , TMS570_SYS_CLK_SRC_LPO_LOW = 4U , TMS570_SYS_CLK_SRC_LPO_HIGH = 5U , TMS570_SYS_CLK_SRC_PLL2 = 6U , TMS570_SYS_CLK_SRC_EXTERNAL2 = 7U , TMS570_SYS_CLK_SRC_VCLK = 9U }

## Functions
void | tms570_pll_init (void)
| Setup all system PLLs (HCG:setupPLL)
void | tms570_trim_lpo_init (void)
| Adjust Low-Frequency (LPO) oscilator (HCG:trimLPO)
void | tms570_flash_init (void)
| Setup Flash memory parameters and timing (HCG:setupFlash)
void | tms570_periph_init (void)
| Power-up all peripherals and enable their clocks (HCG:periphInit)
void | tms570_map_clock_init (void)
| Setup chip clocks including to wait for PLLs locks (HCG:mapClocks)
void | tms570_system_hw_init (void)
| TMS570 system hardware initialization (HCG:systemInit)

## Detailed Description

based on Ti HalCoGen generated file

## Enumeration Type Documentation

## ◆ tms570_flash_power_modes

enum tms570_flash_power_modes

Enumerator
TMS570_FLASH_SYS_SLEEP | Alias for flash bank power mode sleep
TMS570_FLASH_SYS_STANDBY | Alias for flash bank power mode standby
TMS570_FLASH_SYS_ACTIVE | Alias for flash bank power mode active

## ◆ tms570_system_clock_source

enum tms570_system_clock_source

Enumerator
TMS570_SYS_CLK_SRC_OSC | Alias for oscillator clock Source
TMS570_SYS_CLK_SRC_PLL1 | Alias for Pll1 clock Source
TMS570_SYS_CLK_SRC_EXTERNAL1 | Alias for external clock Source
TMS570_SYS_CLK_SRC_LPO_LOW | Alias for low power oscillator low clock Source
TMS570_SYS_CLK_SRC_LPO_HIGH | Alias for low power oscillator high clock Source
TMS570_SYS_CLK_SRC_PLL2 | Alias for Pll2 clock Source
TMS570_SYS_CLK_SRC_EXTERNAL2 | Alias for external 2 clock Source
TMS570_SYS_CLK_SRC_VCLK | Alias for synchronous VCLK1 clock Source

## Function Documentation

## ◆ tms570_flash_init()

void tms570_flash_init | ( | void |  | ) |

Setup Flash memory parameters and timing (HCG:setupFlash)

- Setup flash read mode, address wait states and data wait states
- Setup flash access wait states for bank 7
- Disable write access to flash state machine registers
- Setup flash bank power modes

## ◆ tms570_map_clock_init()

void tms570_map_clock_init | ( | void |  | ) |

Setup chip clocks including to wait for PLLs locks (HCG:mapClocks)

Initialize Clock Tree:

- Disable / Enable clock domain
- Wait for until clocks are locked
- Map device clock domains to desired sources and configure top-level dividers
- All clock domains are working off the default clock sources until now
- The below assignments can be easily modified using the HALCoGen GUI
- Setup GCLK, HCLK and VCLK clock source for normal operation, power down mode and after wakeup
- Setup synchronous peripheral clock dividers for VCLK1, VCLK2, VCLK3
- Setup RTICLK1 and RTICLK2 clocks
- Setup asynchronous peripheral clock sources for AVCLK1 and AVCLK2

## ◆ tms570_periph_init()

void tms570_periph_init | ( | void |  | ) |

Power-up all peripherals and enable their clocks (HCG:periphInit)

- Disable Peripherals before peripheral powerup
- Release peripherals from reset and enable clocks to all peripherals
- Power-up all peripherals
- Enable Peripherals

## ◆ tms570_pll_init()

void tms570_pll_init | ( | void |  | ) |

Setup all system PLLs (HCG:setupPLL)

- Configure PLL control registers

Initialize Pll1:

Initialize Pll2:

- Enable PLL(s) to start up or Lock

## ◆ tms570_system_hw_init()

void tms570_system_hw_init | ( | void |  | ) |

TMS570 system hardware initialization (HCG:systemInit)

- Set up flash address and data wait states based on the target CPU clock frequency The number of address and data wait states for the target CPU clock frequency are specified in the specific part's datasheet.
- Configure the LPO such that HF LPO is as close to 10MHz as possible
- Wait for PLLs to start up and map clock domains to desired clock sources
- set ECLK pins functional mode
- set ECLK pins default output value
- set ECLK pins output direction
- set ECLK pins open drain enable
- set ECLK pins pullup/pulldown enable
- set ECLK pins pullup/pulldown select
- Setup ECLK

## ◆ tms570_trim_lpo_init()

void tms570_trim_lpo_init | ( | void |  | ) |

Adjust Low-Frequency (LPO) oscilator (HCG:trimLPO)

Initialize Lpo:

Load TRIM values from OTP if present else load user defined values