RTEMS  5.1
stm32f4xxxx_syscfg.h
1 /*
2  * Copyright (c) 2013 Chris Nott. All rights reserved.
3  *
4  * Virtual Logic
5  * 21-25 King St.
6  * Rockdale NSW 2216
7  * Australia
8  * <rtems@vl.com.au>
9  *
10  * The license and distribution terms for this file may be
11  * found in the file LICENSE in this distribution or at
12  * http://www.rtems.org/license/LICENSE.
13  */
14 
15 #ifndef LIBBSP_ARM_STM32F4_STM32F4XXXX_SYSCFG_H
16 #define LIBBSP_ARM_STM32F4_STM32F4XXXX_SYSCFG_H
17 
18 #include <bsp/utility.h>
19 
20 #define EXTI_PORTA 0
21 #define EXTI_PORTB 1
22 #define EXTI_PORTC 2
23 #define EXTI_PORTD 3
24 #define EXTI_PORTE 4
25 #define EXTI_PORTF 5
26 #define EXTI_PORTG 6
27 #define EXTI_PORTH 7
28 #define EXTI_PORTI 8
29 
31  uint32_t memrmp; // Memory remap
32 #define STM32F4_SYSCFG_MEM_MODE(val) BSP_FLD32(val, 0, 1)
33 #define STM32F4_SYSCFG_MEM_MODE_GET(reg) BSP_FLD32GET(reg, 0, 1)
34 #define STM32F4_SYSCFG_MEM_MODE_SET(reg, val) BSP_FLD32SET(reg, val, 0, 1)
35  uint32_t pmc; // Peripheral mode configuration
36 #define STM32F4_SYSCFG_RMII_SEL BSP_BIT32(23)
37  uint32_t exticr[4]; // External interrupt configuration
38 #define STM32F4_SYSCFG_EXTI0_IDX 0
39 #define STM32F4_SYSCFG_EXTI0(val) BSP_FLD32(val, 0, 3)
40 #define STM32F4_SYSCFG_EXTI0_GET(reg) BSP_FLD32GET(reg, 0, 3)
41 #define STM32F4_SYSCFG_EXTI0_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
42 #define STM32F4_SYSCFG_EXTI1_IDX 0
43 #define STM32F4_SYSCFG_EXTI1(val) BSP_FLD32(val, 4, 7)
44 #define STM32F4_SYSCFG_EXTI1_GET(reg) BSP_FLD32GET(reg, 4, 7)
45 #define STM32F4_SYSCFG_EXTI1_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
46 #define STM32F4_SYSCFG_EXTI2_IDX 0
47 #define STM32F4_SYSCFG_EXTI2(val) BSP_FLD32(val, 8, 11)
48 #define STM32F4_SYSCFG_EXTI2_GET(reg) BSP_FLD32GET(reg, 8, 11)
49 #define STM32F4_SYSCFG_EXTI2_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
50 #define STM32F4_SYSCFG_EXTI3_IDX 0
51 #define STM32F4_SYSCFG_EXTI3(val) BSP_FLD32(val, 12, 15)
52 #define STM32F4_SYSCFG_EXTI3_GET(reg) BSP_FLD32GET(reg, 12, 15)
53 #define STM32F4_SYSCFG_EXTI3_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
54 #define STM32F4_SYSCFG_EXTI4_IDX 1
55 #define STM32F4_SYSCFG_EXTI4(val) BSP_FLD32(val, 0, 3)
56 #define STM32F4_SYSCFG_EXTI4_GET(reg) BSP_FLD32GET(reg, 0, 3)
57 #define STM32F4_SYSCFG_EXTI4_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
58 #define STM32F4_SYSCFG_EXTI5_IDX 1
59 #define STM32F4_SYSCFG_EXTI5(val) BSP_FLD32(val, 4, 7)
60 #define STM32F4_SYSCFG_EXTI5_GET(reg) BSP_FLD32GET(reg, 4, 7)
61 #define STM32F4_SYSCFG_EXTI5_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
62 #define STM32F4_SYSCFG_EXTI6_IDX 1
63 #define STM32F4_SYSCFG_EXTI6(val) BSP_FLD32(val, 8, 11)
64 #define STM32F4_SYSCFG_EXTI6_GET(reg) BSP_FLD32GET(reg, 8, 11)
65 #define STM32F4_SYSCFG_EXTI6_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
66 #define STM32F4_SYSCFG_EXTI7_IDX 1
67 #define STM32F4_SYSCFG_EXTI7(val) BSP_FLD32(val, 12, 15)
68 #define STM32F4_SYSCFG_EXTI7_GET(reg) BSP_FLD32GET(reg, 12, 15)
69 #define STM32F4_SYSCFG_EXTI7_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
70 #define STM32F4_SYSCFG_EXTI8_IDX 2
71 #define STM32F4_SYSCFG_EXTI8(val) BSP_FLD32(val, 0, 3)
72 #define STM32F4_SYSCFG_EXTI8_GET(reg) BSP_FLD32GET(reg, 0, 3)
73 #define STM32F4_SYSCFG_EXTI8_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
74 #define STM32F4_SYSCFG_EXTI9_IDX 2
75 #define STM32F4_SYSCFG_EXTI9(val) BSP_FLD32(val, 4, 7)
76 #define STM32F4_SYSCFG_EXTI9_GET(reg) BSP_FLD32GET(reg, 4, 7)
77 #define STM32F4_SYSCFG_EXTI9_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
78 #define STM32F4_SYSCFG_EXTI10_IDX 2
79 #define STM32F4_SYSCFG_EXTI10(val) BSP_FLD32(val, 8, 11)
80 #define STM32F4_SYSCFG_EXTI10_GET(reg) BSP_FLD32GET(reg, 8, 11)
81 #define STM32F4_SYSCFG_EXTI10_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
82 #define STM32F4_SYSCFG_EXTI11_IDX 2
83 #define STM32F4_SYSCFG_EXTI11(val) BSP_FLD32(val, 12, 15)
84 #define STM32F4_SYSCFG_EXTI11_GET(reg) BSP_FLD32GET(reg, 12, 15)
85 #define STM32F4_SYSCFG_EXTI11_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
86 #define STM32F4_SYSCFG_EXTI12_IDX 3
87 #define STM32F4_SYSCFG_EXTI12(val) BSP_FLD32(val, 0, 3)
88 #define STM32F4_SYSCFG_EXTI12_GET(reg) BSP_FLD32GET(reg, 0, 3)
89 #define STM32F4_SYSCFG_EXTI12_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
90 #define STM32F4_SYSCFG_EXTI13_IDX 3
91 #define STM32F4_SYSCFG_EXTI13(val) BSP_FLD32(val, 4, 7)
92 #define STM32F4_SYSCFG_EXTI13_GET(reg) BSP_FLD32GET(reg, 4, 7)
93 #define STM32F4_SYSCFG_EXTI13_SET(reg, val) BSP_FLD32SET(reg, val, 4, 7)
94 #define STM32F4_SYSCFG_EXTI14_IDX 3
95 #define STM32F4_SYSCFG_EXTI14(val) BSP_FLD32(val, 8, 11)
96 #define STM32F4_SYSCFG_EXTI14_GET(reg) BSP_FLD32GET(reg, 8, 11)
97 #define STM32F4_SYSCFG_EXTI14_SET(reg, val) BSP_FLD32SET(reg, val, 8, 11)
98 #define STM32F4_SYSCFG_EXTI15_IDX 3
99 #define STM32F4_SYSCFG_EXTI15(val) BSP_FLD32(val, 12, 15)
100 #define STM32F4_SYSCFG_EXTI15_GET(reg) BSP_FLD32GET(reg, 12, 15)
101 #define STM32F4_SYSCFG_EXTI15_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15)
102  uint32_t cmpcr; // Compensation cell control register
103 #define STM32F4_SYSCFG_CMPCR_READY BSP_BIT32(8)
104 #define STM32F4_SYSCFG_CMPCR_PD BSP_BIT32(0)
105 } __attribute__ ((packed));
106 typedef struct stm32f4_syscfg_s stm32f4_syscfg;
107 
108 #endif /* LIBBSP_ARM_STM32F4_STM32F4XXXX_SYSCFG_H */
Definition: stm32f4xxxx_syscfg.h:30
Utility macros.
typedef __attribute__
Disable IRQ Interrupts.
Definition: cmsis_gcc.h:69