RTEMS  5.1
Macros
tm27.h File Reference

Implementations for interrupt mechanisms for Time Test 27. More...

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Macros

#define ERC32_BSP_USE_SYNCHRONOUS_TRAP   0
 
#define TEST_INTERRUPT_SOURCE   ERC32_INTERRUPT_EXTERNAL_1
 
#define TEST_INTERRUPT_SOURCE2   (ERC32_INTERRUPT_EXTERNAL_1+1)
 
#define TEST_VECTOR   ERC32_TRAP_TYPE( TEST_INTERRUPT_SOURCE )
 
#define TEST_VECTOR2   ERC32_TRAP_TYPE( TEST_INTERRUPT_SOURCE2 )
 
#define MUST_WAIT_FOR_INTERRUPT   1
 
#define Install_tm27_vector(handler)
 
#define Cause_tm27_intr()
 
#define Clear_tm27_intr()   ERC32_Clear_interrupt( TEST_INTERRUPT_SOURCE )
 
#define Lower_tm27_intr()   /* empty */
 

Detailed Description

Implementations for interrupt mechanisms for Time Test 27.

Macro Definition Documentation

◆ Cause_tm27_intr

#define Cause_tm27_intr (   void)
Value:
do { \
ERC32_Force_interrupt( TEST_INTERRUPT_SOURCE+(Interrupt_nest>>1) ); \
nop(); \
nop(); \
nop(); \
} while (0)

◆ Install_tm27_vector

#define Install_tm27_vector (   handler)
Value:
set_vector( (handler), TEST_VECTOR, 1 ); \
set_vector( (handler), TEST_VECTOR2, 1 );