RTEMS  5.1
smpbarrier.h
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1 
9 /*
10  * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
11  *
12  * embedded brains GmbH
13  * Dornierstr. 4
14  * 82178 Puchheim
15  * Germany
16  * <rtems@embedded-brains.de>
17  *
18  * The license and distribution terms for this file may be
19  * found in the file LICENSE in this distribution or at
20  * http://www.rtems.org/license/LICENSE.
21  */
22 
23 #ifndef _RTEMS_SCORE_SMPBARRIER_H
24 #define _RTEMS_SCORE_SMPBARRIER_H
25 
26 #include <rtems/score/cpuopts.h>
27 #include <rtems/score/atomic.h>
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif /* __cplusplus */
32 
51 typedef struct {
52  Atomic_Uint value;
53  Atomic_Uint sense;
55 
61 typedef struct {
62  unsigned int sense;
64 
68 #define SMP_BARRIER_CONTROL_INITIALIZER \
69  { ATOMIC_INITIALIZER_UINT( 0U ), ATOMIC_INITIALIZER_UINT( 0U ) }
70 
74 #define SMP_BARRIER_STATE_INITIALIZER { 0U }
75 
83 static inline void _SMP_barrier_Control_initialize(
85 )
86 {
87  _Atomic_Init_uint( &control->value, 0U );
88  _Atomic_Init_uint( &control->sense, 0U );
89 }
90 
96 static inline void _SMP_barrier_State_initialize(
97  SMP_barrier_State *state
98 )
99 {
100  state->sense = 0U;
101 }
102 
113 bool _SMP_barrier_Wait(
115  SMP_barrier_State *state,
116  unsigned int count
117 );
118 
121 #ifdef __cplusplus
122 }
123 #endif /* __cplusplus */
124 
125 #endif /* _RTEMS_SCORE_SMPBARRIER_H */
SMP barrier control.
Definition: smpbarrier.h:51
Atomic Operations API.
bool _SMP_barrier_Wait(SMP_barrier_Control *control, SMP_barrier_State *state, unsigned int count)
Waits on the SMP barrier until count threads rendezvoused.
Definition: smpbarrierwait.c:21
SMP barrier per-thread state.
Definition: smpbarrier.h:61
Definition: intercom.c:74