RTEMS  5.1
component_utmi.h
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29 
30 #ifndef _SAME70_UTMI_COMPONENT_
31 #define _SAME70_UTMI_COMPONENT_
32 
33 /* ============================================================================= */
35 /* ============================================================================= */
38 
39 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
40 
41 typedef struct {
42  __I uint32_t Reserved1[4];
43  __IO uint32_t UTMI_OHCIICR;
44  __I uint32_t Reserved2[7];
45  __IO uint32_t UTMI_CKTRIM;
46 } Utmi;
47 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
48 /* -------- UTMI_OHCIICR : (UTMI Offset: 0x10) OHCI Interrupt Configuration Register -------- */
49 #define UTMI_OHCIICR_RES0 (0x1u << 0)
50 #define UTMI_OHCIICR_ARIE (0x1u << 4)
51 #define UTMI_OHCIICR_APPSTART (0x1u << 5)
52 #define UTMI_OHCIICR_UDPPUDIS (0x1u << 23)
53 /* -------- UTMI_CKTRIM : (UTMI Offset: 0x30) UTMI Clock Trimming Register -------- */
54 #define UTMI_CKTRIM_FREQ_Pos 0
55 #define UTMI_CKTRIM_FREQ_Msk (0x3u << UTMI_CKTRIM_FREQ_Pos)
56 #define UTMI_CKTRIM_FREQ(value) ((UTMI_CKTRIM_FREQ_Msk & ((value) << UTMI_CKTRIM_FREQ_Pos)))
57 #define UTMI_CKTRIM_FREQ_XTAL12 (0x0u << 0)
58 #define UTMI_CKTRIM_FREQ_XTAL16 (0x1u << 0)
61 
62 
63 #endif /* _SAME70_UTMI_COMPONENT_ */
__IO uint32_t UTMI_CKTRIM
(Utmi Offset: 0x30) UTMI Clock Trimming Register
Definition: component_utmi.h:45
Utmi hardware registers.
Definition: component_utmi.h:41
#define __IO
Definition: core_cm7.h:287
__IO uint32_t UTMI_OHCIICR
(Utmi Offset: 0x10) OHCI Interrupt Configuration Register
Definition: component_utmi.h:43
#define __I
Definition: core_cm7.h:284