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RTEMS
5.1
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Go to the documentation of this file. 23 #ifndef _RTEMS_SCORE_LM32_H 24 #define _RTEMS_SCORE_LM32_H 42 #if defined(rtems_multilib) 48 #define CPU_MODEL_NAME "rtems_multilib" 49 #define LM32_HAS_FPU 0 51 #elif defined(__lm32__) 53 #define CPU_MODEL_NAME "lm32" 54 #define LM32_HAS_FPU 0 58 #error "Unsupported CPU Model" 66 #define CPU_NAME "LM32" 72 #define lm32_read_interrupts( _ip) \ 73 __asm__ volatile ("rcsr %0, ip":"=r"(_ip)); 75 #define lm32_disable_interrupts( _level ) \ 77 __asm__ volatile ("rcsr %0,ie":"=r"(ie)); \ 80 __asm__ volatile ("wcsr ie,%0"::"r"(ie)); \ 83 #define lm32_enable_interrupts( _level ) \ 84 __asm__ volatile ("wcsr ie,%0"::"r"(_level)); 86 #define lm32_flash_interrupts( _level ) \ 88 __asm__ volatile ("wcsr ie,%0"::"r"(_level)); \ 89 ie = (_level) & (~0x0001); \ 90 __asm__ volatile ("wcsr ie,%0"::"r"(ie)); \ 93 #define lm32_interrupt_unmask( _mask ) \ 95 __asm__ volatile ("rcsr %0,im":"=r"(im)); \ 97 __asm__ volatile ("wcsr im,%0"::"r"(im)); \ 100 #define lm32_interrupt_mask( _mask ) \ 102 __asm__ volatile ("rcsr %0,im":"=r"(im)); \ 104 __asm__ volatile ("wcsr im,%0"::"r"(im)); \ 107 #define lm32_interrupt_ack( _mask ) \ 108 do { uint32_t ip = _mask; \ 109 __asm__ volatile ("wcsr ip,%0"::"r"(ip)); \