RTEMS  5.1
lan91c11x.h
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1 
17 /*
18  * Header file for SMSC LAN91C11x ethernet devices
19  *
20  * Copyright (c) 2004 by Cogent Computer Systems
21  * Written by Jay Monkman <jtm@lopingdog.com>
22  *
23  * The license and distribution terms for this file may be
24  * found in the file LICENSE in this distribution or at
25  * http://www.rtems.org/license/LICENSE.
26  */
27 #ifndef __LAN91C11X_H__
28 #define __LAN91C11X_H__
29 
30 #include <rtems.h>
31 #include <bsp.h>
32 
33 uint16_t lan91c11x_read_reg(int);
34 void lan91c11x_write_reg(int, uint16_t);
35 uint16_t lan91c11x_read_reg_fast(int);
36 void lan91c11x_write_reg_fast(int, uint16_t);
37 void lan91c11x_write_phy_reg(int , uint16_t);
38 uint16_t lan91c11x_read_phy_reg(int);
39 void lan91c11x_unlock(void);
40 void lan91c11x_lock(void);
41 
42 #define LAN91C11X_BASE_ADDR 0x12000000
43 
44 #define LAN91C11X_REG(_b_, _r_) ((((_b_) & 0xf) << 4) | ((_r_) & 0xf))
45 
46 
47 #define LAN91C11X_TCR (LAN91C11X_REG(0, 0x0))
48 #define LAN91C11X_EPHSTAT (LAN91C11X_REG(0, 0x2))
49 #define LAN91C11X_RCR (LAN91C11X_REG(0, 0x4))
50 #define LAN91C11X_CNTR (LAN91C11X_REG(0, 0x6))
51 #define LAN91C11X_MIR (LAN91C11X_REG(0, 0x8))
52 #define LAN91C11X_RPCR (LAN91C11X_REG(0, 0xa))
53 #define LAN91C11X_BANK (LAN91C11X_REG(0, 0xe))
54 #define LAN91C11X_CONFIG (LAN91C11X_REG(1, 0x0))
55 #define LAN91C11X_BASE (LAN91C11X_REG(1, 0x2))
56 #define LAN91C11X_IA0 (LAN91C11X_REG(1, 0x4))
57 #define LAN91C11X_IA2 (LAN91C11X_REG(1, 0x6))
58 #define LAN91C11X_IA4 (LAN91C11X_REG(1, 0x8))
59 #define LAN91C11X_GNRL (LAN91C11X_REG(1, 0xa))
60 #define LAN91C11X_CTRL (LAN91C11X_REG(1, 0xc))
61 #define LAN91C11X_MMUCMD (LAN91C11X_REG(2, 0x0))
62 #define LAN91C11X_PNR (LAN91C11X_REG(2, 0x2))
63 #define LAN91C11X_FIFO (LAN91C11X_REG(2, 0x4))
64 #define LAN91C11X_PTR (LAN91C11X_REG(2, 0x6))
65 #define LAN91C11X_DATA (LAN91C11X_REG(2, 0x8))
66 #define LAN91C11X_INT (LAN91C11X_REG(2, 0xc))
67 #define LAN91C11X_MT0 (LAN91C11X_REG(3, 0x0))
68 #define LAN91C11X_MT2 (LAN91C11X_REG(3, 0x2))
69 #define LAN91C11X_MT4 (LAN91C11X_REG(3, 0x4))
70 #define LAN91C11X_MT6 (LAN91C11X_REG(3, 0x6))
71 #define LAN91C11X_MGMT (LAN91C11X_REG(3, 0x8))
72 #define LAN91C11X_REV (LAN91C11X_REG(3, 0xa))
73 #define LAN91C11X_ERCV (LAN91C11X_REG(3, 0xc))
74 
75 
76 #define LAN91C11X_TCR_TXENA (bit(0))
77 #define LAN91C11X_TCR_LOOP (bit(1))
78 #define LAN91C11X_TCR_FORCOL (bit(2))
79 #define LAN91C11X_TCR_PADEN (bit(7))
80 #define LAN91C11X_TCR_NOCRC (bit(8))
81 #define LAN91C11X_TCR_MONCSN (bit(10))
82 #define LAN91C11X_TCR_FDUPLX (bit(11))
83 #define LAN91C11X_TCR_STPSQET (bit(12))
84 #define LAN91C11X_TCR_EPHLOOP (bit(13))
85 #define LAN91C11X_TCR_SWFDUP (bit(15))
86 
87 #define LAN91C11X_EPHSTAT_TXSUC (bit(0))
88 #define LAN91C11X_EPHSTAT_SNGLCOL (bit(1))
89 #define LAN91C11X_EPHSTAT_MULCOL (bit(2))
90 #define LAN91C11X_EPHSTAT_LTXMUL (bit(3))
91 #define LAN91C11X_EPHSTAT_16COL (bit(4))
92 #define LAN91C11X_EPHSTAT_SQET (bit(5))
93 #define LAN91C11X_EPHSTAT_LTXBRD (bit(6))
94 #define LAN91C11X_EPHSTAT_TXDFR (bit(7))
95 #define LAN91C11X_EPHSTAT_LATCOL (bit(9))
96 #define LAN91C11X_EPHSTAT_LOST (bit(10))
97 #define LAN91C11X_EPHSTAT_EXCDEF (bit(11))
98 #define LAN91C11X_EPHSTAT_CTRROL (bit(12))
99 #define LAN91C11X_EPHSTAT_LINK (bit(14))
100 #define LAN91C11X_EPHSTAT_TXUNRN (bit(15))
101 
102 #define LAN91C11X_RCR_RXABT (bit(0))
103 #define LAN91C11X_RCR_PRMS (bit(1))
104 #define LAN91C11X_RCR_ALMUL (bit(2))
105 #define LAN91C11X_RCR_RXEN (bit(8))
106 #define LAN91C11X_RCR_STRIP (bit(9))
107 #define LAN91C11X_RCR_ABTENB (bit(13))
108 #define LAN91C11X_RCR_FILT (bit(14))
109 #define LAN91C11X_RCR_RST (bit(15))
110 
111 #define LAN91C11X_RPCR_LS0B (bit(2))
112 #define LAN91C11X_RPCR_LS1B (bit(3))
113 #define LAN91C11X_RPCR_LS2B (bit(4))
114 #define LAN91C11X_RPCR_LS0A (bit(5))
115 #define LAN91C11X_RPCR_LS1A (bit(6))
116 #define LAN91C11X_RPCR_LS2A (bit(7))
117 #define LAN91C11X_RPCR_ANEG (bit(11))
118 #define LAN91C11X_RPCR_DPLX (bit(12))
119 #define LAN91C11X_RPCR_SPEED (bit(13))
120 
121 #define LAN91C11X_CONFIG_EXTPHY (bit(9))
122 #define LAN91C11X_CONFIG_GPCTRL (bit(10))
123 #define LAN91C11X_CONFIG_NOWAIT (bit(12))
124 #define LAN91C11X_CONFIG_PWR (bit(15))
125 
126 #define LAN91C11X_CTRL_STORE (bit(0))
127 #define LAN91C11X_CTRL_RELOAD (bit(1))
128 #define LAN91C11X_CTRL_EEPROM (bit(2))
129 #define LAN91C11X_CTRL_TEEN (bit(5))
130 #define LAN91C11X_CTRL_CREN (bit(6))
131 #define LAN91C11X_CTRL_LEEN (bit(7))
132 #define LAN91C11X_CTRL_AUTO (bit(11))
133 #define LAN91C11X_CTRL_RCVBAD (bit(14))
134 
135 #define LAN91C11X_MMUCMD_BUSY (bit(0))
136 #define LAN91C11X_MMUCMD_NOOP (0 << 5)
137 #define LAN91C11X_MMUCMD_ALLOCTX (1 << 5)
138 #define LAN91C11X_MMUCMD_RESETMMU (2 << 5)
139 #define LAN91C11X_MMUCMD_REMFRM (3 << 5)
140 #define LAN91C11X_MMUCMD_REMTOP (4 << 5)
141 #define LAN91C11X_MMUCMD_RELEASE (5 << 5)
142 #define LAN91C11X_MMUCMD_ENQUEUE (6 << 5)
143 #define LAN91C11X_MMUCMD_RESETTX (7 << 5)
144 
145 #define LAN91C11X_PTR_MASK (0x7ff)
146 #define LAN91C11X_PTR_NE (bit(11))
147 #define LAN91C11X_PTR_ETEN (bit(12))
148 #define LAN91C11X_PTR_READ (bit(13))
149 #define LAN91C11X_PTR_AUTOINC (bit(14))
150 #define LAN91C11X_PTR_RCV (bit(15))
151 
152 #define LAN91C11X_INT_RX (bit(0))
153 #define LAN91C11X_INT_TX (bit(1))
154 #define LAN91C11X_INT_TXE (bit(2))
155 #define LAN91C11X_INT_ALLOC (bit(3))
156 #define LAN91C11X_INT_RXOV (bit(4))
157 #define LAN91C11X_INT_EPH (bit(5))
158 #define LAN91C11X_INT_ERX (bit(6))
159 #define LAN91C11X_INT_MD (bit(7))
160 #define LAN91C11X_INT_RXMASK (bit(8))
161 #define LAN91C11X_INT_TXMASK (bit(9))
162 #define LAN91C11X_INT_TXEMASK (bit(10))
163 #define LAN91C11X_INT_ALLOCMASK (bit(11))
164 #define LAN91C11X_INT_RXOVMASK (bit(12))
165 #define LAN91C11X_INT_EPHMASK (bit(13))
166 #define LAN91C11X_INT_ERXMASK (bit(14))
167 #define LAN91C11X_INT_MDMASK (bit(15))
168 
169 #define LAN91C11X_MGMT_MDO (bit(0))
170 #define LAN91C11X_MGMT_MDI (bit(1))
171 #define LAN91C11X_MGMT_MCLK (bit(2))
172 #define LAN91C11X_MGMT_MDOE (bit(3))
173 #define LAN91C11X_MGMT_MSKCRS100 (bit(14))
174 
175 
176 #define LAN91C11X_PKT_CTRL_CRC (bit(4))
177 #define LAN91C11X_PKT_CTRL_ODD (bit(5))
178 
179 
180 /* PHY Registers */
181 #define PHY_CTRL 0x00 /* PHY Control */
182 #define PHY_STAT 0x01 /* PHY Status */
183 #define PHY_ID1 0x02 /* PHY Identifier 1 */
184 #define PHY_ID2 0x03 /* PHY Identifier 2 */
185 #define PHY_AD 0x04 /* PHY Auto-negotiate Control */
186 #define PHY_RMT 0x05 /* PHY Auto-neg Remote End Cap Register */
187 #define PHY_CFG1 0x10 /* PHY Configuration 1 */
188 #define PHY_CFG2 0x11 /* PHY Configuration 2 */
189 #define PHY_INT 0x12 /* Status Output (Interrupt Status) */
190 #define PHY_MASK 0x13 /* Interrupt Mask */
191 
192 /* PHY Control Register Bit Defines */
193 #define PHY_CTRL_RST 0x8000 /* PHY Reset */
194 #define PHY_CTRL_LPBK 0x4000 /* PHY Loopback */
195 #define PHY_CTRL_SPEED 0x2000 /* 100Mbps, 0=10Mpbs */
196 #define PHY_CTRL_ANEGEN 0x1000 /* Enable Auto negotiation */
197 #define PHY_CTRL_PDN 0x0800 /* PHY Power Down mode */
198 #define PHY_CTRL_MIIDIS 0x0400 /* MII 4 bit interface disabled */
199 #define PHY_CTRL_ANEGRST 0x0200 /* Reset Auto negotiate */
200 #define PHY_CTRL_DPLX 0x0100 /* Full Duplex, 0=Half Duplex */
201 #define PHY_CTRL_COLTST 0x0080 /* MII Colision Test */
202 
203 #define PHY_STAT_CAPT4 0x8000
204 #define PHY_STAT_CAPTXF 0x4000
205 #define PHY_STAT_CAPTXH 0x2000
206 #define PHY_STAT_CAPTF 0x1000
207 #define PHY_STAT_CAPTH 0x0800
208 #define PHY_STAT_CAPSUPR 0x0040
209 #define PHY_STAT_ANEGACK 0x0020
210 #define PHY_STAT_REMFLT 0x0010
211 #define PHY_STAT_CAPANEG 0x0008
212 #define PHY_STAT_LINK 0x0004
213 #define PHY_STAT_JAB 0x0002
214 #define PHY_STAT_EXREG 0x0001
215 
216 #define PHY_ADV_NP 0x8000
217 #define PHY_ADV_ACK 0x4000
218 #define PHY_ADV_RF 0x2000
219 #define PHY_ADV_T4 0x0200
220 #define PHY_ADV_TXFDX 0x0100
221 #define PHY_ADV_TXHDX 0x0080
222 #define PHY_ADV_10FDX 0x0040
223 #define PHY_ADV_10HDX 0x0020
224 #define PHY_ADV_CSMA 0x0001
225 
226 
227 
228 
229 #endif /* __LAN91C11X_H__ */
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