RTEMS  5.1
irq_supp.h
1 /*
2  * The license and distribution terms for this file may be
3  * found in the file LICENSE in this distribution or at
4  * http://www.rtems.org/license/LICENSE.
5  */
6 
7 #ifndef IRQ_SHARED_IRQ_C_GLUE_H
8 #define IRQ_SHARED_IRQ_C_GLUE_H
9 /*
10  * This header describes the routines that are needed by the shared
11  * version of 'irq.c' (implementing the RTEMS irq API). They
12  * must be provided by the BSP.
13  *
14  * The license and distribution terms for this file may be
15  * found in the file LICENSE in this distribution or at
16  * http://www.rtems.org/license/LICENSE.
17  *
18  */
19 
20 #ifndef BSP_SHARED_HANDLER_SUPPORT
21 #define BSP_SHARED_HANDLER_SUPPORT 1
22 #endif
23 
24 #include <rtems.h>
25 #include <rtems/irq.h>
26 
27 #include <bsp/vectors.h>
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
33 /*
34  * PIC-independent functions to enable/disable interrupt lines at
35  * the pic.
36  *
37  * NOTE: the routines must ignore requests for enabling/disabling
38  * interrupts that are outside of the range handled by the
39  * PIC(s).
40  */
41 extern void BSP_enable_irq_at_pic(const rtems_irq_number irqLine);
42 /*
43  * RETURNS: nonzero (> 0 ) if irq was enabled originally, zero if irq
44  * was off and negative value if there was an error.
45  */
46 extern int BSP_disable_irq_at_pic(const rtems_irq_number irqLine);
47 
48 /*
49  * Initialize the PIC.
50  */
51 extern int BSP_setup_the_pic(rtems_irq_global_settings* config);
52 
53 /* IRQ dispatcher to be defined by the PIC driver; note that it MUST
54  * implement shared interrupts.
55  * Note also that the exception frame passed to this handler is not very
56  * meaningful. Only the volatile registers and vector info are stored.
57  *
58  *******************************************************************
59  * The routine must return zero if the interrupt was handled. If a
60  * nonzero value is returned the dispatcher may panic and flag an
61  * uncaught exception.
62  *******************************************************************
63  */
64 int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum);
65 
66 /*
67  * Snippet to be used by PIC drivers and by bsp_irq_dispatch_list
68  * traverses list of shared handlers for a given interrupt
69  *
70  */
71 
72 static inline void
73 bsp_irq_dispatch_list_base(
75  unsigned irq,
76  rtems_irq_hdl sentinel
77 )
78 {
79  rtems_irq_connect_data* vchain;
80  for( vchain = &tbl[irq];
81  ((intptr_t)vchain != -1 && vchain->hdl != sentinel);
82  vchain = (rtems_irq_connect_data*)vchain->next_handler )
83  {
84  vchain->hdl(vchain->handle);
85  }
86 }
87 
88 
89 /*
90  * Snippet to be used by PIC drivers;
91  * enables interrupts, traverses list of
92  * shared handlers for a given interrupt
93  * and restores original irq level
94  *
95  * Note that _ISR_Get_level() & friends are preferable to
96  * manipulating MSR directly.
97  */
98 
99 static inline void
100 bsp_irq_dispatch_list(
102  unsigned irq,
103  rtems_irq_hdl sentinel
104 )
105 {
106  register uint32_t l_orig;
107 
108  l_orig = _ISR_Get_level();
109 
110  /* Enable all interrupts */
111  _ISR_Set_level(0);
112 
113 
114  bsp_irq_dispatch_list_base( tbl, irq, sentinel );
115 
116  /* Restore original level */
117  _ISR_Set_level(l_orig);
118 }
119 
120 #ifdef __cplusplus
121 }
122 #endif
123 
124 #endif
Definition: deflate.c:115
Definition: irq.h:92
#define _ISR_Get_level()
Return current interrupt level.
Definition: isrlevel.h:128
PowerPC Exceptions API.
#define _ISR_Set_level(_new_level)
Set current interrupt level.
Definition: isrlevel.h:140
Definition: irq.h:45
The set of registers that specifies the complete processor state.
Definition: cpu.h:629