RTEMS  5.1
Macros | Functions
bsp.h File Reference

Global BSP definitions. More...

#include <bspopts.h>
#include <bsp/default-initial-extension.h>
#include <rtems.h>

Go to the source code of this file.

Macros

#define BSP_FEATURE_IRQ_EXTENSION
 
#define CONFIG_ARM_CLK   60000000L
 
#define LPC22xx_Fcclk   CONFIG_ARM_CLK
 system clk frequecy,<=60Mhz, defined in system configuration
 
#define LPC22xx_Fcclk   CONFIG_ARM_CLK
 system clk frequecy,<=60Mhz, defined in system configuration
 
#define LPC22xx_Fcco   LPC22xx_Fcclk * 4
 
#define LPC22xx_Fpclk   (LPC22xx_Fcclk /4) *1
 VPB clk frequency,1,1/2,1/4 times of Fcclk.
 
#define PLLFEED_DATA1   0xAA
 
#define PLLFEED_DATA2   0x55
 
#define FOSC   11059200
 OSC [Hz].
 
#define FCCLK   FOSC<<2
 Core clk [Hz].
 
#define JOEL_M   Fcclk / Fosc
 
#define P_min   Fcco_MIN / (2*Fcclk) + 1;
 
#define P_max   Fcco_MAX / (2*Fcclk);
 
#define UART_BPS   115200
 
#define TIMER_PRECISION   10
 Time Precision time [us].
 
#define I2CSPEED   20000
 I2C Speed [bit/s].
 
#define SPISPEED   1500000
 SPI Speed [bit/s].
 
#define SPI_CS_PIN   P0_13
 SPI EEPROM CS pin. More...
 
#define SPI_CS_PIN_FUNC   PINSEL0_bit.SPI_CS_PIN
 
#define CS8900A_BASE   0x82000000
 CS8900A definition.
 
#define RTL8019AS_BASE   0x82000000
 RTL8019AS definition.
 
Fcclk range: 10MHz ~ MCU allowed frequency
#define Fcclk_MIN   10000000L
 
#define Fcclk_MAX   60000000L
 
Fcco range: 156MHz ~ 320MHz
#define Fcco_MIN   156000000L
 
#define Fcco_MAX   320000000L
 
PLL PLLCON register bit descriptions
#define PLLCON_ENABLE_BIT   0
 
#define PLLCON_CONNECT_BIT   1
 
PLL PLLSTAT register bit descriptions
#define PLLSTAT_ENABLE_BIT   8
 
#define PLLSTAT_CONNECT_BIT   9
 
#define PLLSTAT_LOCK_BIT   10
 
PM Peripheral Type
#define PC_TIMER0   0x2
 
#define PC_TIMER1   0x4
 
#define PC_UART0   0x8
 
#define PC_UART1   0x10
 
#define PC_PWM0   0x20
 
#define PC_I2C   0x80
 
#define PC_SPI0   0x100
 
#define PC_RTC   0x200
 
System Configure
#define Fosc   11059200
 osc freq,10MHz~25MHz, change to a real one if needed
 
#define Fcclk   (Fosc << 2)
 system freq 2^n time of Fosc(1~32) <=60MHZ
 
#define Fcco   (Fcclk <<2)
 CCO freq 2,4,8,16 time of Fcclk 156MHz~320MHz.
 
#define Fpclk   (Fcclk >>2) * 1
 VPB freq only(Fcclk / 4) 1~4.
 
Uarts buffers size
#define RXBUFSIZE   32
 
#define TXBUFSIZE   32
 
Flash definition
#define RTL22XX_FLASH_SIZE   (0x80000-RTL22XX_FLASH_BOOT)
 Total area of Flash region in words 8 bit.
 
#define RTL22XX_FLASH_BEGIN   0x80000000
 
#define RTL22XX_FLASH_BASE   (RTL22XX_FLASH_BEGIN+RTL22XX_FLASH_BOOT)
 First 0x8000 bytes reserved for boot loader etc.
 
SRAM definition
#define SRAM_SIZE   0x100000
 Total area of Flash region in words 8 bit.
 
#define SRAM_BASE   0x81000000
 First 0x8000 bytes reserved for boot loader etc.
 
Network driver configuration
#define RTEMS_BSP_NETWORK_DRIVER_NAME   "eth0"
 
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH   cs8900_driver_attach
 

Functions

int cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching)
 
void UART0_Ini (void)
 

Detailed Description

Global BSP definitions.