RTEMS  5.1
bestcomm_api_mem.h
1 #ifndef __TASK_API_BESTCOMM_API_MEM_H
2 #define __TASK_API_BESTCOMM_API_MEM_H 1
3 
4 /******************************************************************************
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included
16 * in all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
22 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
24 * OTHER DEALINGS IN THE SOFTWARE.
25 *
26 ******************************************************************************/
27 
28 #include "../include/mgt5200/mgt5200.h"
29 
30 /*
31  * An extern global variable is used here for the MBAR since it must
32  * be passed into the API for processes that use virtual memory.
33  */
34 extern uint8 *MBarGlobal;
35 
36 #define SDMA_TASK_BAR (MBarGlobal+MBAR_SDMA+0x000)
37 #define SDMA_INT_PEND (MBarGlobal+MBAR_SDMA+0x014)
38 #define SDMA_INT_MASK (MBarGlobal+MBAR_SDMA+0x018)
39 #define SDMA_TCR (MBarGlobal+MBAR_SDMA+0x01C)
40 #define SDMA_TASK_SIZE (MBarGlobal+MBAR_SDMA+0x060)
41 
42 #define PCI_TX_PKT_SIZE (MBarGlobal+MBAR_SCPCI+0x000)
43 #define PCI_TX_NTBIT (MBarGlobal+MBAR_SCPCI+0x01C)
44 #define PCI_TX_FIFO (MBarGlobal+MBAR_SCPCI+0x040)
45 #define PCI_TX_FIFO_STAT (MBarGlobal+MBAR_SCPCI+0x045)
46 #define PCI_TX_FIFO_GRAN (MBarGlobal+MBAR_SCPCI+0x048)
47 #define PCI_TX_FIFO_ALARM (MBarGlobal+MBAR_SCPCI+0x04E)
48 
49 #define PCI_RX_PKT_SIZE (MBarGlobal+MBAR_SCPCI+0x080)
50 #define PCI_RX_NTBIT (MBarGlobal+MBAR_SCPCI+0x09C)
51 #define PCI_RX_FIFO (MBarGlobal+MBAR_SCPCI+0x0C0)
52 #define PCI_RX_FIFO_STAT (MBarGlobal+MBAR_SCPCI+0x0C5)
53 #define PCI_RX_FIFO_GRAN (MBarGlobal+MBAR_SCPCI+0x0C8)
54 #define PCI_RX_FIFO_ALARM (MBarGlobal+MBAR_SCPCI+0x0CE)
55 
56 
57 #define FEC_RX_FIFO (MBarGlobal+MBAR_ETHERNET+0x184)
58 #define FEC_RX_FIFO_STAT (MBarGlobal+MBAR_ETHERNET+0x188)
59 #define FEC_RX_FIFO_GRAN (MBarGlobal+MBAR_ETHERNET+0x18C)
60 #define FEC_RX_FIFO_ALARM (MBarGlobal+MBAR_ETHERNET+0x198)
61 
62 #define FEC_TX_FIFO (MBarGlobal+MBAR_ETHERNET+0x1A4)
63 #define FEC_TX_FIFO_STAT (MBarGlobal+MBAR_ETHERNET+0x1A8)
64 #define FEC_TX_FIFO_GRAN (MBarGlobal+MBAR_ETHERNET+0x1AC)
65 #define FEC_TX_FIFO_ALARM (MBarGlobal+MBAR_ETHERNET+0x1B8)
66 
67 #endif /* __TASK_API_BESTCOMM_API_MEM_H */