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RTEMS
5.1
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1 #ifndef __TASK_API_BESTCOMM_API_MEM_H 2 #define __TASK_API_BESTCOMM_API_MEM_H 1 28 #include "../include/mgt5200/mgt5200.h" 34 extern uint8 *MBarGlobal;
36 #define SDMA_TASK_BAR (MBarGlobal+MBAR_SDMA+0x000) 37 #define SDMA_INT_PEND (MBarGlobal+MBAR_SDMA+0x014) 38 #define SDMA_INT_MASK (MBarGlobal+MBAR_SDMA+0x018) 39 #define SDMA_TCR (MBarGlobal+MBAR_SDMA+0x01C) 40 #define SDMA_TASK_SIZE (MBarGlobal+MBAR_SDMA+0x060) 42 #define PCI_TX_PKT_SIZE (MBarGlobal+MBAR_SCPCI+0x000) 43 #define PCI_TX_NTBIT (MBarGlobal+MBAR_SCPCI+0x01C) 44 #define PCI_TX_FIFO (MBarGlobal+MBAR_SCPCI+0x040) 45 #define PCI_TX_FIFO_STAT (MBarGlobal+MBAR_SCPCI+0x045) 46 #define PCI_TX_FIFO_GRAN (MBarGlobal+MBAR_SCPCI+0x048) 47 #define PCI_TX_FIFO_ALARM (MBarGlobal+MBAR_SCPCI+0x04E) 49 #define PCI_RX_PKT_SIZE (MBarGlobal+MBAR_SCPCI+0x080) 50 #define PCI_RX_NTBIT (MBarGlobal+MBAR_SCPCI+0x09C) 51 #define PCI_RX_FIFO (MBarGlobal+MBAR_SCPCI+0x0C0) 52 #define PCI_RX_FIFO_STAT (MBarGlobal+MBAR_SCPCI+0x0C5) 53 #define PCI_RX_FIFO_GRAN (MBarGlobal+MBAR_SCPCI+0x0C8) 54 #define PCI_RX_FIFO_ALARM (MBarGlobal+MBAR_SCPCI+0x0CE) 57 #define FEC_RX_FIFO (MBarGlobal+MBAR_ETHERNET+0x184) 58 #define FEC_RX_FIFO_STAT (MBarGlobal+MBAR_ETHERNET+0x188) 59 #define FEC_RX_FIFO_GRAN (MBarGlobal+MBAR_ETHERNET+0x18C) 60 #define FEC_RX_FIFO_ALARM (MBarGlobal+MBAR_ETHERNET+0x198) 62 #define FEC_TX_FIFO (MBarGlobal+MBAR_ETHERNET+0x1A4) 63 #define FEC_TX_FIFO_STAT (MBarGlobal+MBAR_ETHERNET+0x1A8) 64 #define FEC_TX_FIFO_GRAN (MBarGlobal+MBAR_ETHERNET+0x1AC) 65 #define FEC_TX_FIFO_ALARM (MBarGlobal+MBAR_ETHERNET+0x1B8)