RTEMS  5.1
arm-cp15-start.h
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1 
10 /*
11  * Copyright (c) 2013 Hesham AL-Matary.
12  * Copyright (c) 2009-2019 embedded brains GmbH. All rights reserved.
13  *
14  * embedded brains GmbH
15  * Dornierstr. 4
16  * 82178 Puchheim
17  * Germany
18  * <info@embedded-brains.de>
19  *
20  * The license and distribution terms for this file may be
21  * found in the file LICENSE in this distribution or at
22  * http://www.rtems.org/license/LICENSE.
23  */
24 
25 #ifndef LIBBSP_ARM_SHARED_ARM_CP15_START_H
26 #define LIBBSP_ARM_SHARED_ARM_CP15_START_H
27 
28 #include <libcpu/arm-cp15.h>
29 #include <bsp/start.h>
30 #include <bsp/linker-symbols.h>
31 #include <bspopts.h>
32 
33 #ifdef __cplusplus
34 extern "C" {
35 #endif /* __cplusplus */
36 
37 typedef struct {
38  uint32_t begin;
39  uint32_t end;
40  uint32_t flags;
42 
43 #define ARMV7_CP15_START_DEFAULT_SECTIONS \
44  { \
45  .begin = (uint32_t) bsp_section_fast_text_begin, \
46  .end = (uint32_t) bsp_section_fast_text_end, \
47  .flags = ARMV7_MMU_CODE_CACHED \
48  }, { \
49  .begin = (uint32_t) bsp_section_fast_data_begin, \
50  .end = (uint32_t) bsp_section_fast_data_end, \
51  .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
52  }, { \
53  .begin = (uint32_t) bsp_section_start_begin, \
54  .end = (uint32_t) bsp_section_start_end, \
55  .flags = ARMV7_MMU_CODE_CACHED \
56  }, { \
57  .begin = (uint32_t) bsp_section_vector_begin, \
58  .end = (uint32_t) bsp_section_vector_end, \
59  .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
60  }, { \
61  .begin = (uint32_t) bsp_section_text_begin, \
62  .end = (uint32_t) bsp_section_text_end, \
63  .flags = ARMV7_MMU_CODE_CACHED \
64  }, { \
65  .begin = (uint32_t) bsp_section_rodata_begin, \
66  .end = (uint32_t) bsp_section_rodata_end, \
67  .flags = ARMV7_MMU_DATA_READ_ONLY_CACHED \
68  }, { \
69  .begin = (uint32_t) bsp_section_data_begin, \
70  .end = (uint32_t) bsp_section_data_end, \
71  .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
72  }, { \
73  .begin = (uint32_t) bsp_section_bss_begin, \
74  .end = (uint32_t) bsp_section_bss_end, \
75  .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
76  }, { \
77  .begin = (uint32_t) bsp_section_work_begin, \
78  .end = (uint32_t) bsp_section_work_end, \
79  .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
80  }, { \
81  .begin = (uint32_t) bsp_section_stack_begin, \
82  .end = (uint32_t) bsp_section_stack_end, \
83  .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
84  }, { \
85  .begin = (uint32_t) bsp_section_nocache_begin, \
86  .end = (uint32_t) bsp_section_nocache_end, \
87  .flags = ARMV7_MMU_DEVICE \
88  }, { \
89  .begin = (uint32_t) bsp_section_nocachenoload_begin, \
90  .end = (uint32_t) bsp_section_nocachenoload_end, \
91  .flags = ARMV7_MMU_DEVICE \
92  }, { \
93  .begin = (uint32_t) bsp_translation_table_base, \
94  .end = (uint32_t) bsp_translation_table_end, \
95  .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
96  }
97 
98 #define ARMV7_CP15_START_WORKSPACE_ENTRY_INDEX 8
99 
100 BSP_START_DATA_SECTION extern const arm_cp15_start_section_config
101  arm_cp15_start_mmu_config_table[];
102 
103 BSP_START_DATA_SECTION extern const size_t
104  arm_cp15_start_mmu_config_table_size;
105 
106 BSP_START_TEXT_SECTION static inline void
107 arm_cp15_start_set_translation_table_entries(
108  uint32_t *ttb,
110 )
111 {
112  if (config->begin != config->end) {
113  uint32_t i;
114  uint32_t iend;
115  uint32_t index_mask;
116  uint32_t flags;
117 #ifdef ARM_MMU_USE_SMALL_PAGES
118  uint32_t *pt;
119 
120  pt = &ttb[ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT];
121  i = ARM_MMU_SMALL_PAGE_GET_INDEX(config->begin);
122  iend = ARM_MMU_SMALL_PAGE_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(config->end));
123  index_mask = (1U << (32 - ARM_MMU_SMALL_PAGE_BASE_SHIFT)) - 1U;
124  flags = ARM_MMU_SECT_FLAGS_TO_SMALL_PAGE(config->flags);
125 
126  while (i != iend) {
127  pt[i] = (i << ARM_MMU_SMALL_PAGE_BASE_SHIFT) | flags;
128  i = (i + 1U) & index_mask;
129  }
130 #else
131  i = ARM_MMU_SECT_GET_INDEX(config->begin);
132  iend = ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(config->end));
133  index_mask = (1U << (32 - ARM_MMU_SECT_BASE_SHIFT)) - 1U;
134  flags = config->flags;
135 
136  while (i != iend) {
137  ttb[i] = (i << ARM_MMU_SECT_BASE_SHIFT) | flags;
138  i = (i + 1U) & index_mask;
139  }
140 #endif
141  }
142 }
143 
144 BSP_START_TEXT_SECTION static inline void
145 arm_cp15_start_setup_translation_table(
146  uint32_t *ttb,
147  uint32_t client_domain,
148  const arm_cp15_start_section_config *config_table,
149  size_t config_count
150 )
151 {
152 #ifdef ARM_MMU_USE_SMALL_PAGES
153  uint32_t *pt;
154 #endif
155  uint32_t dac;
156  size_t i;
157 
158  dac = ARM_CP15_DAC_DOMAIN(client_domain, ARM_CP15_DAC_CLIENT);
159  arm_cp15_set_domain_access_control(dac);
160  arm_cp15_set_translation_table_base(ttb);
161 
162  /* Initialize translation table with invalid entries */
163 #ifdef ARM_MMU_USE_SMALL_PAGES
164  pt = &ttb[ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT];
165  for (i = 0; i < ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT; ++i) {
166  size_t j;
167 
168  for (j = 0; j < ARM_MMU_SMALL_PAGE_TABLE_ENTRY_COUNT; ++j) {
169  pt[j] = 0;
170  }
171 
172  ttb[i] = (uint32_t) pt | (client_domain << ARM_MMU_SECT_DOMAIN_SHIFT)
173  | ARM_MMU_PAGE_TABLE_DEFAULT;
174  pt += ARM_MMU_SMALL_PAGE_TABLE_ENTRY_COUNT;
175  }
176 #else
177  for (i = 0; i < ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT; ++i) {
178  ttb[i] = 0;
179  }
180 #endif
181 
182  for (i = 0; i < config_count; ++i) {
183  arm_cp15_start_set_translation_table_entries(ttb, &config_table [i]);
184  }
185 }
186 
187 BSP_START_TEXT_SECTION static inline void
188 arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
189  uint32_t ctrl,
190  uint32_t *ttb,
191  uint32_t client_domain,
192  const arm_cp15_start_section_config *config_table,
193  size_t config_count
194 )
195 {
196  arm_cp15_start_setup_translation_table(
197  ttb,
198  client_domain,
199  config_table,
200  config_count
201  );
202 
203  /* Enable MMU and cache */
204  ctrl |= ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M;
205 
206  arm_cp15_set_control(ctrl);
207 }
208 
209 BSP_START_TEXT_SECTION static inline uint32_t
210 arm_cp15_start_setup_mmu_and_cache(uint32_t ctrl_clear, uint32_t ctrl_set)
211 {
212  uint32_t ctrl = arm_cp15_get_control();
213 
214  ctrl &= ~ctrl_clear;
215  ctrl |= ctrl_set;
216 
217  arm_cp15_set_control(ctrl);
218 
219  arm_cp15_tlb_invalidate();
220 
221  return ctrl;
222 }
223 
224 #ifdef __cplusplus
225 }
226 #endif /* __cplusplus */
227 
228 #endif /* LIBBSP_ARM_SHARED_ARM_CP15_START_H */
ARM co-processor 15 (CP15) API.
Definition: deflate.c:115
Definition: arm-cp15-start.h:37