RTEMS-5
Annotated Report
score
Sat Apr 11 19:07:47 2020
40007598 <_API_Mutex_Is_owner>:
#include <rtems/score/apimutex.h>
#include <rtems/score/percpu.h>
bool _API_Mutex_Is_owner( const API_Mutex_Control *the_mutex )
{
return the_mutex->Mutex._Mutex._Queue._owner == _Thread_Get_executing();
40007598: c2 02 20 0c ld [ %o0 + 0xc ], %g1
<== NOT EXECUTED
4000759c: c4 01 a0 20 ld [ %g6 + 0x20 ], %g2
<== NOT EXECUTED
400075a0: 82 18 40 02 xor %g1, %g2, %g1
}
400075a4: 80 a0 00 01 cmp %g0, %g1
400075a8: 81 c3 e0 08 retl
400075ac: 90 60 3f ff subx %g0, -1, %o0
40008fd0 <_CORE_RWLock_Seize_for_reading>:
Status_Control _CORE_RWLock_Seize_for_reading(
CORE_RWLock_Control *the_rwlock,
bool wait,
Thread_queue_Context *queue_context
)
{
40008fd0: 9d e3 bf a0 save %sp, -96, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40008fd4: 91 d0 20 09 ta 9
<== NOT EXECUTED
40008fd8: c2 26 80 00 st %g1, [ %i2 ]
* If any thread is waiting, then we wait.
*/
executing = _CORE_RWLock_Acquire( the_rwlock, queue_context );
switch ( the_rwlock->current_state ) {
40008fdc: c2 06 20 14 ld [ %i0 + 0x14 ], %g1
40008fe0: 80 a0 60 00 cmp %g1, 0
40008fe4: 02 80 00 1e be 4000905c <_CORE_RWLock_Seize_for_reading+0x8c>
40008fe8: 84 10 00 06 mov %g6, %g2
40008fec: 80 a0 60 01 cmp %g1, 1
40008ff0: 12 80 00 06 bne 40009008 <_CORE_RWLock_Seize_for_reading+0x38>
40008ff4: 80 a6 60 00 cmp %i1, 0
the_rwlock->number_of_readers += 1;
_CORE_RWLock_Release( the_rwlock, queue_context );
return STATUS_SUCCESSFUL;
case CORE_RWLOCK_LOCKED_FOR_READING:
if ( _Thread_queue_Is_empty( &the_rwlock->Queue.Queue ) ) {
40008ff8: c2 06 20 08 ld [ %i0 + 8 ], %g1
40008ffc: 80 a0 60 00 cmp %g1, 0
40009000: 02 80 00 21 be 40009084 <_CORE_RWLock_Seize_for_reading+0xb4>
40009004: 80 a6 60 00 cmp %i1, 0
/*
* If the thread is not willing to wait, then return immediately.
*/
if ( !wait ) {
40009008: 02 80 00 0e be 40009040 <_CORE_RWLock_Seize_for_reading+0x70>
4000900c: 03 00 00 04 sethi %hi(0x1000), %g1
ISR_Level level;
Thread_Control *executing;
_Thread_queue_Context_ISR_disable( queue_context, level );
_Thread_queue_Context_set_ISR_level( queue_context, level );
executing = _Thread_Executing;
40009010: fa 00 a0 20 ld [ %g2 + 0x20 ], %i5
/*
* We need to wait to enter this critical section
*/
executing->Wait.option = CORE_RWLOCK_THREAD_WAITING_FOR_READ;
40009014: c0 27 60 48 clr [ %i5 + 0x48 ]
queue_context->thread_state = thread_state;
40009018: c2 26 a0 04 st %g1, [ %i2 + 4 ]
_Thread_queue_Context_set_thread_state(
queue_context,
STATES_WAITING_FOR_RWLOCK
);
_Thread_queue_Enqueue(
4000901c: 90 06 20 08 add %i0, 8, %o0
40009020: 96 10 00 1a mov %i2, %o3
40009024: 94 10 00 1d mov %i5, %o2
40009028: 13 10 00 50 sethi %hi(0x40014000), %o1
4000902c: 40 00 0a f3 call 4000bbf8 <_Thread_queue_Enqueue>
40009030: 92 12 61 6c or %o1, 0x16c, %o1 ! 4001416c <_Thread_queue_Operations_FIFO>
40009034: f0 07 60 4c ld [ %i5 + 0x4c ], %i0
CORE_RWLOCK_TQ_OPERATIONS,
executing,
queue_context
);
return _Thread_Wait_get_status( executing );
}
40009038: 81 c7 e0 08 ret
4000903c: 81 e8 00 00 restore
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40009040: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009044: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009048: 01 00 00 00 nop
return STATUS_UNAVAILABLE;
4000904c: 31 00 00 04 sethi %hi(0x1000), %i0
40009050: b0 16 20 0d or %i0, 0xd, %i0 ! 100d <_ISR_Stack_size+0xd>
40009054: 81 c7 e0 08 ret
40009058: 81 e8 00 00 restore
the_rwlock->current_state = CORE_RWLOCK_LOCKED_FOR_READING;
4000905c: 84 10 20 01 mov 1, %g2
<== NOT EXECUTED
40009060: c4 26 20 14 st %g2, [ %i0 + 0x14 ]
<== NOT EXECUTED
the_rwlock->number_of_readers += 1;
40009064: c2 06 20 18 ld [ %i0 + 0x18 ], %g1
<== NOT EXECUTED
40009068: 82 00 60 01 inc %g1
<== NOT EXECUTED
the_rwlock->number_of_readers += 1;
4000906c: c2 26 20 18 st %g1, [ %i0 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40009070: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009074: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009078: 01 00 00 00 nop
return STATUS_SUCCESSFUL;
4000907c: 81 c7 e0 08 ret
40009080: 91 e8 20 00 restore %g0, 0, %o0
the_rwlock->number_of_readers += 1;
40009084: c2 06 20 18 ld [ %i0 + 0x18 ], %g1
40009088: 10 bf ff f9 b 4000906c <_CORE_RWLock_Seize_for_reading+0x9c>
4000908c: 82 00 60 01 inc %g1
40009090 <_CORE_RWLock_Seize_for_writing>:
Status_Control _CORE_RWLock_Seize_for_writing(
CORE_RWLock_Control *the_rwlock,
bool wait,
Thread_queue_Context *queue_context
)
{
40009090: 9d e3 bf a0 save %sp, -96, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40009094: 91 d0 20 09 ta 9
<== NOT EXECUTED
40009098: c2 26 80 00 st %g1, [ %i2 ]
* If any thread is waiting, then we wait.
*/
executing = _CORE_RWLock_Acquire( the_rwlock, queue_context );
switch ( the_rwlock->current_state ) {
4000909c: c2 06 20 14 ld [ %i0 + 0x14 ], %g1
400090a0: 80 a0 60 00 cmp %g1, 0
400090a4: 02 80 00 18 be 40009104 <_CORE_RWLock_Seize_for_writing+0x74>
400090a8: 80 a6 60 00 cmp %i1, 0
/*
* If the thread is not willing to wait, then return immediately.
*/
if ( !wait ) {
400090ac: 02 80 00 0f be 400090e8 <_CORE_RWLock_Seize_for_writing+0x58>
400090b0: 82 10 20 01 mov 1, %g1
400090b4: fa 01 a0 20 ld [ %g6 + 0x20 ], %i5
/*
* We need to wait to enter this critical section
*/
executing->Wait.option = CORE_RWLOCK_THREAD_WAITING_FOR_WRITE;
400090b8: c2 27 60 48 st %g1, [ %i5 + 0x48 ]
400090bc: 03 00 00 04 sethi %hi(0x1000), %g1
400090c0: c2 26 a0 04 st %g1, [ %i2 + 4 ]
_Thread_queue_Context_set_thread_state(
queue_context,
STATES_WAITING_FOR_RWLOCK
);
_Thread_queue_Enqueue(
400090c4: 90 06 20 08 add %i0, 8, %o0
400090c8: 96 10 00 1a mov %i2, %o3
400090cc: 94 10 00 1d mov %i5, %o2
400090d0: 13 10 00 50 sethi %hi(0x40014000), %o1
400090d4: 40 00 0a c9 call 4000bbf8 <_Thread_queue_Enqueue>
400090d8: 92 12 61 6c or %o1, 0x16c, %o1 ! 4001416c <_Thread_queue_Operations_FIFO>
400090dc: f0 07 60 4c ld [ %i5 + 0x4c ], %i0
CORE_RWLOCK_TQ_OPERATIONS,
executing,
queue_context
);
return _Thread_Wait_get_status( executing );
}
400090e0: 81 c7 e0 08 ret
400090e4: 81 e8 00 00 restore
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400090e8: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400090ec: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400090f0: 01 00 00 00 nop
return STATUS_UNAVAILABLE;
400090f4: 31 00 00 04 sethi %hi(0x1000), %i0
400090f8: b0 16 20 0d or %i0, 0xd, %i0 ! 100d <_ISR_Stack_size+0xd>
400090fc: 81 c7 e0 08 ret
40009100: 81 e8 00 00 restore
the_rwlock->current_state = CORE_RWLOCK_LOCKED_FOR_WRITING;
40009104: 82 10 20 02 mov 2, %g1
<== NOT EXECUTED
40009108: c2 26 20 14 st %g1, [ %i0 + 0x14 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000910c: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009110: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009114: 01 00 00 00 nop
return STATUS_SUCCESSFUL;
40009118: 81 c7 e0 08 ret
4000911c: 91 e8 20 00 restore %g0, 0, %o0
400091a4 <_CORE_RWLock_Surrender>:
Status_Control _CORE_RWLock_Surrender( CORE_RWLock_Control *the_rwlock )
{
400091a4: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400091a8: 91 d0 20 09 ta 9
<== NOT EXECUTED
400091ac: c2 27 bf dc st %g1, [ %fp + -36 ]
*/
_Thread_queue_Context_initialize( &queue_context );
_CORE_RWLock_Acquire( the_rwlock, &queue_context );
if ( the_rwlock->current_state == CORE_RWLOCK_UNLOCKED){
400091b0: c2 06 20 14 ld [ %i0 + 0x14 ], %g1
400091b4: 80 a0 60 00 cmp %g1, 0
400091b8: 02 80 00 14 be 40009208 <_CORE_RWLock_Surrender+0x64>
400091bc: 80 a0 60 01 cmp %g1, 1
/* This is an error at the caller site */
_CORE_RWLock_Release( the_rwlock, &queue_context );
return STATUS_SUCCESSFUL;
}
if ( the_rwlock->current_state == CORE_RWLOCK_LOCKED_FOR_READING ) {
400091c0: 32 80 00 08 bne,a 400091e0 <_CORE_RWLock_Surrender+0x3c>
400091c4: c0 26 20 14 clr [ %i0 + 0x14 ]
the_rwlock->number_of_readers -= 1;
400091c8: c2 06 20 18 ld [ %i0 + 0x18 ], %g1
400091cc: 82 00 7f ff add %g1, -1, %g1
if ( the_rwlock->number_of_readers != 0 ) {
400091d0: 80 a0 60 00 cmp %g1, 0
400091d4: 12 80 00 0d bne 40009208 <_CORE_RWLock_Surrender+0x64>
400091d8: c2 26 20 18 st %g1, [ %i0 + 0x18 ]
/*
* Implicitly transition to "unlocked" and find another thread interested
* in obtaining this rwlock.
*/
the_rwlock->current_state = CORE_RWLOCK_UNLOCKED;
400091dc: c0 26 20 14 clr [ %i0 + 0x14 ]
_Thread_queue_Flush_critical(
400091e0: 96 07 bf dc add %fp, -36, %o3
400091e4: 90 06 20 08 add %i0, 8, %o0
400091e8: 15 10 00 24 sethi %hi(0x40009000), %o2
400091ec: 13 10 00 50 sethi %hi(0x40014000), %o1
400091f0: 94 12 a1 20 or %o2, 0x120, %o2
400091f4: 92 12 61 6c or %o1, 0x16c, %o1
400091f8: 40 00 0b 6e call 4000bfb0 <_Thread_queue_Flush_critical>
400091fc: b0 10 20 00 clr %i0
CORE_RWLOCK_TQ_OPERATIONS,
_CORE_RWLock_Flush_filter,
&queue_context
);
return STATUS_SUCCESSFUL;
}
40009200: 81 c7 e0 08 ret
40009204: 81 e8 00 00 restore
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40009208: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000920c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009210: 01 00 00 00 nop
40009214: 81 c7 e0 08 ret
40009218: 91 e8 20 00 restore %g0, 0, %o0
400070a8 <_CORE_barrier_Seize>:
CORE_barrier_Control *the_barrier,
Thread_Control *executing,
bool wait,
Thread_queue_Context *queue_context
)
{
400070a8: 9d e3 bf a0 save %sp, -96, %sp
uint32_t number_of_waiting_threads;
_CORE_barrier_Acquire_critical( the_barrier, queue_context );
number_of_waiting_threads = the_barrier->number_of_waiting_threads;
400070ac: c2 06 20 14 ld [ %i0 + 0x14 ], %g1
++number_of_waiting_threads;
if (
400070b0: c4 06 20 0c ld [ %i0 + 0xc ], %g2
400070b4: 80 a0 a0 00 cmp %g2, 0
400070b8: 12 80 00 06 bne 400070d0 <_CORE_barrier_Seize+0x28>
400070bc: 82 00 60 01 inc %g1
_CORE_barrier_Is_automatic( &the_barrier->Attributes )
&& number_of_waiting_threads == the_barrier->Attributes.maximum_count
400070c0: c4 06 20 10 ld [ %i0 + 0x10 ], %g2
400070c4: 80 a0 80 01 cmp %g2, %g1
400070c8: 02 80 00 0e be 40007100 <_CORE_barrier_Seize+0x58>
400070cc: 94 10 00 1b mov %i3, %o2
) {
_CORE_barrier_Surrender( the_barrier, queue_context );
return STATUS_BARRIER_AUTOMATICALLY_RELEASED;
} else {
the_barrier->number_of_waiting_threads = number_of_waiting_threads;
400070d0: c2 26 20 14 st %g1, [ %i0 + 0x14 ]
queue_context->thread_state = thread_state;
400070d4: 82 10 28 00 mov 0x800, %g1
400070d8: c2 26 e0 04 st %g1, [ %i3 + 4 ]
_Thread_queue_Context_set_thread_state(
queue_context,
STATES_WAITING_FOR_BARRIER
);
_Thread_queue_Enqueue(
400070dc: 90 10 00 18 mov %i0, %o0
400070e0: 96 10 00 1b mov %i3, %o3
400070e4: 94 10 00 19 mov %i1, %o2
400070e8: 13 10 00 45 sethi %hi(0x40011400), %o1
400070ec: 40 00 08 bf call 400093e8 <_Thread_queue_Enqueue>
400070f0: 92 12 61 64 or %o1, 0x164, %o1 ! 40011564 <_Thread_queue_Operations_FIFO>
return (Status_Control) the_thread->Wait.return_code;
400070f4: f0 06 60 4c ld [ %i1 + 0x4c ], %i0
<== NOT EXECUTED
executing,
queue_context
);
return _Thread_Wait_get_status( executing );
}
}
400070f8: 81 c7 e0 08 ret
<== NOT EXECUTED
400070fc: 81 e8 00 00 restore
40007100: 90 10 00 18 mov %i0, %o0
40007104: 13 10 00 25 sethi %hi(0x40009400), %o1
return STATUS_BARRIER_AUTOMATICALLY_RELEASED;
40007108: b0 10 3f 00 mov -256, %i0
4000710c: 7f ff ff df call 40007088 <_CORE_barrier_Do_flush>
40007110: 92 12 63 38 or %o1, 0x338, %o1
40007114: 81 c7 e0 08 ret
40007118: 81 e8 00 00 restore
40009454 <_CORE_message_queue_Broadcast>:
const void *buffer,
size_t size,
uint32_t *count,
Thread_queue_Context *queue_context
)
{
40009454: 9d e3 bf a0 save %sp, -96, %sp
Thread_Control *the_thread;
uint32_t number_broadcasted;
if ( size > the_message_queue->maximum_message_size ) {
40009458: c2 06 20 18 ld [ %i0 + 0x18 ], %g1
4000945c: 80 a0 40 1a cmp %g1, %i2
40009460: 0a 80 00 29 bcs 40009504 <_CORE_message_queue_Broadcast+0xb0>
40009464: 01 00 00 00 nop
*
* NOTE: This check is critical because threads can block on
* send and receive and this ensures that we are broadcasting
* the message to threads waiting to receive -- not to send.
*/
if ( the_message_queue->number_of_pending_messages != 0 ) {
40009468: e0 06 20 14 ld [ %i0 + 0x14 ], %l0
4000946c: 80 a4 20 00 cmp %l0, 0
40009470: 32 80 00 1f bne,a 400094ec <_CORE_message_queue_Broadcast+0x98>
40009474: a0 10 20 00 clr %l0
/*
* There must be no pending messages if there is a thread waiting to
* receive a message.
*/
the_thread = _Thread_queue_First_locked(
40009478: d0 06 00 00 ld [ %i0 ], %o0
const Thread_queue_Operations *operations
)
{
Thread_queue_Heads *heads = the_thread_queue->Queue.heads;
if ( heads != NULL ) {
4000947c: 80 a2 20 00 cmp %o0, 0
40009480: 02 80 00 1b be 400094ec <_CORE_message_queue_Broadcast+0x98>
40009484: c2 06 20 0c ld [ %i0 + 0xc ], %g1
return ( *operations->first )( heads );
40009488: c2 00 60 10 ld [ %g1 + 0x10 ], %g1
4000948c: 9f c0 40 00 call %g1
40009490: 01 00 00 00 nop
memcpy(destination, source, size);
40009494: 92 10 00 19 mov %i1, %o1
40009498: ba 10 00 08 mov %o0, %i5
&the_message_queue->Wait_queue,
the_message_queue->operations
);
if ( the_thread == NULL ) {
4000949c: 80 a2 20 00 cmp %o0, 0
400094a0: 02 80 00 13 be 400094ec <_CORE_message_queue_Broadcast+0x98>
400094a4: 94 10 00 1a mov %i2, %o2
return NULL;
}
*(size_t *) the_thread->Wait.return_argument = size;
400094a8: c2 02 20 40 ld [ %o0 + 0x40 ], %g1
400094ac: f4 20 40 00 st %i2, [ %g1 ]
0,
queue_context
)
)
) {
number_broadcasted += 1;
400094b0: a0 04 20 01 inc %l0
the_thread->Wait.count = (uint32_t) submit_type;
400094b4: c0 22 20 3c clr [ %o0 + 0x3c ]
memcpy(destination, source, size);
400094b8: 40 00 24 5f call 40012634 <memcpy>
400094bc: d0 02 20 44 ld [ %o0 + 0x44 ], %o0
buffer,
the_thread->Wait.return_argument_second.mutable_object,
size
);
_Thread_queue_Extract_critical(
400094c0: d2 06 20 0c ld [ %i0 + 0xc ], %o1
400094c4: 96 10 00 1c mov %i4, %o3
400094c8: 94 10 00 1d mov %i5, %o2
400094cc: 40 00 0b 9d call 4000c340 <_Thread_queue_Extract_critical>
400094d0: 90 10 00 18 mov %i0, %o0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400094d4: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable( &queue_context->Lock_context.Lock_context );
400094d8: c2 27 00 00 st %g1, [ %i4 ]
if ( the_message_queue->number_of_pending_messages != 0 ) {
400094dc: c2 06 20 14 ld [ %i0 + 0x14 ], %g1
400094e0: 80 a0 60 00 cmp %g1, 0
400094e4: 22 bf ff e6 be,a 4000947c <_CORE_message_queue_Broadcast+0x28>
<== ALWAYS TAKEN
400094e8: d0 06 00 00 ld [ %i0 ], %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400094ec: c2 07 00 00 ld [ %i4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400094f0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400094f4: 01 00 00 00 nop
_CORE_message_queue_Acquire( the_message_queue, queue_context );
}
_CORE_message_queue_Release( the_message_queue, queue_context );
*count = number_broadcasted;
400094f8: e0 26 c0 00 st %l0, [ %i3 ]
return STATUS_SUCCESSFUL;
}
400094fc: 81 c7 e0 08 ret
40009500: 91 e8 20 00 restore %g0, 0, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40009504: c2 07 00 00 ld [ %i4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009508: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000950c: 01 00 00 00 nop
return STATUS_MESSAGE_INVALID_SIZE;
40009510: 31 00 00 1e sethi %hi(0x7800), %i0
40009514: b0 16 22 08 or %i0, 0x208, %i0 ! 7a08 <_ISR_Stack_size+0x6a08>
40009518: 81 c7 e0 08 ret
4000951c: 81 e8 00 00 restore
40009554 <_CORE_message_queue_Flush>:
uint32_t _CORE_message_queue_Flush(
CORE_message_queue_Control *the_message_queue,
Thread_queue_Context *queue_context
)
{
40009554: 82 10 00 08 mov %o0, %g1
* fixed execution time that only deals with pending messages.
*/
_CORE_message_queue_Acquire_critical( the_message_queue, queue_context );
count = the_message_queue->number_of_pending_messages;
40009558: d0 02 20 14 ld [ %o0 + 0x14 ], %o0
if ( count != 0 ) {
4000955c: 80 a2 20 00 cmp %o0, 0
40009560: 02 80 00 0f be 4000959c <_CORE_message_queue_Flush+0x48>
40009564: 96 00 60 30 add %g1, 0x30, %o3
return _Chain_Immutable_head( the_chain )->next;
40009568: c4 00 60 1c ld [ %g1 + 0x1c ], %g2
<== NOT EXECUTED
the_message_queue->number_of_pending_messages = 0;
inactive_head = _Chain_Head( &the_message_queue->Inactive_messages );
inactive_first = inactive_head->next;
4000956c: c6 00 60 30 ld [ %g1 + 0x30 ], %g3
<== NOT EXECUTED
return _Chain_Immutable_tail( the_chain )->previous;
40009570: c8 00 60 24 ld [ %g1 + 0x24 ], %g4
<== NOT EXECUTED
the_message_queue->number_of_pending_messages = 0;
40009574: c0 20 60 14 clr [ %g1 + 0x14 ]
<== NOT EXECUTED
message_queue_first = _Chain_First( &the_message_queue->Pending_messages );
message_queue_last = _Chain_Last( &the_message_queue->Pending_messages );
inactive_head->next = message_queue_first;
40009578: c4 20 60 30 st %g2, [ %g1 + 0x30 ]
<== NOT EXECUTED
return &the_chain->Tail.Node;
4000957c: 9a 00 60 1c add %g1, 0x1c, %o5
<== NOT EXECUTED
message_queue_last->next = inactive_first;
40009580: c6 21 00 00 st %g3, [ %g4 ]
<== NOT EXECUTED
40009584: 98 00 60 20 add %g1, 0x20, %o4
<== NOT EXECUTED
inactive_first->previous = message_queue_last;
40009588: c8 20 e0 04 st %g4, [ %g3 + 4 ]
<== NOT EXECUTED
message_queue_first->previous = inactive_head;
4000958c: d6 20 a0 04 st %o3, [ %g2 + 4 ]
<== NOT EXECUTED
head->next = tail;
40009590: d8 20 60 1c st %o4, [ %g1 + 0x1c ]
<== NOT EXECUTED
head->previous = NULL;
40009594: c0 20 60 20 clr [ %g1 + 0x20 ]
<== NOT EXECUTED
tail->previous = head;
40009598: da 20 60 24 st %o5, [ %g1 + 0x24 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000959c: c2 02 40 00 ld [ %o1 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400095a0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400095a4: 01 00 00 00 nop
_Chain_Initialize_empty( &the_message_queue->Pending_messages );
}
_CORE_message_queue_Release( the_message_queue, queue_context );
return count;
}
400095a8: 81 c3 e0 08 retl
400095ac: 01 00 00 00 nop
4000fc58 <_CORE_message_queue_Seize>:
void *buffer,
size_t *size_p,
bool wait,
Thread_queue_Context *queue_context
)
{
4000fc58: 9d e3 bf a0 save %sp, -96, %sp
return _Chain_Immutable_head( the_chain )->next;
4000fc5c: e0 06 20 1c ld [ %i0 + 0x1c ], %l0
return &the_chain->Tail.Node;
4000fc60: 82 06 20 20 add %i0, 0x20, %g1
if ( !_Chain_Is_empty(the_chain))
4000fc64: 80 a4 00 01 cmp %l0, %g1
4000fc68: 02 80 00 32 be 4000fd30 <_CORE_message_queue_Seize+0xd8>
4000fc6c: 86 06 20 1c add %i0, 0x1c, %g3
new_first = old_first->next;
4000fc70: c4 04 00 00 ld [ %l0 ], %g2
head->next = new_first;
4000fc74: c4 26 20 1c st %g2, [ %i0 + 0x1c ]
const void *source,
void *destination,
size_t size
)
{
memcpy(destination, source, size);
4000fc78: 92 04 20 10 add %l0, 0x10, %o1
CORE_message_queue_Buffer_control *the_message;
the_message = _CORE_message_queue_Get_pending_message( the_message_queue );
if ( the_message != NULL ) {
the_message_queue->number_of_pending_messages -= 1;
4000fc7c: c2 06 20 14 ld [ %i0 + 0x14 ], %g1
new_first->previous = head;
4000fc80: c6 20 a0 04 st %g3, [ %g2 + 4 ]
4000fc84: 82 00 7f ff add %g1, -1, %g1
*size_p = the_message->Contents.size;
4000fc88: c4 04 20 0c ld [ %l0 + 0xc ], %g2
the_message_queue->number_of_pending_messages -= 1;
4000fc8c: c2 26 20 14 st %g1, [ %i0 + 0x14 ]
4000fc90: 90 10 00 1a mov %i2, %o0
*size_p = the_message->Contents.size;
4000fc94: c4 26 c0 00 st %g2, [ %i3 ]
executing->Wait.count =
4000fc98: c2 04 20 08 ld [ %l0 + 8 ], %g1
4000fc9c: c2 26 60 3c st %g1, [ %i1 + 0x3c ]
4000fca0: 40 00 22 ea call 40018848 <memcpy>
4000fca4: d4 06 c0 00 ld [ %i3 ], %o2
* is not, then we can go ahead and free the buffer.
*
* NOTE: If we note that the queue was not full before this receive,
* then we can avoid this dequeue.
*/
the_thread = _Thread_queue_First_locked(
4000fca8: d0 06 00 00 ld [ %i0 ], %o0
if ( heads != NULL ) {
4000fcac: 80 a2 20 00 cmp %o0, 0
4000fcb0: 02 80 00 15 be 4000fd04 <_CORE_message_queue_Seize+0xac>
4000fcb4: c2 06 20 0c ld [ %i0 + 0xc ], %g1
return ( *operations->first )( heads );
4000fcb8: c2 00 60 10 ld [ %g1 + 0x10 ], %g1
4000fcbc: 9f c0 40 00 call %g1
4000fcc0: 01 00 00 00 nop
&the_message_queue->Wait_queue,
the_message_queue->operations
);
if ( the_thread == NULL ) {
4000fcc4: b8 92 20 00 orcc %o0, 0, %i4
4000fcc8: 02 80 00 0f be 4000fd04 <_CORE_message_queue_Seize+0xac>
4000fccc: 92 10 00 10 mov %l0, %o1
/*
* There was a thread waiting to send a message. This code
* puts the messages in the message queue on behalf of the
* waiting task.
*/
_CORE_message_queue_Insert_message(
4000fcd0: d8 07 20 3c ld [ %i4 + 0x3c ], %o4
4000fcd4: d6 07 20 48 ld [ %i4 + 0x48 ], %o3
4000fcd8: d4 07 20 44 ld [ %i4 + 0x44 ], %o2
4000fcdc: 40 00 1a fd call 400168d0 <_CORE_message_queue_Insert_message>
4000fce0: 90 10 00 18 mov %i0, %o0
the_message,
the_thread->Wait.return_argument_second.immutable_object,
(size_t) the_thread->Wait.option,
(CORE_message_queue_Submit_types) the_thread->Wait.count
);
_Thread_queue_Extract_critical(
4000fce4: d2 06 20 0c ld [ %i0 + 0xc ], %o1
4000fce8: 90 10 00 18 mov %i0, %o0
4000fcec: 96 10 00 1d mov %i5, %o3
4000fcf0: 94 10 00 1c mov %i4, %o2
4000fcf4: 40 00 0b 8a call 40012b1c <_Thread_queue_Extract_critical>
4000fcf8: b0 10 20 00 clr %i0
&the_message_queue->Wait_queue.Queue,
the_message_queue->operations,
the_thread,
queue_context
);
return STATUS_SUCCESSFUL;
4000fcfc: 81 c7 e0 08 ret
4000fd00: 81 e8 00 00 restore
old_last = tail->previous;
4000fd04: c2 06 20 38 ld [ %i0 + 0x38 ], %g1
<== NOT EXECUTED
return &the_chain->Tail.Node;
4000fd08: 84 06 20 34 add %i0, 0x34, %g2
<== NOT EXECUTED
the_node->next = tail;
4000fd0c: c4 24 00 00 st %g2, [ %l0 ]
<== NOT EXECUTED
tail->previous = the_node;
4000fd10: e0 26 20 38 st %l0, [ %i0 + 0x38 ]
<== NOT EXECUTED
old_last->next = the_node;
4000fd14: e0 20 40 00 st %l0, [ %g1 ]
<== NOT EXECUTED
the_node->previous = old_last;
4000fd18: c2 24 20 04 st %g1, [ %l0 + 4 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000fd1c: c2 07 40 00 ld [ %i5 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000fd20: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000fd24: 01 00 00 00 nop
return STATUS_SUCCESSFUL;
4000fd28: 81 c7 e0 08 ret
4000fd2c: 91 e8 20 00 restore %g0, 0, %o0
}
#endif
}
if ( !wait ) {
4000fd30: 80 a7 20 00 cmp %i4, 0
4000fd34: 32 80 00 07 bne,a 4000fd50 <_CORE_message_queue_Seize+0xf8>
4000fd38: f4 26 60 44 st %i2, [ %i1 + 0x44 ]
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000fd3c: c2 07 40 00 ld [ %i5 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000fd40: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000fd44: 01 00 00 00 nop
_CORE_message_queue_Release( the_message_queue, queue_context );
return STATUS_UNSATISFIED;
4000fd48: 81 c7 e0 08 ret
4000fd4c: 91 e8 2b 0d restore %g0, 0xb0d, %o0
queue_context->thread_state = thread_state;
4000fd50: 82 10 20 10 mov 0x10, %g1
}
executing->Wait.return_argument_second.mutable_object = buffer;
executing->Wait.return_argument = size_p;
4000fd54: f6 26 60 40 st %i3, [ %i1 + 0x40 ]
_Thread_queue_Context_set_thread_state(
queue_context,
STATES_WAITING_FOR_MESSAGE
);
_Thread_queue_Enqueue(
4000fd58: 90 10 00 18 mov %i0, %o0
4000fd5c: c2 27 60 04 st %g1, [ %i5 + 4 ]
4000fd60: 96 10 00 1d mov %i5, %o3
4000fd64: d2 06 20 0c ld [ %i0 + 0xc ], %o1
4000fd68: 40 00 0a f7 call 40012944 <_Thread_queue_Enqueue>
4000fd6c: 94 10 00 19 mov %i1, %o2
return (Status_Control) the_thread->Wait.return_code;
4000fd70: f0 06 60 4c ld [ %i1 + 0x4c ], %i0
the_message_queue->operations,
executing,
queue_context
);
return _Thread_Wait_get_status( executing );
}
4000fd74: 81 c7 e0 08 ret
4000fd78: 81 e8 00 00 restore
4000fd7c <_CORE_message_queue_Submit>:
size_t size,
CORE_message_queue_Submit_types submit_type,
bool wait,
Thread_queue_Context *queue_context
)
{
4000fd7c: 9d e3 bf a0 save %sp, -96, %sp
CORE_message_queue_Buffer_control *the_message;
Thread_Control *the_thread;
if ( size > the_message_queue->maximum_message_size ) {
4000fd80: c2 06 20 18 ld [ %i0 + 0x18 ], %g1
4000fd84: 80 a0 40 1b cmp %g1, %i3
4000fd88: 0a 80 00 1e bcs 4000fe00 <_CORE_message_queue_Submit+0x84>
4000fd8c: 01 00 00 00 nop
*
* NOTE: This check is critical because threads can block on
* send and receive and this ensures that we are broadcasting
* the message to threads waiting to receive -- not to send.
*/
if ( the_message_queue->number_of_pending_messages != 0 ) {
4000fd90: c2 06 20 14 ld [ %i0 + 0x14 ], %g1
4000fd94: 80 a0 60 00 cmp %g1, 0
4000fd98: 32 80 00 23 bne,a 4000fe24 <_CORE_message_queue_Submit+0xa8>
4000fd9c: d2 06 20 30 ld [ %i0 + 0x30 ], %o1
/*
* There must be no pending messages if there is a thread waiting to
* receive a message.
*/
the_thread = _Thread_queue_First_locked(
4000fda0: d0 06 00 00 ld [ %i0 ], %o0
if ( heads != NULL ) {
4000fda4: 80 a2 20 00 cmp %o0, 0
4000fda8: 02 80 00 1e be 4000fe20 <_CORE_message_queue_Submit+0xa4>
4000fdac: c2 06 20 0c ld [ %i0 + 0xc ], %g1
return ( *operations->first )( heads );
4000fdb0: c2 00 60 10 ld [ %g1 + 0x10 ], %g1
4000fdb4: 9f c0 40 00 call %g1
4000fdb8: 01 00 00 00 nop
&the_message_queue->Wait_queue,
the_message_queue->operations
);
if ( the_thread == NULL ) {
4000fdbc: a0 92 20 00 orcc %o0, 0, %l0
4000fdc0: 02 80 00 18 be 4000fe20 <_CORE_message_queue_Submit+0xa4>
4000fdc4: 92 10 00 1a mov %i2, %o1
return NULL;
}
*(size_t *) the_thread->Wait.return_argument = size;
4000fdc8: c2 04 20 40 ld [ %l0 + 0x40 ], %g1
4000fdcc: f6 20 40 00 st %i3, [ %g1 ]
the_thread->Wait.count = (uint32_t) submit_type;
4000fdd0: f8 24 20 3c st %i4, [ %l0 + 0x3c ]
memcpy(destination, source, size);
4000fdd4: 94 10 00 1b mov %i3, %o2
4000fdd8: 40 00 22 9c call 40018848 <memcpy>
4000fddc: d0 04 20 44 ld [ %l0 + 0x44 ], %o0
buffer,
the_thread->Wait.return_argument_second.mutable_object,
size
);
_Thread_queue_Extract_critical(
4000fde0: d2 06 20 0c ld [ %i0 + 0xc ], %o1
4000fde4: d6 07 a0 5c ld [ %fp + 0x5c ], %o3
4000fde8: 90 10 00 18 mov %i0, %o0
4000fdec: 94 10 00 10 mov %l0, %o2
4000fdf0: 40 00 0b 4b call 40012b1c <_Thread_queue_Extract_critical>
4000fdf4: b0 10 20 00 clr %i0
4000fdf8: 81 c7 e0 08 ret
4000fdfc: 81 e8 00 00 restore
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000fe00: c2 07 a0 5c ld [ %fp + 0x5c ], %g1
<== NOT EXECUTED
4000fe04: c2 00 40 00 ld [ %g1 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000fe08: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000fe0c: 01 00 00 00 nop
_CORE_message_queue_Release( the_message_queue, queue_context );
return STATUS_MESSAGE_INVALID_SIZE;
4000fe10: 31 00 00 1e sethi %hi(0x7800), %i0
4000fe14: b0 16 22 08 or %i0, 0x208, %i0 ! 7a08 <_ISR_Stack_size+0x6a08>
4000fe18: 81 c7 e0 08 ret
4000fe1c: 81 e8 00 00 restore
return _Chain_Immutable_head( the_chain )->next;
4000fe20: d2 06 20 30 ld [ %i0 + 0x30 ], %o1
return &the_chain->Tail.Node;
4000fe24: 82 06 20 34 add %i0, 0x34, %g1
if ( !_Chain_Is_empty(the_chain))
4000fe28: 80 a2 40 01 cmp %o1, %g1
4000fe2c: 02 80 00 14 be 4000fe7c <_CORE_message_queue_Submit+0x100>
4000fe30: 84 06 20 30 add %i0, 0x30, %g2
new_first = old_first->next;
4000fe34: c2 02 40 00 ld [ %o1 ], %g1
head->next = new_first;
4000fe38: c2 26 20 30 st %g1, [ %i0 + 0x30 ]
* queue the message up for a future receive.
*/
the_message =
_CORE_message_queue_Allocate_message_buffer( the_message_queue );
if ( the_message ) {
_CORE_message_queue_Insert_message(
4000fe3c: 98 10 00 1c mov %i4, %o4
new_first->previous = head;
4000fe40: c4 20 60 04 st %g2, [ %g1 + 4 ]
4000fe44: 96 10 00 1b mov %i3, %o3
4000fe48: 94 10 00 1a mov %i2, %o2
4000fe4c: 40 00 1a a1 call 400168d0 <_CORE_message_queue_Insert_message>
4000fe50: 90 10 00 18 mov %i0, %o0
/*
* According to POSIX, does this happen before or after the message
* is actually enqueued. It is logical to think afterwards, because
* the message is actually in the queue at this point.
*/
if (
4000fe54: c2 06 20 14 ld [ %i0 + 0x14 ], %g1
4000fe58: 80 a0 60 01 cmp %g1, 1
4000fe5c: 22 80 00 1c be,a 4000fecc <_CORE_message_queue_Submit+0x150>
4000fe60: c2 06 20 2c ld [ %i0 + 0x2c ], %g1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000fe64: c2 07 a0 5c ld [ %fp + 0x5c ], %g1
<== NOT EXECUTED
4000fe68: c2 00 40 00 ld [ %g1 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000fe6c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000fe70: 01 00 00 00 nop
}
#else
_CORE_message_queue_Release( the_message_queue, queue_context );
#endif
return STATUS_SUCCESSFUL;
4000fe74: 81 c7 e0 08 ret
4000fe78: 91 e8 20 00 restore %g0, 0, %o0
/*
* No message buffers were available so we may need to return an
* overflow error or block the sender until the message is placed
* on the queue.
*/
if ( !wait ) {
4000fe7c: 80 a7 60 00 cmp %i5, 0
4000fe80: 02 80 00 0d be 4000feb4 <_CORE_message_queue_Submit+0x138>
4000fe84: 01 00 00 00 nop
/*
* Do NOT block on a send if the caller is in an ISR. It is
* deadly to block in an ISR.
*/
if ( _ISR_Is_in_progress() ) {
4000fe88: 40 00 13 57 call 40014be4 <_ISR_Is_in_progress>
4000fe8c: 01 00 00 00 nop
4000fe90: 80 a2 20 00 cmp %o0, 0
4000fe94: 22 80 00 16 be,a 4000feec <_CORE_message_queue_Submit+0x170>
4000fe98: f4 26 60 44 st %i2, [ %i1 + 0x44 ]
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000fe9c: c2 07 a0 5c ld [ %fp + 0x5c ], %g1
<== NOT EXECUTED
4000fea0: c2 00 40 00 ld [ %g1 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000fea4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000fea8: 01 00 00 00 nop
_CORE_message_queue_Release( the_message_queue, queue_context );
return STATUS_MESSAGE_QUEUE_WAIT_IN_ISR;
4000feac: 81 c7 e0 08 ret
4000feb0: 91 e8 2b 0d restore %g0, 0xb0d, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000feb4: c2 07 a0 5c ld [ %fp + 0x5c ], %g1
<== NOT EXECUTED
4000feb8: c2 00 40 00 ld [ %g1 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000febc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000fec0: 01 00 00 00 nop
return STATUS_TOO_MANY;
4000fec4: 81 c7 e0 08 ret
4000fec8: 91 e8 2b 05 restore %g0, 0xb05, %o0
&& the_message_queue->notify_handler != NULL
4000fecc: 80 a0 60 00 cmp %g1, 0
4000fed0: 02 bf ff e5 be 4000fe64 <_CORE_message_queue_Submit+0xe8>
4000fed4: d2 07 a0 5c ld [ %fp + 0x5c ], %o1
( *the_message_queue->notify_handler )(
4000fed8: 90 10 00 18 mov %i0, %o0
4000fedc: 9f c0 40 00 call %g1
4000fee0: b0 10 20 00 clr %i0
4000fee4: 81 c7 e0 08 ret
4000fee8: 81 e8 00 00 restore
queue_context->thread_state = thread_state;
4000feec: 82 10 20 10 mov 0x10, %g1
* Thus the unusual choice to open a new scope and declare
* it as a variable. Doing this emphasizes how dangerous it
* would be to use this variable prior to here.
*/
executing->Wait.return_argument_second.immutable_object = buffer;
executing->Wait.option = (uint32_t) size;
4000fef0: f6 26 60 48 st %i3, [ %i1 + 0x48 ]
_Thread_queue_Context_set_thread_state(
queue_context,
STATES_WAITING_FOR_MESSAGE
);
_Thread_queue_Enqueue(
4000fef4: 90 10 00 18 mov %i0, %o0
4000fef8: d6 07 a0 5c ld [ %fp + 0x5c ], %o3
executing->Wait.count = submit_type;
4000fefc: f8 26 60 3c st %i4, [ %i1 + 0x3c ]
_Thread_queue_Enqueue(
4000ff00: 94 10 00 19 mov %i1, %o2
4000ff04: c2 22 e0 04 st %g1, [ %o3 + 4 ]
4000ff08: 40 00 0a 8f call 40012944 <_Thread_queue_Enqueue>
4000ff0c: d2 06 20 0c ld [ %i0 + 0xc ], %o1
4000ff10: f0 06 60 4c ld [ %i1 + 0x4c ], %i0
executing,
queue_context
);
return _Thread_Wait_get_status( executing );
#endif
}
4000ff14: 81 c7 e0 08 ret
4000ff18: 81 e8 00 00 restore
4000c000 <_CORE_mutex_Seize_slow>:
const Thread_queue_Operations *operations,
Thread_Control *executing,
bool wait,
Thread_queue_Context *queue_context
)
{
4000c000: 9d e3 bf a0 save %sp, -96, %sp
if ( wait ) {
4000c004: 80 a6 e0 00 cmp %i3, 0
4000c008: 02 80 00 0e be 4000c040 <_CORE_mutex_Seize_slow+0x40>
4000c00c: 82 10 20 01 mov 1, %g1
queue_context->thread_state = thread_state;
4000c010: c2 27 20 04 st %g1, [ %i4 + 4 ]
queue_context->deadlock_callout = deadlock_callout;
4000c014: 03 10 00 3a sethi %hi(0x4000e800), %g1
4000c018: 82 10 61 5c or %g1, 0x15c, %g1 ! 4000e95c <_Thread_queue_Deadlock_status>
4000c01c: c2 27 20 20 st %g1, [ %i4 + 0x20 ]
);
_Thread_queue_Context_set_deadlock_callout(
queue_context,
_Thread_queue_Deadlock_status
);
_Thread_queue_Enqueue(
4000c020: 90 10 00 18 mov %i0, %o0
4000c024: 96 10 00 1c mov %i4, %o3
4000c028: 94 10 00 1a mov %i2, %o2
4000c02c: 40 00 0a 54 call 4000e97c <_Thread_queue_Enqueue>
4000c030: 92 10 00 19 mov %i1, %o1
return (Status_Control) the_thread->Wait.return_code;
4000c034: f0 06 a0 4c ld [ %i2 + 0x4c ], %i0
&the_mutex->Wait_queue.Queue,
operations,
executing,
queue_context
);
return _Thread_Wait_get_status( executing );
4000c038: 81 c7 e0 08 ret
4000c03c: 81 e8 00 00 restore
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000c040: c2 07 00 00 ld [ %i4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000c044: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000c048: 01 00 00 00 nop
} else {
_CORE_mutex_Release( the_mutex, queue_context );
return STATUS_UNAVAILABLE;
4000c04c: 31 00 00 04 sethi %hi(0x1000), %i0
4000c050: b0 16 20 0d or %i0, 0xd, %i0 ! 100d <_ISR_Stack_size+0xd>
}
}
4000c054: 81 c7 e0 08 ret
4000c058: 81 e8 00 00 restore
40009848 <_Chain_Initialize>:
Chain_Node *current = head;
Chain_Node *next = starting_address;
_Assert( node_size >= sizeof( *next ) );
head->previous = NULL;
40009848: c0 22 20 04 clr [ %o0 + 4 ]
return &the_chain->Head.Node;
4000984c: 84 10 00 08 mov %o0, %g2
return &the_chain->Tail.Node;
40009850: 9a 02 20 04 add %o0, 4, %o5
while ( count-- ) {
40009854: 80 a2 a0 00 cmp %o2, 0
40009858: 02 80 00 0d be 4000988c <_Chain_Initialize+0x44>
<== NEVER TAKEN
4000985c: 88 02 bf ff add %o2, -1, %g4
40009860: 86 10 00 04 mov %g4, %g3
Chain_Node *next = starting_address;
40009864: 82 10 00 09 mov %o1, %g1
current->next = next;
40009868: c2 20 80 00 st %g1, [ %g2 ]
while ( count-- ) {
4000986c: 86 00 ff ff add %g3, -1, %g3
next->previous = current;
40009870: c4 20 60 04 st %g2, [ %g1 + 4 ]
while ( count-- ) {
40009874: 80 a0 ff ff cmp %g3, -1
40009878: 84 10 00 01 mov %g1, %g2
4000987c: 12 bf ff fb bne 40009868 <_Chain_Initialize+0x20>
40009880: 82 00 40 0b add %g1, %o3, %g1
40009884: 96 5a c0 04 smul %o3, %g4, %o3
40009888: 84 02 40 0b add %o1, %o3, %g2
current = next;
next = (Chain_Node *)
_Addresses_Add_offset( (void *) next, node_size );
}
current->next = tail;
4000988c: da 20 80 00 st %o5, [ %g2 ]
tail->previous = current;
}
40009890: 81 c3 e0 08 retl
40009894: c4 22 20 08 st %g2, [ %o0 + 8 ]
4000da8c <_Condition_Wait>:
{
4000da8c: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
queue_context->enqueue_callout = enqueue_callout;
4000da90: 03 10 00 36 sethi %hi(0x4000d800), %g1
<== NOT EXECUTED
context->mutex = _mutex;
4000da94: f2 27 bf fc st %i1, [ %fp + -4 ]
<== NOT EXECUTED
4000da98: 82 10 62 28 or %g1, 0x228, %g1
<== NOT EXECUTED
4000da9c: c2 27 bf e0 st %g1, [ %fp + -32 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000daa0: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable( &context->Base.Lock_context.Lock_context );
4000daa4: c2 27 bf d8 st %g1, [ %fp + -40 ]
queue_context->thread_state = thread_state;
4000daa8: 82 10 20 20 mov 0x20, %g1
_Thread_queue_Enqueue(
4000daac: d4 01 a0 20 ld [ %g6 + 0x20 ], %o2
4000dab0: 90 06 20 08 add %i0, 8, %o0
4000dab4: 96 07 bf d8 add %fp, -40, %o3
4000dab8: c2 27 bf dc st %g1, [ %fp + -36 ]
4000dabc: 13 10 00 5d sethi %hi(0x40017400), %o1
4000dac0: 7f ff ea c1 call 400085c4 <_Thread_queue_Enqueue>
4000dac4: 92 12 62 54 or %o1, 0x254, %o1 ! 40017654 <_Thread_queue_Operations_FIFO>
_Mutex_Acquire( _mutex );
4000dac8: 7f ff f3 22 call 4000a750 <_Mutex_Acquire>
4000dacc: 90 10 00 19 mov %i1, %o0
}
4000dad0: 81 c7 e0 08 ret
<== NOT EXECUTED
4000dad4: 81 e8 00 00 restore
4005f57c <_Condition_Wait_recursive>:
{
4005f57c: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
queue_context->enqueue_callout = enqueue_callout;
4005f580: 03 10 01 7d sethi %hi(0x4005f400), %g1
<== NOT EXECUTED
nest_level = _mutex->_nest_level;
4005f584: fa 06 60 14 ld [ %i1 + 0x14 ], %i5
<== NOT EXECUTED
4005f588: 82 10 60 cc or %g1, 0xcc, %g1
<== NOT EXECUTED
_mutex->_nest_level = 0;
4005f58c: c0 26 60 14 clr [ %i1 + 0x14 ]
<== NOT EXECUTED
4005f590: c2 27 bf e0 st %g1, [ %fp + -32 ]
<== NOT EXECUTED
context->mutex = _mutex;
4005f594: f2 27 bf fc st %i1, [ %fp + -4 ]
<== NOT EXECUTED
4005f598: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable( &context->Base.Lock_context.Lock_context );
4005f59c: c2 27 bf d8 st %g1, [ %fp + -40 ]
queue_context->thread_state = thread_state;
4005f5a0: 82 10 20 20 mov 0x20, %g1
_Thread_queue_Enqueue(
4005f5a4: d4 01 a0 20 ld [ %g6 + 0x20 ], %o2
4005f5a8: 96 07 bf d8 add %fp, -40, %o3
4005f5ac: 90 06 20 08 add %i0, 8, %o0
4005f5b0: c2 27 bf dc st %g1, [ %fp + -36 ]
4005f5b4: 13 10 02 30 sethi %hi(0x4008c000), %o1
4005f5b8: 7f fe 9f 75 call 4000738c <_Thread_queue_Enqueue>
4005f5bc: 92 12 62 cc or %o1, 0x2cc, %o1 ! 4008c2cc <_Thread_queue_Operations_FIFO>
_Mutex_recursive_Acquire( _mutex );
4005f5c0: 7f fe a8 01 call 400095c4 <_Mutex_recursive_Acquire>
4005f5c4: 90 10 00 19 mov %i1, %o0
_mutex->_nest_level = nest_level;
4005f5c8: fa 26 60 14 st %i5, [ %i1 + 0x14 ]
<== NOT EXECUTED
}
4005f5cc: 81 c7 e0 08 ret
<== NOT EXECUTED
4005f5d0: 81 e8 00 00 restore
4000d630 <_Condition_Wait_recursive_timed>:
{
4000d630: 9d e3 bf 78 save %sp, -136, %sp
queue_context->enqueue_callout = enqueue_callout;
4000d634: 03 10 00 35 sethi %hi(0x4000d400), %g1
<== NOT EXECUTED
nest_level = _mutex->_nest_level;
4000d638: f8 06 60 14 ld [ %i1 + 0x14 ], %i4
<== NOT EXECUTED
4000d63c: 82 10 61 14 or %g1, 0x114, %g1
<== NOT EXECUTED
queue_context->Timeout.arg = arg;
4000d640: f4 27 bf e4 st %i2, [ %fp + -28 ]
<== NOT EXECUTED
queue_context->enqueue_callout = enqueue_callout;
4000d644: c2 27 bf e0 st %g1, [ %fp + -32 ]
<== NOT EXECUTED
_mutex->_nest_level = 0;
4000d648: c0 26 60 14 clr [ %i1 + 0x14 ]
<== NOT EXECUTED
context->mutex = _mutex;
4000d64c: f2 27 bf fc st %i1, [ %fp + -4 ]
<== NOT EXECUTED
4000d650: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable( &context->Base.Lock_context.Lock_context );
4000d654: c2 27 bf d8 st %g1, [ %fp + -40 ]
queue_context->thread_state = thread_state;
4000d658: 82 10 20 20 mov 0x20, %g1
executing = _Thread_Executing;
4000d65c: fa 01 a0 20 ld [ %g6 + 0x20 ], %i5
_Thread_queue_Enqueue(
4000d660: 96 07 bf d8 add %fp, -40, %o3
4000d664: 94 10 00 1d mov %i5, %o2
4000d668: 90 06 20 08 add %i0, 8, %o0
4000d66c: c2 27 bf dc st %g1, [ %fp + -36 ]
4000d670: 13 10 00 49 sethi %hi(0x40012400), %o1
4000d674: 7f ff f6 78 call 4000b054 <_Thread_queue_Enqueue>
4000d678: 92 12 60 4c or %o1, 0x4c, %o1 ! 4001244c <_Thread_queue_Operations_FIFO>
eno = STATUS_GET_POSIX( _Thread_Wait_get_status( executing ) );
4000d67c: c2 07 60 4c ld [ %i5 + 0x4c ], %g1
4000d680: b1 38 60 1f sra %g1, 0x1f, %i0
_Mutex_recursive_Acquire( _mutex );
4000d684: 90 10 00 19 mov %i1, %o0
eno = STATUS_GET_POSIX( _Thread_Wait_get_status( executing ) );
4000d688: b0 0e 20 ff and %i0, 0xff, %i0
_Mutex_recursive_Acquire( _mutex );
4000d68c: 40 00 00 47 call 4000d7a8 <_Mutex_recursive_Acquire>
4000d690: b0 06 00 01 add %i0, %g1, %i0
eno = STATUS_GET_POSIX( _Thread_Wait_get_status( executing ) );
4000d694: b1 3e 20 08 sra %i0, 8, %i0
_mutex->_nest_level = nest_level;
4000d698: f8 26 60 14 st %i4, [ %i1 + 0x14 ]
}
4000d69c: 81 c7 e0 08 ret
4000d6a0: 81 e8 00 00 restore
4000bf3c <_Condition_Wait_timed>:
{
4000bf3c: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
queue_context->enqueue_callout = enqueue_callout;
4000bf40: 03 10 00 2f sethi %hi(0x4000bc00), %g1
<== NOT EXECUTED
queue_context->Timeout.arg = arg;
4000bf44: f4 27 bf e4 st %i2, [ %fp + -28 ]
<== NOT EXECUTED
queue_context->enqueue_callout = enqueue_callout;
4000bf48: 82 10 62 78 or %g1, 0x278, %g1
<== NOT EXECUTED
context->mutex = _mutex;
4000bf4c: f2 27 bf fc st %i1, [ %fp + -4 ]
<== NOT EXECUTED
4000bf50: c2 27 bf e0 st %g1, [ %fp + -32 ]
<== NOT EXECUTED
4000bf54: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable( &context->Base.Lock_context.Lock_context );
4000bf58: c2 27 bf d8 st %g1, [ %fp + -40 ]
queue_context->thread_state = thread_state;
4000bf5c: 82 10 20 20 mov 0x20, %g1
executing = _Thread_Executing;
4000bf60: fa 01 a0 20 ld [ %g6 + 0x20 ], %i5
_Thread_queue_Enqueue(
4000bf64: 90 06 20 08 add %i0, 8, %o0
4000bf68: c2 27 bf dc st %g1, [ %fp + -36 ]
4000bf6c: 96 07 bf d8 add %fp, -40, %o3
4000bf70: 94 10 00 1d mov %i5, %o2
4000bf74: 13 10 00 47 sethi %hi(0x40011c00), %o1
4000bf78: 7f ff f7 22 call 40009c00 <_Thread_queue_Enqueue>
4000bf7c: 92 12 62 4c or %o1, 0x24c, %o1 ! 40011e4c <_Thread_queue_Operations_FIFO>
eno = STATUS_GET_POSIX( _Thread_Wait_get_status( executing ) );
4000bf80: c2 07 60 4c ld [ %i5 + 0x4c ], %g1
4000bf84: b1 38 60 1f sra %g1, 0x1f, %i0
_Mutex_Acquire( _mutex );
4000bf88: 90 10 00 19 mov %i1, %o0
eno = STATUS_GET_POSIX( _Thread_Wait_get_status( executing ) );
4000bf8c: b0 0e 20 ff and %i0, 0xff, %i0
4000bf90: b0 06 00 01 add %i0, %g1, %i0
_Mutex_Acquire( _mutex );
4000bf94: 40 00 00 7e call 4000c18c <_Mutex_Acquire>
4000bf98: b1 3e 20 08 sra %i0, 8, %i0
}
4000bf9c: 81 c7 e0 08 ret
4000bfa0: 81 e8 00 00 restore
40005570 <_Freechain_Get>:
Freechain_Control *freechain,
Freechain_Allocator allocator,
size_t number_nodes_to_extend,
size_t node_size
)
{
40005570: 9d e3 bf a0 save %sp, -96, %sp
40005574: ba 10 00 18 mov %i0, %i5
return _Chain_Immutable_head( the_chain )->next;
40005578: f0 06 00 00 ld [ %i0 ], %i0
return &the_chain->Tail.Node;
4000557c: b8 07 60 04 add %i5, 4, %i4
void *starting_address;
starting_address = ( *allocator )( number_nodes_to_extend * node_size );
40005580: 80 a6 00 1c cmp %i0, %i4
40005584: 12 80 00 04 bne 40005594 <_Freechain_Get+0x24>
40005588: 80 a6 a0 00 cmp %i2, 0
4000558c: 12 80 00 0a bne 400055b4 <_Freechain_Get+0x44>
<== NOT EXECUTED
40005590: 01 00 00 00 nop
<== NOT EXECUTED
if ( !_Chain_Is_empty(the_chain))
40005594: 80 a7 00 18 cmp %i4, %i0
40005598: 02 80 00 12 be 400055e0 <_Freechain_Get+0x70>
4000559c: 01 00 00 00 nop
new_first = old_first->next;
400055a0: c2 06 00 00 ld [ %i0 ], %g1
head->next = new_first;
400055a4: c2 27 40 00 st %g1, [ %i5 ]
new_first->previous = head;
400055a8: fa 20 60 04 st %i5, [ %g1 + 4 ]
400055ac: 81 c7 e0 08 ret
400055b0: 81 e8 00 00 restore
number_nodes_to_extend *= ( starting_address != NULL );
_Chain_Initialize(
400055b4: 9f c6 40 00 call %i1
<== NOT EXECUTED
400055b8: 90 5e 80 1b smul %i2, %i3, %o0
<== NOT EXECUTED
&freechain->Free,
400055bc: 80 a0 00 08 cmp %g0, %o0
<== NOT EXECUTED
_Chain_Initialize(
400055c0: 92 10 00 08 mov %o0, %o1
<== NOT EXECUTED
&freechain->Free,
400055c4: 94 40 20 00 addx %g0, 0, %o2
<== NOT EXECUTED
starting_address,
number_nodes_to_extend,
400055c8: 96 10 00 1b mov %i3, %o3
<== NOT EXECUTED
400055cc: 94 5a 80 1a smul %o2, %i2, %o2
<== NOT EXECUTED
400055d0: 40 00 08 0f call 4000760c <_Chain_Initialize>
<== NOT EXECUTED
400055d4: 90 10 00 1d mov %i5, %o0
<== NOT EXECUTED
400055d8: 10 bf ff ef b 40005594 <_Freechain_Get+0x24>
<== NOT EXECUTED
400055dc: f0 07 40 00 ld [ %i5 ], %i0
<== NOT EXECUTED
return starting_address;
}
void *_Freechain_Get(
Freechain_Control *freechain,
Freechain_Allocator allocator,
400055e0: 81 c7 e0 08 ret
<== NOT EXECUTED
400055e4: 91 e8 20 00 restore %g0, 0, %o0
<== NOT EXECUTED
4000c0d8 <_Futex_Wait>:
{
4000c0d8: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
4000c0dc: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000c0e0: 86 10 00 01 mov %g1, %g3
if ( *uaddr == val ) {
4000c0e4: c4 06 40 00 ld [ %i1 ], %g2
4000c0e8: 80 a0 80 1a cmp %g2, %i2
4000c0ec: 22 80 00 06 be,a 4000c104 <_Futex_Wait+0x2c>
4000c0f0: 82 10 20 40 mov 0x40, %g1
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000c0f4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000c0f8: 01 00 00 00 nop
}
4000c0fc: 81 c7 e0 08 ret
4000c100: 91 e8 20 0b restore %g0, 0xb, %o0
executing = _Thread_Executing;
4000c104: d4 01 a0 20 ld [ %g6 + 0x20 ], %o2
4000c108: c2 27 bf e0 st %g1, [ %fp + -32 ]
queue_context->enqueue_callout = _Thread_queue_Enqueue_do_nothing_extra;
4000c10c: 03 10 00 26 sethi %hi(0x40009800), %g1
4000c110: 82 10 63 e8 or %g1, 0x3e8, %g1 ! 40009be8 <_Thread_queue_Enqueue_do_nothing_extra>
_Thread_queue_Enqueue(
4000c114: 90 06 20 08 add %i0, 8, %o0
)
{
#if defined( RTEMS_SMP )
context->Lock_context.isr_level = level;
#else
context->isr_level = level;
4000c118: c6 27 bf dc st %g3, [ %fp + -36 ]
4000c11c: 96 07 bf dc add %fp, -36, %o3
4000c120: c2 27 bf e4 st %g1, [ %fp + -28 ]
4000c124: 13 10 00 47 sethi %hi(0x40011c00), %o1
eno = 0;
4000c128: b0 10 20 00 clr %i0
_Thread_queue_Enqueue(
4000c12c: 7f ff f6 b5 call 40009c00 <_Thread_queue_Enqueue>
4000c130: 92 12 62 4c or %o1, 0x24c, %o1
4000c134: 81 c7 e0 08 ret
<== NOT EXECUTED
4000c138: 81 e8 00 00 restore
4000c13c <_Futex_Wake>:
int _Futex_Wake( struct _Futex_Control *_futex, int count )
{
4000c13c: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000c140: 91 d0 20 09 ta 9
<== NOT EXECUTED
/*
* For some synchronization objects like barriers the _Futex_Wake() must be
* called in the fast path. Normally there are no threads on the queue, so
* check this condition early.
*/
if ( RTEMS_PREDICT_TRUE( _Thread_queue_Is_empty( &futex->Queue.Queue ) ) ) {
4000c144: c4 06 20 08 ld [ %i0 + 8 ], %g2
4000c148: 80 a0 a0 00 cmp %g2, 0
4000c14c: 32 80 00 06 bne,a 4000c164 <_Futex_Wake+0x28>
4000c150: f2 27 bf fc st %i1, [ %fp + -4 ]
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000c154: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000c158: 01 00 00 00 nop
_Futex_Queue_release( futex, level, &context.Base );
return 0;
4000c15c: 81 c7 e0 08 ret
4000c160: 91 e8 20 00 restore %g0, 0, %o0
}
context.count = count;
_Thread_queue_Context_set_ISR_level( &context.Base, level );
return (int) _Thread_queue_Flush_critical(
4000c164: 96 07 bf d8 add %fp, -40, %o3
4000c168: c2 27 bf d8 st %g1, [ %fp + -40 ]
4000c16c: 90 06 20 08 add %i0, 8, %o0
4000c170: 15 10 00 30 sethi %hi(0x4000c000), %o2
4000c174: 13 10 00 47 sethi %hi(0x40011c00), %o1
4000c178: 94 12 a0 b8 or %o2, 0xb8, %o2
4000c17c: 7f ff f7 8f call 40009fb8 <_Thread_queue_Flush_critical>
4000c180: 92 12 62 4c or %o1, 0x24c, %o1
&futex->Queue.Queue,
FUTEX_TQ_OPERATIONS,
_Futex_Flush_filter,
&context.Base
);
}
4000c184: 81 c7 e0 08 ret
<== NOT EXECUTED
4000c188: 91 e8 00 08 restore %g0, %o0, %o0
40006cdc <_Heap_Allocate_aligned_with_boundary>:
Heap_Control *heap,
uintptr_t alloc_size,
uintptr_t alignment,
uintptr_t boundary
)
{
40006cdc: 9d e3 bf a0 save %sp, -96, %sp
40006ce0: 88 06 60 04 add %i1, 4, %g4
Heap_Block *block = NULL;
uintptr_t alloc_begin = 0;
uint32_t search_count = 0;
bool search_again = false;
if ( block_size_floor < alloc_size ) {
40006ce4: 80 a6 7f fc cmp %i1, -4
40006ce8: 1a 80 00 8a bcc 40006f10 <_Heap_Allocate_aligned_with_boundary+0x234>
40006cec: da 06 20 10 ld [ %i0 + 0x10 ], %o5
/* Integer overflow occured */
return NULL;
}
if ( boundary != 0 ) {
40006cf0: 80 a6 e0 00 cmp %i3, 0
40006cf4: 12 80 00 81 bne 40006ef8 <_Heap_Allocate_aligned_with_boundary+0x21c>
40006cf8: 80 a6 40 1b cmp %i1, %i3
return _Heap_Free_list_head(heap)->next;
40006cfc: d2 06 20 08 ld [ %i0 + 8 ], %o1
do {
Heap_Block *const free_list_tail = _Heap_Free_list_tail( heap );
block = _Heap_Free_list_first( heap );
while ( block != free_list_tail ) {
40006d00: 80 a6 00 09 cmp %i0, %o1
40006d04: 02 80 00 78 be 40006ee4 <_Heap_Allocate_aligned_with_boundary+0x208>
<== NEVER TAKEN
40006d08: ba 10 20 00 clr %i5
uintptr_t alloc_begin = alloc_end - alloc_size;
40006d0c: 9e 10 20 04 mov 4, %o7
uintptr_t const alloc_begin_ceiling = block_end - min_block_size
40006d10: 96 03 60 07 add %o5, 7, %o3
uintptr_t alloc_begin = alloc_end - alloc_size;
40006d14: 9e 23 c0 19 sub %o7, %i1, %o7
uintptr_t const free_size = alloc_block_begin - block_begin;
40006d18: 10 80 00 09 b 40006d3c <_Heap_Allocate_aligned_with_boundary+0x60>
40006d1c: 94 10 3f f8 mov -8, %o2
}
/* Statistics */
++search_count;
if ( alloc_begin != 0 ) {
40006d20: 80 a7 20 00 cmp %i4, 0
40006d24: 32 80 00 5b bne,a 40006e90 <_Heap_Allocate_aligned_with_boundary+0x1b4>
<== ALWAYS TAKEN
40006d28: 96 10 00 19 mov %i1, %o3
break;
}
block = block->next;
40006d2c: d2 02 60 08 ld [ %o1 + 8 ], %o1
while ( block != free_list_tail ) {
40006d30: 80 a6 00 09 cmp %i0, %o1
40006d34: 22 80 00 6d be,a 40006ee8 <_Heap_Allocate_aligned_with_boundary+0x20c>
40006d38: c2 06 20 5c ld [ %i0 + 0x5c ], %g1
if ( block->size_and_flag > block_size_floor ) {
40006d3c: c2 02 60 04 ld [ %o1 + 4 ], %g1
40006d40: 80 a0 40 04 cmp %g1, %g4
40006d44: 08 bf ff fa bleu 40006d2c <_Heap_Allocate_aligned_with_boundary+0x50>
<== NEVER TAKEN
40006d48: ba 07 60 01 inc %i5
if ( alignment == 0 ) {
40006d4c: 80 a6 a0 00 cmp %i2, 0
40006d50: 02 bf ff f4 be 40006d20 <_Heap_Allocate_aligned_with_boundary+0x44>
40006d54: b8 02 60 08 add %o1, 8, %i4
alloc_begin = _Heap_Check_block(
40006d58: d8 06 20 14 ld [ %i0 + 0x14 ], %o4
return block->size_and_flag & ~HEAP_PREV_BLOCK_USED;
40006d5c: 82 08 7f fe and %g1, -2, %g1
uintptr_t const alloc_begin_ceiling = block_end - min_block_size
40006d60: 86 22 c0 0c sub %o3, %o4, %g3
uintptr_t const block_end = block_begin + block_size;
40006d64: 82 00 40 09 add %g1, %o1, %g1
uintptr_t const alloc_begin_ceiling = block_end - min_block_size
40006d68: 86 00 c0 01 add %g3, %g1, %g3
uintptr_t alloc_begin = alloc_end - alloc_size;
40006d6c: 82 03 c0 01 add %o7, %g1, %g1
return value - (value % alignment);
40006d70: 81 80 20 00 wr %g0, %y
40006d74: 01 00 00 00 nop
40006d78: 01 00 00 00 nop
40006d7c: 01 00 00 00 nop
40006d80: 84 70 40 1a udiv %g1, %i2, %g2
40006d84: 84 58 80 1a smul %g2, %i2, %g2
if ( alloc_begin > alloc_begin_ceiling ) {
40006d88: 80 a0 c0 02 cmp %g3, %g2
40006d8c: 1a 80 00 08 bcc 40006dac <_Heap_Allocate_aligned_with_boundary+0xd0>
40006d90: 80 a6 e0 00 cmp %i3, 0
40006d94: 81 80 20 00 wr %g0, %y
40006d98: 01 00 00 00 nop
40006d9c: 01 00 00 00 nop
40006da0: 01 00 00 00 nop
40006da4: 84 70 c0 1a udiv %g3, %i2, %g2
40006da8: 84 58 80 1a smul %g2, %i2, %g2
if ( boundary != 0 ) {
40006dac: 02 80 00 26 be 40006e44 <_Heap_Allocate_aligned_with_boundary+0x168>
40006db0: 80 a7 00 02 cmp %i4, %g2
alloc_end = alloc_begin + alloc_size;
40006db4: 86 06 40 02 add %i1, %g2, %g3
40006db8: 81 80 20 00 wr %g0, %y
40006dbc: 01 00 00 00 nop
40006dc0: 01 00 00 00 nop
40006dc4: 01 00 00 00 nop
40006dc8: 82 70 c0 1b udiv %g3, %i3, %g1
40006dcc: 82 58 40 1b smul %g1, %i3, %g1
while ( alloc_begin < boundary_line && boundary_line < alloc_end ) {
40006dd0: 80 a0 40 03 cmp %g1, %g3
40006dd4: 1a 80 00 1b bcc 40006e40 <_Heap_Allocate_aligned_with_boundary+0x164>
40006dd8: 90 06 40 1c add %i1, %i4, %o0
40006ddc: 80 a0 80 01 cmp %g2, %g1
40006de0: 2a 80 00 06 bcs,a 40006df8 <_Heap_Allocate_aligned_with_boundary+0x11c>
40006de4: 80 a2 00 01 cmp %o0, %g1
if ( alloc_begin >= alloc_begin_floor ) {
40006de8: 10 80 00 17 b 40006e44 <_Heap_Allocate_aligned_with_boundary+0x168>
40006dec: 80 a7 00 02 cmp %i4, %g2
while ( alloc_begin < boundary_line && boundary_line < alloc_end ) {
40006df0: 1a 80 00 14 bcc 40006e40 <_Heap_Allocate_aligned_with_boundary+0x164>
40006df4: 80 a2 00 01 cmp %o0, %g1
if ( boundary_line < boundary_floor ) {
40006df8: 18 bf ff cd bgu 40006d2c <_Heap_Allocate_aligned_with_boundary+0x50>
40006dfc: 82 20 40 19 sub %g1, %i1, %g1
40006e00: 81 80 20 00 wr %g0, %y
40006e04: 01 00 00 00 nop
40006e08: 01 00 00 00 nop
40006e0c: 01 00 00 00 nop
40006e10: 84 70 40 1a udiv %g1, %i2, %g2
40006e14: 84 58 80 1a smul %g2, %i2, %g2
alloc_end = alloc_begin + alloc_size;
40006e18: 86 06 40 02 add %i1, %g2, %g3
40006e1c: 81 80 20 00 wr %g0, %y
40006e20: 01 00 00 00 nop
40006e24: 01 00 00 00 nop
40006e28: 01 00 00 00 nop
40006e2c: 82 70 c0 1b udiv %g3, %i3, %g1
40006e30: 82 58 40 1b smul %g1, %i3, %g1
while ( alloc_begin < boundary_line && boundary_line < alloc_end ) {
40006e34: 80 a0 80 01 cmp %g2, %g1
40006e38: 0a bf ff ee bcs 40006df0 <_Heap_Allocate_aligned_with_boundary+0x114>
40006e3c: 80 a0 40 03 cmp %g1, %g3
if ( alloc_begin >= alloc_begin_floor ) {
40006e40: 80 a7 00 02 cmp %i4, %g2
40006e44: 18 bf ff ba bgu 40006d2c <_Heap_Allocate_aligned_with_boundary+0x50>
<== NEVER TAKEN
40006e48: 82 22 80 09 sub %o2, %o1, %g1
40006e4c: 81 80 20 00 wr %g0, %y
40006e50: 01 00 00 00 nop
40006e54: 01 00 00 00 nop
40006e58: 01 00 00 00 nop
40006e5c: 86 70 80 0d udiv %g2, %o5, %g3
40006e60: 86 58 c0 0d smul %g3, %o5, %g3
uintptr_t const free_size = alloc_block_begin - block_begin;
40006e64: 82 00 40 03 add %g1, %g3, %g1
if ( free_size >= min_block_size || free_size == 0 ) {
40006e68: 80 a0 40 0c cmp %g1, %o4
40006e6c: 1a 80 00 04 bcc 40006e7c <_Heap_Allocate_aligned_with_boundary+0x1a0>
40006e70: 80 a0 60 00 cmp %g1, 0
40006e74: 32 bf ff af bne,a 40006d30 <_Heap_Allocate_aligned_with_boundary+0x54>
40006e78: d2 02 60 08 ld [ %o1 + 8 ], %o1
40006e7c: b8 10 00 02 mov %g2, %i4
if ( alloc_begin != 0 ) {
40006e80: 80 a7 20 00 cmp %i4, 0
40006e84: 22 bf ff ab be,a 40006d30 <_Heap_Allocate_aligned_with_boundary+0x54>
<== NEVER TAKEN
40006e88: d2 02 60 08 ld [ %o1 + 8 ], %o1
<== NOT EXECUTED
search_again = _Heap_Protection_free_delayed_blocks( heap, alloc_begin );
} while ( search_again );
if ( alloc_begin != 0 ) {
block = _Heap_Block_allocate( heap, block, alloc_begin, alloc_size );
40006e8c: 96 10 00 19 mov %i1, %o3
40006e90: 94 10 00 1c mov %i4, %o2
40006e94: 7f ff ff 42 call 40006b9c <_Heap_Block_allocate>
40006e98: 90 10 00 18 mov %i0, %o0
alignment,
boundary
);
/* Statistics */
++stats->allocs;
40006e9c: c4 06 20 58 ld [ %i0 + 0x58 ], %g2
stats->searches += search_count;
40006ea0: c2 06 20 54 ld [ %i0 + 0x54 ], %g1
++stats->allocs;
40006ea4: 84 00 a0 01 inc %g2
stats->searches += search_count;
40006ea8: 82 00 40 1d add %g1, %i5, %g1
++stats->allocs;
40006eac: c4 26 20 58 st %g2, [ %i0 + 0x58 ]
stats->searches += search_count;
40006eb0: c2 26 20 54 st %g1, [ %i0 + 0x54 ]
stats->lifetime_allocated += _Heap_Block_size( block );
40006eb4: c4 1e 20 28 ldd [ %i0 + 0x28 ], %g2
return block->size_and_flag & ~HEAP_PREV_BLOCK_USED;
40006eb8: c2 02 20 04 ld [ %o0 + 4 ], %g1
40006ebc: 82 08 7f fe and %g1, -2, %g1
40006ec0: b6 80 c0 01 addcc %g3, %g1, %i3
40006ec4: b4 40 a0 00 addx %g2, 0, %i2
40006ec8: f4 3e 20 28 std %i2, [ %i0 + 0x28 ]
/* Statistics */
++stats->failed_allocs;
}
/* Statistics */
if ( stats->max_search < search_count ) {
40006ecc: c2 06 20 50 ld [ %i0 + 0x50 ], %g1
40006ed0: 80 a0 40 1d cmp %g1, %i5
40006ed4: 2a 80 00 02 bcs,a 40006edc <_Heap_Allocate_aligned_with_boundary+0x200>
40006ed8: fa 26 20 50 st %i5, [ %i0 + 0x50 ]
stats->max_search = search_count;
}
return (void *) alloc_begin;
}
40006edc: 81 c7 e0 08 ret
40006ee0: 91 e8 00 1c restore %g0, %i4, %o0
++stats->failed_allocs;
40006ee4: c2 06 20 5c ld [ %i0 + 0x5c ], %g1
40006ee8: 82 00 60 01 inc %g1
40006eec: b8 10 20 00 clr %i4
40006ef0: 10 bf ff f7 b 40006ecc <_Heap_Allocate_aligned_with_boundary+0x1f0>
40006ef4: c2 26 20 5c st %g1, [ %i0 + 0x5c ]
if ( boundary < alloc_size ) {
40006ef8: 18 80 00 06 bgu 40006f10 <_Heap_Allocate_aligned_with_boundary+0x234>
40006efc: 80 a6 a0 00 cmp %i2, 0
if ( alignment == 0 ) {
40006f00: 22 bf ff 7f be,a 40006cfc <_Heap_Allocate_aligned_with_boundary+0x20>
40006f04: b4 10 00 0d mov %o5, %i2
return _Heap_Free_list_head(heap)->next;
40006f08: 10 bf ff 7e b 40006d00 <_Heap_Allocate_aligned_with_boundary+0x24>
40006f0c: d2 06 20 08 ld [ %i0 + 8 ], %o1
return NULL;
40006f10: b8 10 20 00 clr %i4
}
40006f14: 81 c7 e0 08 ret
40006f18: 91 e8 00 1c restore %g0, %i4, %o0
40006f74 <_Heap_Extend>:
Heap_Control *heap,
void *extend_area_begin_ptr,
uintptr_t extend_area_size,
uintptr_t unused RTEMS_UNUSED
)
{
40006f74: 9d e3 bf 98 save %sp, -104, %sp
Heap_Block *start_block = first_block;
Heap_Block *merge_below_block = NULL;
Heap_Block *merge_above_block = NULL;
Heap_Block *link_below_block = NULL;
Heap_Block *link_above_block = NULL;
Heap_Block *extend_first_block = NULL;
40006f78: c0 27 bf f8 clr [ %fp + -8 ]
{
40006f7c: ba 10 00 18 mov %i0, %i5
Heap_Block *extend_last_block = NULL;
40006f80: c0 27 bf fc clr [ %fp + -4 ]
40006f84: b6 86 40 1a addcc %i1, %i2, %i3
Heap_Block *const first_block = heap->first_block;
40006f88: 0a 80 00 83 bcs 40007194 <_Heap_Extend+0x220>
40006f8c: e0 06 20 20 ld [ %i0 + 0x20 ], %l0
uintptr_t const page_size = heap->page_size;
40006f90: f8 06 20 10 ld [ %i0 + 0x10 ], %i4
if ( extend_area_end < extend_area_begin ) {
return 0;
}
extend_area_ok = _Heap_Get_first_and_last_block(
40006f94: d6 06 20 14 ld [ %i0 + 0x14 ], %o3
40006f98: 9a 07 bf fc add %fp, -4, %o5
uintptr_t const free_size = stats->free_size;
40006f9c: f0 06 20 3c ld [ %i0 + 0x3c ], %i0
extend_area_ok = _Heap_Get_first_and_last_block(
40006fa0: 98 07 bf f8 add %fp, -8, %o4
40006fa4: 94 10 00 1c mov %i4, %o2
40006fa8: 92 10 00 1a mov %i2, %o1
40006fac: 7f ff fe 6f call 40006968 <_Heap_Get_first_and_last_block>
40006fb0: 90 10 00 19 mov %i1, %o0
page_size,
min_block_size,
&extend_first_block,
&extend_last_block
);
if (!extend_area_ok ) {
40006fb4: 80 a2 20 00 cmp %o0, 0
40006fb8: 02 80 00 77 be 40007194 <_Heap_Extend+0x220>
40006fbc: 82 10 00 10 mov %l0, %g1
Heap_Block *link_above_block = NULL;
40006fc0: a4 10 20 00 clr %l2
Heap_Block *link_below_block = NULL;
40006fc4: 9e 10 20 00 clr %o7
Heap_Block *merge_above_block = NULL;
40006fc8: b4 10 20 00 clr %i2
Heap_Block *merge_below_block = NULL;
40006fcc: a2 10 20 00 clr %l1
return 0;
}
do {
uintptr_t const sub_area_begin = (start_block != first_block) ?
(uintptr_t) start_block : heap->area_begin;
40006fd0: 80 a0 40 10 cmp %g1, %l0
40006fd4: 02 80 00 7f be 400071d0 <_Heap_Extend+0x25c>
40006fd8: 88 10 00 01 mov %g1, %g4
uintptr_t const sub_area_end = start_block->prev_size;
40006fdc: c6 00 40 00 ld [ %g1 ], %g3
return value - (value % alignment);
40006fe0: 81 80 20 00 wr %g0, %y
40006fe4: 01 00 00 00 nop
40006fe8: 01 00 00 00 nop
40006fec: 01 00 00 00 nop
40006ff0: 84 70 c0 1c udiv %g3, %i4, %g2
Heap_Block *const end_block =
_Heap_Block_of_alloc_area( sub_area_end, page_size );
if (
40006ff4: 80 a6 40 03 cmp %i1, %g3
40006ff8: 84 58 80 1c smul %g2, %i4, %g2
40006ffc: 1a 80 00 05 bcc 40007010 <_Heap_Extend+0x9c>
40007000: 84 00 bf f8 add %g2, -8, %g2
40007004: 80 a1 00 1b cmp %g4, %i3
40007008: 0a 80 00 63 bcs 40007194 <_Heap_Extend+0x220>
4000700c: 01 00 00 00 nop
sub_area_end > extend_area_begin && extend_area_end > sub_area_begin
) {
return 0;
}
if ( extend_area_end == sub_area_begin ) {
40007010: 80 a1 00 1b cmp %g4, %i3
40007014: 02 80 00 6d be 400071c8 <_Heap_Extend+0x254>
40007018: 80 a6 c0 03 cmp %i3, %g3
merge_below_block = start_block;
} else if ( extend_area_end < sub_area_end ) {
4000701c: 0a 80 00 60 bcs 4000719c <_Heap_Extend+0x228>
40007020: 80 a6 40 03 cmp %i1, %g3
link_below_block = start_block;
}
if ( sub_area_end == extend_area_begin ) {
40007024: 80 a6 40 03 cmp %i1, %g3
40007028: 22 80 00 60 be,a 400071a8 <_Heap_Extend+0x234>
4000702c: f6 20 40 00 st %i3, [ %g1 ]
start_block->prev_size = extend_area_end;
merge_above_block = end_block;
} else if ( sub_area_end < extend_area_begin ) {
40007030: 38 80 00 02 bgu,a 40007038 <_Heap_Extend+0xc4>
40007034: a4 10 00 02 mov %g2, %l2
return block->size_and_flag & ~HEAP_PREV_BLOCK_USED;
40007038: c2 00 a0 04 ld [ %g2 + 4 ], %g1
4000703c: 82 08 7f fe and %g1, -2, %g1
return (Heap_Block *) ((uintptr_t) block + offset);
40007040: 82 00 40 02 add %g1, %g2, %g1
link_above_block = end_block;
}
start_block = _Heap_Block_at( end_block, _Heap_Block_size( end_block ) );
} while ( start_block != first_block );
40007044: 80 a4 00 01 cmp %l0, %g1
40007048: 12 bf ff e3 bne 40006fd4 <_Heap_Extend+0x60>
4000704c: 80 a0 40 10 cmp %g1, %l0
if ( extend_area_begin < heap->area_begin ) {
40007050: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
40007054: 80 a0 40 19 cmp %g1, %i1
40007058: 38 80 00 06 bgu,a 40007070 <_Heap_Extend+0xfc>
4000705c: f2 27 60 18 st %i1, [ %i5 + 0x18 ]
heap->area_begin = extend_area_begin;
} else if ( heap->area_end < extend_area_end ) {
40007060: c2 07 60 1c ld [ %i5 + 0x1c ], %g1
40007064: 80 a0 40 1b cmp %g1, %i3
40007068: 2a 80 00 02 bcs,a 40007070 <_Heap_Extend+0xfc>
4000706c: f6 27 60 1c st %i3, [ %i5 + 0x1c ]
heap->area_end = extend_area_end;
}
extend_first_block_size =
(uintptr_t) extend_last_block - (uintptr_t) extend_first_block;
40007070: c2 07 bf f8 ld [ %fp + -8 ], %g1
40007074: c4 07 bf fc ld [ %fp + -4 ], %g2
extend_first_block_size =
40007078: 86 20 80 01 sub %g2, %g1, %g3
extend_first_block->prev_size = extend_area_end;
4000707c: f6 20 40 00 st %i3, [ %g1 ]
extend_first_block->size_and_flag =
extend_first_block_size | HEAP_PREV_BLOCK_USED;
40007080: 88 10 e0 01 or %g3, 1, %g4
extend_first_block->size_and_flag =
40007084: c8 20 60 04 st %g4, [ %g1 + 4 ]
_Heap_Protection_block_initialize( heap, extend_first_block );
extend_last_block->prev_size = extend_first_block_size;
40007088: c6 20 80 00 st %g3, [ %g2 ]
extend_last_block->size_and_flag = 0;
4000708c: c0 20 a0 04 clr [ %g2 + 4 ]
_Heap_Protection_block_initialize( heap, extend_last_block );
if ( (uintptr_t) extend_first_block < (uintptr_t) heap->first_block ) {
40007090: c6 07 60 20 ld [ %i5 + 0x20 ], %g3
40007094: 80 a0 c0 01 cmp %g3, %g1
40007098: 28 80 00 50 bleu,a 400071d8 <_Heap_Extend+0x264>
4000709c: c2 07 60 24 ld [ %i5 + 0x24 ], %g1
heap->first_block = extend_first_block;
400070a0: c2 27 60 20 st %g1, [ %i5 + 0x20 ]
} else if ( (uintptr_t) extend_last_block > (uintptr_t) heap->last_block ) {
heap->last_block = extend_last_block;
}
if ( merge_below_block != NULL ) {
400070a4: 80 a4 60 00 cmp %l1, 0
400070a8: 02 80 00 51 be 400071ec <_Heap_Extend+0x278>
400070ac: b2 06 60 08 add %i1, 8, %i1
uintptr_t const page_size = heap->page_size;
400070b0: c4 07 60 10 ld [ %i5 + 0x10 ], %g2
uintptr_t remainder = value % alignment;
400070b4: 81 80 20 00 wr %g0, %y
400070b8: 01 00 00 00 nop
400070bc: 01 00 00 00 nop
400070c0: 01 00 00 00 nop
400070c4: 82 76 40 02 udiv %i1, %g2, %g1
400070c8: 82 58 40 02 smul %g1, %g2, %g1
if ( remainder != 0 ) {
400070cc: 82 a6 40 01 subcc %i1, %g1, %g1
400070d0: 22 80 00 05 be,a 400070e4 <_Heap_Extend+0x170>
400070d4: c2 04 40 00 ld [ %l1 ], %g1
return value - remainder + alignment;
400070d8: b2 00 80 19 add %g2, %i1, %i1
400070dc: b2 26 40 01 sub %i1, %g1, %i1
new_first_block->prev_size = first_block->prev_size;
400070e0: c2 04 40 00 ld [ %l1 ], %g1
400070e4: c2 26 7f f8 st %g1, [ %i1 + -8 ]
uintptr_t const new_first_block_begin =
400070e8: 92 06 7f f8 add %i1, -8, %o1
uintptr_t const new_first_block_size =
400070ec: 82 24 40 09 sub %l1, %o1, %g1
new_first_block->size_and_flag = new_first_block_size | HEAP_PREV_BLOCK_USED;
400070f0: 82 10 60 01 or %g1, 1, %g1
400070f4: c2 22 60 04 st %g1, [ %o1 + 4 ]
_Heap_Free_block( heap, new_first_block );
400070f8: 7f ff ff 89 call 40006f1c <_Heap_Free_block>
400070fc: 90 10 00 1d mov %i5, %o0
link_below_block,
extend_last_block
);
}
if ( merge_above_block != NULL ) {
40007100: 80 a6 a0 00 cmp %i2, 0
40007104: 02 80 00 40 be 40007204 <_Heap_Extend+0x290>
40007108: b6 06 ff f8 add %i3, -8, %i3
return value - (value % alignment);
4000710c: c4 07 60 10 ld [ %i5 + 0x10 ], %g2
(last_block->size_and_flag - last_block_new_size)
40007110: c6 06 a0 04 ld [ %i2 + 4 ], %g3
uintptr_t const last_block_new_size = _Heap_Align_down(
40007114: b6 26 c0 1a sub %i3, %i2, %i3
40007118: 81 80 20 00 wr %g0, %y
4000711c: 01 00 00 00 nop
40007120: 01 00 00 00 nop
40007124: 01 00 00 00 nop
40007128: 82 76 c0 02 udiv %i3, %g2, %g1
4000712c: 84 58 40 02 smul %g1, %g2, %g2
new_last_block->size_and_flag =
40007130: 88 06 80 02 add %i2, %g2, %g4
(last_block->size_and_flag - last_block_new_size)
40007134: 82 20 c0 02 sub %g3, %g2, %g1
| HEAP_PREV_BLOCK_USED;
40007138: 82 10 60 01 or %g1, 1, %g1
new_last_block->size_and_flag =
4000713c: c2 21 20 04 st %g1, [ %g4 + 4 ]
_Heap_Free_block( heap, last_block );
40007140: 92 10 00 1a mov %i2, %o1
uintptr_t flag = block->size_and_flag & HEAP_PREV_BLOCK_USED;
40007144: c2 06 a0 04 ld [ %i2 + 4 ], %g1
40007148: 82 08 60 01 and %g1, 1, %g1
block->size_and_flag = size | flag;
4000714c: 82 10 40 02 or %g1, %g2, %g1
40007150: c2 26 a0 04 st %g1, [ %i2 + 4 ]
40007154: 7f ff ff 72 call 40006f1c <_Heap_Free_block>
40007158: 90 10 00 1d mov %i5, %o0
if ( merge_below_block == NULL && merge_above_block == NULL ) {
_Heap_Free_block( heap, extend_first_block );
}
_Heap_Set_last_block_size( heap );
4000715c: c4 07 60 24 ld [ %i5 + 0x24 ], %g2
uintptr_t flag = block->size_and_flag & HEAP_PREV_BLOCK_USED;
40007160: c6 00 a0 04 ld [ %g2 + 4 ], %g3
_Heap_Block_set_size(
40007164: c2 07 60 20 ld [ %i5 + 0x20 ], %g1
40007168: 82 20 40 02 sub %g1, %g2, %g1
uintptr_t flag = block->size_and_flag & HEAP_PREV_BLOCK_USED;
4000716c: 86 08 e0 01 and %g3, 1, %g3
block->size_and_flag = size | flag;
40007170: 82 10 40 03 or %g1, %g3, %g1
40007174: c2 20 a0 04 st %g1, [ %g2 + 4 ]
extended_size = stats->free_size - free_size;
/* Statistics */
stats->size += extended_size;
40007178: c4 07 60 38 ld [ %i5 + 0x38 ], %g2
extended_size = stats->free_size - free_size;
4000717c: c2 07 60 3c ld [ %i5 + 0x3c ], %g1
40007180: b0 20 40 18 sub %g1, %i0, %i0
stats->size += extended_size;
40007184: 82 00 80 18 add %g2, %i0, %g1
40007188: c2 27 60 38 st %g1, [ %i5 + 0x38 ]
return extended_size;
}
4000718c: 81 c7 e0 08 ret
40007190: 81 e8 00 00 restore
return 0;
40007194: 81 c7 e0 08 ret
40007198: 91 e8 20 00 restore %g0, 0, %o0
if ( sub_area_end == extend_area_begin ) {
4000719c: 12 bf ff a5 bne 40007030 <_Heap_Extend+0xbc>
400071a0: 9e 10 00 01 mov %g1, %o7
start_block->prev_size = extend_area_end;
400071a4: f6 20 40 00 st %i3, [ %g1 ]
<== NOT EXECUTED
return block->size_and_flag & ~HEAP_PREV_BLOCK_USED;
400071a8: c2 00 a0 04 ld [ %g2 + 4 ], %g1
400071ac: 82 08 7f fe and %g1, -2, %g1
return (Heap_Block *) ((uintptr_t) block + offset);
400071b0: 82 00 40 02 add %g1, %g2, %g1
} while ( start_block != first_block );
400071b4: 80 a4 00 01 cmp %l0, %g1
400071b8: 12 bf ff 86 bne 40006fd0 <_Heap_Extend+0x5c>
400071bc: b4 10 00 02 mov %g2, %i2
if ( extend_area_begin < heap->area_begin ) {
400071c0: 10 bf ff a5 b 40007054 <_Heap_Extend+0xe0>
400071c4: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
400071c8: 10 bf ff 97 b 40007024 <_Heap_Extend+0xb0>
400071cc: a2 10 00 01 mov %g1, %l1
400071d0: 10 bf ff 83 b 40006fdc <_Heap_Extend+0x68>
400071d4: c8 07 60 18 ld [ %i5 + 0x18 ], %g4
} else if ( (uintptr_t) extend_last_block > (uintptr_t) heap->last_block ) {
400071d8: 80 a0 40 02 cmp %g1, %g2
400071dc: 2a bf ff b2 bcs,a 400070a4 <_Heap_Extend+0x130>
400071e0: c4 27 60 24 st %g2, [ %i5 + 0x24 ]
if ( merge_below_block != NULL ) {
400071e4: 10 bf ff b1 b 400070a8 <_Heap_Extend+0x134>
400071e8: 80 a4 60 00 cmp %l1, 0
} else if ( link_below_block != NULL ) {
400071ec: 80 a3 e0 00 cmp %o7, 0
400071f0: 02 bf ff c4 be 40007100 <_Heap_Extend+0x18c>
400071f4: 9e 23 c0 02 sub %o7, %g2, %o7
(link_begin - last_block_begin) | HEAP_PREV_BLOCK_USED;
400071f8: 9e 13 e0 01 or %o7, 1, %o7
last_block->size_and_flag =
400071fc: 10 bf ff c1 b 40007100 <_Heap_Extend+0x18c>
40007200: de 20 a0 04 st %o7, [ %g2 + 4 ]
} else if ( link_above_block != NULL ) {
40007204: 80 a4 a0 00 cmp %l2, 0
40007208: 02 80 00 0b be 40007234 <_Heap_Extend+0x2c0>
4000720c: c2 07 bf f8 ld [ %fp + -8 ], %g1
uintptr_t flag = block->size_and_flag & HEAP_PREV_BLOCK_USED;
40007210: c4 04 a0 04 ld [ %l2 + 4 ], %g2
40007214: 84 08 a0 01 and %g2, 1, %g2
_Heap_Block_set_size( link, first_block_begin - link_begin );
40007218: 82 20 40 12 sub %g1, %l2, %g1
block->size_and_flag = size | flag;
4000721c: 82 10 40 02 or %g1, %g2, %g1
40007220: c2 24 a0 04 st %g1, [ %l2 + 4 ]
_Heap_Link_above(
40007224: c4 07 bf fc ld [ %fp + -4 ], %g2
last_block->size_and_flag |= HEAP_PREV_BLOCK_USED;
40007228: c2 00 a0 04 ld [ %g2 + 4 ], %g1
4000722c: 82 10 60 01 or %g1, 1, %g1
40007230: c2 20 a0 04 st %g1, [ %g2 + 4 ]
if ( merge_below_block == NULL && merge_above_block == NULL ) {
40007234: 80 a4 60 00 cmp %l1, 0
40007238: 12 bf ff c9 bne 4000715c <_Heap_Extend+0x1e8>
4000723c: d2 07 bf f8 ld [ %fp + -8 ], %o1
_Heap_Free_block( heap, extend_first_block );
40007240: 7f ff ff 37 call 40006f1c <_Heap_Free_block>
40007244: 90 10 00 1d mov %i5, %o0
_Heap_Set_last_block_size( heap );
40007248: 10 bf ff c6 b 40007160 <_Heap_Extend+0x1ec>
4000724c: c4 07 60 24 ld [ %i5 + 0x24 ], %g2
40007250 <_Heap_Free>:
return do_free;
}
#endif
bool _Heap_Free( Heap_Control *heap, void *alloc_begin_ptr )
{
40007250: 9d e3 bf a0 save %sp, -96, %sp
/*
* If NULL return true so a free on NULL is considered a valid release. This
* is a special case that could be handled by the in heap check how-ever that
* would result in false being returned which is wrong.
*/
if ( alloc_begin_ptr == NULL ) {
40007254: 80 a6 60 00 cmp %i1, 0
40007258: 02 80 00 41 be 4000735c <_Heap_Free+0x10c>
4000725c: 84 10 20 01 mov 1, %g2
return value - (value % alignment);
40007260: c8 06 20 10 ld [ %i0 + 0x10 ], %g4
return (uintptr_t) block >= (uintptr_t) heap->first_block
40007264: c6 06 20 20 ld [ %i0 + 0x20 ], %g3
return value - (value % alignment);
40007268: 81 80 20 00 wr %g0, %y
4000726c: 01 00 00 00 nop
40007270: 01 00 00 00 nop
40007274: 01 00 00 00 nop
40007278: 82 76 40 04 udiv %i1, %g4, %g1
4000727c: 82 58 40 04 smul %g1, %g4, %g1
- HEAP_BLOCK_HEADER_SIZE);
40007280: 82 00 7f f8 add %g1, -8, %g1
&& (uintptr_t) block <= (uintptr_t) heap->last_block;
40007284: 80 a0 40 03 cmp %g1, %g3
40007288: 0a 80 00 35 bcs 4000735c <_Heap_Free+0x10c>
4000728c: 84 10 20 00 clr %g2
40007290: f6 06 20 24 ld [ %i0 + 0x24 ], %i3
40007294: 80 a0 40 1b cmp %g1, %i3
40007298: 38 80 00 32 bgu,a 40007360 <_Heap_Free+0x110>
4000729c: b0 08 a0 ff and %g2, 0xff, %i0
return false;
}
_Heap_Protection_block_check( heap, block );
block_size = _Heap_Block_size( block );
400072a0: fa 00 60 04 ld [ %g1 + 4 ], %i5
return block->size_and_flag & ~HEAP_PREV_BLOCK_USED;
400072a4: b8 0f 7f fe and %i5, -2, %i4
return (Heap_Block *) ((uintptr_t) block + offset);
400072a8: 88 00 40 1c add %g1, %i4, %g4
&& (uintptr_t) block <= (uintptr_t) heap->last_block;
400072ac: 80 a0 c0 04 cmp %g3, %g4
400072b0: 38 80 00 2c bgu,a 40007360 <_Heap_Free+0x110>
<== NEVER TAKEN
400072b4: b0 08 a0 ff and %g2, 0xff, %i0
<== NOT EXECUTED
400072b8: 80 a6 c0 04 cmp %i3, %g4
400072bc: 2a 80 00 29 bcs,a 40007360 <_Heap_Free+0x110>
400072c0: b0 08 a0 ff and %g2, 0xff, %i0
return false;
}
_Heap_Protection_block_check( heap, next_block );
if ( !_Heap_Is_prev_used( next_block ) ) {
400072c4: f4 01 20 04 ld [ %g4 + 4 ], %i2
400072c8: 80 8e a0 01 btst 1, %i2
400072cc: 02 80 00 24 be 4000735c <_Heap_Free+0x10c>
400072d0: b4 0e bf fe and %i2, -2, %i2
return true;
}
next_block_size = _Heap_Block_size( next_block );
next_is_free = next_block != heap->last_block
&& !_Heap_Is_prev_used( _Heap_Block_at( next_block, next_block_size ));
400072d4: 80 a6 c0 04 cmp %i3, %g4
400072d8: 02 80 00 24 be 40007368 <_Heap_Free+0x118>
400072dc: ba 0f 60 01 and %i5, 1, %i5
400072e0: 84 01 00 1a add %g4, %i2, %g2
return block->size_and_flag & HEAP_PREV_BLOCK_USED;
400072e4: c4 00 a0 04 ld [ %g2 + 4 ], %g2
400072e8: 80 88 a0 01 btst 1, %g2
400072ec: 12 80 00 20 bne 4000736c <_Heap_Free+0x11c>
400072f0: 80 a7 60 00 cmp %i5, 0
if ( !_Heap_Is_prev_used( block ) ) {
400072f4: 02 80 00 20 be 40007374 <_Heap_Free+0x124>
400072f8: 9e 10 20 01 mov 1, %o7
next_block->size_and_flag &= ~HEAP_PREV_BLOCK_USED;
next_block->prev_size = size;
}
} else if ( next_is_free ) { /* coalesce next */
uintptr_t const size = block_size + next_block_size;
_Heap_Free_list_replace( next_block, block );
400072fc: c6 01 20 08 ld [ %g4 + 8 ], %g3
40007300: c4 01 20 0c ld [ %g4 + 0xc ], %g2
new_block->prev = prev;
40007304: c4 20 60 0c st %g2, [ %g1 + 0xc ]
uintptr_t const size = block_size + next_block_size;
40007308: b4 07 00 1a add %i4, %i2, %i2
new_block->next = next;
4000730c: c6 20 60 08 st %g3, [ %g1 + 8 ]
block->size_and_flag = size | HEAP_PREV_BLOCK_USED;
40007310: 88 16 a0 01 or %i2, 1, %g4
next->prev = new_block;
40007314: c2 20 e0 0c st %g1, [ %g3 + 0xc ]
prev->next = new_block;
40007318: c2 20 a0 08 st %g1, [ %g2 + 8 ]
4000731c: c8 20 60 04 st %g4, [ %g1 + 4 ]
next_block = _Heap_Block_at( block, size );
next_block->prev_size = size;
40007320: f4 20 40 1a st %i2, [ %g1 + %i2 ]
--stats->used_blocks;
++stats->frees;
stats->free_size += block_size;
stats->lifetime_freed += block_size;
return( true );
40007324: 84 10 20 01 mov 1, %g2
stats->lifetime_freed += block_size;
40007328: f4 1e 20 30 ldd [ %i0 + 0x30 ], %i2
--stats->used_blocks;
4000732c: c8 06 20 4c ld [ %i0 + 0x4c ], %g4
++stats->frees;
40007330: c6 06 20 60 ld [ %i0 + 0x60 ], %g3
stats->free_size += block_size;
40007334: c2 06 20 3c ld [ %i0 + 0x3c ], %g1
stats->lifetime_freed += block_size;
40007338: 9a 86 c0 1c addcc %i3, %i4, %o5
--stats->used_blocks;
4000733c: 88 01 3f ff add %g4, -1, %g4
++stats->frees;
40007340: 86 00 e0 01 inc %g3
stats->free_size += block_size;
40007344: 82 00 40 1c add %g1, %i4, %g1
stats->lifetime_freed += block_size;
40007348: 98 46 a0 00 addx %i2, 0, %o4
--stats->used_blocks;
4000734c: c8 26 20 4c st %g4, [ %i0 + 0x4c ]
++stats->frees;
40007350: c6 26 20 60 st %g3, [ %i0 + 0x60 ]
stats->free_size += block_size;
40007354: c2 26 20 3c st %g1, [ %i0 + 0x3c ]
stats->lifetime_freed += block_size;
40007358: d8 3e 20 30 std %o4, [ %i0 + 0x30 ]
4000735c: b0 08 a0 ff and %g2, 0xff, %i0
}
40007360: 81 c7 e0 08 ret
40007364: 81 e8 00 00 restore
if ( !_Heap_Is_prev_used( block ) ) {
40007368: 80 a7 60 00 cmp %i5, 0
4000736c: 12 80 00 1c bne 400073dc <_Heap_Free+0x18c>
40007370: 9e 10 20 00 clr %o7
uintptr_t const prev_size = block->prev_size;
40007374: f2 00 40 00 ld [ %g1 ], %i1
40007378: ba 20 40 19 sub %g1, %i1, %i5
&& (uintptr_t) block <= (uintptr_t) heap->last_block;
4000737c: 80 a7 40 03 cmp %i5, %g3
40007380: 0a bf ff f7 bcs 4000735c <_Heap_Free+0x10c>
40007384: 84 10 20 00 clr %g2
40007388: 80 a7 40 1b cmp %i5, %i3
4000738c: 38 bf ff f5 bgu,a 40007360 <_Heap_Free+0x110>
<== NEVER TAKEN
40007390: b0 08 a0 ff and %g2, 0xff, %i0
<== NOT EXECUTED
return block->size_and_flag & HEAP_PREV_BLOCK_USED;
40007394: c6 07 60 04 ld [ %i5 + 4 ], %g3
if ( !_Heap_Is_prev_used ( prev_block) ) {
40007398: 80 88 e0 01 btst 1, %g3
4000739c: 02 bf ff f0 be 4000735c <_Heap_Free+0x10c>
400073a0: 80 a3 e0 00 cmp %o7, 0
if ( next_is_free ) { /* coalesce both */
400073a4: 02 80 00 22 be 4000742c <_Heap_Free+0x1dc>
400073a8: b2 06 40 1c add %i1, %i4, %i1
_Heap_Free_list_remove( next_block );
400073ac: c4 01 20 08 ld [ %g4 + 8 ], %g2
400073b0: c6 01 20 0c ld [ %g4 + 0xc ], %g3
prev->next = next;
400073b4: c4 20 e0 08 st %g2, [ %g3 + 8 ]
uintptr_t const size = block_size + prev_size + next_block_size;
400073b8: b4 06 80 19 add %i2, %i1, %i2
stats->free_blocks -= 1;
400073bc: c2 06 20 44 ld [ %i0 + 0x44 ], %g1
next->prev = prev;
400073c0: c6 20 a0 0c st %g3, [ %g2 + 0xc ]
400073c4: 82 00 7f ff add %g1, -1, %g1
400073c8: c2 26 20 44 st %g1, [ %i0 + 0x44 ]
prev_block->size_and_flag = size | HEAP_PREV_BLOCK_USED;
400073cc: 82 16 a0 01 or %i2, 1, %g1
400073d0: c2 27 60 04 st %g1, [ %i5 + 4 ]
400073d4: 10 bf ff d4 b 40007324 <_Heap_Free+0xd4>
400073d8: f4 27 40 1a st %i2, [ %i5 + %i2 ]
Heap_Block *next = block_before->next;
400073dc: c6 06 20 08 ld [ %i0 + 8 ], %g3
new_block->next = next;
400073e0: c6 20 60 08 st %g3, [ %g1 + 8 ]
block->size_and_flag = block_size | HEAP_PREV_BLOCK_USED;
400073e4: 84 17 20 01 or %i4, 1, %g2
new_block->prev = block_before;
400073e8: f0 20 60 0c st %i0, [ %g1 + 0xc ]
block_before->next = new_block;
400073ec: c2 26 20 08 st %g1, [ %i0 + 8 ]
next->prev = new_block;
400073f0: c2 20 e0 0c st %g1, [ %g3 + 0xc ]
400073f4: c4 20 60 04 st %g2, [ %g1 + 4 ]
next_block->size_and_flag &= ~HEAP_PREV_BLOCK_USED;
400073f8: c4 01 20 04 ld [ %g4 + 4 ], %g2
400073fc: 84 08 bf fe and %g2, -2, %g2
40007400: c4 21 20 04 st %g2, [ %g4 + 4 ]
++stats->free_blocks;
40007404: c4 06 20 44 ld [ %i0 + 0x44 ], %g2
next_block->prev_size = block_size;
40007408: f8 20 40 1c st %i4, [ %g1 + %i4 ]
++stats->free_blocks;
4000740c: 82 00 a0 01 add %g2, 1, %g1
40007410: c2 26 20 44 st %g1, [ %i0 + 0x44 ]
if ( stats->max_free_blocks < stats->free_blocks ) {
40007414: c4 06 20 48 ld [ %i0 + 0x48 ], %g2
40007418: 80 a0 40 02 cmp %g1, %g2
4000741c: 38 bf ff c2 bgu,a 40007324 <_Heap_Free+0xd4>
40007420: c2 26 20 48 st %g1, [ %i0 + 0x48 ]
return( true );
40007424: 10 bf ff c1 b 40007328 <_Heap_Free+0xd8>
40007428: 84 10 20 01 mov 1, %g2
prev_block->size_and_flag = size | HEAP_PREV_BLOCK_USED;
4000742c: 84 16 60 01 or %i1, 1, %g2
40007430: c4 27 60 04 st %g2, [ %i5 + 4 ]
next_block->size_and_flag &= ~HEAP_PREV_BLOCK_USED;
40007434: c4 01 20 04 ld [ %g4 + 4 ], %g2
40007438: 84 08 bf fe and %g2, -2, %g2
4000743c: c4 21 20 04 st %g2, [ %g4 + 4 ]
next_block->prev_size = size;
40007440: 10 bf ff b9 b 40007324 <_Heap_Free+0xd4>
40007444: f2 20 40 1c st %i1, [ %g1 + %i4 ]
40006968 <_Heap_Get_first_and_last_block>:
_Heap_Align_up( heap_area_begin + HEAP_BLOCK_HEADER_SIZE, page_size );
40006968: 84 02 20 08 add %o0, 8, %g2
<== NOT EXECUTED
uintptr_t remainder = value % alignment;
4000696c: 81 80 20 00 wr %g0, %y
<== NOT EXECUTED
40006970: 01 00 00 00 nop
<== NOT EXECUTED
40006974: 01 00 00 00 nop
<== NOT EXECUTED
40006978: 01 00 00 00 nop
<== NOT EXECUTED
4000697c: 82 70 80 0a udiv %g2, %o2, %g1
<== NOT EXECUTED
40006980: 82 58 40 0a smul %g1, %o2, %g1
<== NOT EXECUTED
if ( remainder != 0 ) {
40006984: 82 a0 80 01 subcc %g2, %g1, %g1
<== NOT EXECUTED
40006988: 02 80 00 1a be 400069f0 <_Heap_Get_first_and_last_block+0x88>
<== NOT EXECUTED
4000698c: 88 02 00 09 add %o0, %o1, %g4
<== NOT EXECUTED
40006990: 86 02 bf f8 add %o2, -8, %g3
<== NOT EXECUTED
40006994: 84 00 c0 02 add %g3, %g2, %g2
<== NOT EXECUTED
40006998: 82 20 80 01 sub %g2, %g1, %g1
<== NOT EXECUTED
4000699c: 84 20 40 08 sub %g1, %o0, %g2
<== NOT EXECUTED
400069a0: 84 00 a0 08 add %g2, 8, %g2
<== NOT EXECUTED
heap_area_end < heap_area_begin
400069a4: 80 a1 00 08 cmp %g4, %o0
<== NOT EXECUTED
400069a8: 88 40 20 00 addx %g0, 0, %g4
<== NOT EXECUTED
|| heap_area_size <= overhead
400069ac: 80 a0 80 09 cmp %g2, %o1
<== NOT EXECUTED
_Heap_Align_down( heap_area_size - overhead, page_size );
400069b0: 92 22 40 02 sub %o1, %g2, %o1
<== NOT EXECUTED
|| heap_area_size <= overhead
400069b4: 86 60 3f ff subx %g0, -1, %g3
<== NOT EXECUTED
return value - (value % alignment);
400069b8: 81 80 20 00 wr %g0, %y
<== NOT EXECUTED
400069bc: 01 00 00 00 nop
<== NOT EXECUTED
400069c0: 01 00 00 00 nop
<== NOT EXECUTED
400069c4: 01 00 00 00 nop
<== NOT EXECUTED
400069c8: 84 72 40 0a udiv %o1, %o2, %g2
<== NOT EXECUTED
|| first_block_size < min_block_size
400069cc: 80 91 00 03 orcc %g4, %g3, %g0
<== NOT EXECUTED
400069d0: 12 80 00 05 bne 400069e4 <_Heap_Get_first_and_last_block+0x7c>
<== NOT EXECUTED
400069d4: 94 58 80 0a smul %g2, %o2, %o2
<== NOT EXECUTED
400069d8: 80 a2 80 0b cmp %o2, %o3
<== NOT EXECUTED
400069dc: 3a 80 00 08 bcc,a 400069fc <_Heap_Get_first_and_last_block+0x94>
<== NOT EXECUTED
400069e0: c2 23 00 00 st %g1, [ %o4 ]
<== NOT EXECUTED
return false;
400069e4: 90 10 20 00 clr %o0
<== NOT EXECUTED
}
400069e8: 81 c3 e0 08 retl
<== NOT EXECUTED
400069ec: 90 0a 20 01 and %o0, 1, %o0
<== NOT EXECUTED
400069f0: 82 10 00 08 mov %o0, %g1
<== NOT EXECUTED
400069f4: 10 bf ff ec b 400069a4 <_Heap_Get_first_and_last_block+0x3c>
<== NOT EXECUTED
400069f8: 84 10 20 08 mov 8, %g2
<== NOT EXECUTED
return (Heap_Block *) ((uintptr_t) block + offset);
400069fc: 94 02 80 01 add %o2, %g1, %o2
<== NOT EXECUTED
return true;
40006a00: 90 10 20 01 mov 1, %o0
<== NOT EXECUTED
*last_block_ptr = last_block;
40006a04: d4 23 40 00 st %o2, [ %o5 ]
<== NOT EXECUTED
}
40006a08: 81 c3 e0 08 retl
<== NOT EXECUTED
40006a0c: 90 0a 20 01 and %o0, 1, %o0
<== NOT EXECUTED
40009148 <_Heap_Greedy_allocate>:
Heap_Block *_Heap_Greedy_allocate(
Heap_Control *heap,
const uintptr_t *block_sizes,
size_t block_count
)
{
40009148: 9d e3 bf a0 save %sp, -96, %sp
Heap_Block *current;
size_t i;
_Heap_Protection_free_all_delayed_blocks( heap );
for (i = 0; i < block_count; ++i) {
4000914c: 80 a6 a0 00 cmp %i2, 0
40009150: 02 80 00 3a be 40009238 <_Heap_Greedy_allocate+0xf0>
40009154: ba 10 00 18 mov %i0, %i5
40009158: b5 2e a0 02 sll %i2, 2, %i2
Heap_Block *allocated_blocks = NULL;
4000915c: b8 10 20 00 clr %i4
40009160: b4 06 40 1a add %i1, %i2, %i2
return _Heap_Allocate_aligned_with_boundary( heap, size, 0, 0 );
40009164: d2 06 40 00 ld [ %i1 ], %o1
40009168: 96 10 20 00 clr %o3
4000916c: 94 10 20 00 clr %o2
40009170: 7f ff fd e4 call 40008900 <_Heap_Allocate_aligned_with_boundary>
40009174: 90 10 00 1d mov %i5, %o0
void *next = _Heap_Allocate( heap, block_sizes [i] );
if ( next != NULL ) {
40009178: 80 a2 20 00 cmp %o0, 0
4000917c: 02 80 00 0c be 400091ac <_Heap_Greedy_allocate+0x64>
40009180: b2 06 60 04 add %i1, 4, %i1
return value - (value % alignment);
40009184: c4 07 60 10 ld [ %i5 + 0x10 ], %g2
40009188: 81 80 20 00 wr %g0, %y
4000918c: 01 00 00 00 nop
40009190: 01 00 00 00 nop
40009194: 01 00 00 00 nop
40009198: 82 72 00 02 udiv %o0, %g2, %g1
4000919c: 82 58 40 02 smul %g1, %g2, %g1
Heap_Block *next_block = _Heap_Block_of_alloc_area(
(uintptr_t) next,
heap->page_size
);
next_block->next = allocated_blocks;
400091a0: f8 20 40 00 st %i4, [ %g1 ]
- HEAP_BLOCK_HEADER_SIZE);
400091a4: 82 00 7f f8 add %g1, -8, %g1
400091a8: b8 10 00 01 mov %g1, %i4
for (i = 0; i < block_count; ++i) {
400091ac: 80 a6 80 19 cmp %i2, %i1
400091b0: 32 bf ff ee bne,a 40009168 <_Heap_Greedy_allocate+0x20>
400091b4: d2 06 40 00 ld [ %i1 ], %o1
return _Heap_Free_list_head(heap)->next;
400091b8: f0 07 60 08 ld [ %i5 + 8 ], %i0
allocated_blocks = next_block;
}
}
while ( (current = _Heap_Free_list_first( heap )) != free_list_tail ) {
400091bc: 80 a7 40 18 cmp %i5, %i0
400091c0: 22 80 00 19 be,a 40009224 <_Heap_Greedy_allocate+0xdc>
400091c4: b0 10 20 00 clr %i0
Heap_Block *allocated_blocks = NULL;
400091c8: 10 80 00 03 b 400091d4 <_Heap_Greedy_allocate+0x8c>
400091cc: b6 10 20 00 clr %i3
400091d0: b0 10 00 01 mov %g1, %i0
return block->size_and_flag & ~HEAP_PREV_BLOCK_USED;
400091d4: d6 06 20 04 ld [ %i0 + 4 ], %o3
400091d8: 96 0a ff fe and %o3, -2, %o3
_Heap_Block_allocate(
400091dc: 94 06 20 08 add %i0, 8, %o2
400091e0: 92 10 00 18 mov %i0, %o1
400091e4: 96 02 ff f8 add %o3, -8, %o3
400091e8: 7f ff fd 76 call 400087c0 <_Heap_Block_allocate>
400091ec: 90 10 00 1d mov %i5, %o0
current,
_Heap_Alloc_area_of_block( current ),
_Heap_Block_size( current ) - HEAP_BLOCK_HEADER_SIZE
);
current->next = blocks;
400091f0: f6 26 20 08 st %i3, [ %i0 + 8 ]
return _Heap_Free_list_head(heap)->next;
400091f4: c2 07 60 08 ld [ %i5 + 8 ], %g1
while ( (current = _Heap_Free_list_first( heap )) != free_list_tail ) {
400091f8: 80 a7 40 01 cmp %i5, %g1
400091fc: 12 bf ff f5 bne 400091d0 <_Heap_Greedy_allocate+0x88>
40009200: b6 10 00 18 mov %i0, %i3
blocks = current;
}
while ( allocated_blocks != NULL ) {
40009204: 80 a7 20 00 cmp %i4, 0
40009208: 02 80 00 0a be 40009230 <_Heap_Greedy_allocate+0xe8>
4000920c: 01 00 00 00 nop
current = allocated_blocks;
allocated_blocks = allocated_blocks->next;
40009210: f6 07 20 08 ld [ %i4 + 8 ], %i3
_Heap_Free( heap, (void *) _Heap_Alloc_area_of_block( current ) );
40009214: 92 07 20 08 add %i4, 8, %o1
40009218: 90 10 00 1d mov %i5, %o0
4000921c: 7f ff ff 16 call 40008e74 <_Heap_Free>
40009220: b8 10 00 1b mov %i3, %i4
while ( allocated_blocks != NULL ) {
40009224: 80 a7 20 00 cmp %i4, 0
40009228: 32 bf ff fb bne,a 40009214 <_Heap_Greedy_allocate+0xcc>
4000922c: f6 07 20 08 ld [ %i4 + 8 ], %i3
}
return blocks;
}
40009230: 81 c7 e0 08 ret
40009234: 81 e8 00 00 restore
40009238: f0 06 20 08 ld [ %i0 + 8 ], %i0
while ( (current = _Heap_Free_list_first( heap )) != free_list_tail ) {
4000923c: 80 a7 40 18 cmp %i5, %i0
40009240: 12 bf ff e2 bne 400091c8 <_Heap_Greedy_allocate+0x80>
40009244: b8 10 20 00 clr %i4
Heap_Block *blocks = NULL;
40009248: 81 c7 e0 08 ret
<== NOT EXECUTED
4000924c: 91 e8 20 00 restore %g0, 0, %o0
<== NOT EXECUTED
400069e0 <_Heap_Greedy_allocate_all_except_largest>:
Heap_Block *_Heap_Greedy_allocate_all_except_largest(
Heap_Control *heap,
uintptr_t *allocatable_size
)
{
400069e0: 9d e3 bf 90 save %sp, -112, %sp
Heap_Information info;
_Heap_Get_free_information( heap, &info );
400069e4: 92 07 bf f4 add %fp, -12, %o1
400069e8: 40 00 14 5f call 4000bb64 <_Heap_Get_free_information>
400069ec: 90 10 00 18 mov %i0, %o0
if ( info.largest > 0 ) {
400069f0: c2 07 bf f8 ld [ %fp + -8 ], %g1
400069f4: 80 a0 60 00 cmp %g1, 0
400069f8: 12 80 00 08 bne 40006a18 <_Heap_Greedy_allocate_all_except_largest+0x38>
400069fc: 94 10 20 01 mov 1, %o2
*allocatable_size = info.largest - HEAP_BLOCK_HEADER_SIZE + HEAP_ALLOC_BONUS;
} else {
*allocatable_size = 0;
40006a00: c0 26 40 00 clr [ %i1 ]
<== NOT EXECUTED
}
return _Heap_Greedy_allocate( heap, allocatable_size, 1 );
40006a04: 92 10 00 19 mov %i1, %o1
<== NOT EXECUTED
40006a08: 7f ff ff b4 call 400068d8 <_Heap_Greedy_allocate>
<== NOT EXECUTED
40006a0c: 90 10 00 18 mov %i0, %o0
<== NOT EXECUTED
}
40006a10: 81 c7 e0 08 ret
<== NOT EXECUTED
40006a14: 91 e8 00 08 restore %g0, %o0, %o0
<== NOT EXECUTED
*allocatable_size = info.largest - HEAP_BLOCK_HEADER_SIZE + HEAP_ALLOC_BONUS;
40006a18: 82 00 7f fc add %g1, -4, %g1
40006a1c: c2 26 40 00 st %g1, [ %i1 ]
return _Heap_Greedy_allocate( heap, allocatable_size, 1 );
40006a20: 92 10 00 19 mov %i1, %o1
40006a24: 7f ff ff ad call 400068d8 <_Heap_Greedy_allocate>
40006a28: 90 10 00 18 mov %i0, %o0
}
40006a2c: 81 c7 e0 08 ret
40006a30: 91 e8 00 08 restore %g0, %o0, %o0
40006a10 <_Heap_Initialize>:
{
40006a10: 9d e3 bf a0 save %sp, -96, %sp
40006a14: a2 86 40 1a addcc %i1, %i2, %l1
40006a18: 84 40 20 00 addx %g0, 0, %g2
if ( page_size == 0 ) {
40006a1c: 80 a6 e0 00 cmp %i3, 0
40006a20: 22 80 00 33 be,a 40006aec <_Heap_Initialize+0xdc>
40006a24: b6 10 20 08 mov 8, %i3
40006a28: 82 8e e0 07 andcc %i3, 7, %g1
40006a2c: 02 80 00 05 be 40006a40 <_Heap_Initialize+0x30>
40006a30: 80 a6 e0 07 cmp %i3, 7
return value - remainder + alignment;
40006a34: b6 06 e0 08 add %i3, 8, %i3
40006a38: b6 26 c0 01 sub %i3, %g1, %i3
if ( page_size < CPU_ALIGNMENT ) {
40006a3c: 80 a6 e0 07 cmp %i3, 7
40006a40: 08 80 00 29 bleu 40006ae4 <_Heap_Initialize+0xd4>
<== NEVER TAKEN
40006a44: ba 10 20 00 clr %i5
uintptr_t remainder = value % alignment;
40006a48: 82 10 20 10 mov 0x10, %g1
40006a4c: 81 80 20 00 wr %g0, %y
40006a50: 01 00 00 00 nop
40006a54: 01 00 00 00 nop
40006a58: 01 00 00 00 nop
40006a5c: 86 70 40 1b udiv %g1, %i3, %g3
40006a60: 86 58 c0 1b smul %g3, %i3, %g3
if ( remainder != 0 ) {
40006a64: 82 a0 40 03 subcc %g1, %g3, %g1
40006a68: 02 80 00 22 be 40006af0 <_Heap_Initialize+0xe0>
<== ALWAYS TAKEN
40006a6c: a0 10 20 10 mov 0x10, %l0
_Heap_Align_up( heap_area_begin + HEAP_BLOCK_HEADER_SIZE, page_size );
40006a70: b8 06 60 08 add %i1, 8, %i4
return value - remainder + alignment;
40006a74: a0 06 e0 10 add %i3, 0x10, %l0
40006a78: a0 24 00 01 sub %l0, %g1, %l0
uintptr_t remainder = value % alignment;
40006a7c: 81 80 20 00 wr %g0, %y
40006a80: 01 00 00 00 nop
40006a84: 01 00 00 00 nop
40006a88: 01 00 00 00 nop
40006a8c: 82 77 00 1b udiv %i4, %i3, %g1
40006a90: 82 58 40 1b smul %g1, %i3, %g1
if ( remainder != 0 ) {
40006a94: 82 a7 00 01 subcc %i4, %g1, %g1
40006a98: 12 80 00 21 bne 40006b1c <_Heap_Initialize+0x10c>
40006a9c: b8 06 40 1b add %i1, %i3, %i4
uintptr_t const heap_area_begin = (uintptr_t) heap_area_begin_ptr;
40006aa0: b8 10 00 19 mov %i1, %i4
<== NOT EXECUTED
40006aa4: 82 10 20 08 mov 8, %g1
|| heap_area_size <= overhead
40006aa8: 80 a0 40 1a cmp %g1, %i2
_Heap_Align_down( heap_area_size - overhead, page_size );
40006aac: b4 26 80 01 sub %i2, %g1, %i2
|| heap_area_size <= overhead
40006ab0: 82 60 3f ff subx %g0, -1, %g1
return value - (value % alignment);
40006ab4: 81 80 20 00 wr %g0, %y
40006ab8: 01 00 00 00 nop
40006abc: 01 00 00 00 nop
40006ac0: 01 00 00 00 nop
40006ac4: ba 76 80 1b udiv %i2, %i3, %i5
|| first_block_size < min_block_size
40006ac8: 80 90 80 01 orcc %g2, %g1, %g0
40006acc: 12 80 00 05 bne 40006ae0 <_Heap_Initialize+0xd0>
40006ad0: ba 5f 40 1b smul %i5, %i3, %i5
40006ad4: 80 a7 40 10 cmp %i5, %l0
40006ad8: 1a 80 00 15 bcc 40006b2c <_Heap_Initialize+0x11c>
<== ALWAYS TAKEN
40006adc: 94 10 20 68 mov 0x68, %o2
return 0;
40006ae0: ba 10 20 00 clr %i5
}
40006ae4: 81 c7 e0 08 ret
40006ae8: 91 e8 00 1d restore %g0, %i5, %o0
} else {
return value;
40006aec: a0 10 20 10 mov 0x10, %l0
_Heap_Align_up( heap_area_begin + HEAP_BLOCK_HEADER_SIZE, page_size );
40006af0: b8 06 60 08 add %i1, 8, %i4
uintptr_t remainder = value % alignment;
40006af4: 81 80 20 00 wr %g0, %y
40006af8: 01 00 00 00 nop
40006afc: 01 00 00 00 nop
40006b00: 01 00 00 00 nop
40006b04: 82 77 00 1b udiv %i4, %i3, %g1
40006b08: 82 58 40 1b smul %g1, %i3, %g1
if ( remainder != 0 ) {
40006b0c: 82 a7 00 01 subcc %i4, %g1, %g1
40006b10: 22 bf ff e5 be,a 40006aa4 <_Heap_Initialize+0x94>
40006b14: b8 10 00 19 mov %i1, %i4
40006b18: b8 06 40 1b add %i1, %i3, %i4
40006b1c: b8 27 00 01 sub %i4, %g1, %i4
40006b20: 82 27 00 19 sub %i4, %i1, %g1
40006b24: 10 bf ff e1 b 40006aa8 <_Heap_Initialize+0x98>
40006b28: 82 00 60 08 add %g1, 8, %g1
memset(heap, 0, sizeof(*heap));
40006b2c: 92 10 20 00 clr %o1
40006b30: 40 00 23 1b call 4000f79c <memset>
40006b34: 90 10 00 18 mov %i0, %o0
first_block->size_and_flag = first_block_size | HEAP_PREV_BLOCK_USED;
40006b38: 82 17 60 01 or %i5, 1, %g1
first_block->next = _Heap_Free_list_tail( heap );
40006b3c: f0 27 20 08 st %i0, [ %i4 + 8 ]
return (Heap_Block *) ((uintptr_t) block + offset);
40006b40: 86 07 40 1c add %i5, %i4, %g3
first_block->size_and_flag = first_block_size | HEAP_PREV_BLOCK_USED;
40006b44: c2 27 20 04 st %g1, [ %i4 + 4 ]
_Heap_Block_set_size(
40006b48: 82 20 00 1d neg %i5, %g1
first_block->prev = _Heap_Free_list_head( heap );
40006b4c: f0 27 20 0c st %i0, [ %i4 + 0xc ]
stats->free_blocks = 1;
40006b50: 84 10 20 01 mov 1, %g2
first_block->prev_size = heap_area_end;
40006b54: e2 27 00 00 st %l1, [ %i4 ]
heap->page_size = page_size;
40006b58: f6 26 20 10 st %i3, [ %i0 + 0x10 ]
heap->min_block_size = min_block_size;
40006b5c: e0 26 20 14 st %l0, [ %i0 + 0x14 ]
heap->area_begin = heap_area_begin;
40006b60: f2 26 20 18 st %i1, [ %i0 + 0x18 ]
heap->area_end = heap_area_end;
40006b64: e2 26 20 1c st %l1, [ %i0 + 0x1c ]
heap->first_block = first_block;
40006b68: f8 26 20 20 st %i4, [ %i0 + 0x20 ]
heap->last_block = last_block;
40006b6c: c6 26 20 24 st %g3, [ %i0 + 0x24 ]
_Heap_Free_list_head( heap )->next = first_block;
40006b70: f8 26 20 08 st %i4, [ %i0 + 8 ]
_Heap_Free_list_tail( heap )->prev = first_block;
40006b74: f8 26 20 0c st %i4, [ %i0 + 0xc ]
last_block->prev_size = first_block_size;
40006b78: fa 27 40 1c st %i5, [ %i5 + %i4 ]
block->size_and_flag = size | flag;
40006b7c: c2 20 e0 04 st %g1, [ %g3 + 4 ]
stats->size = first_block_size;
40006b80: fa 26 20 38 st %i5, [ %i0 + 0x38 ]
stats->free_size = first_block_size;
40006b84: fa 26 20 3c st %i5, [ %i0 + 0x3c ]
stats->min_free_size = first_block_size;
40006b88: fa 26 20 40 st %i5, [ %i0 + 0x40 ]
stats->free_blocks = 1;
40006b8c: c4 26 20 44 st %g2, [ %i0 + 0x44 ]
stats->max_free_blocks = 1;
40006b90: c4 26 20 48 st %g2, [ %i0 + 0x48 ]
}
40006b94: 81 c7 e0 08 ret
40006b98: 91 e8 00 1d restore %g0, %i5, %o0
40009ac4 <_Heap_Iterate>:
void _Heap_Iterate(
Heap_Control *heap,
Heap_Block_visitor visitor,
void *visitor_arg
)
{
40009ac4: 9d e3 bf a0 save %sp, -96, %sp
Heap_Block *current = heap->first_block;
40009ac8: c2 06 20 20 ld [ %i0 + 0x20 ], %g1
Heap_Block *end = heap->last_block;
40009acc: f8 06 20 24 ld [ %i0 + 0x24 ], %i4
bool stop = false;
while ( !stop && current != end ) {
40009ad0: 80 a0 40 1c cmp %g1, %i4
40009ad4: 32 80 00 07 bne,a 40009af0 <_Heap_Iterate+0x2c>
<== ALWAYS TAKEN
40009ad8: d2 00 60 04 ld [ %g1 + 4 ], %o1
40009adc: 30 80 00 10 b,a 40009b1c <_Heap_Iterate+0x58>
<== NOT EXECUTED
40009ae0: 80 a7 00 1d cmp %i4, %i5
40009ae4: 02 80 00 0e be 40009b1c <_Heap_Iterate+0x58>
40009ae8: 01 00 00 00 nop
return block->size_and_flag & ~HEAP_PREV_BLOCK_USED;
40009aec: d2 00 60 04 ld [ %g1 + 4 ], %o1
40009af0: 92 0a 7f fe and %o1, -2, %o1
return (Heap_Block *) ((uintptr_t) block + offset);
40009af4: ba 00 40 09 add %g1, %o1, %i5
return block->size_and_flag & HEAP_PREV_BLOCK_USED;
40009af8: d4 07 60 04 ld [ %i5 + 4 ], %o2
uintptr_t size = _Heap_Block_size( current );
Heap_Block *next = _Heap_Block_at( current, size );
bool used = _Heap_Is_prev_used( next );
stop = (*visitor)( current, size, used, visitor_arg );
40009afc: 90 10 00 01 mov %g1, %o0
40009b00: 96 10 00 1a mov %i2, %o3
40009b04: 9f c6 40 00 call %i1
40009b08: 94 0a a0 01 and %o2, 1, %o2
while ( !stop && current != end ) {
40009b0c: 90 1a 20 01 xor %o0, 1, %o0
40009b10: 80 8a 20 ff btst 0xff, %o0
40009b14: 12 bf ff f3 bne 40009ae0 <_Heap_Iterate+0x1c>
40009b18: 82 10 00 1d mov %i5, %g1
current = next;
}
}
40009b1c: 81 c7 e0 08 ret
40009b20: 81 e8 00 00 restore
40009bd8 <_IO_Vprintf>:
return (p);
}
int
_IO_Vprintf(IO_Put_char put_char, void *arg, char const *fmt, va_list ap)
{
40009bd8: 9d e3 bf 50 save %sp, -176, %sp
char padc;
int stop = 0, retval = 0;
num = 0;
if (fmt == NULL)
40009bdc: 80 a6 a0 00 cmp %i2, 0
40009be0: 02 80 00 3e be 40009cd8 <_IO_Vprintf+0x100>
40009be4: b8 10 00 18 mov %i0, %i4
}
percent = fmt - 1;
lflag = 0; ladjust = 0; sharpflag = 0; neg = 0;
sign = 0; dot = 0; dwidth = 0; upper = 0;
cflag = 0; hflag = 0; jflag = 0; tflag = 0; zflag = 0;
reswitch: switch (ch = (u_char)*fmt++) {
40009be8: 31 10 00 26 sethi %hi(0x40009800), %i0
40009bec: 03 10 00 5d sethi %hi(0x40017400), %g1
40009bf0: a8 10 20 00 clr %l4
40009bf4: a4 10 20 00 clr %l2
40009bf8: b0 16 22 78 or %i0, 0x278, %i0
40009bfc: ae 10 62 9f or %g1, 0x29f, %l7
while ((ch = (u_char)*fmt++) != '%' || stop) {
40009c00: c2 0e 80 00 ldub [ %i2 ], %g1
40009c04: a4 0c a0 01 and %l2, 1, %l2
40009c08: ba 06 a0 01 add %i2, 1, %i5
40009c0c: 90 10 00 01 mov %g1, %o0
40009c10: 80 a0 60 25 cmp %g1, 0x25
40009c14: 12 80 00 05 bne 40009c28 <_IO_Vprintf+0x50>
40009c18: a0 10 00 12 mov %l2, %l0
40009c1c: 80 a4 a0 00 cmp %l2, 0
40009c20: 22 80 00 16 be,a 40009c78 <_IO_Vprintf+0xa0>
<== ALWAYS TAKEN
40009c24: 82 10 00 1d mov %i5, %g1
if (ch == '\0')
40009c28: 80 a0 60 00 cmp %g1, 0
40009c2c: 02 80 00 32 be 40009cf4 <_IO_Vprintf+0x11c>
<== NEVER TAKEN
40009c30: b4 25 00 1a sub %l4, %i2, %i2
while ((ch = (u_char)*fmt++) != '%' || stop) {
40009c34: a0 0c 20 ff and %l0, 0xff, %l0
PCHAR(ch);
40009c38: 9f c7 00 00 call %i4
40009c3c: 92 10 00 19 mov %i1, %o1
while ((ch = (u_char)*fmt++) != '%' || stop) {
40009c40: 82 07 60 01 add %i5, 1, %g1
40009c44: d0 08 7f ff ldub [ %g1 + -1 ], %o0
40009c48: 80 a2 20 25 cmp %o0, 0x25
40009c4c: 12 80 00 05 bne 40009c60 <_IO_Vprintf+0x88>
40009c50: aa 07 40 1a add %i5, %i2, %l5
40009c54: 80 a4 20 00 cmp %l0, 0
40009c58: 02 80 00 0b be 40009c84 <_IO_Vprintf+0xac>
<== ALWAYS TAKEN
40009c5c: 84 10 20 20 mov 0x20, %g2
if (ch == '\0')
40009c60: 80 a2 20 00 cmp %o0, 0
40009c64: 12 bf ff f5 bne 40009c38 <_IO_Vprintf+0x60>
40009c68: ba 10 00 01 mov %g1, %i5
40009c6c: ac 10 00 15 mov %l5, %l6
stop = 1;
break;
}
}
#undef PCHAR
}
40009c70: 81 c7 e0 08 ret
40009c74: 91 e8 00 16 restore %g0, %l6, %o0
while ((ch = (u_char)*fmt++) != '%' || stop) {
40009c78: aa 10 00 14 mov %l4, %l5
40009c7c: ba 10 00 1a mov %i2, %i5
padc = ' ';
40009c80: 84 10 20 20 mov 0x20, %g2
sign = 0; dot = 0; dwidth = 0; upper = 0;
40009c84: c0 27 bf d0 clr [ %fp + -48 ]
cflag = 0; hflag = 0; jflag = 0; tflag = 0; zflag = 0;
40009c88: a8 10 20 00 clr %l4
padc = ' ';
40009c8c: c4 2f bf c3 stb %g2, [ %fp + -61 ]
cflag = 0; hflag = 0; jflag = 0; tflag = 0; zflag = 0;
40009c90: 9e 10 20 00 clr %o7
lflag = 0; ladjust = 0; sharpflag = 0; neg = 0;
40009c94: c0 27 bf c4 clr [ %fp + -60 ]
cflag = 0; hflag = 0; jflag = 0; tflag = 0; zflag = 0;
40009c98: 9a 10 20 00 clr %o5
width = 0;
40009c9c: c0 27 bf d4 clr [ %fp + -44 ]
sign = 0; dot = 0; dwidth = 0; upper = 0;
40009ca0: 96 10 20 00 clr %o3
40009ca4: d8 08 40 00 ldub [ %g1 ], %o4
lflag = 0; ladjust = 0; sharpflag = 0; neg = 0;
40009ca8: a4 10 20 00 clr %l2
cflag = 0; hflag = 0; jflag = 0; tflag = 0; zflag = 0;
40009cac: 88 10 20 00 clr %g4
reswitch: switch (ch = (u_char)*fmt++) {
40009cb0: 84 03 3f dd add %o4, -35, %g2
40009cb4: b4 00 60 01 add %g1, 1, %i2
40009cb8: 84 08 a0 ff and %g2, 0xff, %g2
40009cbc: 80 a0 a0 57 cmp %g2, 0x57
40009cc0: 18 80 01 d9 bgu 4000a424 <_IO_Vprintf+0x84c>
40009cc4: 90 0b 20 ff and %o4, 0xff, %o0
40009cc8: 85 28 a0 02 sll %g2, 2, %g2
40009ccc: c4 06 00 02 ld [ %i0 + %g2 ], %g2
40009cd0: 81 c0 80 00 jmp %g2
40009cd4: 01 00 00 00 nop
fmt = "(fmt null)\n";
40009cd8: 35 10 00 5d sethi %hi(0x40017400), %i2
<== NOT EXECUTED
40009cdc: 10 bf ff c3 b 40009be8 <_IO_Vprintf+0x10>
<== NOT EXECUTED
40009ce0: b4 16 a2 88 or %i2, 0x288, %i2 ! 40017688 <_Workspace_Is_unified+0x8>
<== NOT EXECUTED
40009ce4: d8 08 60 01 ldub [ %g1 + 1 ], %o4
zflag = 1;
40009ce8: 88 10 20 01 mov 1, %g4
goto reswitch;
40009cec: 10 bf ff f1 b 40009cb0 <_IO_Vprintf+0xd8>
40009cf0: 82 10 00 1a mov %i2, %g1
return (retval);
40009cf4: 10 bf ff df b 40009c70 <_IO_Vprintf+0x98>
40009cf8: ac 10 00 14 mov %l4, %l6
if (!dot) {
40009cfc: 80 a2 e0 00 cmp %o3, 0
40009d00: 32 80 02 5b bne,a 4000a66c <_IO_Vprintf+0xa94>
<== NEVER TAKEN
40009d04: c6 48 60 01 ldsb [ %g1 + 1 ], %g3
<== NOT EXECUTED
padc = '0';
40009d08: d8 2f bf c3 stb %o4, [ %fp + -61 ]
if (!dot) {
40009d0c: d8 08 60 01 ldub [ %g1 + 1 ], %o4
reswitch: switch (ch = (u_char)*fmt++) {
40009d10: 10 bf ff e8 b 40009cb0 <_IO_Vprintf+0xd8>
40009d14: 82 10 00 1a mov %i2, %g1
40009d18: 84 10 20 00 clr %g2
40009d1c: 86 10 20 10 mov 0x10, %g3
base = 16;
40009d20: 82 10 20 10 mov 0x10, %g1
reswitch: switch (ch = (u_char)*fmt++) {
40009d24: c4 3f bf b0 std %g2, [ %fp + -80 ]
sign = 0; dot = 0; dwidth = 0; upper = 0;
40009d28: ba 10 20 00 clr %i5
base = 16;
40009d2c: c2 27 bf bc st %g1, [ %fp + -68 ]
if (jflag)
40009d30: 80 a5 20 00 cmp %l4, 0
40009d34: 02 80 01 dc be 4000a4a4 <_IO_Vprintf+0x8cc>
40009d38: 80 a1 20 00 cmp %g4, 0
num = va_arg(ap, uintmax_t);
40009d3c: 92 10 00 1b mov %i3, %o1
40009d40: 94 10 20 08 mov 8, %o2
40009d44: 40 00 16 5a call 4000f6ac <memcpy>
40009d48: 90 07 bf d8 add %fp, -40, %o0
40009d4c: c4 1f bf d8 ldd [ %fp + -40 ], %g2
40009d50: c4 3f bf c8 std %g2, [ %fp + -56 ]
40009d54: b6 06 e0 08 add %i3, 8, %i3
lflag = 0; ladjust = 0; sharpflag = 0; neg = 0;
40009d58: a8 10 20 00 clr %l4
40009d5c: bb 2f 60 04 sll %i5, 4, %i5
*p = '\0';
40009d60: c0 2f bf e8 clrb [ %fp + -24 ]
*++p = hex2ascii_data[upper][num % base];
40009d64: a2 05 c0 1d add %l7, %i5, %l1
40009d68: f4 27 a0 4c st %i2, [ %fp + 0x4c ]
40009d6c: ac 10 00 1c mov %i4, %l6
*p = '\0';
40009d70: c4 1f bf c8 ldd [ %fp + -56 ], %g2
*++p = hex2ascii_data[upper][num % base];
40009d74: f8 1f bf b0 ldd [ %fp + -80 ], %i4
40009d78: f6 27 a0 50 st %i3, [ %fp + 0x50 ]
*p = '\0';
40009d7c: a6 10 00 02 mov %g2, %l3
p = nbuf;
40009d80: a0 07 bf e8 add %fp, -24, %l0
*++p = hex2ascii_data[upper][num % base];
40009d84: b6 10 00 03 mov %g3, %i3
40009d88: 94 10 00 1c mov %i4, %o2
40009d8c: 96 10 00 1d mov %i5, %o3
40009d90: 90 10 00 13 mov %l3, %o0
40009d94: 40 00 14 4a call 4000eebc <__umoddi3>
40009d98: 92 10 00 1b mov %i3, %o1
40009d9c: f4 0c 40 09 ldub [ %l1 + %o1 ], %i2
40009da0: a0 04 20 01 inc %l0
40009da4: f4 2c 00 00 stb %i2, [ %l0 ]
} while (num /= base);
40009da8: 90 10 00 13 mov %l3, %o0
40009dac: 92 10 00 1b mov %i3, %o1
40009db0: 94 10 00 1c mov %i4, %o2
40009db4: 40 00 13 c9 call 4000ecd8 <__udivdi3>
40009db8: 96 10 00 1d mov %i5, %o3
40009dbc: a6 10 00 08 mov %o0, %l3
40009dc0: 80 92 40 13 orcc %o1, %l3, %g0
40009dc4: 12 bf ff f1 bne 40009d88 <_IO_Vprintf+0x1b0>
40009dc8: b6 10 00 09 mov %o1, %i3
if (sharpflag && num != 0) {
40009dcc: c4 1f bf c8 ldd [ %fp + -56 ], %g2
40009dd0: 82 10 00 02 mov %g2, %g1
40009dd4: c4 07 bf c4 ld [ %fp + -60 ], %g2
40009dd8: 82 10 40 03 or %g1, %g3, %g1
40009ddc: 80 a0 00 01 cmp %g0, %g1
40009de0: 86 40 20 00 addx %g0, 0, %g3
40009de4: 84 88 c0 02 andcc %g3, %g2, %g2
40009de8: c4 27 bf c4 st %g2, [ %fp + -60 ]
*lenp = p - nbuf;
40009dec: 82 07 bf e8 add %fp, -24, %g1
40009df0: ba 10 00 1a mov %i2, %i5
40009df4: a2 24 00 01 sub %l0, %g1, %l1
40009df8: b8 10 00 16 mov %l6, %i4
40009dfc: f4 07 a0 4c ld [ %fp + 0x4c ], %i2
40009e00: f6 07 a0 50 ld [ %fp + 0x50 ], %i3
if (sharpflag && num != 0) {
40009e04: 02 80 00 0a be 40009e2c <_IO_Vprintf+0x254>
<== ALWAYS TAKEN
40009e08: 82 10 20 00 clr %g1
if (base == 8)
40009e0c: c4 07 bf bc ld [ %fp + -68 ], %g2
40009e10: 80 a0 a0 08 cmp %g2, 8
40009e14: 02 80 00 06 be 40009e2c <_IO_Vprintf+0x254>
40009e18: 82 10 20 01 mov 1, %g1
tmp = 0;
40009e1c: 82 18 a0 10 xor %g2, 0x10, %g1
40009e20: 80 a0 00 01 cmp %g0, %g1
40009e24: 82 60 3f ff subx %g0, -1, %g1
40009e28: 83 28 60 01 sll %g1, 1, %g1
tmp++;
40009e2c: 80 a0 00 14 cmp %g0, %l4
40009e30: 82 40 00 01 addx %g0, %g1, %g1
if (!ladjust && padc == '0')
40009e34: 80 8c a0 01 btst 1, %l2
40009e38: 12 80 01 8d bne 4000a46c <_IO_Vprintf+0x894>
40009e3c: c4 0f bf c3 ldub [ %fp + -61 ], %g2
40009e40: 87 28 a0 18 sll %g2, 0x18, %g3
40009e44: 87 38 e0 18 sra %g3, 0x18, %g3
40009e48: 80 a0 e0 30 cmp %g3, 0x30
40009e4c: 12 80 01 88 bne 4000a46c <_IO_Vprintf+0x894>
<== ALWAYS TAKEN
40009e50: c4 07 bf d4 ld [ %fp + -44 ], %g2
dwidth = width - tmp;
40009e54: ac 20 80 01 sub %g2, %g1, %l6
static inline int imax(int a, int b) { return (a > b ? a : b); }
40009e58: 80 a5 80 11 cmp %l6, %l1
40009e5c: 16 80 00 04 bge 40009e6c <_IO_Vprintf+0x294>
40009e60: 86 10 00 16 mov %l6, %g3
40009e64: 86 10 00 11 mov %l1, %g3
width -= tmp + imax(dwidth, n);
40009e68: c4 07 bf d4 ld [ %fp + -44 ], %g2
40009e6c: 82 00 c0 01 add %g3, %g1, %g1
dwidth -= n;
40009e70: a2 25 80 11 sub %l6, %l1, %l1
width -= tmp + imax(dwidth, n);
40009e74: a6 20 80 01 sub %g2, %g1, %l3
while (width-- > 0)
40009e78: ac 04 ff ff add %l3, -1, %l6
40009e7c: 80 a4 e0 00 cmp %l3, 0
40009e80: 04 80 00 0b ble 40009eac <_IO_Vprintf+0x2d4>
<== ALWAYS TAKEN
40009e84: a6 10 00 16 mov %l6, %l3
PCHAR(' ');
40009e88: 92 10 00 19 mov %i1, %o1
40009e8c: 9f c7 00 00 call %i4
40009e90: 90 10 20 20 mov 0x20, %o0
while (width-- > 0)
40009e94: a6 04 ff ff add %l3, -1, %l3
40009e98: 80 a4 ff ff cmp %l3, -1
40009e9c: 12 bf ff fc bne 40009e8c <_IO_Vprintf+0x2b4>
40009ea0: 92 10 00 19 mov %i1, %o1
40009ea4: 84 05 60 01 add %l5, 1, %g2
40009ea8: aa 05 80 02 add %l6, %g2, %l5
if (neg)
40009eac: 80 a5 20 00 cmp %l4, 0
40009eb0: 02 80 01 8e be 4000a4e8 <_IO_Vprintf+0x910>
40009eb4: 92 10 00 19 mov %i1, %o1
PCHAR('-');
40009eb8: 90 10 20 2d mov 0x2d, %o0
40009ebc: 9f c7 00 00 call %i4
40009ec0: a8 05 60 01 add %l5, 1, %l4
if (sharpflag && num != 0) {
40009ec4: c2 07 bf c4 ld [ %fp + -60 ], %g1
40009ec8: 80 a0 60 00 cmp %g1, 0
40009ecc: 02 80 00 0a be 40009ef4 <_IO_Vprintf+0x31c>
<== ALWAYS TAKEN
40009ed0: 80 a4 60 00 cmp %l1, 0
if (base == 8) {
40009ed4: c2 07 bf bc ld [ %fp + -68 ], %g1
40009ed8: 80 a0 60 08 cmp %g1, 8
40009edc: 12 80 01 92 bne 4000a524 <_IO_Vprintf+0x94c>
40009ee0: 92 10 00 19 mov %i1, %o1
PCHAR('0');
40009ee4: 90 10 20 30 mov 0x30, %o0
<== NOT EXECUTED
40009ee8: 9f c7 00 00 call %i4
<== NOT EXECUTED
40009eec: a8 05 20 01 inc %l4
<== NOT EXECUTED
while (dwidth-- > 0)
40009ef0: 80 a4 60 00 cmp %l1, 0
<== NOT EXECUTED
40009ef4: 04 80 00 0c ble 40009f24 <_IO_Vprintf+0x34c>
40009ef8: aa 04 7f ff add %l1, -1, %l5
40009efc: a2 10 00 15 mov %l5, %l1
PCHAR('0');
40009f00: 92 10 00 19 mov %i1, %o1
40009f04: 9f c7 00 00 call %i4
40009f08: 90 10 20 30 mov 0x30, %o0
while (dwidth-- > 0)
40009f0c: a2 04 7f ff add %l1, -1, %l1
40009f10: 80 a4 7f ff cmp %l1, -1
40009f14: 12 bf ff fc bne 40009f04 <_IO_Vprintf+0x32c>
40009f18: 92 10 00 19 mov %i1, %o1
40009f1c: a8 05 20 01 inc %l4
40009f20: a8 05 00 15 add %l4, %l5, %l4
while (*p)
40009f24: bb 2f 60 18 sll %i5, 0x18, %i5
40009f28: 80 a7 60 00 cmp %i5, 0
40009f2c: 02 80 00 0c be 40009f5c <_IO_Vprintf+0x384>
<== NEVER TAKEN
40009f30: 80 a4 a0 00 cmp %l2, 0
PCHAR(*p--);
40009f34: 91 3f 60 18 sra %i5, 0x18, %o0
40009f38: a0 04 3f ff add %l0, -1, %l0
40009f3c: 9f c7 00 00 call %i4
40009f40: 92 10 00 19 mov %i1, %o1
while (*p)
40009f44: fa 0c 00 00 ldub [ %l0 ], %i5
40009f48: bb 2f 60 18 sll %i5, 0x18, %i5
40009f4c: 80 a7 60 00 cmp %i5, 0
40009f50: 12 bf ff f9 bne 40009f34 <_IO_Vprintf+0x35c>
40009f54: a8 05 20 01 inc %l4
if (ladjust)
40009f58: 80 a4 a0 00 cmp %l2, 0
40009f5c: 22 bf ff 2a be,a 40009c04 <_IO_Vprintf+0x2c>
40009f60: c2 0e 80 00 ldub [ %i2 ], %g1
while (width-- > 0)
40009f64: 80 a4 e0 00 cmp %l3, 0
40009f68: 04 80 01 59 ble 4000a4cc <_IO_Vprintf+0x8f4>
40009f6c: a0 04 ff ff add %l3, -1, %l0
40009f70: ba 10 00 10 mov %l0, %i5
PCHAR(' ');
40009f74: 92 10 00 19 mov %i1, %o1
40009f78: 9f c7 00 00 call %i4
40009f7c: 90 10 20 20 mov 0x20, %o0
while (width-- > 0)
40009f80: ba 07 7f ff add %i5, -1, %i5
40009f84: 80 a7 7f ff cmp %i5, -1
40009f88: 12 bf ff fc bne 40009f78 <_IO_Vprintf+0x3a0>
40009f8c: 92 10 00 19 mov %i1, %o1
40009f90: a8 05 20 01 inc %l4
40009f94: a4 10 20 00 clr %l2
40009f98: 10 bf ff 1a b 40009c00 <_IO_Vprintf+0x28>
40009f9c: a8 04 00 14 add %l0, %l4, %l4
reswitch: switch (ch = (u_char)*fmt++) {
40009fa0: 84 10 20 00 clr %g2
<== NOT EXECUTED
40009fa4: 86 10 20 10 mov 0x10, %g3
<== NOT EXECUTED
base = 16;
40009fa8: 82 10 20 10 mov 0x10, %g1
<== NOT EXECUTED
reswitch: switch (ch = (u_char)*fmt++) {
40009fac: c4 3f bf b0 std %g2, [ %fp + -80 ]
<== NOT EXECUTED
base = 16;
40009fb0: c2 27 bf bc st %g1, [ %fp + -68 ]
<== NOT EXECUTED
if (jflag)
40009fb4: 80 a5 20 00 cmp %l4, 0
40009fb8: 02 80 01 4e be 4000a4f0 <_IO_Vprintf+0x918>
40009fbc: 82 06 e0 04 add %i3, 4, %g1
num = va_arg(ap, intmax_t);
40009fc0: 92 10 00 1b mov %i3, %o1
40009fc4: 94 10 20 08 mov 8, %o2
40009fc8: 40 00 15 b9 call 4000f6ac <memcpy>
40009fcc: 90 07 bf e0 add %fp, -32, %o0
40009fd0: c4 1f bf e0 ldd [ %fp + -32 ], %g2
40009fd4: c4 3f bf c8 std %g2, [ %fp + -56 ]
40009fd8: b6 06 e0 08 add %i3, 8, %i3
if (sign && (intmax_t)num < 0) {
40009fdc: c4 1f bf c8 ldd [ %fp + -56 ], %g2
40009fe0: 82 90 a0 00 orcc %g2, 0, %g1
40009fe4: 16 80 01 c8 bge 4000a704 <_IO_Vprintf+0xb2c>
40009fe8: 9a a0 00 03 subcc %g0, %g3, %o5
num = -(intmax_t)num;
40009fec: ba 10 20 00 clr %i5
40009ff0: 98 60 00 02 subx %g0, %g2, %o4
neg = 1;
40009ff4: a8 10 20 01 mov 1, %l4
num = -(intmax_t)num;
40009ff8: 10 bf ff 59 b 40009d5c <_IO_Vprintf+0x184>
40009ffc: d8 3f bf c8 std %o4, [ %fp + -56 ]
if (!ladjust && width > 0)
4000a000: c2 07 bf d4 ld [ %fp + -44 ], %g1
4000a004: 80 a0 60 01 cmp %g1, 1
4000a008: 14 80 00 03 bg 4000a014 <_IO_Vprintf+0x43c>
4000a00c: ba 10 20 01 mov 1, %i5
4000a010: ba 10 20 00 clr %i5
4000a014: a8 05 60 01 add %l5, 1, %l4
4000a018: 80 8c a0 01 btst 1, %l2
4000a01c: 12 80 01 52 bne 4000a564 <_IO_Vprintf+0x98c>
4000a020: a0 06 e0 04 add %i3, 4, %l0
4000a024: 80 8f 60 ff btst 0xff, %i5
4000a028: 02 80 01 4f be 4000a564 <_IO_Vprintf+0x98c>
4000a02c: c2 07 bf d4 ld [ %fp + -44 ], %g1
while (width--)
4000a030: a6 00 7f fe add %g1, -2, %l3
<== NOT EXECUTED
4000a034: c2 0f bf c3 ldub [ %fp + -61 ], %g1
<== NOT EXECUTED
4000a038: a3 28 60 18 sll %g1, 0x18, %l1
<== NOT EXECUTED
4000a03c: ba 10 00 13 mov %l3, %i5
<== NOT EXECUTED
4000a040: a3 3c 60 18 sra %l1, 0x18, %l1
<== NOT EXECUTED
PCHAR(padc);
4000a044: 92 10 00 19 mov %i1, %o1
<== NOT EXECUTED
4000a048: 9f c7 00 00 call %i4
<== NOT EXECUTED
4000a04c: 90 10 00 11 mov %l1, %o0
<== NOT EXECUTED
while (width--)
4000a050: ba 07 7f ff add %i5, -1, %i5
<== NOT EXECUTED
4000a054: 80 a7 7f ff cmp %i5, -1
<== NOT EXECUTED
4000a058: 12 bf ff fc bne 4000a048 <_IO_Vprintf+0x470>
<== NOT EXECUTED
4000a05c: 92 10 00 19 mov %i1, %o1
<== NOT EXECUTED
PCHAR(va_arg(ap, int));
4000a060: d0 06 c0 00 ld [ %i3 ], %o0
<== NOT EXECUTED
4000a064: a6 05 00 13 add %l4, %l3, %l3
<== NOT EXECUTED
4000a068: a8 04 e0 01 add %l3, 1, %l4
<== NOT EXECUTED
4000a06c: 9f c7 00 00 call %i4
<== NOT EXECUTED
4000a070: b6 10 00 10 mov %l0, %i3
<== NOT EXECUTED
4000a074: 10 bf fe e3 b 40009c00 <_IO_Vprintf+0x28>
<== NOT EXECUTED
4000a078: a4 10 20 00 clr %l2
<== NOT EXECUTED
reswitch: switch (ch = (u_char)*fmt++) {
4000a07c: 84 10 20 00 clr %g2
4000a080: 86 10 20 0a mov 0xa, %g3
base = 10;
4000a084: 82 10 20 0a mov 0xa, %g1
reswitch: switch (ch = (u_char)*fmt++) {
4000a088: c4 3f bf b0 std %g2, [ %fp + -80 ]
base = 10;
4000a08c: 10 bf ff ca b 40009fb4 <_IO_Vprintf+0x3dc>
4000a090: c2 27 bf bc st %g1, [ %fp + -68 ]
if (hflag) {
4000a094: 80 a3 e0 00 cmp %o7, 0
4000a098: 12 80 01 55 bne 4000a5ec <_IO_Vprintf+0xa14>
4000a09c: d8 08 60 01 ldub [ %g1 + 1 ], %o4
hflag = 1;
4000a0a0: 9e 10 20 01 mov 1, %o7
reswitch: switch (ch = (u_char)*fmt++) {
4000a0a4: 10 bf ff 03 b 40009cb0 <_IO_Vprintf+0xd8>
4000a0a8: 82 10 00 1a mov %i2, %g1
4000a0ac: d8 08 60 01 ldub [ %g1 + 1 ], %o4
jflag = 1;
4000a0b0: a8 10 20 01 mov 1, %l4
goto reswitch;
4000a0b4: 10 bf fe ff b 40009cb0 <_IO_Vprintf+0xd8>
4000a0b8: 82 10 00 1a mov %i2, %g1
reswitch: switch (ch = (u_char)*fmt++) {
4000a0bc: 84 10 20 00 clr %g2
4000a0c0: 86 10 20 10 mov 0x10, %g3
base = 16;
4000a0c4: 82 10 20 10 mov 0x10, %g1
reswitch: switch (ch = (u_char)*fmt++) {
4000a0c8: c4 3f bf b0 std %g2, [ %fp + -80 ]
upper = 1;
4000a0cc: ba 10 20 01 mov 1, %i5
base = 16;
4000a0d0: 10 bf ff 18 b 40009d30 <_IO_Vprintf+0x158>
4000a0d4: c2 27 bf bc st %g1, [ %fp + -68 ]
reswitch: switch (ch = (u_char)*fmt++) {
4000a0d8: 84 10 20 00 clr %g2
4000a0dc: 86 10 20 0a mov 0xa, %g3
base = 10;
4000a0e0: 82 10 20 0a mov 0xa, %g1
reswitch: switch (ch = (u_char)*fmt++) {
4000a0e4: c4 3f bf b0 std %g2, [ %fp + -80 ]
sign = 0; dot = 0; dwidth = 0; upper = 0;
4000a0e8: ba 10 20 00 clr %i5
base = 10;
4000a0ec: 10 bf ff 11 b 40009d30 <_IO_Vprintf+0x158>
4000a0f0: c2 27 bf bc st %g1, [ %fp + -68 ]
4000a0f4: d8 08 60 01 ldub [ %g1 + 1 ], %o4
dot = 1;
4000a0f8: 96 10 20 01 mov 1, %o3
reswitch: switch (ch = (u_char)*fmt++) {
4000a0fc: 10 bf fe ed b 40009cb0 <_IO_Vprintf+0xd8>
4000a100: 82 10 00 1a mov %i2, %g1
ch = *fmt;
4000a104: c6 48 60 01 ldsb [ %g1 + 1 ], %g3
if (ch < '0' || ch > '9')
4000a108: 84 00 ff d0 add %g3, -48, %g2
n = n * 10 + ch - '0';
4000a10c: 90 02 3f d0 add %o0, -48, %o0
if (ch < '0' || ch > '9')
4000a110: 80 a0 a0 09 cmp %g2, 9
4000a114: 18 80 00 d4 bgu 4000a464 <_IO_Vprintf+0x88c>
4000a118: d8 08 60 01 ldub [ %g1 + 1 ], %o4
reswitch: switch (ch = (u_char)*fmt++) {
4000a11c: 82 10 00 1a mov %i2, %g1
for (n = 0;; ++fmt) {
4000a120: 82 00 60 01 inc %g1
n = n * 10 + ch - '0';
4000a124: 85 2a 20 02 sll %o0, 2, %g2
4000a128: 84 00 80 08 add %g2, %o0, %g2
4000a12c: 85 28 a0 01 sll %g2, 1, %g2
4000a130: 84 00 80 03 add %g2, %g3, %g2
ch = *fmt;
4000a134: c6 48 40 00 ldsb [ %g1 ], %g3
if (ch < '0' || ch > '9')
4000a138: b4 00 ff d0 add %g3, -48, %i2
n = n * 10 + ch - '0';
4000a13c: 90 00 bf d0 add %g2, -48, %o0
if (ch < '0' || ch > '9')
4000a140: 80 a6 a0 09 cmp %i2, 9
4000a144: 08 bf ff f7 bleu 4000a120 <_IO_Vprintf+0x548>
4000a148: d8 08 40 00 ldub [ %g1 ], %o4
if (dot)
4000a14c: 80 a2 e0 00 cmp %o3, 0
4000a150: 22 bf fe d8 be,a 40009cb0 <_IO_Vprintf+0xd8>
4000a154: d0 27 bf d4 st %o0, [ %fp + -44 ]
4000a158: 10 bf fe d6 b 40009cb0 <_IO_Vprintf+0xd8>
4000a15c: d0 27 bf d0 st %o0, [ %fp + -48 ]
if (!width)
4000a160: c2 07 bf d4 ld [ %fp + -44 ], %g1
<== NOT EXECUTED
up = va_arg(ap, u_char *);
4000a164: e0 06 c0 00 ld [ %i3 ], %l0
<== NOT EXECUTED
p = va_arg(ap, char *);
4000a168: e2 06 e0 04 ld [ %i3 + 4 ], %l1
<== NOT EXECUTED
if (!width)
4000a16c: 80 a0 60 00 cmp %g1, 0
<== NOT EXECUTED
4000a170: 12 80 00 04 bne 4000a180 <_IO_Vprintf+0x5a8>
<== NOT EXECUTED
4000a174: b6 06 e0 08 add %i3, 8, %i3
<== NOT EXECUTED
width = 16;
4000a178: 82 10 20 10 mov 0x10, %g1
<== NOT EXECUTED
4000a17c: c2 27 bf d4 st %g1, [ %fp + -44 ]
<== NOT EXECUTED
4000a180: 82 04 3f ff add %l0, -1, %g1
<== NOT EXECUTED
4000a184: c4 07 bf d4 ld [ %fp + -44 ], %g2
<== NOT EXECUTED
for (q=p;*q;q++)
4000a188: a8 10 00 15 mov %l5, %l4
<== NOT EXECUTED
4000a18c: a4 04 00 02 add %l0, %g2, %l2
<== NOT EXECUTED
4000a190: a6 00 40 02 add %g1, %g2, %l3
<== NOT EXECUTED
while(width--) {
4000a194: 80 a4 80 10 cmp %l2, %l0
<== NOT EXECUTED
4000a198: 22 bf fe 9a be,a 40009c00 <_IO_Vprintf+0x28>
<== NOT EXECUTED
4000a19c: a4 10 20 00 clr %l2
<== NOT EXECUTED
PCHAR(hex2ascii(*up >> 4));
4000a1a0: c2 0c 00 00 ldub [ %l0 ], %g1
<== NOT EXECUTED
4000a1a4: 83 30 60 04 srl %g1, 4, %g1
<== NOT EXECUTED
4000a1a8: d0 4d c0 01 ldsb [ %l7 + %g1 ], %o0
<== NOT EXECUTED
4000a1ac: 9f c7 00 00 call %i4
<== NOT EXECUTED
4000a1b0: 92 10 00 19 mov %i1, %o1
<== NOT EXECUTED
PCHAR(hex2ascii(*up & 0x0f));
4000a1b4: c2 0c 00 00 ldub [ %l0 ], %g1
<== NOT EXECUTED
4000a1b8: 82 08 60 0f and %g1, 0xf, %g1
<== NOT EXECUTED
4000a1bc: d0 4d c0 01 ldsb [ %l7 + %g1 ], %o0
<== NOT EXECUTED
4000a1c0: 9f c7 00 00 call %i4
<== NOT EXECUTED
4000a1c4: 92 10 00 19 mov %i1, %o1
<== NOT EXECUTED
if (width)
4000a1c8: 80 a4 c0 10 cmp %l3, %l0
<== NOT EXECUTED
4000a1cc: 02 80 00 c0 be 4000a4cc <_IO_Vprintf+0x8f4>
<== NOT EXECUTED
4000a1d0: a8 05 20 02 add %l4, 2, %l4
<== NOT EXECUTED
for (q=p;*q;q++)
4000a1d4: d0 0c 40 00 ldub [ %l1 ], %o0
<== NOT EXECUTED
4000a1d8: 91 2a 20 18 sll %o0, 0x18, %o0
<== NOT EXECUTED
4000a1dc: 80 a2 20 00 cmp %o0, 0
<== NOT EXECUTED
4000a1e0: 22 bf ff ed be,a 4000a194 <_IO_Vprintf+0x5bc>
<== NOT EXECUTED
4000a1e4: a0 04 20 01 inc %l0
<== NOT EXECUTED
4000a1e8: ba 10 00 11 mov %l1, %i5
<== NOT EXECUTED
PCHAR(*q);
4000a1ec: 91 3a 20 18 sra %o0, 0x18, %o0
<== NOT EXECUTED
4000a1f0: 9f c7 00 00 call %i4
<== NOT EXECUTED
4000a1f4: 92 10 00 19 mov %i1, %o1
<== NOT EXECUTED
for (q=p;*q;q++)
4000a1f8: ba 07 60 01 inc %i5
<== NOT EXECUTED
4000a1fc: d0 0f 40 00 ldub [ %i5 ], %o0
<== NOT EXECUTED
4000a200: 91 2a 20 18 sll %o0, 0x18, %o0
<== NOT EXECUTED
4000a204: 80 a2 20 00 cmp %o0, 0
<== NOT EXECUTED
4000a208: 12 bf ff f9 bne 4000a1ec <_IO_Vprintf+0x614>
<== NOT EXECUTED
4000a20c: a8 05 20 01 inc %l4
<== NOT EXECUTED
4000a210: 10 bf ff e1 b 4000a194 <_IO_Vprintf+0x5bc>
<== NOT EXECUTED
4000a214: a0 04 20 01 inc %l0
<== NOT EXECUTED
if (lflag) {
4000a218: 80 a1 20 00 cmp %g4, 0
4000a21c: 02 bf fe b3 be 40009ce8 <_IO_Vprintf+0x110>
4000a220: d8 08 60 01 ldub [ %g1 + 1 ], %o4
jflag = 1;
4000a224: a8 10 00 04 mov %g4, %l4
reswitch: switch (ch = (u_char)*fmt++) {
4000a228: 10 bf fe a2 b 40009cb0 <_IO_Vprintf+0xd8>
4000a22c: 82 10 00 1a mov %i2, %g1
4000a230: 84 10 20 00 clr %g2
4000a234: 86 10 20 08 mov 8, %g3
base = 8;
4000a238: 82 10 20 08 mov 8, %g1
reswitch: switch (ch = (u_char)*fmt++) {
4000a23c: c4 3f bf b0 std %g2, [ %fp + -80 ]
sign = 0; dot = 0; dwidth = 0; upper = 0;
4000a240: ba 10 20 00 clr %i5
base = 8;
4000a244: 10 bf fe bb b 40009d30 <_IO_Vprintf+0x158>
4000a248: c2 27 bf bc st %g1, [ %fp + -68 ]
sharpflag = (width == 0);
4000a24c: c4 07 bf d4 ld [ %fp + -44 ], %g2
num = (uintptr_t)va_arg(ap, void *);
4000a250: c2 06 c0 00 ld [ %i3 ], %g1
sharpflag = (width == 0);
4000a254: 80 a0 00 02 cmp %g0, %g2
4000a258: 84 60 3f ff subx %g0, -1, %g2
num = (uintptr_t)va_arg(ap, void *);
4000a25c: 86 10 00 01 mov %g1, %g3
sharpflag = (width == 0);
4000a260: c4 27 bf c4 st %g2, [ %fp + -60 ]
num = (uintptr_t)va_arg(ap, void *);
4000a264: 84 10 20 00 clr %g2
base = 16;
4000a268: 82 10 20 10 mov 0x10, %g1
num = (uintptr_t)va_arg(ap, void *);
4000a26c: c4 3f bf c8 std %g2, [ %fp + -56 ]
4000a270: b6 06 e0 04 add %i3, 4, %i3
goto number;
4000a274: 84 10 20 00 clr %g2
4000a278: 86 10 20 10 mov 0x10, %g3
sign = 0; dot = 0; dwidth = 0; upper = 0;
4000a27c: ba 10 20 00 clr %i5
goto number;
4000a280: c4 3f bf b0 std %g2, [ %fp + -80 ]
lflag = 0; ladjust = 0; sharpflag = 0; neg = 0;
4000a284: a8 10 20 00 clr %l4
goto number;
4000a288: 10 bf fe b5 b 40009d5c <_IO_Vprintf+0x184>
4000a28c: c2 27 bf bc st %g1, [ %fp + -68 ]
p = va_arg(ap, char *);
4000a290: fa 06 c0 00 ld [ %i3 ], %i5
if (p == NULL)
4000a294: 80 a7 60 00 cmp %i5, 0
4000a298: 02 80 00 fd be 4000a68c <_IO_Vprintf+0xab4>
4000a29c: b6 06 e0 04 add %i3, 4, %i3
if (!dot)
4000a2a0: 80 a2 e0 00 cmp %o3, 0
4000a2a4: 12 80 00 db bne 4000a610 <_IO_Vprintf+0xa38>
<== NEVER TAKEN
4000a2a8: c2 07 bf d0 ld [ %fp + -48 ], %g1
n = strlen (p);
4000a2ac: 40 00 16 6c call 4000fc5c <strlen>
4000a2b0: 90 10 00 1d mov %i5, %o0
4000a2b4: a2 10 00 08 mov %o0, %l1
width -= n;
4000a2b8: c2 07 bf d4 ld [ %fp + -44 ], %g1
4000a2bc: 84 20 40 11 sub %g1, %l1, %g2
4000a2c0: c4 27 bf d4 st %g2, [ %fp + -44 ]
if (!ladjust && width > 0)
4000a2c4: a1 38 a0 1f sra %g2, 0x1f, %l0
4000a2c8: 82 0c a0 01 and %l2, 1, %g1
4000a2cc: a0 24 00 02 sub %l0, %g2, %l0
4000a2d0: a8 04 7f ff add %l1, -1, %l4
4000a2d4: 80 8c a0 01 btst 1, %l2
4000a2d8: 12 80 00 c9 bne 4000a5fc <_IO_Vprintf+0xa24>
4000a2dc: a1 34 20 1f srl %l0, 0x1f, %l0
4000a2e0: 80 a4 20 00 cmp %l0, 0
4000a2e4: 02 80 00 c7 be 4000a600 <_IO_Vprintf+0xa28>
<== ALWAYS TAKEN
4000a2e8: 80 a4 60 00 cmp %l1, 0
while (width--)
4000a2ec: c2 07 bf d4 ld [ %fp + -44 ], %g1
4000a2f0: a6 00 7f ff add %g1, -1, %l3
4000a2f4: c2 0f bf c3 ldub [ %fp + -61 ], %g1
4000a2f8: a5 28 60 18 sll %g1, 0x18, %l2
4000a2fc: a0 10 00 13 mov %l3, %l0
4000a300: a5 3c a0 18 sra %l2, 0x18, %l2
PCHAR(padc);
4000a304: 92 10 00 19 mov %i1, %o1
4000a308: 9f c7 00 00 call %i4
4000a30c: 90 10 00 12 mov %l2, %o0
while (width--)
4000a310: a0 04 3f ff add %l0, -1, %l0
4000a314: 80 a4 3f ff cmp %l0, -1
4000a318: 12 bf ff fc bne 4000a308 <_IO_Vprintf+0x730>
4000a31c: 92 10 00 19 mov %i1, %o1
4000a320: 84 05 60 01 add %l5, 1, %g2
while (n--)
4000a324: 80 a4 60 00 cmp %l1, 0
4000a328: 02 80 00 fa be 4000a710 <_IO_Vprintf+0xb38>
4000a32c: aa 00 80 13 add %g2, %l3, %l5
4000a330: 82 10 3f ff mov -1, %g1
4000a334: c2 27 bf d4 st %g1, [ %fp + -44 ]
4000a338: a0 10 20 00 clr %l0
4000a33c: a2 05 20 01 add %l4, 1, %l1
4000a340: a2 07 40 11 add %i5, %l1, %l1
PCHAR(*p++);
4000a344: ba 07 60 01 inc %i5
4000a348: d0 4f 7f ff ldsb [ %i5 + -1 ], %o0
4000a34c: 9f c7 00 00 call %i4
4000a350: 92 10 00 19 mov %i1, %o1
while (n--)
4000a354: 80 a7 40 11 cmp %i5, %l1
4000a358: 32 bf ff fc bne,a 4000a348 <_IO_Vprintf+0x770>
4000a35c: ba 07 60 01 inc %i5
4000a360: 84 05 60 01 add %l5, 1, %g2
4000a364: a8 05 00 02 add %l4, %g2, %l4
if (ladjust && width > 0)
4000a368: 80 8c 20 ff btst 0xff, %l0
4000a36c: 02 bf fe 25 be 40009c00 <_IO_Vprintf+0x28>
4000a370: a4 10 20 00 clr %l2
while (width--)
4000a374: c2 07 bf d4 ld [ %fp + -44 ], %g1
4000a378: 80 a0 60 00 cmp %g1, 0
4000a37c: 02 bf fe 21 be 40009c00 <_IO_Vprintf+0x28>
4000a380: a2 00 7f ff add %g1, -1, %l1
4000a384: c2 0f bf c3 ldub [ %fp + -61 ], %g1
4000a388: a1 28 60 18 sll %g1, 0x18, %l0
4000a38c: ba 10 00 11 mov %l1, %i5
4000a390: a1 3c 20 18 sra %l0, 0x18, %l0
PCHAR(padc);
4000a394: 92 10 00 19 mov %i1, %o1
4000a398: 9f c7 00 00 call %i4
4000a39c: 90 10 00 10 mov %l0, %o0
while (width--)
4000a3a0: ba 07 7f ff add %i5, -1, %i5
4000a3a4: 80 a7 7f ff cmp %i5, -1
4000a3a8: 12 bf ff fc bne 4000a398 <_IO_Vprintf+0x7c0>
4000a3ac: 92 10 00 19 mov %i1, %o1
4000a3b0: a8 05 20 01 inc %l4
4000a3b4: a4 10 20 00 clr %l2
4000a3b8: 10 bf fe 12 b 40009c00 <_IO_Vprintf+0x28>
4000a3bc: a8 04 40 14 add %l1, %l4, %l4
4000a3c0: d8 08 60 01 ldub [ %g1 + 1 ], %o4
<== NOT EXECUTED
sharpflag = 1;
4000a3c4: 82 10 20 01 mov 1, %g1
<== NOT EXECUTED
4000a3c8: c2 27 bf c4 st %g1, [ %fp + -60 ]
<== NOT EXECUTED
goto reswitch;
4000a3cc: 10 bf fe 39 b 40009cb0 <_IO_Vprintf+0xd8>
<== NOT EXECUTED
4000a3d0: 82 10 00 1a mov %i2, %g1
<== NOT EXECUTED
PCHAR(ch);
4000a3d4: 92 10 00 19 mov %i1, %o1
4000a3d8: 9f c7 00 00 call %i4
4000a3dc: a8 05 60 01 add %l5, 1, %l4
break;
4000a3e0: 10 bf fe 08 b 40009c00 <_IO_Vprintf+0x28>
4000a3e4: a4 10 20 00 clr %l2
4000a3e8: 84 06 e0 04 add %i3, 4, %g2
if (!dot) {
4000a3ec: 80 a2 e0 00 cmp %o3, 0
4000a3f0: 12 80 00 76 bne 4000a5c8 <_IO_Vprintf+0x9f0>
4000a3f4: c6 06 c0 00 ld [ %i3 ], %g3
if (width < 0) {
4000a3f8: 80 a0 e0 00 cmp %g3, 0
<== NOT EXECUTED
4000a3fc: 06 80 00 af bl 4000a6b8 <_IO_Vprintf+0xae0>
<== NOT EXECUTED
4000a400: c6 27 bf d4 st %g3, [ %fp + -44 ]
<== NOT EXECUTED
4000a404: d8 08 60 01 ldub [ %g1 + 1 ], %o4
dwidth = va_arg(ap, int);
4000a408: b6 10 00 02 mov %g2, %i3
reswitch: switch (ch = (u_char)*fmt++) {
4000a40c: 10 bf fe 29 b 40009cb0 <_IO_Vprintf+0xd8>
4000a410: 82 10 00 1a mov %i2, %g1
4000a414: d8 08 60 01 ldub [ %g1 + 1 ], %o4
ladjust = 1;
4000a418: a4 10 20 01 mov 1, %l2
goto reswitch;
4000a41c: 10 bf fe 25 b 40009cb0 <_IO_Vprintf+0xd8>
4000a420: 82 10 00 1a mov %i2, %g1
while (percent < fmt)
4000a424: a0 10 00 1d mov %i5, %l0
4000a428: a8 10 00 15 mov %l5, %l4
4000a42c: 80 a6 80 1d cmp %i2, %i5
4000a430: 08 bf fd f4 bleu 40009c00 <_IO_Vprintf+0x28>
4000a434: a4 10 20 01 mov 1, %l2
PCHAR(*percent++);
4000a438: a0 04 20 01 inc %l0
4000a43c: d0 4c 3f ff ldsb [ %l0 + -1 ], %o0
4000a440: 9f c7 00 00 call %i4
4000a444: 92 10 00 19 mov %i1, %o1
while (percent < fmt)
4000a448: 80 a6 80 10 cmp %i2, %l0
4000a44c: 32 bf ff fc bne,a 4000a43c <_IO_Vprintf+0x864>
4000a450: a0 04 20 01 inc %l0
4000a454: 84 25 40 1d sub %l5, %i5, %g2
stop = 1;
4000a458: a4 10 20 01 mov 1, %l2
4000a45c: 10 bf fd e9 b 40009c00 <_IO_Vprintf+0x28>
4000a460: a8 06 80 02 add %i2, %g2, %l4
reswitch: switch (ch = (u_char)*fmt++) {
4000a464: 10 bf ff 3a b 4000a14c <_IO_Vprintf+0x574>
4000a468: 82 10 00 1a mov %i2, %g1
static inline int imax(int a, int b) { return (a > b ? a : b); }
4000a46c: c4 07 bf d0 ld [ %fp + -48 ], %g2
4000a470: 80 a0 80 11 cmp %g2, %l1
4000a474: 16 80 00 04 bge 4000a484 <_IO_Vprintf+0x8ac>
4000a478: 86 10 00 02 mov %g2, %g3
4000a47c: 86 10 00 11 mov %l1, %g3
dwidth -= n;
4000a480: c4 07 bf d0 ld [ %fp + -48 ], %g2
4000a484: a2 20 80 11 sub %g2, %l1, %l1
width -= tmp + imax(dwidth, n);
4000a488: c4 07 bf d4 ld [ %fp + -44 ], %g2
4000a48c: 82 00 c0 01 add %g3, %g1, %g1
if (!ladjust)
4000a490: 80 a4 a0 00 cmp %l2, 0
4000a494: 12 bf fe 86 bne 40009eac <_IO_Vprintf+0x2d4>
<== NEVER TAKEN
4000a498: a6 20 80 01 sub %g2, %g1, %l3
while (width-- > 0)
4000a49c: 10 bf fe 78 b 40009e7c <_IO_Vprintf+0x2a4>
4000a4a0: ac 04 ff ff add %l3, -1, %l6
else if (lflag)
4000a4a4: 12 80 00 0c bne 4000a4d4 <_IO_Vprintf+0x8fc>
4000a4a8: 82 06 e0 04 add %i3, 4, %g1
else if (hflag)
4000a4ac: 80 a3 e0 00 cmp %o7, 0
4000a4b0: 02 80 00 48 be 4000a5d0 <_IO_Vprintf+0x9f8>
4000a4b4: 80 a3 60 00 cmp %o5, 0
num = (u_short)va_arg(ap, int);
4000a4b8: c6 16 e0 02 lduh [ %i3 + 2 ], %g3
4000a4bc: 84 10 20 00 clr %g2
4000a4c0: b6 10 00 01 mov %g1, %i3
4000a4c4: 10 bf fe 26 b 40009d5c <_IO_Vprintf+0x184>
4000a4c8: c4 3f bf c8 std %g2, [ %fp + -56 ]
while (width-- > 0)
4000a4cc: 10 bf fd cd b 40009c00 <_IO_Vprintf+0x28>
4000a4d0: a4 10 20 00 clr %l2
num = va_arg(ap, u_int);
4000a4d4: c6 06 c0 00 ld [ %i3 ], %g3
4000a4d8: 84 10 20 00 clr %g2
4000a4dc: b6 10 00 01 mov %g1, %i3
4000a4e0: 10 bf fe 1f b 40009d5c <_IO_Vprintf+0x184>
4000a4e4: c4 3f bf c8 std %g2, [ %fp + -56 ]
4000a4e8: 10 bf fe 77 b 40009ec4 <_IO_Vprintf+0x2ec>
4000a4ec: a8 10 00 15 mov %l5, %l4
else if (tflag)
4000a4f0: 80 a1 20 00 cmp %g4, 0
4000a4f4: 12 80 00 17 bne 4000a550 <_IO_Vprintf+0x978>
4000a4f8: c6 06 c0 00 ld [ %i3 ], %g3
else if (hflag)
4000a4fc: 80 a3 e0 00 cmp %o7, 0
4000a500: 02 80 00 66 be 4000a698 <_IO_Vprintf+0xac0>
4000a504: 80 a3 60 00 cmp %o5, 0
num = (short)va_arg(ap, int);
4000a508: 87 28 e0 10 sll %g3, 0x10, %g3
<== NOT EXECUTED
4000a50c: b6 10 00 01 mov %g1, %i3
<== NOT EXECUTED
4000a510: 83 38 e0 10 sra %g3, 0x10, %g1
<== NOT EXECUTED
4000a514: c2 27 bf cc st %g1, [ %fp + -52 ]
<== NOT EXECUTED
4000a518: 83 38 e0 1f sra %g3, 0x1f, %g1
<== NOT EXECUTED
4000a51c: 10 bf fe b0 b 40009fdc <_IO_Vprintf+0x404>
<== NOT EXECUTED
4000a520: c2 27 bf c8 st %g1, [ %fp + -56 ]
<== NOT EXECUTED
} else if (base == 16) {
4000a524: 80 a0 60 10 cmp %g1, 0x10
4000a528: 32 bf fe 73 bne,a 40009ef4 <_IO_Vprintf+0x31c>
<== NEVER TAKEN
4000a52c: 80 a4 60 00 cmp %l1, 0
<== NOT EXECUTED
PCHAR('0');
4000a530: 9f c7 00 00 call %i4
4000a534: 90 10 20 30 mov 0x30, %o0
PCHAR('x');
4000a538: 92 10 00 19 mov %i1, %o1
4000a53c: 90 10 20 78 mov 0x78, %o0
4000a540: 9f c7 00 00 call %i4
4000a544: a8 05 20 02 add %l4, 2, %l4
while (dwidth-- > 0)
4000a548: 10 bf fe 6b b 40009ef4 <_IO_Vprintf+0x31c>
4000a54c: 80 a4 60 00 cmp %l1, 0
num = va_arg(ap, int);
4000a550: b6 10 00 01 mov %g1, %i3
4000a554: c6 27 bf cc st %g3, [ %fp + -52 ]
4000a558: 83 38 e0 1f sra %g3, 0x1f, %g1
4000a55c: 10 bf fe a0 b 40009fdc <_IO_Vprintf+0x404>
4000a560: c2 27 bf c8 st %g1, [ %fp + -56 ]
PCHAR(va_arg(ap, int));
4000a564: d0 06 c0 00 ld [ %i3 ], %o0
4000a568: 9f c7 00 00 call %i4
4000a56c: 92 10 00 19 mov %i1, %o1
if (ladjust && width > 0)
4000a570: 80 8c a0 01 btst 1, %l2
4000a574: 02 80 00 3b be 4000a660 <_IO_Vprintf+0xa88>
4000a578: 80 8f 60 ff btst 0xff, %i5
4000a57c: 02 80 00 39 be 4000a660 <_IO_Vprintf+0xa88>
<== NOT EXECUTED
4000a580: c2 07 bf d4 ld [ %fp + -44 ], %g1
<== NOT EXECUTED
while (width--)
4000a584: a8 00 7f fe add %g1, -2, %l4
<== NOT EXECUTED
4000a588: c2 0f bf c3 ldub [ %fp + -61 ], %g1
<== NOT EXECUTED
4000a58c: b7 28 60 18 sll %g1, 0x18, %i3
<== NOT EXECUTED
4000a590: ba 10 00 14 mov %l4, %i5
<== NOT EXECUTED
4000a594: b7 3e e0 18 sra %i3, 0x18, %i3
<== NOT EXECUTED
PCHAR(padc);
4000a598: 92 10 00 19 mov %i1, %o1
<== NOT EXECUTED
4000a59c: 9f c7 00 00 call %i4
<== NOT EXECUTED
4000a5a0: 90 10 00 1b mov %i3, %o0
<== NOT EXECUTED
while (width--)
4000a5a4: ba 07 7f ff add %i5, -1, %i5
<== NOT EXECUTED
4000a5a8: 80 a7 7f ff cmp %i5, -1
<== NOT EXECUTED
4000a5ac: 12 bf ff fc bne 4000a59c <_IO_Vprintf+0x9c4>
<== NOT EXECUTED
4000a5b0: 92 10 00 19 mov %i1, %o1
<== NOT EXECUTED
4000a5b4: 84 05 60 02 add %l5, 2, %g2
<== NOT EXECUTED
PCHAR(va_arg(ap, int));
4000a5b8: b6 10 00 10 mov %l0, %i3
<== NOT EXECUTED
4000a5bc: a8 05 00 02 add %l4, %g2, %l4
<== NOT EXECUTED
while (width--)
4000a5c0: 10 bf fd 90 b 40009c00 <_IO_Vprintf+0x28>
<== NOT EXECUTED
4000a5c4: a4 10 20 00 clr %l2
<== NOT EXECUTED
dwidth = va_arg(ap, int);
4000a5c8: 10 bf ff 8f b 4000a404 <_IO_Vprintf+0x82c>
4000a5cc: c6 27 bf d0 st %g3, [ %fp + -48 ]
else if (cflag)
4000a5d0: 22 bf ff c2 be,a 4000a4d8 <_IO_Vprintf+0x900>
4000a5d4: c6 06 c0 00 ld [ %i3 ], %g3
num = (u_char)va_arg(ap, int);
4000a5d8: c6 0e e0 03 ldub [ %i3 + 3 ], %g3
4000a5dc: 84 10 20 00 clr %g2
4000a5e0: b6 10 00 01 mov %g1, %i3
4000a5e4: 10 bf fd de b 40009d5c <_IO_Vprintf+0x184>
4000a5e8: c4 3f bf c8 std %g2, [ %fp + -56 ]
cflag = 1;
4000a5ec: 9a 10 00 0f mov %o7, %o5
reswitch: switch (ch = (u_char)*fmt++) {
4000a5f0: 82 10 00 1a mov %i2, %g1
hflag = 0;
4000a5f4: 10 bf fd af b 40009cb0 <_IO_Vprintf+0xd8>
4000a5f8: 9e 10 20 00 clr %o7
while (n--)
4000a5fc: 80 a4 60 00 cmp %l1, 0
4000a600: 12 bf ff 4f bne 4000a33c <_IO_Vprintf+0x764>
4000a604: a0 0c 00 01 and %l0, %g1, %l0
4000a608: 10 bf ff 58 b 4000a368 <_IO_Vprintf+0x790>
4000a60c: a8 10 00 15 mov %l5, %l4
for (n = 0; n < dwidth && p[n]; n++)
4000a610: 80 a0 60 00 cmp %g1, 0
4000a614: 04 80 00 06 ble 4000a62c <_IO_Vprintf+0xa54>
4000a618: c4 07 bf d4 ld [ %fp + -44 ], %g2
4000a61c: c2 4f 40 00 ldsb [ %i5 ], %g1
4000a620: 80 a0 60 00 cmp %g1, 0
4000a624: 12 80 00 2d bne 4000a6d8 <_IO_Vprintf+0xb00>
4000a628: a2 10 20 00 clr %l1
if (!ladjust && width > 0)
4000a62c: a1 38 a0 1f sra %g2, 0x1f, %l0
<== NOT EXECUTED
4000a630: 82 0c a0 01 and %l2, 1, %g1
<== NOT EXECUTED
4000a634: a0 24 00 02 sub %l0, %g2, %l0
<== NOT EXECUTED
4000a638: 80 8c a0 01 btst 1, %l2
<== NOT EXECUTED
4000a63c: 12 80 00 06 bne 4000a654 <_IO_Vprintf+0xa7c>
<== NOT EXECUTED
4000a640: a1 34 20 1f srl %l0, 0x1f, %l0
<== NOT EXECUTED
4000a644: a8 10 3f ff mov -1, %l4
<== NOT EXECUTED
4000a648: 80 a4 20 00 cmp %l0, 0
<== NOT EXECUTED
4000a64c: 12 bf ff 28 bne 4000a2ec <_IO_Vprintf+0x714>
<== NOT EXECUTED
4000a650: a2 10 20 00 clr %l1
<== NOT EXECUTED
4000a654: a0 0c 00 01 and %l0, %g1, %l0
<== NOT EXECUTED
4000a658: 10 bf ff 44 b 4000a368 <_IO_Vprintf+0x790>
<== NOT EXECUTED
4000a65c: a8 10 00 15 mov %l5, %l4
<== NOT EXECUTED
PCHAR(va_arg(ap, int));
4000a660: b6 10 00 10 mov %l0, %i3
4000a664: 10 bf fd 67 b 40009c00 <_IO_Vprintf+0x28>
4000a668: a4 10 20 00 clr %l2
if (ch < '0' || ch > '9')
4000a66c: 84 00 ff d0 add %g3, -48, %g2
<== NOT EXECUTED
n = n * 10 + ch - '0';
4000a670: 90 02 3f d0 add %o0, -48, %o0
<== NOT EXECUTED
if (ch < '0' || ch > '9')
4000a674: 80 a0 a0 09 cmp %g2, 9
<== NOT EXECUTED
4000a678: 08 bf fe a9 bleu 4000a11c <_IO_Vprintf+0x544>
<== NOT EXECUTED
4000a67c: d8 08 60 01 ldub [ %g1 + 1 ], %o4
<== NOT EXECUTED
n = n * 10 + ch - '0';
4000a680: d0 27 bf d0 st %o0, [ %fp + -48 ]
<== NOT EXECUTED
reswitch: switch (ch = (u_char)*fmt++) {
4000a684: 10 bf fd 8b b 40009cb0 <_IO_Vprintf+0xd8>
<== NOT EXECUTED
4000a688: 82 10 00 1a mov %i2, %g1
<== NOT EXECUTED
p = "(null)";
4000a68c: 3b 10 00 5d sethi %hi(0x40017400), %i5
4000a690: 10 bf ff 04 b 4000a2a0 <_IO_Vprintf+0x6c8>
4000a694: ba 17 62 98 or %i5, 0x298, %i5 ! 40017698 <_Workspace_Is_unified+0x18>
else if (cflag)
4000a698: 02 bf ff af be 4000a554 <_IO_Vprintf+0x97c>
4000a69c: b6 10 00 01 mov %g1, %i3
num = (char)va_arg(ap, int);
4000a6a0: 87 28 e0 18 sll %g3, 0x18, %g3
<== NOT EXECUTED
4000a6a4: 83 38 e0 18 sra %g3, 0x18, %g1
<== NOT EXECUTED
4000a6a8: c2 27 bf cc st %g1, [ %fp + -52 ]
<== NOT EXECUTED
4000a6ac: 83 38 e0 1f sra %g3, 0x1f, %g1
<== NOT EXECUTED
4000a6b0: 10 bf fe 4b b 40009fdc <_IO_Vprintf+0x404>
<== NOT EXECUTED
4000a6b4: c2 27 bf c8 st %g1, [ %fp + -56 ]
<== NOT EXECUTED
4000a6b8: d8 08 60 01 ldub [ %g1 + 1 ], %o4
<== NOT EXECUTED
width = -width;
4000a6bc: c2 07 bf d4 ld [ %fp + -44 ], %g1
<== NOT EXECUTED
4000a6c0: 82 20 00 01 neg %g1
<== NOT EXECUTED
4000a6c4: a4 1c a0 01 xor %l2, 1, %l2
<== NOT EXECUTED
4000a6c8: c2 27 bf d4 st %g1, [ %fp + -44 ]
<== NOT EXECUTED
width = va_arg(ap, int);
4000a6cc: b6 10 00 02 mov %g2, %i3
<== NOT EXECUTED
reswitch: switch (ch = (u_char)*fmt++) {
4000a6d0: 10 bf fd 78 b 40009cb0 <_IO_Vprintf+0xd8>
<== NOT EXECUTED
4000a6d4: 82 10 00 1a mov %i2, %g1
<== NOT EXECUTED
for (n = 0; n < dwidth && p[n]; n++)
4000a6d8: c2 07 bf d0 ld [ %fp + -48 ], %g1
4000a6dc: a2 04 60 01 inc %l1
4000a6e0: 80 a4 40 01 cmp %l1, %g1
4000a6e4: 02 bf fe f6 be 4000a2bc <_IO_Vprintf+0x6e4>
4000a6e8: c2 07 bf d4 ld [ %fp + -44 ], %g1
4000a6ec: c2 4f 40 11 ldsb [ %i5 + %l1 ], %g1
4000a6f0: 80 a0 60 00 cmp %g1, 0
4000a6f4: 22 bf fe f2 be,a 4000a2bc <_IO_Vprintf+0x6e4>
4000a6f8: c2 07 bf d4 ld [ %fp + -44 ], %g1
4000a6fc: 10 bf ff f8 b 4000a6dc <_IO_Vprintf+0xb04>
4000a700: c2 07 bf d0 ld [ %fp + -48 ], %g1
4000a704: ba 10 20 00 clr %i5
lflag = 0; ladjust = 0; sharpflag = 0; neg = 0;
4000a708: 10 bf fd 95 b 40009d5c <_IO_Vprintf+0x184>
4000a70c: a8 10 20 00 clr %l4
while (n--)
4000a710: a8 10 00 15 mov %l5, %l4
<== NOT EXECUTED
4000a714: 10 bf fd 3b b 40009c00 <_IO_Vprintf+0x28>
<== NOT EXECUTED
4000a718: a4 10 20 00 clr %l2
<== NOT EXECUTED
400098e4 <_Internal_error>:
/* will not return from this routine */
while (true);
}
void _Internal_error( Internal_errors_Core_list core_error )
{
400098e4: 9d e3 bf a0 save %sp, -96, %sp
_Terminate( INTERNAL_ERROR_CORE, core_error );
400098e8: 90 10 20 00 clr %o0
400098ec: 7f ff ff eb call 40009898 <_Terminate>
400098f0: 92 10 00 18 mov %i0, %o1
400098f4: 01 00 00 00 nop
<== NOT EXECUTED
40006494 <_Memory_Fill>:
#include <rtems/score/memory.h>
#include <string.h>
void _Memory_Fill( const Memory_Information *information, int c )
{
40006494: 9d e3 bf a0 save %sp, -96, %sp
Memory_Area *area;
const Memory_Area *end;
area = &information->areas[ 0 ];
40006498: fa 06 20 04 ld [ %i0 + 4 ], %i5
end = &information->areas[ information->count ];
4000649c: c2 06 00 00 ld [ %i0 ], %g1
400064a0: b9 28 60 01 sll %g1, 1, %i4
400064a4: b8 07 00 01 add %i4, %g1, %i4
400064a8: b9 2f 20 02 sll %i4, 2, %i4
400064ac: b8 07 40 1c add %i5, %i4, %i4
while ( area != end ) {
400064b0: 80 a7 40 1c cmp %i5, %i4
400064b4: 02 80 00 0b be 400064e0 <_Memory_Fill+0x4c>
400064b8: 01 00 00 00 nop
memset( _Memory_Get_free_begin( area ), c, _Memory_Get_free_size( area ) );
400064bc: d0 07 60 04 ld [ %i5 + 4 ], %o0
return (uintptr_t) area->end - (uintptr_t) area->free;
400064c0: d4 07 60 08 ld [ %i5 + 8 ], %o2
400064c4: 94 22 80 08 sub %o2, %o0, %o2
400064c8: 40 00 1d 58 call 4000da28 <memset>
400064cc: 92 10 00 19 mov %i1, %o1
++area;
400064d0: ba 07 60 0c add %i5, 0xc, %i5
while ( area != end ) {
400064d4: 80 a7 00 1d cmp %i4, %i5
400064d8: 32 bf ff fa bne,a 400064c0 <_Memory_Fill+0x2c>
<== NEVER TAKEN
400064dc: d0 07 60 04 ld [ %i5 + 4 ], %o0
<== NOT EXECUTED
}
}
400064e0: 81 c7 e0 08 ret
400064e4: 81 e8 00 00 restore
4000a750 <_Mutex_Acquire>:
);
}
}
void _Mutex_Acquire( struct _Mutex_Control *_mutex )
{
4000a750: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000a754: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000a758: 86 10 00 01 mov %g1, %g3
_Thread_queue_Context_ISR_disable( &queue_context, level );
executing = _Mutex_Queue_acquire_critical( mutex, &queue_context );
owner = mutex->Queue.Queue.owner;
if ( RTEMS_PREDICT_TRUE( owner == NULL ) ) {
4000a75c: c4 06 20 0c ld [ %i0 + 0xc ], %g2
4000a760: 80 a0 a0 00 cmp %g2, 0
4000a764: 12 80 00 07 bne 4000a780 <_Mutex_Acquire+0x30>
4000a768: d4 01 a0 20 ld [ %g6 + 0x20 ], %o2
mutex->Queue.Queue.owner = executing;
4000a76c: d4 26 20 0c st %o2, [ %i0 + 0xc ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000a770: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000a774: 01 00 00 00 nop
4000a778: 81 c7 e0 08 ret
4000a77c: 81 e8 00 00 restore
queue_context->enqueue_callout = _Thread_queue_Enqueue_do_nothing_extra;
4000a780: 03 10 00 21 sethi %hi(0x40008400), %g1
4000a784: 82 10 61 ac or %g1, 0x1ac, %g1 ! 400085ac <_Thread_queue_Enqueue_do_nothing_extra>
4000a788: c2 27 bf e4 st %g1, [ %fp + -28 ]
queue_context->thread_state = thread_state;
4000a78c: 82 10 20 01 mov 1, %g1
4000a790: c2 27 bf e0 st %g1, [ %fp + -32 ]
queue_context->deadlock_callout = deadlock_callout;
4000a794: 03 10 00 21 sethi %hi(0x40008400), %g1
4000a798: 82 10 61 b4 or %g1, 0x1b4, %g1 ! 400085b4 <_Thread_queue_Deadlock_fatal>
_Thread_queue_Enqueue(
4000a79c: 96 07 bf dc add %fp, -36, %o3
4000a7a0: c2 27 bf fc st %g1, [ %fp + -4 ]
4000a7a4: 13 10 00 5d sethi %hi(0x40017400), %o1
)
{
#if defined( RTEMS_SMP )
context->Lock_context.isr_level = level;
#else
context->isr_level = level;
4000a7a8: c6 27 bf dc st %g3, [ %fp + -36 ]
4000a7ac: 92 12 62 2c or %o1, 0x22c, %o1
4000a7b0: 7f ff f7 85 call 400085c4 <_Thread_queue_Enqueue>
4000a7b4: 90 06 20 08 add %i0, 8, %o0
_Mutex_Queue_release( mutex, level, &queue_context );
} else {
_Thread_queue_Context_set_enqueue_do_nothing_extra( &queue_context );
_Mutex_Acquire_slow( mutex, owner, executing, level, &queue_context );
}
}
4000a7b8: 81 c7 e0 08 ret
<== NOT EXECUTED
4000a7bc: 81 e8 00 00 restore
4000c1fc <_Mutex_Acquire_timed>:
int _Mutex_Acquire_timed(
struct _Mutex_Control *_mutex,
const struct timespec *abstime
)
{
4000c1fc: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000c200: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000c204: 86 10 00 01 mov %g1, %g3
_Thread_queue_Context_ISR_disable( &queue_context, level );
executing = _Mutex_Queue_acquire_critical( mutex, &queue_context );
owner = mutex->Queue.Queue.owner;
if ( RTEMS_PREDICT_TRUE( owner == NULL ) ) {
4000c208: c4 06 20 0c ld [ %i0 + 0xc ], %g2
4000c20c: 80 a0 a0 00 cmp %g2, 0
4000c210: 12 80 00 07 bne 4000c22c <_Mutex_Acquire_timed+0x30>
4000c214: fa 01 a0 20 ld [ %g6 + 0x20 ], %i5
mutex->Queue.Queue.owner = executing;
4000c218: fa 26 20 0c st %i5, [ %i0 + 0xc ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000c21c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000c220: 01 00 00 00 nop
_Thread_Resource_count_increment( executing );
_Mutex_Queue_release( mutex, level, &queue_context );
return 0;
4000c224: 81 c7 e0 08 ret
4000c228: 91 e8 20 00 restore %g0, 0, %o0
queue_context->thread_state = thread_state;
4000c22c: 82 10 20 01 mov 1, %g1
4000c230: c2 27 bf e0 st %g1, [ %fp + -32 ]
queue_context->enqueue_callout = _Thread_queue_Add_timeout_realtime_timespec;
4000c234: 03 10 00 3c sethi %hi(0x4000f000), %g1
4000c238: 82 10 61 f8 or %g1, 0x1f8, %g1 ! 4000f1f8 <_Thread_queue_Add_timeout_realtime_timespec>
4000c23c: c2 27 bf e4 st %g1, [ %fp + -28 ]
queue_context->deadlock_callout = deadlock_callout;
4000c240: 03 10 00 26 sethi %hi(0x40009800), %g1
4000c244: 82 10 63 f0 or %g1, 0x3f0, %g1 ! 40009bf0 <_Thread_queue_Deadlock_fatal>
_Thread_queue_Enqueue(
4000c248: 90 06 20 08 add %i0, 8, %o0
4000c24c: c2 27 bf fc st %g1, [ %fp + -4 ]
4000c250: 96 07 bf dc add %fp, -36, %o3
queue_context->Timeout.arg = abstime;
4000c254: f2 27 bf e8 st %i1, [ %fp + -24 ]
4000c258: 94 10 00 1d mov %i5, %o2
4000c25c: c6 27 bf dc st %g3, [ %fp + -36 ]
4000c260: 13 10 00 47 sethi %hi(0x40011c00), %o1
4000c264: 7f ff f6 67 call 40009c00 <_Thread_queue_Enqueue>
4000c268: 92 12 62 24 or %o1, 0x224, %o1 ! 40011e24 <_Thread_queue_Operations_priority_inherit>
&queue_context,
abstime
);
_Mutex_Acquire_slow( mutex, owner, executing, level, &queue_context );
return STATUS_GET_POSIX( _Thread_Wait_get_status( executing ) );
4000c26c: c2 07 60 4c ld [ %i5 + 0x4c ], %g1
4000c270: b1 38 60 1f sra %g1, 0x1f, %i0
4000c274: b0 0e 20 ff and %i0, 0xff, %i0
4000c278: b0 06 00 01 add %i0, %g1, %i0
4000c27c: b1 3e 20 08 sra %i0, 8, %i0
}
}
4000c280: 81 c7 e0 08 ret
4000c284: 81 e8 00 00 restore
4000a7c0 <_Mutex_Release>:
return eno;
}
void _Mutex_Release( struct _Mutex_Control *_mutex )
{
4000a7c0: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000a7c4: 91 d0 20 09 ta 9
<== NOT EXECUTED
executing = _Thread_Executing;
4000a7c8: d4 01 a0 20 ld [ %g6 + 0x20 ], %o2
mutex->Queue.Queue.owner = NULL;
4000a7cc: c0 26 20 0c clr [ %i0 + 0xc ]
heads = mutex->Queue.Queue.heads;
4000a7d0: d2 06 20 08 ld [ %i0 + 8 ], %o1
if ( RTEMS_PREDICT_TRUE( heads == NULL ) ) {
4000a7d4: 80 a2 60 00 cmp %o1, 0
4000a7d8: 32 80 00 06 bne,a 4000a7f0 <_Mutex_Release+0x30>
4000a7dc: c2 27 bf dc st %g1, [ %fp + -36 ]
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000a7e0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000a7e4: 01 00 00 00 nop
4000a7e8: 81 c7 e0 08 ret
4000a7ec: 81 e8 00 00 restore
_Thread_queue_Surrender(
4000a7f0: 19 10 00 5d sethi %hi(0x40017400), %o4
4000a7f4: 96 07 bf dc add %fp, -36, %o3
4000a7f8: 98 13 22 2c or %o4, 0x22c, %o4
4000a7fc: 7f ff f8 0f call 40008838 <_Thread_queue_Surrender>
4000a800: 90 06 20 08 add %i0, 8, %o0
executing = _Mutex_Queue_acquire_critical( mutex, &queue_context );
_Assert( mutex->Queue.Queue.owner == executing );
_Mutex_Release_critical( mutex, executing, level, &queue_context );
}
4000a804: 81 c7 e0 08 ret
4000a808: 81 e8 00 00 restore
4000c288 <_Mutex_Try_acquire>:
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000c288: 91 d0 20 09 ta 9
<== NOT EXECUTED
_Thread_queue_Context_ISR_disable( &queue_context, level );
executing = _Mutex_Queue_acquire_critical( mutex, &queue_context );
owner = mutex->Queue.Queue.owner;
if ( RTEMS_PREDICT_TRUE( owner == NULL ) ) {
4000c28c: c4 02 20 0c ld [ %o0 + 0xc ], %g2
4000c290: 80 a0 a0 00 cmp %g2, 0
4000c294: 12 80 00 08 bne 4000c2b4 <_Mutex_Try_acquire+0x2c>
4000c298: c6 01 a0 20 ld [ %g6 + 0x20 ], %g3
mutex->Queue.Queue.owner = executing;
4000c29c: c6 22 20 0c st %g3, [ %o0 + 0xc ]
<== NOT EXECUTED
_Thread_Resource_count_increment( executing );
eno = 0;
4000c2a0: 90 10 20 00 clr %o0
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000c2a4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000c2a8: 01 00 00 00 nop
}
_Mutex_Queue_release( mutex, level, &queue_context );
return eno;
}
4000c2ac: 81 c3 e0 08 retl
4000c2b0: 01 00 00 00 nop
eno = EBUSY;
4000c2b4: 90 10 20 10 mov 0x10, %o0 ! 10 <_TLS_Alignment+0xf>
<== NOT EXECUTED
4000c2b8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000c2bc: 01 00 00 00 nop
}
4000c2c0: 81 c3 e0 08 retl
4000c2c4: 01 00 00 00 nop
4000a80c <_Mutex_recursive_Acquire>:
{
return (Mutex_recursive_Control *) _mutex;
}
void _Mutex_recursive_Acquire( struct _Mutex_recursive_Control *_mutex )
{
4000a80c: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000a810: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000a814: 86 10 00 01 mov %g1, %g3
mutex = _Mutex_recursive_Get( _mutex );
_Thread_queue_Context_initialize( &queue_context );
_Thread_queue_Context_ISR_disable( &queue_context, level );
executing = _Mutex_Queue_acquire_critical( &mutex->Mutex, &queue_context );
owner = mutex->Mutex.Queue.Queue.owner;
4000a818: c4 06 20 0c ld [ %i0 + 0xc ], %g2
if ( RTEMS_PREDICT_TRUE( owner == NULL ) ) {
4000a81c: 80 a0 a0 00 cmp %g2, 0
4000a820: 12 80 00 07 bne 4000a83c <_Mutex_recursive_Acquire+0x30>
<== NEVER TAKEN
4000a824: d4 01 a0 20 ld [ %g6 + 0x20 ], %o2
mutex->Mutex.Queue.Queue.owner = executing;
4000a828: d4 26 20 0c st %o2, [ %i0 + 0xc ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000a82c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000a830: 01 00 00 00 nop
4000a834: 81 c7 e0 08 ret
4000a838: 81 e8 00 00 restore
_Thread_Resource_count_increment( executing );
_Mutex_Queue_release( &mutex->Mutex, level, &queue_context );
} else if ( owner == executing ) {
4000a83c: 80 a2 80 02 cmp %o2, %g2
4000a840: 02 80 00 11 be 4000a884 <_Mutex_recursive_Acquire+0x78>
4000a844: 96 07 bf dc add %fp, -36, %o3
queue_context->enqueue_callout = _Thread_queue_Enqueue_do_nothing_extra;
4000a848: 03 10 00 21 sethi %hi(0x40008400), %g1
4000a84c: 82 10 61 ac or %g1, 0x1ac, %g1 ! 400085ac <_Thread_queue_Enqueue_do_nothing_extra>
4000a850: c2 27 bf e4 st %g1, [ %fp + -28 ]
queue_context->thread_state = thread_state;
4000a854: 82 10 20 01 mov 1, %g1
4000a858: c2 27 bf e0 st %g1, [ %fp + -32 ]
queue_context->deadlock_callout = deadlock_callout;
4000a85c: 03 10 00 21 sethi %hi(0x40008400), %g1
4000a860: 82 10 61 b4 or %g1, 0x1b4, %g1 ! 400085b4 <_Thread_queue_Deadlock_fatal>
4000a864: c2 27 bf fc st %g1, [ %fp + -4 ]
_Thread_queue_Enqueue(
4000a868: 13 10 00 5d sethi %hi(0x40017400), %o1
4000a86c: c6 27 bf dc st %g3, [ %fp + -36 ]
4000a870: 92 12 62 2c or %o1, 0x22c, %o1
4000a874: 7f ff f7 54 call 400085c4 <_Thread_queue_Enqueue>
4000a878: 90 06 20 08 add %i0, 8, %o0
_Mutex_Queue_release( &mutex->Mutex, level, &queue_context );
} else {
_Thread_queue_Context_set_enqueue_do_nothing_extra( &queue_context );
_Mutex_Acquire_slow( &mutex->Mutex, owner, executing, level, &queue_context );
}
}
4000a87c: 81 c7 e0 08 ret
<== NOT EXECUTED
4000a880: 81 e8 00 00 restore
++mutex->nest_level;
4000a884: c4 06 20 14 ld [ %i0 + 0x14 ], %g2
4000a888: 84 00 a0 01 inc %g2
4000a88c: c4 26 20 14 st %g2, [ %i0 + 0x14 ]
4000a890: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000a894: 01 00 00 00 nop
4000a898: 81 c7 e0 08 ret
4000a89c: 81 e8 00 00 restore
4000d83c <_Mutex_recursive_Acquire_timed>:
int _Mutex_recursive_Acquire_timed(
struct _Mutex_recursive_Control *_mutex,
const struct timespec *abstime
)
{
4000d83c: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000d840: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000d844: 86 10 00 01 mov %g1, %g3
mutex = _Mutex_recursive_Get( _mutex );
_Thread_queue_Context_initialize( &queue_context );
_Thread_queue_Context_ISR_disable( &queue_context, level );
executing = _Mutex_Queue_acquire_critical( &mutex->Mutex, &queue_context );
owner = mutex->Mutex.Queue.Queue.owner;
4000d848: c4 06 20 0c ld [ %i0 + 0xc ], %g2
if ( RTEMS_PREDICT_TRUE( owner == NULL ) ) {
4000d84c: 80 a0 a0 00 cmp %g2, 0
4000d850: 12 80 00 07 bne 4000d86c <_Mutex_recursive_Acquire_timed+0x30>
4000d854: fa 01 a0 20 ld [ %g6 + 0x20 ], %i5
mutex->Mutex.Queue.Queue.owner = executing;
4000d858: fa 26 20 0c st %i5, [ %i0 + 0xc ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000d85c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000d860: 01 00 00 00 nop
_Thread_Resource_count_increment( executing );
_Mutex_Queue_release( &mutex->Mutex, level, &queue_context );
return 0;
4000d864: 81 c7 e0 08 ret
4000d868: 91 e8 20 00 restore %g0, 0, %o0
} else if ( owner == executing ) {
4000d86c: 80 a0 80 1d cmp %g2, %i5
4000d870: 02 80 00 18 be 4000d8d0 <_Mutex_recursive_Acquire_timed+0x94>
4000d874: 90 06 20 08 add %i0, 8, %o0
queue_context->thread_state = thread_state;
4000d878: 82 10 20 01 mov 1, %g1
4000d87c: c2 27 bf e0 st %g1, [ %fp + -32 ]
queue_context->enqueue_callout = _Thread_queue_Add_timeout_realtime_timespec;
4000d880: 03 10 00 2f sethi %hi(0x4000bc00), %g1
4000d884: 82 10 63 6c or %g1, 0x36c, %g1 ! 4000bf6c <_Thread_queue_Add_timeout_realtime_timespec>
4000d888: c2 27 bf e4 st %g1, [ %fp + -28 ]
queue_context->deadlock_callout = deadlock_callout;
4000d88c: 03 10 00 2c sethi %hi(0x4000b000), %g1
4000d890: 82 10 60 44 or %g1, 0x44, %g1 ! 4000b044 <_Thread_queue_Deadlock_fatal>
4000d894: c2 27 bf fc st %g1, [ %fp + -4 ]
_Thread_queue_Enqueue(
4000d898: 96 07 bf dc add %fp, -36, %o3
queue_context->Timeout.arg = abstime;
4000d89c: f2 27 bf e8 st %i1, [ %fp + -24 ]
4000d8a0: 94 10 00 1d mov %i5, %o2
4000d8a4: c6 27 bf dc st %g3, [ %fp + -36 ]
4000d8a8: 13 10 00 49 sethi %hi(0x40012400), %o1
4000d8ac: 7f ff f5 ea call 4000b054 <_Thread_queue_Enqueue>
4000d8b0: 92 12 60 24 or %o1, 0x24, %o1 ! 40012424 <_Thread_queue_Operations_priority_inherit>
&queue_context,
abstime
);
_Mutex_Acquire_slow( &mutex->Mutex, owner, executing, level, &queue_context );
return STATUS_GET_POSIX( _Thread_Wait_get_status( executing ) );
4000d8b4: c2 07 60 4c ld [ %i5 + 0x4c ], %g1
4000d8b8: b1 38 60 1f sra %g1, 0x1f, %i0
4000d8bc: b0 0e 20 ff and %i0, 0xff, %i0
4000d8c0: b0 06 00 01 add %i0, %g1, %i0
4000d8c4: b1 3e 20 08 sra %i0, 8, %i0
}
}
4000d8c8: 81 c7 e0 08 ret
4000d8cc: 81 e8 00 00 restore
++mutex->nest_level;
4000d8d0: c4 06 20 14 ld [ %i0 + 0x14 ], %g2
<== NOT EXECUTED
4000d8d4: 84 00 a0 01 inc %g2
<== NOT EXECUTED
4000d8d8: c4 26 20 14 st %g2, [ %i0 + 0x14 ]
<== NOT EXECUTED
4000d8dc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000d8e0: 01 00 00 00 nop
return 0;
4000d8e4: 81 c7 e0 08 ret
4000d8e8: 91 e8 20 00 restore %g0, 0, %o0
4000a8a0 <_Mutex_recursive_Release>:
return eno;
}
void _Mutex_recursive_Release( struct _Mutex_recursive_Control *_mutex )
{
4000a8a0: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000a8a4: 91 d0 20 09 ta 9
<== NOT EXECUTED
_Thread_queue_Context_ISR_disable( &queue_context, level );
executing = _Mutex_Queue_acquire_critical( &mutex->Mutex, &queue_context );
_Assert( mutex->Mutex.Queue.Queue.owner == executing );
nest_level = mutex->nest_level;
4000a8a8: c4 06 20 14 ld [ %i0 + 0x14 ], %g2
if ( RTEMS_PREDICT_TRUE( nest_level == 0 ) ) {
4000a8ac: 80 a0 a0 00 cmp %g2, 0
4000a8b0: 12 80 00 0b bne 4000a8dc <_Mutex_recursive_Release+0x3c>
<== NEVER TAKEN
4000a8b4: d4 01 a0 20 ld [ %g6 + 0x20 ], %o2
mutex->Queue.Queue.owner = NULL;
4000a8b8: c0 26 20 0c clr [ %i0 + 0xc ]
heads = mutex->Queue.Queue.heads;
4000a8bc: d2 06 20 08 ld [ %i0 + 8 ], %o1
if ( RTEMS_PREDICT_TRUE( heads == NULL ) ) {
4000a8c0: 80 a2 60 00 cmp %o1, 0
4000a8c4: 32 80 00 0c bne,a 4000a8f4 <_Mutex_recursive_Release+0x54>
4000a8c8: c2 27 bf dc st %g1, [ %fp + -36 ]
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000a8cc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000a8d0: 01 00 00 00 nop
} else {
mutex->nest_level = nest_level - 1;
_Mutex_Queue_release( &mutex->Mutex, level, &queue_context );
}
}
4000a8d4: 81 c7 e0 08 ret
4000a8d8: 81 e8 00 00 restore
mutex->nest_level = nest_level - 1;
4000a8dc: 84 00 bf ff add %g2, -1, %g2
<== NOT EXECUTED
4000a8e0: c4 26 20 14 st %g2, [ %i0 + 0x14 ]
<== NOT EXECUTED
4000a8e4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000a8e8: 01 00 00 00 nop
}
4000a8ec: 81 c7 e0 08 ret
4000a8f0: 81 e8 00 00 restore
_Thread_queue_Surrender(
4000a8f4: 19 10 00 5d sethi %hi(0x40017400), %o4
4000a8f8: 96 07 bf dc add %fp, -36, %o3
4000a8fc: 98 13 22 2c or %o4, 0x22c, %o4
4000a900: 7f ff f7 ce call 40008838 <_Thread_queue_Surrender>
4000a904: 90 06 20 08 add %i0, 8, %o0
4000a908: 81 c7 e0 08 ret
4000a90c: 81 e8 00 00 restore
4000d8ec <_Mutex_recursive_Try_acquire>:
int _Mutex_recursive_Try_acquire( struct _Mutex_recursive_Control *_mutex )
{
4000d8ec: 84 10 00 08 mov %o0, %g2
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000d8f0: 91 d0 20 09 ta 9
<== NOT EXECUTED
mutex = _Mutex_recursive_Get( _mutex );
_Thread_queue_Context_initialize( &queue_context );
_Thread_queue_Context_ISR_disable( &queue_context, level );
executing = _Mutex_Queue_acquire_critical( &mutex->Mutex, &queue_context );
owner = mutex->Mutex.Queue.Queue.owner;
4000d8f4: c6 02 20 0c ld [ %o0 + 0xc ], %g3
if ( RTEMS_PREDICT_TRUE( owner == NULL ) ) {
4000d8f8: 80 a0 e0 00 cmp %g3, 0
4000d8fc: 12 80 00 08 bne 4000d91c <_Mutex_recursive_Try_acquire+0x30>
4000d900: c8 01 a0 20 ld [ %g6 + 0x20 ], %g4
mutex->Mutex.Queue.Queue.owner = executing;
4000d904: c8 22 20 0c st %g4, [ %o0 + 0xc ]
<== NOT EXECUTED
_Thread_Resource_count_increment( executing );
eno = 0;
4000d908: 90 10 20 00 clr %o0
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000d90c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000d910: 01 00 00 00 nop
}
_Mutex_Queue_release( &mutex->Mutex, level, &queue_context );
return eno;
}
4000d914: 81 c3 e0 08 retl
4000d918: 01 00 00 00 nop
} else if ( owner == executing ) {
4000d91c: 80 a1 00 03 cmp %g4, %g3
4000d920: 12 bf ff fb bne 4000d90c <_Mutex_recursive_Try_acquire+0x20>
4000d924: 90 10 20 10 mov 0x10, %o0
++mutex->nest_level;
4000d928: c6 00 a0 14 ld [ %g2 + 0x14 ], %g3
4000d92c: 86 00 e0 01 inc %g3
eno = 0;
4000d930: 90 10 20 00 clr %o0
4000d934: 10 bf ff f6 b 4000d90c <_Mutex_recursive_Try_acquire+0x20>
4000d938: c6 20 a0 14 st %g3, [ %g2 + 0x14 ]
4000c638 <_Objects_Close>:
information->local_table[ index - OBJECTS_INDEX_MINIMUM ] = the_object;
4000c638: c4 02 20 04 ld [ %o0 + 4 ], %g2
<== NOT EXECUTED
4000c63c: c2 12 60 0a lduh [ %o1 + 0xa ], %g1
<== NOT EXECUTED
4000c640: 83 28 60 02 sll %g1, 2, %g1
<== NOT EXECUTED
4000c644: 82 00 7f fc add %g1, -4, %g1
<== NOT EXECUTED
4000c648: c0 20 80 01 clr [ %g2 + %g1 ]
<== NOT EXECUTED
)
{
_Objects_Invalidate_Id( information, the_object );
_Objects_Namespace_remove_u32( information, the_object );
}
4000c64c: 81 c3 e0 08 retl
<== NOT EXECUTED
4000c650: c0 22 60 0c clr [ %o1 + 0xc ]
<== NOT EXECUTED
400097e8 <_Objects_Extend_information>:
#include <string.h> /* for memcpy() */
Objects_Maximum _Objects_Extend_information(
Objects_Information *information
)
{
400097e8: 9d e3 bf 98 save %sp, -104, %sp
_Objects_Allocator_is_owner()
|| !_System_state_Is_up( _System_state_Get() )
);
_Assert( _Objects_Is_auto_extend( information ) );
extend_count = _Objects_Extend_size( information );
400097ec: c6 16 20 12 lduh [ %i0 + 0x12 ], %g3
400097f0: e4 16 20 02 lduh [ %i0 + 2 ], %l2
*/
do_extend = true;
index_base = extend_count;
block = 1;
if ( information->object_blocks == NULL ) {
400097f4: c4 06 20 28 ld [ %i0 + 0x28 ], %g2
new_maximum = (uint32_t) old_maximum + extend_count;
400097f8: 87 28 e0 10 sll %g3, 0x10, %g3
400097fc: e6 06 00 00 ld [ %i0 ], %l3
40009800: b5 30 e0 10 srl %g3, 0x10, %i2
if ( information->object_blocks == NULL ) {
40009804: 80 a0 a0 00 cmp %g2, 0
40009808: 02 80 00 4e be 40009940 <_Objects_Extend_information+0x158>
4000980c: a2 06 80 12 add %i2, %l2, %l1
block_count = 1;
} else {
block_count = old_maximum / extend_count;
40009810: 83 2c e0 10 sll %l3, 0x10, %g1
40009814: 83 30 60 10 srl %g1, 0x10, %g1
40009818: 81 80 20 00 wr %g0, %y
4000981c: 01 00 00 00 nop
40009820: 01 00 00 00 nop
40009824: 01 00 00 00 nop
40009828: b2 70 40 1a udiv %g1, %i2, %i1
for ( ; block < block_count; block++ ) {
4000982c: 80 a6 60 01 cmp %i1, 1
40009830: 08 80 00 78 bleu 40009a10 <_Objects_Extend_information+0x228>
40009834: b8 10 00 1a mov %i2, %i4
if ( information->object_blocks[ block ] == NULL ) {
40009838: c2 00 a0 04 ld [ %g2 + 4 ], %g1
4000983c: 80 a0 60 00 cmp %g1, 0
40009840: 02 80 00 77 be 40009a1c <_Objects_Extend_information+0x234>
40009844: aa 10 20 00 clr %l5
block = 1;
40009848: 10 80 00 06 b 40009860 <_Objects_Extend_information+0x78>
4000984c: ba 10 20 01 mov 1, %i5
if ( information->object_blocks[ block ] == NULL ) {
40009850: c2 00 80 01 ld [ %g2 + %g1 ], %g1
40009854: 80 a0 60 00 cmp %g1, 0
40009858: 02 80 00 08 be 40009878 <_Objects_Extend_information+0x90>
4000985c: aa 10 20 00 clr %l5
for ( ; block < block_count; block++ ) {
40009860: ba 07 60 01 inc %i5
do_extend = false;
break;
} else
index_base += extend_count;
40009864: b8 07 00 1a add %i4, %i2, %i4
for ( ; block < block_count; block++ ) {
40009868: 80 a6 40 1d cmp %i1, %i5
4000986c: 12 bf ff f9 bne 40009850 <_Objects_Extend_information+0x68>
40009870: 83 2f 60 02 sll %i5, 2, %g1
do_extend = true;
40009874: aa 10 20 01 mov 1, %l5
/*
* We need to limit the number of objects to the maximum number
* representable in the index portion of the object Id. In the
* case of 16-bit Ids, this is only 256 object instances.
*/
if ( new_maximum > OBJECTS_ID_FINAL_INDEX ) {
40009878: 03 00 00 3f sethi %hi(0xfc00), %g1
4000987c: 82 10 63 ff or %g1, 0x3ff, %g1 ! ffff <_ISR_Stack_size+0xefff>
40009880: 80 a4 40 01 cmp %l1, %g1
40009884: 28 80 00 07 bleu,a 400098a0 <_Objects_Extend_information+0xb8>
40009888: d0 16 20 14 lduh [ %i0 + 0x14 ], %o0
+ local_table_size
+ block_count * sizeof( *inactive_per_block );
object_blocks = _Workspace_Allocate( table_size );
if ( object_blocks == NULL ) {
_Workspace_Free( new_object_block );
return 0;
4000988c: ba 10 20 00 clr %i5
40009890: b1 2f 60 10 sll %i5, 0x10, %i0
the_object = _Addresses_Add_offset( the_object, information->object_size );
}
return block;
}
40009894: b1 36 20 10 srl %i0, 0x10, %i0
40009898: 81 c7 e0 08 ret
4000989c: 81 e8 00 00 restore
object_block_size = extend_count * information->object_size;
400098a0: a1 30 e0 10 srl %g3, 0x10, %l0
new_object_block = _Workspace_Allocate( object_block_size );
400098a4: 40 00 0b 4a call 4000c5cc <_Workspace_Allocate>
400098a8: 90 5a 00 10 smul %o0, %l0, %o0
if ( new_object_block == NULL ) {
400098ac: b6 92 20 00 orcc %o0, 0, %i3
400098b0: 02 bf ff f7 be 4000988c <_Objects_Extend_information+0xa4>
400098b4: 29 3f ff c0 sethi %hi(0xffff0000), %l4
index_end = index_base + extend_count;
400098b8: b4 06 80 1c add %i2, %i4, %i2
if ( do_extend ) {
400098bc: 80 8d 60 ff btst 0xff, %l5
400098c0: 12 80 00 25 bne 40009954 <_Objects_Extend_information+0x16c>
400098c4: a8 0c c0 14 and %l3, %l4, %l4
information->object_blocks[ block ] = new_object_block;
400098c8: c4 06 20 28 ld [ %i0 + 0x28 ], %g2
400098cc: 83 2f 60 02 sll %i5, 2, %g1
information->inactive_per_block[ block ] = information->objects_per_block;
400098d0: c6 16 20 12 lduh [ %i0 + 0x12 ], %g3
information->object_blocks[ block ] = new_object_block;
400098d4: f6 20 80 01 st %i3, [ %g2 + %g1 ]
information->inactive_per_block[ block ] = information->objects_per_block;
400098d8: 83 2f 60 01 sll %i5, 1, %g1
400098dc: c4 06 20 24 ld [ %i0 + 0x24 ], %g2
400098e0: c6 30 80 01 sth %g3, [ %g2 + %g1 ]
for ( index = index_base ; index < index_end ; ++index ) {
400098e4: 80 a7 00 1a cmp %i4, %i2
information->inactive += information->objects_per_block;
400098e8: c2 16 20 10 lduh [ %i0 + 0x10 ], %g1
400098ec: c4 16 20 12 lduh [ %i0 + 0x12 ], %g2
400098f0: 82 00 40 02 add %g1, %g2, %g1
for ( index = index_base ; index < index_end ; ++index ) {
400098f4: 1a bf ff e7 bcc 40009890 <_Objects_Extend_information+0xa8>
400098f8: c2 36 20 10 sth %g1, [ %i0 + 0x10 ]
the_object = _Addresses_Add_offset( the_object, information->object_size );
400098fc: c8 16 20 14 lduh [ %i0 + 0x14 ], %g4
40009900: 86 06 20 1c add %i0, 0x1c, %g3
old_last = tail->previous;
40009904: c2 06 20 20 ld [ %i0 + 0x20 ], %g1
| ( ( index + OBJECTS_INDEX_MINIMUM ) << OBJECTS_INDEX_START_BIT );
40009908: b8 07 20 01 inc %i4
the_node->next = tail;
4000990c: c6 26 c0 00 st %g3, [ %i3 ]
40009910: 84 17 00 14 or %i4, %l4, %g2
the_object->id = api_class_and_node
40009914: c4 26 e0 08 st %g2, [ %i3 + 8 ]
for ( index = index_base ; index < index_end ; ++index ) {
40009918: 80 a7 00 1a cmp %i4, %i2
tail->previous = the_node;
4000991c: f6 26 20 20 st %i3, [ %i0 + 0x20 ]
old_last->next = the_node;
40009920: f6 20 40 00 st %i3, [ %g1 ]
the_node->previous = old_last;
40009924: c2 26 e0 04 st %g1, [ %i3 + 4 ]
40009928: 12 bf ff f7 bne 40009904 <_Objects_Extend_information+0x11c>
4000992c: b6 06 c0 04 add %i3, %g4, %i3
40009930: b1 2f 60 10 sll %i5, 0x10, %i0
}
40009934: b1 36 20 10 srl %i0, 0x10, %i0
40009938: 81 c7 e0 08 ret
4000993c: 81 e8 00 00 restore
index_base = extend_count;
40009940: b8 10 00 1a mov %i2, %i4
do_extend = true;
40009944: aa 10 20 01 mov 1, %l5
block = 1;
40009948: ba 10 20 01 mov 1, %i5
block_count = 1;
4000994c: 10 bf ff cb b 40009878 <_Objects_Extend_information+0x90>
40009950: b2 10 20 01 mov 1, %i1
block_count++;
40009954: b2 06 60 01 inc %i1
object_blocks_size = block_count * sizeof( *object_blocks );
40009958: 95 2e 60 02 sll %i1, 2, %o2
local_table_size = new_maximum * sizeof( *local_table );
4000995c: af 2c 60 02 sll %l1, 2, %l7
table_size = object_blocks_size
40009960: d4 27 bf fc st %o2, [ %fp + -4 ]
+ block_count * sizeof( *inactive_per_block );
40009964: b3 2e 60 01 sll %i1, 1, %i1
table_size = object_blocks_size
40009968: 90 06 40 0a add %i1, %o2, %o0
object_blocks = _Workspace_Allocate( table_size );
4000996c: 40 00 0b 18 call 4000c5cc <_Workspace_Allocate>
40009970: 90 02 00 17 add %o0, %l7, %o0
if ( object_blocks == NULL ) {
40009974: ac 92 20 00 orcc %o0, 0, %l6
40009978: 02 80 00 34 be 40009a48 <_Objects_Extend_information+0x260>
4000997c: d4 07 bf fc ld [ %fp + -4 ], %o2
if ( old_maximum > extend_count ) {
40009980: 83 2c e0 10 sll %l3, 0x10, %g1
RTEMS_INLINE_ROUTINE void *_Addresses_Add_offset (
const void *base,
uintptr_t offset
)
{
return (void *)((uintptr_t)base + offset);
40009984: aa 05 80 0a add %l6, %o2, %l5
40009988: 83 30 60 10 srl %g1, 0x10, %g1
4000998c: 80 a0 40 10 cmp %g1, %l0
40009990: 18 80 00 25 bgu 40009a24 <_Objects_Extend_information+0x23c>
40009994: a6 05 c0 15 add %l7, %l5, %l3
object_blocks[ 0 ] = NULL;
40009998: c0 25 80 00 clr [ %l6 ]
inactive_per_block[ 0 ] = 0;
4000999c: c0 35 c0 15 clrh [ %l7 + %l5 ]
memcpy(
400099a0: 95 2c a0 02 sll %l2, 2, %o2
400099a4: d2 06 20 04 ld [ %i0 + 4 ], %o1
400099a8: 40 00 48 96 call 4001bc00 <memcpy>
400099ac: 90 10 00 15 mov %l5, %o0
for ( index = index_base ; index < index_end ; ++index ) {
400099b0: 80 a7 00 1a cmp %i4, %i2
400099b4: 1a 80 00 0a bcc 400099dc <_Objects_Extend_information+0x1f4>
400099b8: 83 2f 20 02 sll %i4, 2, %g1
400099bc: 85 2e a0 02 sll %i2, 2, %g2
400099c0: 82 00 40 15 add %g1, %l5, %g1
400099c4: 84 00 80 15 add %g2, %l5, %g2
local_table[ index ] = NULL;
400099c8: c0 20 40 00 clr [ %g1 ]
400099cc: 82 00 60 04 add %g1, 4, %g1
for ( index = index_base ; index < index_end ; ++index ) {
400099d0: 80 a0 80 01 cmp %g2, %g1
400099d4: 32 bf ff fe bne,a 400099cc <_Objects_Extend_information+0x1e4>
400099d8: c0 20 40 00 clr [ %g1 ]
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400099dc: 91 d0 20 09 ta 9
<== NOT EXECUTED
old_tables = information->object_blocks;
400099e0: d0 06 20 28 ld [ %i0 + 0x28 ], %o0
<== NOT EXECUTED
| (new_maximum << OBJECTS_INDEX_START_BIT);
400099e4: a2 14 40 14 or %l1, %l4, %l1
<== NOT EXECUTED
information->object_blocks = object_blocks;
400099e8: ec 26 20 28 st %l6, [ %i0 + 0x28 ]
<== NOT EXECUTED
information->inactive_per_block = inactive_per_block;
400099ec: e6 26 20 24 st %l3, [ %i0 + 0x24 ]
<== NOT EXECUTED
information->local_table = local_table;
400099f0: ea 26 20 04 st %l5, [ %i0 + 4 ]
<== NOT EXECUTED
information->maximum_id = api_class_and_node
400099f4: e2 26 00 00 st %l1, [ %i0 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400099f8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400099fc: 01 00 00 00 nop
_Workspace_Free( old_tables );
40009a00: 40 00 0a fb call 4000c5ec <_Workspace_Free>
40009a04: 01 00 00 00 nop
40009a08: 10 bf ff b1 b 400098cc <_Objects_Extend_information+0xe4>
40009a0c: c4 06 20 28 ld [ %i0 + 0x28 ], %g2
do_extend = true;
40009a10: aa 10 20 01 mov 1, %l5
<== NOT EXECUTED
block = 1;
40009a14: 10 bf ff 99 b 40009878 <_Objects_Extend_information+0x90>
<== NOT EXECUTED
40009a18: ba 10 20 01 mov 1, %i5
<== NOT EXECUTED
40009a1c: 10 bf ff 97 b 40009878 <_Objects_Extend_information+0x90>
40009a20: ba 10 20 01 mov 1, %i5
memcpy(
40009a24: d2 06 20 28 ld [ %i0 + 0x28 ], %o1
40009a28: 40 00 48 76 call 4001bc00 <memcpy>
40009a2c: 94 02 bf fc add %o2, -4, %o2
memcpy(
40009a30: d2 06 20 24 ld [ %i0 + 0x24 ], %o1
40009a34: 94 06 7f fe add %i1, -2, %o2
40009a38: 40 00 48 72 call 4001bc00 <memcpy>
40009a3c: 90 10 00 13 mov %l3, %o0
40009a40: 10 bf ff d9 b 400099a4 <_Objects_Extend_information+0x1bc>
40009a44: 95 2c a0 02 sll %l2, 2, %o2
_Workspace_Free( new_object_block );
40009a48: 40 00 0a e9 call 4000c5ec <_Workspace_Free>
<== NOT EXECUTED
40009a4c: 90 10 00 1b mov %i3, %o0
<== NOT EXECUTED
return 0;
40009a50: 10 bf ff 90 b 40009890 <_Objects_Extend_information+0xa8>
<== NOT EXECUTED
40009a54: ba 10 20 00 clr %i5
<== NOT EXECUTED
4000c66c <_Objects_Get>:
{
Objects_Id delta;
Objects_Id maximum_id;
Objects_Id end;
maximum_id = information->maximum_id;
4000c66c: c2 02 80 00 ld [ %o2 ], %g1
delta = maximum_id - id;
4000c670: 90 20 40 08 sub %g1, %o0, %o0
4000c674: 05 00 00 3f sethi %hi(0xfc00), %g2
4000c678: 84 10 a3 ff or %g2, 0x3ff, %g2 ! ffff <_ISR_Stack_size+0xefff>
4000c67c: 84 08 40 02 and %g1, %g2, %g2
end = _Objects_Get_index( maximum_id );
if ( RTEMS_PREDICT_TRUE( delta < end ) ) {
4000c680: 80 a2 00 02 cmp %o0, %g2
4000c684: 1a 80 00 14 bcc 4000c6d4 <_Objects_Get+0x68>
4000c688: 01 00 00 00 nop
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000c68c: 91 d0 20 09 ta 9
<== NOT EXECUTED
Objects_Control *the_object;
_ISR_Local_disable( level );
_ISR_lock_Context_set_level( lock_context, level );
the_object =
4000c690: c8 02 a0 04 ld [ %o2 + 4 ], %g4
4000c694: c2 22 40 00 st %g1, [ %o1 ]
information->local_table[ end - OBJECTS_INDEX_MINIMUM - delta ];
4000c698: 07 0f ff ff sethi %hi(0x3ffffc00), %g3
4000c69c: 86 10 e3 ff or %g3, 0x3ff, %g3 ! 3fffffff <RAM_SIZE+0x3fbfffff>
4000c6a0: 84 00 80 03 add %g2, %g3, %g2
4000c6a4: 84 20 80 08 sub %g2, %o0, %g2
the_object =
4000c6a8: 85 28 a0 02 sll %g2, 2, %g2
4000c6ac: d0 01 00 02 ld [ %g4 + %g2 ], %o0
if ( RTEMS_PREDICT_TRUE( the_object != NULL ) ) {
4000c6b0: 80 a2 20 00 cmp %o0, 0
4000c6b4: 02 80 00 04 be 4000c6c4 <_Objects_Get+0x58>
4000c6b8: 01 00 00 00 nop
_ISR_Local_enable( level );
}
return NULL;
}
4000c6bc: 81 c3 e0 08 retl
4000c6c0: 01 00 00 00 nop
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000c6c4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000c6c8: 01 00 00 00 nop
4000c6cc: 81 c3 e0 08 retl
4000c6d0: 01 00 00 00 nop
4000c6d4: 81 c3 e0 08 retl
4000c6d8: 90 10 20 00 clr %o0 ! 0 <PROM_START>
4000a8b4 <_Objects_Get_name_as_string>:
char *_Objects_Get_name_as_string(
Objects_Id id,
size_t length,
char *name
)
{
4000a8b4: 9d e3 bf 90 save %sp, -112, %sp
Objects_Id tmpId;
if ( length == 0 )
return NULL;
if ( name == NULL )
4000a8b8: 80 a6 60 00 cmp %i1, 0
4000a8bc: 02 80 00 20 be 4000a93c <_Objects_Get_name_as_string+0x88>
4000a8c0: 80 a6 a0 00 cmp %i2, 0
4000a8c4: 02 80 00 1e be 4000a93c <_Objects_Get_name_as_string+0x88>
4000a8c8: 80 a6 20 00 cmp %i0, 0
return NULL;
tmpId = (id == OBJECTS_ID_OF_SELF) ? _Thread_Get_executing()->Object.id : id;
4000a8cc: 22 80 00 1a be,a 4000a934 <_Objects_Get_name_as_string+0x80>
4000a8d0: c2 01 a0 20 ld [ %g6 + 0x20 ], %g1
information = _Objects_Get_information_id( tmpId );
4000a8d4: 40 00 00 1c call 4000a944 <_Objects_Get_information_id>
4000a8d8: 90 10 00 18 mov %i0, %o0
if ( !information )
4000a8dc: ba 92 20 00 orcc %o0, 0, %i5
4000a8e0: 02 80 00 17 be 4000a93c <_Objects_Get_name_as_string+0x88>
4000a8e4: 94 10 00 1d mov %i5, %o2
return NULL;
the_object = _Objects_Get( tmpId, &lock_context, information );
4000a8e8: 92 07 bf fc add %fp, -4, %o1
4000a8ec: 40 00 00 1c call 4000a95c <_Objects_Get>
4000a8f0: 90 10 00 18 mov %i0, %o0
if ( the_object == NULL ) {
4000a8f4: 80 a2 20 00 cmp %o0, 0
4000a8f8: 02 80 00 11 be 4000a93c <_Objects_Get_name_as_string+0x88>
4000a8fc: 96 10 00 19 mov %i1, %o3
return information->name_length > 0;
4000a900: c4 17 60 16 lduh [ %i5 + 0x16 ], %g2
return NULL;
}
_Objects_Name_to_string(
4000a904: c2 02 20 0c ld [ %o0 + 0xc ], %g1
4000a908: 80 a0 00 02 cmp %g0, %g2
4000a90c: c2 27 bf f4 st %g1, [ %fp + -12 ]
4000a910: 94 10 00 1a mov %i2, %o2
4000a914: 92 40 20 00 addx %g0, 0, %o1
4000a918: 7f ff ff ba call 4000a800 <_Objects_Name_to_string>
4000a91c: 90 07 bf f4 add %fp, -12, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000a920: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000a924: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000a928: 01 00 00 00 nop
length
);
_ISR_lock_ISR_enable( &lock_context );
return name;
}
4000a92c: 81 c7 e0 08 ret
4000a930: 91 e8 00 1a restore %g0, %i2, %o0
4000a934: 10 bf ff e8 b 4000a8d4 <_Objects_Get_name_as_string+0x20>
4000a938: f0 00 60 08 ld [ %g1 + 8 ], %i0
return NULL;
4000a93c: 81 c7 e0 08 ret
4000a940: 91 e8 20 00 restore %g0, 0, %o0
4000a788 <_Objects_Id_to_name>:
Objects_Name_or_id_lookup_errors _Objects_Id_to_name (
Objects_Id id,
Objects_Name *name
)
{
4000a788: 9d e3 bf 98 save %sp, -104, %sp
/*
* Caller is trusted for name != NULL.
*/
tmpId = (id == OBJECTS_ID_OF_SELF) ? _Thread_Get_executing()->Object.id : id;
4000a78c: 80 a6 20 00 cmp %i0, 0
4000a790: 12 80 00 04 bne 4000a7a0 <_Objects_Id_to_name+0x18>
4000a794: 01 00 00 00 nop
4000a798: c2 01 a0 20 ld [ %g6 + 0x20 ], %g1
4000a79c: f0 00 60 08 ld [ %g1 + 8 ], %i0
information = _Objects_Get_information_id( tmpId );
4000a7a0: 40 00 00 69 call 4000a944 <_Objects_Get_information_id>
4000a7a4: 90 10 00 18 mov %i0, %o0
if ( !information )
4000a7a8: 80 a2 20 00 cmp %o0, 0
4000a7ac: 02 80 00 13 be 4000a7f8 <_Objects_Id_to_name+0x70>
4000a7b0: 01 00 00 00 nop
return OBJECTS_INVALID_ID;
if ( _Objects_Has_string_name( information ) )
4000a7b4: c2 12 20 16 lduh [ %o0 + 0x16 ], %g1
4000a7b8: 80 a0 60 00 cmp %g1, 0
4000a7bc: 12 80 00 0f bne 4000a7f8 <_Objects_Id_to_name+0x70>
4000a7c0: 94 10 00 08 mov %o0, %o2
return OBJECTS_INVALID_ID;
the_object = _Objects_Get(
4000a7c4: 92 07 bf fc add %fp, -4, %o1
4000a7c8: 40 00 00 65 call 4000a95c <_Objects_Get>
4000a7cc: 90 10 00 18 mov %i0, %o0
tmpId,
&lock_context,
information
);
if ( !the_object )
4000a7d0: 80 a2 20 00 cmp %o0, 0
4000a7d4: 02 80 00 09 be 4000a7f8 <_Objects_Id_to_name+0x70>
4000a7d8: 01 00 00 00 nop
return OBJECTS_INVALID_ID;
*name = the_object->name;
4000a7dc: c2 02 20 0c ld [ %o0 + 0xc ], %g1
<== NOT EXECUTED
4000a7e0: c2 26 40 00 st %g1, [ %i1 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000a7e4: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000a7e8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000a7ec: 01 00 00 00 nop
_ISR_lock_ISR_enable( &lock_context );
return OBJECTS_NAME_OR_ID_LOOKUP_SUCCESSFUL;
}
4000a7f0: 81 c7 e0 08 ret
4000a7f4: 91 e8 20 00 restore %g0, 0, %o0
return OBJECTS_INVALID_ID;
4000a7f8: 81 c7 e0 08 ret
4000a7fc: 91 e8 20 03 restore %g0, 3, %o0
4000df6c <_Objects_Initialize_information>:
Chain_Node *head;
Chain_Node *tail;
Chain_Node *current;
Objects_Control *next;
maximum_id = information->maximum_id;
4000df6c: da 02 00 00 ld [ %o0 ], %o5
4000df70: 83 33 60 16 srl %o5, 0x16, %g1
/*
* Register this Object Class in the Object Information Table.
*/
_Objects_Information_table[ _Objects_Get_API( maximum_id ) ]
[ _Objects_Get_class( maximum_id ) ] = information;
4000df74: 05 10 00 5d sethi %hi(0x40017400), %g2
_Objects_Information_table[ _Objects_Get_API( maximum_id ) ]
4000df78: 82 08 60 1c and %g1, 0x1c, %g1
[ _Objects_Get_class( maximum_id ) ] = information;
4000df7c: 84 10 a2 d0 or %g2, 0x2d0, %g2
4000df80: c4 00 80 01 ld [ %g2 + %g1 ], %g2
*/
RTEMS_INLINE_ROUTINE uint32_t _Objects_Get_class(
Objects_Id id
)
{
return (uint32_t)
4000df84: 83 33 60 1b srl %o5, 0x1b, %g1
4000df88: 83 28 60 02 sll %g1, 2, %g1
4000df8c: d0 20 80 01 st %o0, [ %g2 + %g1 ]
api_class_and_node = maximum_id & ~OBJECTS_INDEX_MASK;
4000df90: 03 3f ff c0 sethi %hi(0xffff0000), %g1
head = _Chain_Head( &information->Inactive );
tail = _Chain_Tail( &information->Inactive );
current = head;
next = information->initial_objects;
head->previous = NULL;
4000df94: c0 22 20 1c clr [ %o0 + 0x1c ]
for ( index = OBJECTS_INDEX_MINIMUM; index <= maximum ; ++index ) {
4000df98: 85 2b 60 10 sll %o5, 0x10, %g2
RTEMS_INLINE_ROUTINE Objects_Maximum _Objects_Get_index(
Objects_Id id
)
{
return
(Objects_Maximum)((id >> OBJECTS_INDEX_START_BIT) &
4000df9c: 96 10 00 0d mov %o5, %o3
return &the_chain->Head.Node;
4000dfa0: 88 02 20 18 add %o0, 0x18, %g4
api_class_and_node = maximum_id & ~OBJECTS_INDEX_MASK;
4000dfa4: 9a 0b 40 01 and %o5, %g1, %o5
return &the_chain->Tail.Node;
4000dfa8: 92 02 20 1c add %o0, 0x1c, %o1
for ( index = OBJECTS_INDEX_MINIMUM; index <= maximum ; ++index ) {
4000dfac: 80 a0 a0 00 cmp %g2, 0
4000dfb0: 02 80 00 18 be 4000e010 <_Objects_Initialize_information+0xa4>
4000dfb4: c2 02 20 2c ld [ %o0 + 0x2c ], %g1
4000dfb8: 97 2a e0 10 sll %o3, 0x10, %o3
current->next = &next->Node;
next->Node.previous = current;
current = &next->Node;
next->id = api_class_and_node | ( index << OBJECTS_INDEX_START_BIT );
next = _Addresses_Add_offset( next, information->object_size );
4000dfbc: d4 12 20 14 lduh [ %o0 + 0x14 ], %o2
for ( index = OBJECTS_INDEX_MINIMUM; index <= maximum ; ++index ) {
4000dfc0: 84 10 20 01 mov 1, %g2
4000dfc4: 10 80 00 03 b 4000dfd0 <_Objects_Initialize_information+0x64>
4000dfc8: 97 32 e0 10 srl %o3, 0x10, %o3
next = _Addresses_Add_offset( next, information->object_size );
4000dfcc: 82 10 00 0c mov %o4, %g1
current->next = &next->Node;
4000dfd0: c2 21 00 00 st %g1, [ %g4 ]
next->id = api_class_and_node | ( index << OBJECTS_INDEX_START_BIT );
4000dfd4: 87 28 a0 10 sll %g2, 0x10, %g3
next->Node.previous = current;
4000dfd8: c8 20 60 04 st %g4, [ %g1 + 4 ]
next->id = api_class_and_node | ( index << OBJECTS_INDEX_START_BIT );
4000dfdc: 87 30 e0 10 srl %g3, 0x10, %g3
4000dfe0: 86 10 c0 0d or %g3, %o5, %g3
4000dfe4: c6 20 60 08 st %g3, [ %g1 + 8 ]
for ( index = OBJECTS_INDEX_MINIMUM; index <= maximum ; ++index ) {
4000dfe8: 84 00 a0 01 inc %g2
4000dfec: 98 00 40 0a add %g1, %o2, %o4
4000dff0: 87 28 a0 10 sll %g2, 0x10, %g3
4000dff4: 87 30 e0 10 srl %g3, 0x10, %g3
4000dff8: 80 a2 c0 03 cmp %o3, %g3
4000dffc: 1a bf ff f4 bcc 4000dfcc <_Objects_Initialize_information+0x60>
<== NEVER TAKEN
4000e000: 88 10 00 01 mov %g1, %g4
}
current->next = tail;
4000e004: d2 20 40 00 st %o1, [ %g1 ]
tail->previous = current;
}
4000e008: 81 c3 e0 08 retl
4000e00c: c2 22 20 20 st %g1, [ %o0 + 0x20 ]
current = head;
4000e010: 82 10 00 04 mov %g4, %g1
current->next = tail;
4000e014: d2 20 40 00 st %o1, [ %g1 ]
}
4000e018: 81 c3 e0 08 retl
4000e01c: c2 22 20 20 st %g1, [ %o0 + 0x20 ]
4000a800 <_Objects_Name_to_string>:
Objects_Name name,
bool is_string,
char *buffer,
size_t buffer_size
)
{
4000a800: 9c 03 bf b0 add %sp, -80, %sp
char lname[ 5 ];
const char *s;
char *d;
size_t i;
if ( is_string ) {
4000a804: 80 a2 60 00 cmp %o1, 0
4000a808: 02 80 00 0b be 4000a834 <_Objects_Name_to_string+0x34>
4000a80c: c6 02 00 00 ld [ %o0 ], %g3
}
d = buffer;
i = 1;
if ( s != NULL ) {
4000a810: 80 a0 e0 00 cmp %g3, 0
<== NOT EXECUTED
4000a814: 12 80 00 26 bne 4000a8ac <_Objects_Name_to_string+0xac>
<== NOT EXECUTED
4000a818: 82 10 00 03 mov %g3, %g1
<== NOT EXECUTED
while ( *s != '\0' ) {
if ( i < buffer_size ) {
*d = _Objects_Name_char_is_printable(*s) ? *s : '*';
4000a81c: 90 10 20 00 clr %o0
++s;
++i;
}
}
if ( buffer_size > 0 ) {
4000a820: 80 a2 e0 00 cmp %o3, 0
4000a824: 32 80 00 02 bne,a 4000a82c <_Objects_Name_to_string+0x2c>
4000a828: c0 2a 80 00 clrb [ %o2 ]
*d = '\0';
}
return i - 1;
}
4000a82c: 81 c3 e0 08 retl
4000a830: 9c 03 a0 50 add %sp, 0x50, %sp
lname[ 0 ] = (name.name_u32 >> 24) & 0xff;
4000a834: 85 30 e0 18 srl %g3, 0x18, %g2
lname[ 2 ] = (name.name_u32 >> 8) & 0xff;
4000a838: 89 30 e0 08 srl %g3, 8, %g4
lname[ 0 ] = (name.name_u32 >> 24) & 0xff;
4000a83c: c4 2b a0 48 stb %g2, [ %sp + 0x48 ]
lname[ 1 ] = (name.name_u32 >> 16) & 0xff;
4000a840: 83 30 e0 10 srl %g3, 0x10, %g1
lname[ 2 ] = (name.name_u32 >> 8) & 0xff;
4000a844: c8 2b a0 4a stb %g4, [ %sp + 0x4a ]
lname[ 3 ] = (name.name_u32 >> 0) & 0xff;
4000a848: c6 2b a0 4b stb %g3, [ %sp + 0x4b ]
lname[ 4 ] = '\0';
4000a84c: c0 2b a0 4c clrb [ %sp + 0x4c ]
lname[ 1 ] = (name.name_u32 >> 16) & 0xff;
4000a850: c2 2b a0 49 stb %g1, [ %sp + 0x49 ]
s = lname;
4000a854: 82 03 a0 48 add %sp, 0x48, %g1
while ( *s != '\0' ) {
4000a858: 87 28 a0 18 sll %g2, 0x18, %g3
4000a85c: 80 a0 e0 00 cmp %g3, 0
4000a860: 02 bf ff ef be 4000a81c <_Objects_Name_to_string+0x1c>
4000a864: 90 10 20 01 mov 1, %o0
if ( i < buffer_size ) {
4000a868: 80 a2 c0 08 cmp %o3, %o0
4000a86c: 08 80 00 09 bleu 4000a890 <_Objects_Name_to_string+0x90>
4000a870: 82 00 60 01 inc %g1
return uc >= ' ' && uc <= '~';
4000a874: 86 00 bf e0 add %g2, -32, %g3
*d = _Objects_Name_char_is_printable(*s) ? *s : '*';
4000a878: 86 08 e0 ff and %g3, 0xff, %g3
4000a87c: 80 a0 e0 5e cmp %g3, 0x5e
4000a880: 38 80 00 02 bgu,a 4000a888 <_Objects_Name_to_string+0x88>
4000a884: 84 10 20 2a mov 0x2a, %g2
4000a888: c4 2a 80 00 stb %g2, [ %o2 ]
++d;
4000a88c: 94 02 a0 01 inc %o2
while ( *s != '\0' ) {
4000a890: c6 48 40 00 ldsb [ %g1 ], %g3
++i;
4000a894: 88 02 20 01 add %o0, 1, %g4
while ( *s != '\0' ) {
4000a898: 80 a0 e0 00 cmp %g3, 0
4000a89c: 02 bf ff e1 be 4000a820 <_Objects_Name_to_string+0x20>
4000a8a0: c4 08 40 00 ldub [ %g1 ], %g2
++i;
4000a8a4: 10 bf ff f1 b 4000a868 <_Objects_Name_to_string+0x68>
4000a8a8: 90 10 00 04 mov %g4, %o0
4000a8ac: 10 bf ff eb b 4000a858 <_Objects_Name_to_string+0x58>
<== NOT EXECUTED
4000a8b0: c4 08 c0 00 ldub [ %g3 ], %g2
<== NOT EXECUTED
40006d94 <_Objects_Set_name>:
bool _Objects_Set_name(
const Objects_Information *information,
Objects_Control *the_object,
const char *name
)
{
40006d94: 9d e3 bf 98 save %sp, -104, %sp
if ( _Objects_Has_string_name( information ) ) {
40006d98: d2 16 20 16 lduh [ %i0 + 0x16 ], %o1
40006d9c: 80 a2 60 00 cmp %o1, 0
40006da0: 02 80 00 10 be 40006de0 <_Objects_Set_name+0x4c>
40006da4: 03 08 08 08 sethi %hi(0x20202000), %g1
size_t length;
char *dup;
length = strnlen( name, information->name_length );
40006da8: 40 00 23 17 call 4000fa04 <strnlen>
40006dac: 90 10 00 1a mov %i2, %o0
dup = _Workspace_String_duplicate( name, length );
if ( dup == NULL ) {
return false;
40006db0: b0 10 20 00 clr %i0
dup = _Workspace_String_duplicate( name, length );
40006db4: 92 10 00 08 mov %o0, %o1
40006db8: 40 00 09 6b call 40009364 <_Workspace_String_duplicate>
40006dbc: 90 10 00 1a mov %i2, %o0
if ( dup == NULL ) {
40006dc0: 80 a2 20 00 cmp %o0, 0
40006dc4: 22 80 00 05 be,a 40006dd8 <_Objects_Set_name+0x44>
<== ALWAYS TAKEN
40006dc8: b0 0e 20 01 and %i0, 1, %i0
}
the_object->name.name_p = dup;
40006dcc: d0 26 60 0c st %o0, [ %i1 + 0xc ]
<== NOT EXECUTED
the_object->name.name_u32 =
_Objects_Build_name( c[ 0 ], c[ 1 ], c[ 2 ], c[ 3 ] );
}
return true;
40006dd0: b0 10 20 01 mov 1, %i0
<== NOT EXECUTED
}
40006dd4: b0 0e 20 01 and %i0, 1, %i0
<== NOT EXECUTED
40006dd8: 81 c7 e0 08 ret
40006ddc: 81 e8 00 00 restore
memset( c, ' ', sizeof( c ) );
40006de0: 82 10 60 20 or %g1, 0x20, %g1
c[ i ] = name[ i ];
40006de4: 88 07 bf f8 add %fp, -8, %g4
memset( c, ' ', sizeof( c ) );
40006de8: c2 27 bf f8 st %g1, [ %fp + -8 ]
for ( i = 0; i < 4; ++i ) {
40006dec: 82 10 20 00 clr %g1
if ( name[ i ] == '\0') {
40006df0: c4 4e 80 01 ldsb [ %i2 + %g1 ], %g2
40006df4: 80 a0 a0 00 cmp %g2, 0
40006df8: 02 80 00 07 be 40006e14 <_Objects_Set_name+0x80>
40006dfc: c6 0e 80 01 ldub [ %i2 + %g1 ], %g3
c[ i ] = name[ i ];
40006e00: c6 28 40 04 stb %g3, [ %g1 + %g4 ]
for ( i = 0; i < 4; ++i ) {
40006e04: 82 00 60 01 inc %g1
40006e08: 80 a0 60 04 cmp %g1, 4
40006e0c: 32 bf ff fa bne,a 40006df4 <_Objects_Set_name+0x60>
40006e10: c4 4e 80 01 ldsb [ %i2 + %g1 ], %g2
_Objects_Build_name( c[ 0 ], c[ 1 ], c[ 2 ], c[ 3 ] );
40006e14: c2 4f bf f8 ldsb [ %fp + -8 ], %g1
40006e18: c6 4f bf f9 ldsb [ %fp + -7 ], %g3
40006e1c: c8 4f bf fb ldsb [ %fp + -5 ], %g4
40006e20: c4 4f bf fa ldsb [ %fp + -6 ], %g2
40006e24: 87 28 e0 10 sll %g3, 0x10, %g3
40006e28: 85 28 a0 08 sll %g2, 8, %g2
40006e2c: 83 28 60 18 sll %g1, 0x18, %g1
return true;
40006e30: b0 10 20 01 mov 1, %i0
_Objects_Build_name( c[ 0 ], c[ 1 ], c[ 2 ], c[ 3 ] );
40006e34: 82 10 40 03 or %g1, %g3, %g1
}
40006e38: b0 0e 20 01 and %i0, 1, %i0
_Objects_Build_name( c[ 0 ], c[ 1 ], c[ 2 ], c[ 3 ] );
40006e3c: 82 10 40 04 or %g1, %g4, %g1
40006e40: 82 10 40 02 or %g1, %g2, %g1
the_object->name.name_u32 =
40006e44: c2 26 60 0c st %g1, [ %i1 + 0xc ]
}
40006e48: 81 c7 e0 08 ret
40006e4c: 81 e8 00 00 restore
40009bcc <_Objects_Shrink_information>:
/*
* Search the list to find block or chunk with all objects inactive.
*/
objects_per_block = information->objects_per_block;
block_count = _Objects_Get_maximum_index( information ) / objects_per_block;
40009bcc: c4 12 20 02 lduh [ %o0 + 2 ], %g2
<== NOT EXECUTED
40009bd0: c8 12 20 12 lduh [ %o0 + 0x12 ], %g4
<== NOT EXECUTED
40009bd4: 81 80 20 00 wr %g0, %y
<== NOT EXECUTED
40009bd8: 01 00 00 00 nop
<== NOT EXECUTED
40009bdc: 01 00 00 00 nop
<== NOT EXECUTED
40009be0: 01 00 00 00 nop
<== NOT EXECUTED
40009be4: 82 70 80 04 udiv %g2, %g4, %g1
<== NOT EXECUTED
for ( block = 1; block < block_count; block++ ) {
40009be8: 80 a0 60 01 cmp %g1, 1
<== NOT EXECUTED
40009bec: 08 80 00 15 bleu 40009c40 <_Objects_Shrink_information+0x74>
<== NOT EXECUTED
40009bf0: 86 10 00 01 mov %g1, %g3
<== NOT EXECUTED
if ( information->inactive_per_block[ block ] == objects_per_block ) {
40009bf4: c4 02 20 24 ld [ %o0 + 0x24 ], %g2
<== NOT EXECUTED
40009bf8: c2 10 a0 02 lduh [ %g2 + 2 ], %g1
<== NOT EXECUTED
40009bfc: 80 a1 00 01 cmp %g4, %g1
<== NOT EXECUTED
40009c00: 02 80 00 12 be 40009c48 <_Objects_Shrink_information+0x7c>
<== NOT EXECUTED
40009c04: 87 28 e0 10 sll %g3, 0x10, %g3
<== NOT EXECUTED
40009c08: 84 00 a0 04 add %g2, 4, %g2
<== NOT EXECUTED
for ( block = 1; block < block_count; block++ ) {
40009c0c: 92 10 20 01 mov 1, %o1
<== NOT EXECUTED
40009c10: 10 80 00 06 b 40009c28 <_Objects_Shrink_information+0x5c>
<== NOT EXECUTED
40009c14: 87 30 e0 10 srl %g3, 0x10, %g3
<== NOT EXECUTED
if ( information->inactive_per_block[ block ] == objects_per_block ) {
40009c18: c2 10 bf fe lduh [ %g2 + -2 ], %g1
<== NOT EXECUTED
40009c1c: 80 a0 40 04 cmp %g1, %g4
<== NOT EXECUTED
40009c20: 22 80 00 0c be,a 40009c50 <_Objects_Shrink_information+0x84>
<== NOT EXECUTED
40009c24: 93 2a 60 10 sll %o1, 0x10, %o1
<== NOT EXECUTED
for ( block = 1; block < block_count; block++ ) {
40009c28: 92 02 60 01 inc %o1
<== NOT EXECUTED
40009c2c: 83 2a 60 10 sll %o1, 0x10, %g1
<== NOT EXECUTED
40009c30: 83 30 60 10 srl %g1, 0x10, %g1
<== NOT EXECUTED
40009c34: 80 a0 c0 01 cmp %g3, %g1
<== NOT EXECUTED
40009c38: 12 bf ff f8 bne 40009c18 <_Objects_Shrink_information+0x4c>
<== NOT EXECUTED
40009c3c: 84 00 a0 02 add %g2, 2, %g2
<== NOT EXECUTED
_Objects_Free_objects_block( information, block );
return;
}
}
}
40009c40: 81 c3 e0 08 retl
<== NOT EXECUTED
40009c44: 01 00 00 00 nop
<== NOT EXECUTED
for ( block = 1; block < block_count; block++ ) {
40009c48: 92 10 20 01 mov 1, %o1 ! 1 <_TLS_Alignment>
<== NOT EXECUTED
_Objects_Free_objects_block( information, block );
40009c4c: 93 2a 60 10 sll %o1, 0x10, %o1
<== NOT EXECUTED
40009c50: 93 32 60 10 srl %o1, 0x10, %o1
<== NOT EXECUTED
40009c54: 82 13 c0 00 mov %o7, %g1
<== NOT EXECUTED
40009c58: 7f ff ff b2 call 40009b20 <_Objects_Free_objects_block>
<== NOT EXECUTED
40009c5c: 9e 10 40 00 mov %g1, %o7
<== NOT EXECUTED
4000a910 <_Once>:
.Mutex = RTEMS_MUTEX_INITIALIZER( "_Once" ),
.State = RTEMS_CONDITION_VARIABLE_INITIALIZER( "_Once" )
};
int _Once( unsigned char *once_state, void ( *init_routine )( void ) )
{
4000a910: 9d e3 bf a0 save %sp, -96, %sp
_Atomic_Fence( ATOMIC_ORDER_ACQUIRE );
if ( RTEMS_PREDICT_FALSE( *once_state != ONCE_STATE_COMPLETE ) ) {
4000a914: c2 0e 00 00 ldub [ %i0 ], %g1
4000a918: 80 a0 60 02 cmp %g1, 2
4000a91c: 12 80 00 04 bne 4000a92c <_Once+0x1c>
4000a920: 01 00 00 00 nop
_Once_Unlock( thread_life_state );
}
return 0;
}
4000a924: 81 c7 e0 08 ret
4000a928: 91 e8 20 00 restore %g0, 0, %o0
Thread_Life_state _Once_Lock( void )
{
Thread_Life_state thread_life_state;
thread_life_state = _Thread_Set_life_protection( THREAD_LIFE_PROTECTED );
4000a92c: 7f ff f6 69 call 400082d0 <_Thread_Set_life_protection>
4000a930: 90 10 20 01 mov 1, %o0
mutex->_Queue._name = name;
}
static __inline void rtems_mutex_lock( rtems_mutex *mutex )
{
_Mutex_Acquire( mutex );
4000a934: 39 10 00 68 sethi %hi(0x4001a000), %i4
4000a938: b6 10 00 08 mov %o0, %i3
4000a93c: 7f ff ff 85 call 4000a750 <_Mutex_Acquire>
4000a940: 90 17 23 3c or %i4, 0x33c, %o0
if ( *once_state == ONCE_STATE_INIT ) {
4000a944: c2 0e 00 00 ldub [ %i0 ], %g1
4000a948: 80 a0 60 00 cmp %g1, 0
4000a94c: 02 80 00 12 be 4000a994 <_Once+0x84>
4000a950: 80 a0 60 02 cmp %g1, 2
while ( *once_state != ONCE_STATE_COMPLETE ) {
4000a954: 02 80 00 09 be 4000a978 <_Once+0x68>
<== NOT EXECUTED
4000a958: ba 17 23 3c or %i4, 0x33c, %i5
<== NOT EXECUTED
static __inline void rtems_condition_variable_wait(
rtems_condition_variable *condition_variable,
rtems_mutex *mutex
)
{
_Condition_Wait( condition_variable, mutex );
4000a95c: 92 10 00 1d mov %i5, %o1
<== NOT EXECUTED
4000a960: 40 00 0c 4b call 4000da8c <_Condition_Wait>
<== NOT EXECUTED
4000a964: 90 07 60 14 add %i5, 0x14, %o0
<== NOT EXECUTED
4000a968: c2 0e 00 00 ldub [ %i0 ], %g1
<== NOT EXECUTED
4000a96c: 80 a0 60 02 cmp %g1, 2
<== NOT EXECUTED
4000a970: 12 bf ff fc bne 4000a960 <_Once+0x50>
<== NOT EXECUTED
4000a974: 92 10 00 1d mov %i5, %o1
<== NOT EXECUTED
_Mutex_Release( mutex );
4000a978: 7f ff ff 92 call 4000a7c0 <_Mutex_Release>
4000a97c: 90 17 23 3c or %i4, 0x33c, %o0
}
void _Once_Unlock( Thread_Life_state thread_life_state )
{
rtems_mutex_unlock( &_Once_Information.Mutex );
_Thread_Set_life_protection( thread_life_state );
4000a980: 90 10 00 1b mov %i3, %o0
4000a984: 7f ff f6 53 call 400082d0 <_Thread_Set_life_protection>
4000a988: b0 10 20 00 clr %i0
}
4000a98c: 81 c7 e0 08 ret
4000a990: 81 e8 00 00 restore
*once_state = ONCE_STATE_RUNNING;
4000a994: 82 10 20 01 mov 1, %g1
4000a998: c2 2e 00 00 stb %g1, [ %i0 ]
4000a99c: 7f ff ff 89 call 4000a7c0 <_Mutex_Release>
4000a9a0: 90 17 23 3c or %i4, 0x33c, %o0
_Thread_Set_life_protection( thread_life_state );
4000a9a4: 7f ff f6 4b call 400082d0 <_Thread_Set_life_protection>
4000a9a8: 90 10 20 01 mov 1, %o0
( *init_routine )();
4000a9ac: 9f c6 40 00 call %i1
4000a9b0: 01 00 00 00 nop
thread_life_state = _Thread_Set_life_protection( THREAD_LIFE_PROTECTED );
4000a9b4: 7f ff f6 47 call 400082d0 <_Thread_Set_life_protection>
4000a9b8: 90 10 20 01 mov 1, %o0 ! 1 <_TLS_Alignment>
_Mutex_Acquire( mutex );
4000a9bc: 7f ff ff 65 call 4000a750 <_Mutex_Acquire>
4000a9c0: 90 17 23 3c or %i4, 0x33c, %o0
*once_state = ONCE_STATE_COMPLETE;
4000a9c4: 82 10 20 02 mov 2, %g1
4000a9c8: c2 2e 00 00 stb %g1, [ %i0 ]
static __inline void rtems_condition_variable_broadcast(
rtems_condition_variable *condition_variable
)
{
_Condition_Broadcast( condition_variable );
4000a9cc: 11 10 00 68 sethi %hi(0x4001a000), %o0
4000a9d0: 40 00 0c 42 call 4000dad8 <_Condition_Broadcast>
4000a9d4: 90 12 23 50 or %o0, 0x350, %o0 ! 4001a350 <_Once_Information+0x14>
4000a9d8: 30 bf ff e8 b,a 4000a978 <_Once+0x68>
4000bb64 <_Once_Lock>:
return 0;
}
Thread_Life_state _Once_Lock( void )
{
4000bb64: 9d e3 bf a0 save %sp, -96, %sp
<== NOT EXECUTED
Thread_Life_state thread_life_state;
thread_life_state = _Thread_Set_life_protection( THREAD_LIFE_PROTECTED );
4000bb68: 7f ff f5 c4 call 40009278 <_Thread_Set_life_protection>
<== NOT EXECUTED
4000bb6c: 90 10 20 01 mov 1, %o0
<== NOT EXECUTED
4000bb70: b0 10 00 08 mov %o0, %i0
<== NOT EXECUTED
mutex->_Queue._name = name;
}
static __inline void rtems_mutex_lock( rtems_mutex *mutex )
{
_Mutex_Acquire( mutex );
4000bb74: 11 10 00 4f sethi %hi(0x40013c00), %o0
<== NOT EXECUTED
4000bb78: 7f ff ff 8b call 4000b9a4 <_Mutex_Acquire>
<== NOT EXECUTED
4000bb7c: 90 12 23 c0 or %o0, 0x3c0, %o0 ! 40013fc0 <_Once_Information>
<== NOT EXECUTED
rtems_mutex_lock( &_Once_Information.Mutex );
return thread_life_state;
}
4000bb80: 81 c7 e0 08 ret
<== NOT EXECUTED
4000bb84: 81 e8 00 00 restore
<== NOT EXECUTED
4000bb88 <_Once_Unlock>:
void _Once_Unlock( Thread_Life_state thread_life_state )
{
4000bb88: 9d e3 bf a0 save %sp, -96, %sp
<== NOT EXECUTED
}
static __inline void rtems_mutex_unlock( rtems_mutex *mutex )
{
_Mutex_Release( mutex );
4000bb8c: 11 10 00 4f sethi %hi(0x40013c00), %o0
<== NOT EXECUTED
4000bb90: 7f ff ff a1 call 4000ba14 <_Mutex_Release>
<== NOT EXECUTED
4000bb94: 90 12 23 c0 or %o0, 0x3c0, %o0 ! 40013fc0 <_Once_Information>
<== NOT EXECUTED
rtems_mutex_unlock( &_Once_Information.Mutex );
_Thread_Set_life_protection( thread_life_state );
4000bb98: 7f ff f5 b8 call 40009278 <_Thread_Set_life_protection>
<== NOT EXECUTED
4000bb9c: 81 e8 00 00 restore
<== NOT EXECUTED
40018428 <_Processor_mask_Copy>:
long *dst,
size_t dst_size,
const long *src,
size_t src_size
)
{
40018428: 82 10 00 08 mov %o0, %g1
long inclusive = 0;
long exclusive = 0;
if ( ( dst_size | src_size ) % sizeof( long ) != 0 ) {
4001842c: 84 12 40 0b or %o1, %o3, %g2
40018430: 80 88 a0 03 btst 3, %g2
40018434: 12 80 00 2b bne 400184e0 <_Processor_mask_Copy+0xb8>
40018438: 90 10 20 03 mov 3, %o0
return PROCESSOR_MASK_COPY_INVALID_SIZE;
}
while ( dst_size > 0 && src_size > 0 ) {
4001843c: 80 a2 e0 00 cmp %o3, 0
40018440: 02 80 00 11 be 40018484 <_Processor_mask_Copy+0x5c>
40018444: 86 10 20 00 clr %g3
40018448: 80 a2 60 00 cmp %o1, 0
4001844c: 32 80 00 07 bne,a 40018468 <_Processor_mask_Copy+0x40>
40018450: c4 02 80 00 ld [ %o2 ], %g2
40018454: 30 80 00 0d b,a 40018488 <_Processor_mask_Copy+0x60>
40018458: 80 a2 e0 00 cmp %o3, 0
4001845c: 02 80 00 0b be 40018488 <_Processor_mask_Copy+0x60>
40018460: 80 a2 60 00 cmp %o1, 0
long bits = *src;
40018464: c4 02 80 00 ld [ %o2 ], %g2
<== NOT EXECUTED
inclusive |= bits;
*dst = bits;
40018468: c4 20 40 00 st %g2, [ %g1 ]
++dst;
++src;
dst_size -= sizeof( long );
src_size -= sizeof( long );
4001846c: 96 02 ff fc add %o3, -4, %o3
while ( dst_size > 0 && src_size > 0 ) {
40018470: 92 82 7f fc addcc %o1, -4, %o1
inclusive |= bits;
40018474: 86 10 c0 02 or %g3, %g2, %g3
++dst;
40018478: 82 00 60 04 add %g1, 4, %g1
while ( dst_size > 0 && src_size > 0 ) {
4001847c: 12 bf ff f7 bne 40018458 <_Processor_mask_Copy+0x30>
40018480: 94 02 a0 04 add %o2, 4, %o2
}
while ( dst_size > 0 ) {
40018484: 80 a2 60 00 cmp %o1, 0
40018488: 02 80 00 07 be 400184a4 <_Processor_mask_Copy+0x7c>
<== ALWAYS TAKEN
4001848c: 80 a2 e0 00 cmp %o3, 0
*dst = 0;
40018490: c0 20 40 00 clr [ %g1 ]
while ( dst_size > 0 ) {
40018494: 92 82 7f fc addcc %o1, -4, %o1
40018498: 12 bf ff fe bne 40018490 <_Processor_mask_Copy+0x68>
4001849c: 82 00 60 04 add %g1, 4, %g1
++dst;
dst_size -= sizeof( long );
}
while ( src_size > 0 ) {
400184a0: 80 a2 e0 00 cmp %o3, 0
400184a4: 02 80 00 0e be 400184dc <_Processor_mask_Copy+0xb4>
400184a8: 82 10 20 00 clr %g1
exclusive |= *src;
400184ac: c4 02 80 00 ld [ %o2 ], %g2
400184b0: 82 10 40 02 or %g1, %g2, %g1
while ( src_size > 0 ) {
400184b4: 96 82 ff fc addcc %o3, -4, %o3
400184b8: 12 bf ff fd bne 400184ac <_Processor_mask_Copy+0x84>
400184bc: 94 02 a0 04 add %o2, 4, %o2
++src;
src_size -= sizeof( long );
}
if ( exclusive != 0 ) {
400184c0: 80 a0 60 00 cmp %g1, 0
400184c4: 02 80 00 07 be 400184e0 <_Processor_mask_Copy+0xb8>
400184c8: 90 10 20 00 clr %o0
if ( inclusive != 0 ) {
return PROCESSOR_MASK_COPY_PARTIAL_LOSS;
} else {
return PROCESSOR_MASK_COPY_COMPLETE_LOSS;
400184cc: 80 a0 00 03 cmp %g0, %g3
400184d0: 90 60 3f ff subx %g0, -1, %o0
400184d4: 81 c3 e0 08 retl
400184d8: 90 02 20 01 inc %o0
}
}
return PROCESSOR_MASK_COPY_LOSSLESS;
400184dc: 90 10 20 00 clr %o0
}
400184e0: 81 c3 e0 08 retl
400184e4: 01 00 00 00 nop
4000c724 <_RBTree_Extract>:
#include <rtems/score/rbtreeimpl.h>
RB_GENERATE_REMOVE_COLOR( RBTree_Control, RBTree_Node, Node, static )
RB_GENERATE_REMOVE( RBTree_Control, RBTree_Node, Node, static )
4000c724: c6 02 40 00 ld [ %o1 ], %g3
4000c728: 80 a0 e0 00 cmp %g3, 0
4000c72c: 02 80 00 d0 be 4000ca6c <_RBTree_Extract+0x348>
4000c730: c4 02 60 04 ld [ %o1 + 4 ], %g2
4000c734: 80 a0 a0 00 cmp %g2, 0
4000c738: 32 80 00 13 bne,a 4000c784 <_RBTree_Extract+0x60>
4000c73c: c2 00 80 00 ld [ %g2 ], %g1
4000c740: c2 02 60 08 ld [ %o1 + 8 ], %g1
4000c744: c8 02 60 0c ld [ %o1 + 0xc ], %g4
4000c748: c2 20 e0 08 st %g1, [ %g3 + 8 ]
4000c74c: 80 a0 60 00 cmp %g1, 0
4000c750: 22 80 00 cf be,a 4000ca8c <_RBTree_Extract+0x368>
4000c754: c6 22 00 00 st %g3, [ %o0 ]
4000c758: c4 00 40 00 ld [ %g1 ], %g2
4000c75c: 80 a2 40 02 cmp %o1, %g2
4000c760: 22 80 00 d3 be,a 4000caac <_RBTree_Extract+0x388>
4000c764: c6 20 40 00 st %g3, [ %g1 ]
4000c768: c6 20 60 04 st %g3, [ %g1 + 4 ]
4000c76c: 80 a1 20 00 cmp %g4, 0
4000c770: 02 80 00 55 be 4000c8c4 <_RBTree_Extract+0x1a0>
4000c774: 9a 10 20 01 mov 1, %o5
)
{
_Assert( _RBTree_Find_root( the_node ) == _RBTree_Root( the_rbtree ) );
RB_REMOVE( RBTree_Control, the_rbtree, the_node );
_RBTree_Initialize_node( the_node );
}
4000c778: 81 c3 e0 08 retl
4000c77c: 01 00 00 00 nop
RB_GENERATE_REMOVE( RBTree_Control, RBTree_Node, Node, static )
4000c780: c2 00 80 00 ld [ %g2 ], %g1
4000c784: 80 a0 60 00 cmp %g1, 0
4000c788: 32 bf ff fe bne,a 4000c780 <_RBTree_Extract+0x5c>
4000c78c: 84 10 00 01 mov %g1, %g2
4000c790: c6 00 a0 04 ld [ %g2 + 4 ], %g3
4000c794: c2 00 a0 08 ld [ %g2 + 8 ], %g1
4000c798: c8 00 a0 0c ld [ %g2 + 0xc ], %g4
4000c79c: 80 a0 e0 00 cmp %g3, 0
4000c7a0: 02 80 00 04 be 4000c7b0 <_RBTree_Extract+0x8c>
4000c7a4: 9a 10 00 01 mov %g1, %o5
4000c7a8: c2 20 e0 08 st %g1, [ %g3 + 8 ]
4000c7ac: da 00 a0 08 ld [ %g2 + 8 ], %o5
4000c7b0: 80 a0 60 00 cmp %g1, 0
4000c7b4: 22 80 00 07 be,a 4000c7d0 <_RBTree_Extract+0xac>
<== NEVER TAKEN
4000c7b8: c6 22 00 00 st %g3, [ %o0 ]
<== NOT EXECUTED
4000c7bc: d8 00 40 00 ld [ %g1 ], %o4
4000c7c0: 80 a0 80 0c cmp %g2, %o4
4000c7c4: 22 80 00 03 be,a 4000c7d0 <_RBTree_Extract+0xac>
4000c7c8: c6 20 40 00 st %g3, [ %g1 ]
4000c7cc: c6 20 60 04 st %g3, [ %g1 + 4 ]
4000c7d0: 80 a2 40 0d cmp %o1, %o5
4000c7d4: 22 80 00 02 be,a 4000c7dc <_RBTree_Extract+0xb8>
4000c7d8: 82 10 00 02 mov %g2, %g1
4000c7dc: da 02 40 00 ld [ %o1 ], %o5
4000c7e0: da 20 80 00 st %o5, [ %g2 ]
4000c7e4: da 02 60 04 ld [ %o1 + 4 ], %o5
4000c7e8: da 20 a0 04 st %o5, [ %g2 + 4 ]
4000c7ec: da 02 60 08 ld [ %o1 + 8 ], %o5
4000c7f0: da 20 a0 08 st %o5, [ %g2 + 8 ]
4000c7f4: da 02 60 0c ld [ %o1 + 0xc ], %o5
4000c7f8: da 20 a0 0c st %o5, [ %g2 + 0xc ]
4000c7fc: da 02 60 08 ld [ %o1 + 8 ], %o5
4000c800: 80 a3 60 00 cmp %o5, 0
4000c804: 22 80 00 07 be,a 4000c820 <_RBTree_Extract+0xfc>
4000c808: c4 22 00 00 st %g2, [ %o0 ]
4000c80c: d8 03 40 00 ld [ %o5 ], %o4
4000c810: 80 a2 40 0c cmp %o1, %o4
4000c814: 22 80 00 03 be,a 4000c820 <_RBTree_Extract+0xfc>
4000c818: c4 23 40 00 st %g2, [ %o5 ]
4000c81c: c4 23 60 04 st %g2, [ %o5 + 4 ]
4000c820: da 02 40 00 ld [ %o1 ], %o5
4000c824: c4 23 60 08 st %g2, [ %o5 + 8 ]
4000c828: da 02 60 04 ld [ %o1 + 4 ], %o5
4000c82c: 80 a3 60 00 cmp %o5, 0
4000c830: 32 80 00 02 bne,a 4000c838 <_RBTree_Extract+0x114>
4000c834: c4 23 60 08 st %g2, [ %o5 + 8 ]
4000c838: 80 a0 60 00 cmp %g1, 0
4000c83c: 02 bf ff cc be 4000c76c <_RBTree_Extract+0x48>
4000c840: 84 10 00 01 mov %g1, %g2
4000c844: c4 00 a0 08 ld [ %g2 + 8 ], %g2
4000c848: 80 a0 a0 00 cmp %g2, 0
4000c84c: 32 bf ff ff bne,a 4000c848 <_RBTree_Extract+0x124>
4000c850: c4 00 a0 08 ld [ %g2 + 8 ], %g2
4000c854: 80 a1 20 00 cmp %g4, 0
4000c858: 12 bf ff c8 bne 4000c778 <_RBTree_Extract+0x54>
4000c85c: 9a 10 20 01 mov 1, %o5
RB_GENERATE_REMOVE_COLOR( RBTree_Control, RBTree_Node, Node, static )
4000c860: 10 80 00 1a b 4000c8c8 <_RBTree_Extract+0x1a4>
4000c864: 80 a0 e0 00 cmp %g3, 0
4000c868: 80 a0 e0 01 cmp %g3, 1
4000c86c: 22 80 00 54 be,a 4000c9bc <_RBTree_Extract+0x298>
4000c870: c8 00 a0 04 ld [ %g2 + 4 ], %g4
4000c874: c6 00 80 00 ld [ %g2 ], %g3
4000c878: 80 a0 e0 00 cmp %g3, 0
4000c87c: 22 80 00 07 be,a 4000c898 <_RBTree_Extract+0x174>
4000c880: c8 00 a0 04 ld [ %g2 + 4 ], %g4
4000c884: c8 00 e0 0c ld [ %g3 + 0xc ], %g4
4000c888: 80 a1 20 00 cmp %g4, 0
4000c88c: 32 80 00 98 bne,a 4000caec <_RBTree_Extract+0x3c8>
4000c890: da 00 60 0c ld [ %g1 + 0xc ], %o5
4000c894: c8 00 a0 04 ld [ %g2 + 4 ], %g4
4000c898: 80 a1 20 00 cmp %g4, 0
4000c89c: 22 80 00 07 be,a 4000c8b8 <_RBTree_Extract+0x194>
4000c8a0: da 20 a0 0c st %o5, [ %g2 + 0xc ]
4000c8a4: d8 01 20 0c ld [ %g4 + 0xc ], %o4
4000c8a8: 80 a3 20 00 cmp %o4, 0
4000c8ac: 12 80 00 89 bne 4000cad0 <_RBTree_Extract+0x3ac>
4000c8b0: 80 a0 e0 00 cmp %g3, 0
4000c8b4: da 20 a0 0c st %o5, [ %g2 + 0xc ]
4000c8b8: 86 10 00 01 mov %g1, %g3
4000c8bc: c4 00 60 08 ld [ %g1 + 8 ], %g2
4000c8c0: 82 10 00 02 mov %g2, %g1
4000c8c4: 80 a0 e0 00 cmp %g3, 0
4000c8c8: 22 80 00 07 be,a 4000c8e4 <_RBTree_Extract+0x1c0>
4000c8cc: c4 02 00 00 ld [ %o0 ], %g2
4000c8d0: c4 00 e0 0c ld [ %g3 + 0xc ], %g2
4000c8d4: 80 a0 a0 00 cmp %g2, 0
4000c8d8: 12 80 00 37 bne 4000c9b4 <_RBTree_Extract+0x290>
4000c8dc: 01 00 00 00 nop
4000c8e0: c4 02 00 00 ld [ %o0 ], %g2
4000c8e4: 80 a0 c0 02 cmp %g3, %g2
4000c8e8: 02 80 00 31 be 4000c9ac <_RBTree_Extract+0x288>
<== ALWAYS TAKEN
4000c8ec: 80 a0 e0 00 cmp %g3, 0
4000c8f0: c4 00 40 00 ld [ %g1 ], %g2
4000c8f4: 80 a0 80 03 cmp %g2, %g3
4000c8f8: 32 bf ff dc bne,a 4000c868 <_RBTree_Extract+0x144>
4000c8fc: c6 00 a0 0c ld [ %g2 + 0xc ], %g3
4000c900: c4 00 60 04 ld [ %g1 + 4 ], %g2
4000c904: c8 00 a0 0c ld [ %g2 + 0xc ], %g4
4000c908: 80 a1 20 01 cmp %g4, 1
4000c90c: 02 80 00 40 be 4000ca0c <_RBTree_Extract+0x2e8>
4000c910: c6 00 80 00 ld [ %g2 ], %g3
4000c914: 80 a0 e0 00 cmp %g3, 0
4000c918: 22 80 00 06 be,a 4000c930 <_RBTree_Extract+0x20c>
4000c91c: c8 00 a0 04 ld [ %g2 + 4 ], %g4
4000c920: c8 00 e0 0c ld [ %g3 + 0xc ], %g4
4000c924: 80 a1 20 00 cmp %g4, 0
4000c928: 12 80 00 ac bne 4000cbd8 <_RBTree_Extract+0x4b4>
4000c92c: c8 00 a0 04 ld [ %g2 + 4 ], %g4
4000c930: 80 a1 20 00 cmp %g4, 0
4000c934: 22 bf ff e1 be,a 4000c8b8 <_RBTree_Extract+0x194>
4000c938: da 20 a0 0c st %o5, [ %g2 + 0xc ]
4000c93c: c6 01 20 0c ld [ %g4 + 0xc ], %g3
4000c940: 80 a0 e0 00 cmp %g3, 0
4000c944: 22 bf ff dd be,a 4000c8b8 <_RBTree_Extract+0x194>
4000c948: da 20 a0 0c st %o5, [ %g2 + 0xc ]
4000c94c: c6 00 60 0c ld [ %g1 + 0xc ], %g3
4000c950: da 00 60 04 ld [ %g1 + 4 ], %o5
4000c954: c6 20 a0 0c st %g3, [ %g2 + 0xc ]
4000c958: c0 20 60 0c clr [ %g1 + 0xc ]
4000c95c: c0 21 20 0c clr [ %g4 + 0xc ]
4000c960: c4 03 40 00 ld [ %o5 ], %g2
4000c964: 80 a0 a0 00 cmp %g2, 0
4000c968: 02 80 00 03 be 4000c974 <_RBTree_Extract+0x250>
4000c96c: c4 20 60 04 st %g2, [ %g1 + 4 ]
4000c970: c2 20 a0 08 st %g1, [ %g2 + 8 ]
4000c974: c4 00 60 08 ld [ %g1 + 8 ], %g2
4000c978: 80 a0 a0 00 cmp %g2, 0
4000c97c: 02 80 00 c1 be 4000cc80 <_RBTree_Extract+0x55c>
4000c980: c4 23 60 08 st %g2, [ %o5 + 8 ]
4000c984: c4 00 60 08 ld [ %g1 + 8 ], %g2
4000c988: c6 00 80 00 ld [ %g2 ], %g3
4000c98c: 80 a0 40 03 cmp %g1, %g3
4000c990: 22 80 00 c1 be,a 4000cc94 <_RBTree_Extract+0x570>
4000c994: da 20 80 00 st %o5, [ %g2 ]
4000c998: da 20 a0 04 st %o5, [ %g2 + 4 ]
4000c99c: c6 02 00 00 ld [ %o0 ], %g3
4000c9a0: c2 23 40 00 st %g1, [ %o5 ]
4000c9a4: da 20 60 08 st %o5, [ %g1 + 8 ]
4000c9a8: 80 a0 e0 00 cmp %g3, 0
4000c9ac: 02 bf ff 73 be 4000c778 <_RBTree_Extract+0x54>
4000c9b0: 01 00 00 00 nop
}
4000c9b4: 81 c3 e0 08 retl
4000c9b8: c0 20 e0 0c clr [ %g3 + 0xc ]
RB_GENERATE_REMOVE_COLOR( RBTree_Control, RBTree_Node, Node, static )
4000c9bc: c0 20 a0 0c clr [ %g2 + 0xc ]
4000c9c0: 80 a1 20 00 cmp %g4, 0
4000c9c4: c6 20 60 0c st %g3, [ %g1 + 0xc ]
4000c9c8: 02 80 00 03 be 4000c9d4 <_RBTree_Extract+0x2b0>
4000c9cc: c8 20 40 00 st %g4, [ %g1 ]
4000c9d0: c2 21 20 08 st %g1, [ %g4 + 8 ]
4000c9d4: c6 00 60 08 ld [ %g1 + 8 ], %g3
4000c9d8: 80 a0 e0 00 cmp %g3, 0
4000c9dc: 02 80 00 22 be 4000ca64 <_RBTree_Extract+0x340>
4000c9e0: c6 20 a0 08 st %g3, [ %g2 + 8 ]
4000c9e4: c6 00 60 08 ld [ %g1 + 8 ], %g3
4000c9e8: d8 00 c0 00 ld [ %g3 ], %o4
4000c9ec: 80 a0 40 0c cmp %g1, %o4
4000c9f0: 22 80 00 25 be,a 4000ca84 <_RBTree_Extract+0x360>
4000c9f4: c4 20 c0 00 st %g2, [ %g3 ]
4000c9f8: c4 20 e0 04 st %g2, [ %g3 + 4 ]
4000c9fc: c2 20 a0 04 st %g1, [ %g2 + 4 ]
4000ca00: c4 20 60 08 st %g2, [ %g1 + 8 ]
4000ca04: 10 bf ff 9c b 4000c874 <_RBTree_Extract+0x150>
4000ca08: 84 10 00 04 mov %g4, %g2
4000ca0c: c0 20 a0 0c clr [ %g2 + 0xc ]
4000ca10: 80 a0 e0 00 cmp %g3, 0
4000ca14: c8 20 60 0c st %g4, [ %g1 + 0xc ]
4000ca18: 02 80 00 03 be 4000ca24 <_RBTree_Extract+0x300>
4000ca1c: c6 20 60 04 st %g3, [ %g1 + 4 ]
4000ca20: c2 20 e0 08 st %g1, [ %g3 + 8 ]
4000ca24: c8 00 60 08 ld [ %g1 + 8 ], %g4
4000ca28: 80 a1 20 00 cmp %g4, 0
4000ca2c: 02 80 00 1d be 4000caa0 <_RBTree_Extract+0x37c>
4000ca30: c8 20 a0 08 st %g4, [ %g2 + 8 ]
4000ca34: c8 00 60 08 ld [ %g1 + 8 ], %g4
4000ca38: d8 01 00 00 ld [ %g4 ], %o4
4000ca3c: 80 a0 40 0c cmp %g1, %o4
4000ca40: 22 80 00 22 be,a 4000cac8 <_RBTree_Extract+0x3a4>
4000ca44: c4 21 00 00 st %g2, [ %g4 ]
4000ca48: c4 21 20 04 st %g2, [ %g4 + 4 ]
4000ca4c: c8 00 60 04 ld [ %g1 + 4 ], %g4
4000ca50: c2 20 80 00 st %g1, [ %g2 ]
4000ca54: c6 01 00 00 ld [ %g4 ], %g3
4000ca58: c4 20 60 08 st %g2, [ %g1 + 8 ]
4000ca5c: 10 bf ff ae b 4000c914 <_RBTree_Extract+0x1f0>
4000ca60: 84 10 00 04 mov %g4, %g2
4000ca64: 10 bf ff e6 b 4000c9fc <_RBTree_Extract+0x2d8>
4000ca68: c4 22 00 00 st %g2, [ %o0 ]
RB_GENERATE_REMOVE( RBTree_Control, RBTree_Node, Node, static )
4000ca6c: c2 02 60 08 ld [ %o1 + 8 ], %g1
4000ca70: 80 a0 a0 00 cmp %g2, 0
4000ca74: 02 bf ff 36 be 4000c74c <_RBTree_Extract+0x28>
4000ca78: c8 02 60 0c ld [ %o1 + 0xc ], %g4
4000ca7c: 10 bf ff 33 b 4000c748 <_RBTree_Extract+0x24>
4000ca80: 86 10 00 02 mov %g2, %g3
4000ca84: 10 bf ff de b 4000c9fc <_RBTree_Extract+0x2d8>
4000ca88: c8 00 40 00 ld [ %g1 ], %g4
4000ca8c: 80 a1 20 00 cmp %g4, 0
4000ca90: 12 bf ff 3a bne 4000c778 <_RBTree_Extract+0x54>
<== NEVER TAKEN
4000ca94: 9a 10 20 01 mov 1, %o5
RB_GENERATE_REMOVE_COLOR( RBTree_Control, RBTree_Node, Node, static )
4000ca98: 10 bf ff 8c b 4000c8c8 <_RBTree_Extract+0x1a4>
4000ca9c: 80 a0 e0 00 cmp %g3, 0
4000caa0: c4 22 00 00 st %g2, [ %o0 ]
4000caa4: 10 bf ff eb b 4000ca50 <_RBTree_Extract+0x32c>
4000caa8: 88 10 00 03 mov %g3, %g4
RB_GENERATE_REMOVE( RBTree_Control, RBTree_Node, Node, static )
4000caac: 80 a1 20 00 cmp %g4, 0
4000cab0: 12 bf ff 32 bne 4000c778 <_RBTree_Extract+0x54>
4000cab4: 9a 10 20 01 mov 1, %o5
RB_GENERATE_REMOVE_COLOR( RBTree_Control, RBTree_Node, Node, static )
4000cab8: 10 bf ff 84 b 4000c8c8 <_RBTree_Extract+0x1a4>
4000cabc: 80 a0 e0 00 cmp %g3, 0
RB_GENERATE_REMOVE( RBTree_Control, RBTree_Node, Node, static )
4000cac0: 10 bf ff 58 b 4000c820 <_RBTree_Extract+0xfc>
<== NOT EXECUTED
4000cac4: c4 23 40 00 st %g2, [ %o5 ]
<== NOT EXECUTED
RB_GENERATE_REMOVE_COLOR( RBTree_Control, RBTree_Node, Node, static )
4000cac8: 10 bf ff e2 b 4000ca50 <_RBTree_Extract+0x32c>
4000cacc: 88 10 00 03 mov %g3, %g4
4000cad0: 22 80 00 21 be,a 4000cb54 <_RBTree_Extract+0x430>
4000cad4: c6 01 00 00 ld [ %g4 ], %g3
4000cad8: da 00 e0 0c ld [ %g3 + 0xc ], %o5
4000cadc: 80 a3 60 00 cmp %o5, 0
4000cae0: 22 80 00 1d be,a 4000cb54 <_RBTree_Extract+0x430>
<== ALWAYS TAKEN
4000cae4: c6 01 00 00 ld [ %g4 ], %g3
4000cae8: da 00 60 0c ld [ %g1 + 0xc ], %o5
<== NOT EXECUTED
4000caec: c8 00 40 00 ld [ %g1 ], %g4
4000caf0: da 20 a0 0c st %o5, [ %g2 + 0xc ]
4000caf4: c0 20 60 0c clr [ %g1 + 0xc ]
4000caf8: c0 20 e0 0c clr [ %g3 + 0xc ]
4000cafc: c4 01 20 04 ld [ %g4 + 4 ], %g2
4000cb00: 80 a0 a0 00 cmp %g2, 0
4000cb04: 02 80 00 03 be 4000cb10 <_RBTree_Extract+0x3ec>
4000cb08: c4 20 40 00 st %g2, [ %g1 ]
4000cb0c: c2 20 a0 08 st %g1, [ %g2 + 8 ]
4000cb10: c4 00 60 08 ld [ %g1 + 8 ], %g2
4000cb14: 80 a0 a0 00 cmp %g2, 0
4000cb18: 02 80 00 2b be 4000cbc4 <_RBTree_Extract+0x4a0>
4000cb1c: c4 21 20 08 st %g2, [ %g4 + 8 ]
4000cb20: c4 00 60 08 ld [ %g1 + 8 ], %g2
4000cb24: c6 00 80 00 ld [ %g2 ], %g3
4000cb28: 80 a0 40 03 cmp %g1, %g3
4000cb2c: 22 80 00 4f be,a 4000cc68 <_RBTree_Extract+0x544>
4000cb30: c8 20 80 00 st %g4, [ %g2 ]
4000cb34: c8 20 a0 04 st %g4, [ %g2 + 4 ]
4000cb38: c6 02 00 00 ld [ %o0 ], %g3
4000cb3c: c2 21 20 04 st %g1, [ %g4 + 4 ]
4000cb40: c8 20 60 08 st %g4, [ %g1 + 8 ]
4000cb44: 80 a0 e0 00 cmp %g3, 0
4000cb48: 12 bf ff 9b bne 4000c9b4 <_RBTree_Extract+0x290>
4000cb4c: 01 00 00 00 nop
4000cb50: 30 bf ff 0a b,a 4000c778 <_RBTree_Extract+0x54>
<== NOT EXECUTED
4000cb54: c0 21 20 0c clr [ %g4 + 0xc ]
4000cb58: 9a 10 20 01 mov 1, %o5
4000cb5c: c6 20 a0 04 st %g3, [ %g2 + 4 ]
4000cb60: 80 a0 e0 00 cmp %g3, 0
4000cb64: 02 80 00 03 be 4000cb70 <_RBTree_Extract+0x44c>
4000cb68: da 20 a0 0c st %o5, [ %g2 + 0xc ]
4000cb6c: c4 20 e0 08 st %g2, [ %g3 + 8 ]
4000cb70: c6 00 a0 08 ld [ %g2 + 8 ], %g3
4000cb74: 80 a0 e0 00 cmp %g3, 0
4000cb78: 02 80 00 40 be 4000cc78 <_RBTree_Extract+0x554>
4000cb7c: c6 21 20 08 st %g3, [ %g4 + 8 ]
4000cb80: c6 00 a0 08 ld [ %g2 + 8 ], %g3
4000cb84: da 00 c0 00 ld [ %g3 ], %o5
4000cb88: 80 a0 80 0d cmp %g2, %o5
4000cb8c: 22 80 00 03 be,a 4000cb98 <_RBTree_Extract+0x474>
<== ALWAYS TAKEN
4000cb90: c8 20 c0 00 st %g4, [ %g3 ]
4000cb94: c8 20 e0 04 st %g4, [ %g3 + 4 ]
<== NOT EXECUTED
4000cb98: c4 21 00 00 st %g2, [ %g4 ]
4000cb9c: c8 20 a0 08 st %g4, [ %g2 + 8 ]
4000cba0: c8 00 40 00 ld [ %g1 ], %g4
4000cba4: c4 00 60 0c ld [ %g1 + 0xc ], %g2
4000cba8: c4 21 20 0c st %g2, [ %g4 + 0xc ]
4000cbac: c6 01 00 00 ld [ %g4 ], %g3
4000cbb0: 80 a0 e0 00 cmp %g3, 0
4000cbb4: 02 bf ff d2 be 4000cafc <_RBTree_Extract+0x3d8>
4000cbb8: c0 20 60 0c clr [ %g1 + 0xc ]
4000cbbc: 10 bf ff d0 b 4000cafc <_RBTree_Extract+0x3d8>
4000cbc0: c0 20 e0 0c clr [ %g3 + 0xc ]
4000cbc4: c8 22 00 00 st %g4, [ %o0 ]
4000cbc8: 86 10 00 04 mov %g4, %g3
4000cbcc: c2 21 20 04 st %g1, [ %g4 + 4 ]
4000cbd0: 10 bf ff dd b 4000cb44 <_RBTree_Extract+0x420>
4000cbd4: c8 20 60 08 st %g4, [ %g1 + 8 ]
4000cbd8: 80 a1 20 00 cmp %g4, 0
4000cbdc: 22 80 00 07 be,a 4000cbf8 <_RBTree_Extract+0x4d4>
4000cbe0: c8 00 e0 04 ld [ %g3 + 4 ], %g4
4000cbe4: da 01 20 0c ld [ %g4 + 0xc ], %o5
4000cbe8: 80 a3 60 00 cmp %o5, 0
4000cbec: 32 bf ff 59 bne,a 4000c950 <_RBTree_Extract+0x22c>
4000cbf0: c6 00 60 0c ld [ %g1 + 0xc ], %g3
4000cbf4: c8 00 e0 04 ld [ %g3 + 4 ], %g4
4000cbf8: c0 20 e0 0c clr [ %g3 + 0xc ]
4000cbfc: 9a 10 20 01 mov 1, %o5
4000cc00: c8 20 80 00 st %g4, [ %g2 ]
4000cc04: 80 a1 20 00 cmp %g4, 0
4000cc08: 02 80 00 03 be 4000cc14 <_RBTree_Extract+0x4f0>
4000cc0c: da 20 a0 0c st %o5, [ %g2 + 0xc ]
4000cc10: c4 21 20 08 st %g2, [ %g4 + 8 ]
4000cc14: c8 00 a0 08 ld [ %g2 + 8 ], %g4
4000cc18: 80 a1 20 00 cmp %g4, 0
4000cc1c: 02 80 00 22 be 4000cca4 <_RBTree_Extract+0x580>
4000cc20: c8 20 e0 08 st %g4, [ %g3 + 8 ]
4000cc24: c8 00 a0 08 ld [ %g2 + 8 ], %g4
4000cc28: da 01 00 00 ld [ %g4 ], %o5
4000cc2c: 80 a0 80 0d cmp %g2, %o5
4000cc30: 22 80 00 03 be,a 4000cc3c <_RBTree_Extract+0x518>
<== NEVER TAKEN
4000cc34: c6 21 00 00 st %g3, [ %g4 ]
<== NOT EXECUTED
4000cc38: c6 21 20 04 st %g3, [ %g4 + 4 ]
4000cc3c: c4 20 e0 04 st %g2, [ %g3 + 4 ]
4000cc40: c6 20 a0 08 st %g3, [ %g2 + 8 ]
4000cc44: da 00 60 04 ld [ %g1 + 4 ], %o5
4000cc48: c4 00 60 0c ld [ %g1 + 0xc ], %g2
4000cc4c: c4 23 60 0c st %g2, [ %o5 + 0xc ]
4000cc50: c8 03 60 04 ld [ %o5 + 4 ], %g4
4000cc54: 80 a1 20 00 cmp %g4, 0
4000cc58: 02 bf ff 42 be 4000c960 <_RBTree_Extract+0x23c>
4000cc5c: c0 20 60 0c clr [ %g1 + 0xc ]
4000cc60: 10 bf ff 40 b 4000c960 <_RBTree_Extract+0x23c>
4000cc64: c0 21 20 0c clr [ %g4 + 0xc ]
4000cc68: c6 02 00 00 ld [ %o0 ], %g3
4000cc6c: c2 21 20 04 st %g1, [ %g4 + 4 ]
4000cc70: 10 bf ff b5 b 4000cb44 <_RBTree_Extract+0x420>
4000cc74: c8 20 60 08 st %g4, [ %g1 + 8 ]
4000cc78: 10 bf ff c8 b 4000cb98 <_RBTree_Extract+0x474>
<== NOT EXECUTED
4000cc7c: c8 22 00 00 st %g4, [ %o0 ]
<== NOT EXECUTED
4000cc80: da 22 00 00 st %o5, [ %o0 ]
4000cc84: 86 10 00 0d mov %o5, %g3
4000cc88: c2 23 40 00 st %g1, [ %o5 ]
4000cc8c: 10 bf ff 47 b 4000c9a8 <_RBTree_Extract+0x284>
4000cc90: da 20 60 08 st %o5, [ %g1 + 8 ]
4000cc94: c6 02 00 00 ld [ %o0 ], %g3
4000cc98: c2 23 40 00 st %g1, [ %o5 ]
4000cc9c: 10 bf ff 43 b 4000c9a8 <_RBTree_Extract+0x284>
4000cca0: da 20 60 08 st %o5, [ %g1 + 8 ]
4000cca4: 10 bf ff e6 b 4000cc3c <_RBTree_Extract+0x518>
<== NOT EXECUTED
4000cca8: c6 22 00 00 st %g3, [ %o0 ]
<== NOT EXECUTED
4000ccac <_RBTree_Insert_color>:
#include "config.h"
#endif
#include <rtems/score/rbtreeimpl.h>
RB_GENERATE_INSERT_COLOR( RBTree_Control, RBTree_Node, Node, static inline )
4000ccac: 98 10 20 01 mov 1, %o4
4000ccb0: c2 02 60 08 ld [ %o1 + 8 ], %g1
4000ccb4: 80 a0 60 00 cmp %g1, 0
4000ccb8: 22 80 00 2f be,a 4000cd74 <_RBTree_Insert_color+0xc8>
4000ccbc: c2 02 00 00 ld [ %o0 ], %g1
4000ccc0: c4 00 60 0c ld [ %g1 + 0xc ], %g2
4000ccc4: 80 a0 a0 01 cmp %g2, 1
4000ccc8: 32 80 00 2b bne,a 4000cd74 <_RBTree_Insert_color+0xc8>
4000cccc: c2 02 00 00 ld [ %o0 ], %g1
4000ccd0: c6 00 60 08 ld [ %g1 + 8 ], %g3
4000ccd4: c8 00 c0 00 ld [ %g3 ], %g4
4000ccd8: 80 a0 40 04 cmp %g1, %g4
4000ccdc: 02 80 00 28 be 4000cd7c <_RBTree_Insert_color+0xd0>
4000cce0: 84 10 00 03 mov %g3, %g2
4000cce4: 80 a1 20 00 cmp %g4, 0
4000cce8: 22 80 00 07 be,a 4000cd04 <_RBTree_Insert_color+0x58>
4000ccec: c8 00 40 00 ld [ %g1 ], %g4
4000ccf0: da 01 20 0c ld [ %g4 + 0xc ], %o5
4000ccf4: 80 a3 60 01 cmp %o5, 1
4000ccf8: 22 80 00 58 be,a 4000ce58 <_RBTree_Insert_color+0x1ac>
4000ccfc: c0 21 20 0c clr [ %g4 + 0xc ]
4000cd00: c8 00 40 00 ld [ %g1 ], %g4
4000cd04: 80 a2 40 04 cmp %o1, %g4
4000cd08: 22 80 00 3c be,a 4000cdf8 <_RBTree_Insert_color+0x14c>
4000cd0c: c8 02 60 04 ld [ %o1 + 4 ], %g4
4000cd10: c6 00 a0 04 ld [ %g2 + 4 ], %g3
4000cd14: c0 20 60 0c clr [ %g1 + 0xc ]
4000cd18: c2 00 c0 00 ld [ %g3 ], %g1
4000cd1c: c2 20 a0 04 st %g1, [ %g2 + 4 ]
4000cd20: 80 a0 60 00 cmp %g1, 0
4000cd24: 02 80 00 03 be 4000cd30 <_RBTree_Insert_color+0x84>
4000cd28: d8 20 a0 0c st %o4, [ %g2 + 0xc ]
4000cd2c: c4 20 60 08 st %g2, [ %g1 + 8 ]
4000cd30: c2 00 a0 08 ld [ %g2 + 8 ], %g1
4000cd34: 80 a0 60 00 cmp %g1, 0
4000cd38: 02 80 00 44 be 4000ce48 <_RBTree_Insert_color+0x19c>
4000cd3c: c2 20 e0 08 st %g1, [ %g3 + 8 ]
4000cd40: c2 00 a0 08 ld [ %g2 + 8 ], %g1
4000cd44: c8 00 40 00 ld [ %g1 ], %g4
4000cd48: 80 a0 80 04 cmp %g2, %g4
4000cd4c: 22 80 00 47 be,a 4000ce68 <_RBTree_Insert_color+0x1bc>
4000cd50: c6 20 40 00 st %g3, [ %g1 ]
4000cd54: c6 20 60 04 st %g3, [ %g1 + 4 ]
4000cd58: c4 20 c0 00 st %g2, [ %g3 ]
4000cd5c: c6 20 a0 08 st %g3, [ %g2 + 8 ]
4000cd60: c2 02 60 08 ld [ %o1 + 8 ], %g1
4000cd64: 80 a0 60 00 cmp %g1, 0
4000cd68: 32 bf ff d7 bne,a 4000ccc4 <_RBTree_Insert_color+0x18>
<== ALWAYS TAKEN
4000cd6c: c4 00 60 0c ld [ %g1 + 0xc ], %g2
4000cd70: c2 02 00 00 ld [ %o0 ], %g1
<== NOT EXECUTED
RBTree_Control *the_rbtree,
RBTree_Node *the_node
)
{
RBTree_Control_RB_INSERT_COLOR( the_rbtree, the_node );
}
4000cd74: 81 c3 e0 08 retl
4000cd78: c0 20 60 0c clr [ %g1 + 0xc ]
RB_GENERATE_INSERT_COLOR( RBTree_Control, RBTree_Node, Node, static inline )
4000cd7c: c8 00 e0 04 ld [ %g3 + 4 ], %g4
4000cd80: 80 a1 20 00 cmp %g4, 0
4000cd84: 22 80 00 07 be,a 4000cda0 <_RBTree_Insert_color+0xf4>
4000cd88: da 00 60 04 ld [ %g1 + 4 ], %o5
4000cd8c: da 01 20 0c ld [ %g4 + 0xc ], %o5
4000cd90: 80 a3 60 01 cmp %o5, 1
4000cd94: 22 80 00 31 be,a 4000ce58 <_RBTree_Insert_color+0x1ac>
4000cd98: c0 21 20 0c clr [ %g4 + 0xc ]
4000cd9c: da 00 60 04 ld [ %g1 + 4 ], %o5
4000cda0: 80 a3 40 09 cmp %o5, %o1
4000cda4: 02 80 00 3a be 4000ce8c <_RBTree_Insert_color+0x1e0>
4000cda8: 88 10 00 01 mov %g1, %g4
4000cdac: c0 20 60 0c clr [ %g1 + 0xc ]
4000cdb0: 80 a3 60 00 cmp %o5, 0
4000cdb4: d8 20 a0 0c st %o4, [ %g2 + 0xc ]
4000cdb8: 02 80 00 03 be 4000cdc4 <_RBTree_Insert_color+0x118>
4000cdbc: da 20 80 00 st %o5, [ %g2 ]
4000cdc0: c4 23 60 08 st %g2, [ %o5 + 8 ]
4000cdc4: c2 00 a0 08 ld [ %g2 + 8 ], %g1
4000cdc8: 80 a0 60 00 cmp %g1, 0
4000cdcc: 02 80 00 2c be 4000ce7c <_RBTree_Insert_color+0x1d0>
4000cdd0: c2 21 20 08 st %g1, [ %g4 + 8 ]
4000cdd4: c2 00 a0 08 ld [ %g2 + 8 ], %g1
4000cdd8: c6 00 40 00 ld [ %g1 ], %g3
4000cddc: 80 a0 80 03 cmp %g2, %g3
4000cde0: 22 80 00 4a be,a 4000cf08 <_RBTree_Insert_color+0x25c>
4000cde4: c8 20 40 00 st %g4, [ %g1 ]
4000cde8: c8 20 60 04 st %g4, [ %g1 + 4 ]
4000cdec: c4 21 20 04 st %g2, [ %g4 + 4 ]
4000cdf0: 10 bf ff b0 b 4000ccb0 <_RBTree_Insert_color+0x4>
4000cdf4: c8 20 a0 08 st %g4, [ %g2 + 8 ]
4000cdf8: 80 a1 20 00 cmp %g4, 0
4000cdfc: 02 80 00 3b be 4000cee8 <_RBTree_Insert_color+0x23c>
4000ce00: c8 20 40 00 st %g4, [ %g1 ]
4000ce04: c2 21 20 08 st %g1, [ %g4 + 8 ]
4000ce08: c6 00 60 08 ld [ %g1 + 8 ], %g3
4000ce0c: 80 a0 e0 00 cmp %g3, 0
4000ce10: 02 80 00 19 be 4000ce74 <_RBTree_Insert_color+0x1c8>
4000ce14: c6 22 60 08 st %g3, [ %o1 + 8 ]
4000ce18: c6 00 60 08 ld [ %g1 + 8 ], %g3
4000ce1c: c8 00 c0 00 ld [ %g3 ], %g4
4000ce20: 80 a0 40 04 cmp %g1, %g4
4000ce24: 22 80 00 03 be,a 4000ce30 <_RBTree_Insert_color+0x184>
<== NEVER TAKEN
4000ce28: d2 20 c0 00 st %o1, [ %g3 ]
<== NOT EXECUTED
4000ce2c: d2 20 e0 04 st %o1, [ %g3 + 4 ]
4000ce30: 86 10 00 09 mov %o1, %g3
4000ce34: c2 22 60 04 st %g1, [ %o1 + 4 ]
4000ce38: d2 20 60 08 st %o1, [ %g1 + 8 ]
4000ce3c: 92 10 00 01 mov %g1, %o1
4000ce40: 10 bf ff b4 b 4000cd10 <_RBTree_Insert_color+0x64>
4000ce44: 82 10 00 03 mov %g3, %g1
4000ce48: c6 22 00 00 st %g3, [ %o0 ]
4000ce4c: c4 20 c0 00 st %g2, [ %g3 ]
4000ce50: 10 bf ff c4 b 4000cd60 <_RBTree_Insert_color+0xb4>
4000ce54: c6 20 a0 08 st %g3, [ %g2 + 8 ]
4000ce58: 92 10 00 03 mov %g3, %o1
4000ce5c: c0 20 60 0c clr [ %g1 + 0xc ]
4000ce60: 10 bf ff 94 b 4000ccb0 <_RBTree_Insert_color+0x4>
4000ce64: da 20 e0 0c st %o5, [ %g3 + 0xc ]
4000ce68: c4 20 c0 00 st %g2, [ %g3 ]
4000ce6c: 10 bf ff bd b 4000cd60 <_RBTree_Insert_color+0xb4>
4000ce70: c6 20 a0 08 st %g3, [ %g2 + 8 ]
4000ce74: 10 bf ff ef b 4000ce30 <_RBTree_Insert_color+0x184>
<== NOT EXECUTED
4000ce78: d2 22 00 00 st %o1, [ %o0 ]
<== NOT EXECUTED
4000ce7c: c8 22 00 00 st %g4, [ %o0 ]
4000ce80: c4 21 20 04 st %g2, [ %g4 + 4 ]
4000ce84: 10 bf ff 8b b 4000ccb0 <_RBTree_Insert_color+0x4>
4000ce88: c8 20 a0 08 st %g4, [ %g2 + 8 ]
4000ce8c: c8 02 40 00 ld [ %o1 ], %g4
4000ce90: 80 a1 20 00 cmp %g4, 0
4000ce94: 02 80 00 04 be 4000cea4 <_RBTree_Insert_color+0x1f8>
4000ce98: c8 20 60 04 st %g4, [ %g1 + 4 ]
4000ce9c: c2 21 20 08 st %g1, [ %g4 + 8 ]
4000cea0: c6 00 60 08 ld [ %g1 + 8 ], %g3
4000cea4: 80 a0 e0 00 cmp %g3, 0
4000cea8: 02 80 00 1b be 4000cf14 <_RBTree_Insert_color+0x268>
4000ceac: c6 22 60 08 st %g3, [ %o1 + 8 ]
4000ceb0: c6 00 60 08 ld [ %g1 + 8 ], %g3
4000ceb4: c8 00 c0 00 ld [ %g3 ], %g4
4000ceb8: 80 a0 40 04 cmp %g1, %g4
4000cebc: 22 80 00 03 be,a 4000cec8 <_RBTree_Insert_color+0x21c>
<== ALWAYS TAKEN
4000cec0: d2 20 c0 00 st %o1, [ %g3 ]
4000cec4: d2 20 e0 04 st %o1, [ %g3 + 4 ]
<== NOT EXECUTED
4000cec8: 86 10 00 09 mov %o1, %g3
4000cecc: c2 22 40 00 st %g1, [ %o1 ]
4000ced0: c8 00 80 00 ld [ %g2 ], %g4
4000ced4: da 01 20 04 ld [ %g4 + 4 ], %o5
4000ced8: d2 20 60 08 st %o1, [ %g1 + 8 ]
4000cedc: 92 10 00 01 mov %g1, %o1
4000cee0: 10 bf ff b3 b 4000cdac <_RBTree_Insert_color+0x100>
4000cee4: 82 10 00 03 mov %g3, %g1
4000cee8: c6 22 60 08 st %g3, [ %o1 + 8 ]
4000ceec: c6 00 60 08 ld [ %g1 + 8 ], %g3
4000cef0: c8 00 c0 00 ld [ %g3 ], %g4
4000cef4: 80 a0 40 04 cmp %g1, %g4
4000cef8: 32 bf ff ce bne,a 4000ce30 <_RBTree_Insert_color+0x184>
<== ALWAYS TAKEN
4000cefc: d2 20 e0 04 st %o1, [ %g3 + 4 ]
4000cf00: 10 bf ff cc b 4000ce30 <_RBTree_Insert_color+0x184>
<== NOT EXECUTED
4000cf04: d2 20 c0 00 st %o1, [ %g3 ]
<== NOT EXECUTED
4000cf08: c4 21 20 04 st %g2, [ %g4 + 4 ]
4000cf0c: 10 bf ff 69 b 4000ccb0 <_RBTree_Insert_color+0x4>
4000cf10: c8 20 a0 08 st %g4, [ %g2 + 8 ]
4000cf14: 10 bf ff ed b 4000cec8 <_RBTree_Insert_color+0x21c>
<== NOT EXECUTED
4000cf18: d2 22 00 00 st %o1, [ %o0 ]
<== NOT EXECUTED
4000f450 <_SMP_barrier_Wait>:
SMP_barrier_Control *control,
SMP_barrier_State *state,
unsigned int count
)
{
unsigned int sense = ~state->sense;
4000f450: c4 02 40 00 ld [ %o1 ], %g2
<== NOT EXECUTED
4000f454: 84 38 00 02 xnor %g0, %g2, %g2
<== NOT EXECUTED
unsigned int previous_value;
bool performed_release;
state->sense = sense;
4000f458: c4 22 40 00 st %g2, [ %o1 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000f45c: 91 d0 20 09 ta 9
<== NOT EXECUTED
*obj = val + arg;
4000f460: c6 02 00 00 ld [ %o0 ], %g3
<== NOT EXECUTED
4000f464: 86 00 e0 01 inc %g3
<== NOT EXECUTED
4000f468: c6 22 00 00 st %g3, [ %o0 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000f46c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000f470: 01 00 00 00 nop
&control->value,
1U,
ATOMIC_ORDER_RELAXED
);
if ( previous_value + 1U == count ) {
4000f474: 80 a2 80 03 cmp %o2, %g3
4000f478: 02 80 00 09 be 4000f49c <_SMP_barrier_Wait+0x4c>
4000f47c: 01 00 00 00 nop
_Atomic_Store_uint( &control->value, 0U, ATOMIC_ORDER_RELAXED );
_Atomic_Store_uint( &control->sense, sense, ATOMIC_ORDER_RELEASE );
performed_release = true;
} else {
while (
_Atomic_Load_uint( &control->sense, ATOMIC_ORDER_ACQUIRE ) != sense
4000f480: c2 02 20 04 ld [ %o0 + 4 ], %g1
<== NOT EXECUTED
while (
4000f484: 80 a0 80 01 cmp %g2, %g1
<== NOT EXECUTED
4000f488: 32 bf ff ff bne,a 4000f484 <_SMP_barrier_Wait+0x34>
<== NOT EXECUTED
4000f48c: c2 02 20 04 ld [ %o0 + 4 ], %g1
<== NOT EXECUTED
) {
/* Wait */
}
performed_release = false;
4000f490: 82 10 20 00 clr %g1
<== NOT EXECUTED
}
return performed_release;
}
4000f494: 81 c3 e0 08 retl
<== NOT EXECUTED
4000f498: 90 08 60 01 and %g1, 1, %o0
<== NOT EXECUTED
*obj = desired;
4000f49c: c0 22 00 00 clr [ %o0 ]
performed_release = true;
4000f4a0: 82 10 20 01 mov 1, %g1
4000f4a4: c4 22 20 04 st %g2, [ %o0 + 4 ]
}
4000f4a8: 81 c3 e0 08 retl
4000f4ac: 90 08 60 01 and %g1, 1, %o0
400089f0 <_Scheduler_CBS_Attach_thread>:
int _Scheduler_CBS_Attach_thread (
Scheduler_CBS_Server_id server_id,
rtems_id task_id
)
{
400089f0: 9d e3 bf 98 save %sp, -104, %sp
Scheduler_CBS_Server *server;
ISR_lock_Context lock_context;
Thread_Control *the_thread;
Scheduler_CBS_Node *node;
if ( server_id >= _Scheduler_CBS_Maximum_servers ) {
400089f4: 03 10 00 47 sethi %hi(0x40011c00), %g1
400089f8: c2 00 63 c8 ld [ %g1 + 0x3c8 ], %g1 ! 40011fc8 <_Scheduler_CBS_Maximum_servers>
400089fc: 80 a0 40 18 cmp %g1, %i0
40008a00: 08 80 00 2c bleu 40008ab0 <_Scheduler_CBS_Attach_thread+0xc0>
40008a04: 3b 10 00 5c sethi %hi(0x40017000), %i5
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
}
server = &_Scheduler_CBS_Server_list[ server_id ];
40008a08: b1 2e 20 05 sll %i0, 5, %i0
40008a0c: ba 17 62 f8 or %i5, 0x2f8, %i5
40008a10: b8 06 00 1d add %i0, %i5, %i4
if ( !server->initialized ) {
40008a14: c2 0f 20 1c ldub [ %i4 + 0x1c ], %g1
40008a18: 80 a0 60 00 cmp %g1, 0
40008a1c: 02 80 00 27 be 40008ab8 <_Scheduler_CBS_Attach_thread+0xc8>
40008a20: 01 00 00 00 nop
return SCHEDULER_CBS_ERROR_NOSERVER;
}
if ( server->task_id != -1 ) {
40008a24: c2 07 40 18 ld [ %i5 + %i0 ], %g1
40008a28: 80 a0 7f ff cmp %g1, -1
40008a2c: 12 80 00 1a bne 40008a94 <_Scheduler_CBS_Attach_thread+0xa4>
40008a30: 92 07 bf fc add %fp, -4, %o1
return SCHEDULER_CBS_ERROR_FULL;
}
the_thread = _Thread_Get( task_id, &lock_context );
40008a34: 40 00 05 85 call 4000a048 <_Thread_Get>
40008a38: 90 10 00 19 mov %i1, %o0
if ( the_thread == NULL ) {
40008a3c: 80 a2 20 00 cmp %o0, 0
40008a40: 02 80 00 1c be 40008ab0 <_Scheduler_CBS_Attach_thread+0xc0>
40008a44: 01 00 00 00 nop
40008a48: c2 02 20 38 ld [ %o0 + 0x38 ], %g1
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
}
node = _Scheduler_CBS_Thread_get_node( the_thread );
if ( node->cbs_server != NULL ) {
40008a4c: c4 00 60 50 ld [ %g1 + 0x50 ], %g2
40008a50: 80 a0 a0 00 cmp %g2, 0
40008a54: 12 80 00 12 bne 40008a9c <_Scheduler_CBS_Attach_thread+0xac>
40008a58: 01 00 00 00 nop
_ISR_lock_ISR_enable( &lock_context );
return SCHEDULER_CBS_ERROR_FULL;
}
node->cbs_server = server;
40008a5c: f8 20 60 50 st %i4, [ %g1 + 0x50 ]
<== NOT EXECUTED
server->task_id = task_id;
the_thread->budget_callout = _Scheduler_CBS_Budget_callout;
40008a60: 03 10 00 22 sethi %hi(0x40008800), %g1
<== NOT EXECUTED
server->task_id = task_id;
40008a64: f2 27 40 18 st %i1, [ %i5 + %i0 ]
<== NOT EXECUTED
the_thread->budget_callout = _Scheduler_CBS_Budget_callout;
40008a68: 82 10 61 5c or %g1, 0x15c, %g1
<== NOT EXECUTED
40008a6c: c2 22 20 94 st %g1, [ %o0 + 0x94 ]
<== NOT EXECUTED
the_thread->budget_algorithm = THREAD_CPU_BUDGET_ALGORITHM_CALLOUT;
40008a70: 82 10 20 03 mov 3, %g1
<== NOT EXECUTED
40008a74: c2 22 20 90 st %g1, [ %o0 + 0x90 ]
<== NOT EXECUTED
the_thread->is_preemptible = true;
40008a78: 82 10 20 01 mov 1, %g1
<== NOT EXECUTED
40008a7c: c2 2a 20 89 stb %g1, [ %o0 + 0x89 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008a80: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008a84: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008a88: 01 00 00 00 nop
_ISR_lock_ISR_enable( &lock_context );
return SCHEDULER_CBS_OK;
40008a8c: 81 c7 e0 08 ret
40008a90: 91 e8 20 00 restore %g0, 0, %o0
}
40008a94: 81 c7 e0 08 ret
40008a98: 91 e8 3f e6 restore %g0, -26, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008a9c: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008aa0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008aa4: 01 00 00 00 nop
<== NOT EXECUTED
return SCHEDULER_CBS_ERROR_FULL;
40008aa8: 81 c7 e0 08 ret
<== NOT EXECUTED
40008aac: 91 e8 3f e6 restore %g0, -26, %o0
<== NOT EXECUTED
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
40008ab0: 81 c7 e0 08 ret
40008ab4: 91 e8 3f ee restore %g0, -18, %o0
return SCHEDULER_CBS_ERROR_NOSERVER;
40008ab8: 81 c7 e0 08 ret
40008abc: 91 e8 3f e7 restore %g0, -25, %o0
40008b20 <_Scheduler_CBS_Create_server>:
)
{
unsigned int i;
Scheduler_CBS_Server *the_server;
if ( params->budget <= 0 ||
40008b20: c2 02 20 08 ld [ %o0 + 8 ], %g1
40008b24: 80 a0 60 00 cmp %g1, 0
40008b28: 04 80 00 2a ble 40008bd0 <_Scheduler_CBS_Create_server+0xb0>
40008b2c: 01 00 00 00 nop
40008b30: c2 02 00 00 ld [ %o0 ], %g1
<== NOT EXECUTED
40008b34: 80 a0 60 00 cmp %g1, 0
40008b38: 04 80 00 2e ble 40008bf0 <_Scheduler_CBS_Create_server+0xd0>
40008b3c: 03 10 00 47 sethi %hi(0x40011c00), %g1
params->deadline <= 0 ||
params->budget >= SCHEDULER_EDF_PRIO_MSB ||
params->deadline >= SCHEDULER_EDF_PRIO_MSB )
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
for ( i = 0; i<_Scheduler_CBS_Maximum_servers; i++ ) {
40008b40: c8 00 63 c8 ld [ %g1 + 0x3c8 ], %g4 ! 40011fc8 <_Scheduler_CBS_Maximum_servers>
40008b44: 80 a1 20 00 cmp %g4, 0
40008b48: 02 80 00 11 be 40008b8c <_Scheduler_CBS_Create_server+0x6c>
40008b4c: 1b 10 00 5c sethi %hi(0x40017000), %o5
if ( !_Scheduler_CBS_Server_list[i].initialized )
40008b50: 9a 13 62 f8 or %o5, 0x2f8, %o5 ! 400172f8 <_Scheduler_CBS_Server_list>
40008b54: c2 0b 60 1c ldub [ %o5 + 0x1c ], %g1
40008b58: 80 a0 60 00 cmp %g1, 0
40008b5c: 02 80 00 0e be 40008b94 <_Scheduler_CBS_Create_server+0x74>
40008b60: 84 03 60 3c add %o5, 0x3c, %g2
for ( i = 0; i<_Scheduler_CBS_Maximum_servers; i++ ) {
40008b64: 10 80 00 06 b 40008b7c <_Scheduler_CBS_Create_server+0x5c>
40008b68: 82 10 20 00 clr %g1
if ( !_Scheduler_CBS_Server_list[i].initialized )
40008b6c: c6 08 bf e0 ldub [ %g2 + -32 ], %g3
40008b70: 80 a0 e0 00 cmp %g3, 0
40008b74: 22 80 00 0a be,a 40008b9c <_Scheduler_CBS_Create_server+0x7c>
40008b78: c2 22 80 00 st %g1, [ %o2 ]
for ( i = 0; i<_Scheduler_CBS_Maximum_servers; i++ ) {
40008b7c: 82 00 60 01 inc %g1
40008b80: 80 a1 00 01 cmp %g4, %g1
40008b84: 12 bf ff fa bne 40008b6c <_Scheduler_CBS_Create_server+0x4c>
40008b88: 84 00 a0 20 add %g2, 0x20, %g2
break;
}
if ( i == _Scheduler_CBS_Maximum_servers )
return SCHEDULER_CBS_ERROR_FULL;
40008b8c: 81 c3 e0 08 retl
40008b90: 90 10 3f e6 mov -26, %o0
for ( i = 0; i<_Scheduler_CBS_Maximum_servers; i++ ) {
40008b94: 82 10 20 00 clr %g1
*server_id = i;
40008b98: c2 22 80 00 st %g1, [ %o2 ]
the_server = &_Scheduler_CBS_Server_list[*server_id];
the_server->parameters = *params;
40008b9c: 83 28 60 05 sll %g1, 5, %g1
40008ba0: d4 1a 00 00 ldd [ %o0 ], %o2
40008ba4: 84 03 40 01 add %o5, %g1, %g2
40008ba8: d4 38 a0 08 std %o2, [ %g2 + 8 ]
the_server->task_id = -1;
40008bac: 86 10 3f ff mov -1, %g3
the_server->parameters = *params;
40008bb0: d4 1a 20 08 ldd [ %o0 + 8 ], %o2
40008bb4: d4 38 a0 10 std %o2, [ %g2 + 0x10 ]
the_server->cbs_budget_overrun = budget_overrun_callback;
the_server->initialized = true;
return SCHEDULER_CBS_OK;
40008bb8: 90 10 20 00 clr %o0
the_server->task_id = -1;
40008bbc: c6 23 40 01 st %g3, [ %o5 + %g1 ]
the_server->initialized = true;
40008bc0: 82 10 20 01 mov 1, %g1
the_server->cbs_budget_overrun = budget_overrun_callback;
40008bc4: d2 20 a0 18 st %o1, [ %g2 + 0x18 ]
}
40008bc8: 81 c3 e0 08 retl
40008bcc: c2 28 a0 1c stb %g1, [ %g2 + 0x1c ]
if ( params->budget <= 0 ||
40008bd0: 12 80 00 06 bne 40008be8 <_Scheduler_CBS_Create_server+0xc8>
40008bd4: 01 00 00 00 nop
40008bd8: c2 02 20 0c ld [ %o0 + 0xc ], %g1
40008bdc: 80 a0 60 00 cmp %g1, 0
40008be0: 32 bf ff d5 bne,a 40008b34 <_Scheduler_CBS_Create_server+0x14>
<== ALWAYS TAKEN
40008be4: c2 02 00 00 ld [ %o0 ], %g1
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
40008be8: 81 c3 e0 08 retl
40008bec: 90 10 3f ee mov -18, %o0
if ( params->budget <= 0 ||
40008bf0: 12 bf ff fe bne 40008be8 <_Scheduler_CBS_Create_server+0xc8>
40008bf4: 01 00 00 00 nop
40008bf8: c2 02 20 04 ld [ %o0 + 4 ], %g1
40008bfc: 80 a0 60 00 cmp %g1, 0
40008c00: 12 bf ff d0 bne 40008b40 <_Scheduler_CBS_Create_server+0x20>
40008c04: 03 10 00 47 sethi %hi(0x40011c00), %g1
40008c08: 30 bf ff f8 b,a 40008be8 <_Scheduler_CBS_Create_server+0xc8>
<== NOT EXECUTED
40008c88 <_Scheduler_CBS_Detach_thread>:
int _Scheduler_CBS_Detach_thread (
Scheduler_CBS_Server_id server_id,
rtems_id task_id
)
{
40008c88: 9d e3 bf 98 save %sp, -104, %sp
Scheduler_CBS_Server *server;
ISR_lock_Context lock_context;
Thread_Control *the_thread;
Scheduler_CBS_Node *node;
if ( server_id >= _Scheduler_CBS_Maximum_servers ) {
40008c8c: 03 10 00 47 sethi %hi(0x40011c00), %g1
40008c90: c2 00 63 c8 ld [ %g1 + 0x3c8 ], %g1 ! 40011fc8 <_Scheduler_CBS_Maximum_servers>
40008c94: 80 a0 40 18 cmp %g1, %i0
40008c98: 08 80 00 21 bleu 40008d1c <_Scheduler_CBS_Detach_thread+0x94>
40008c9c: 3b 10 00 5c sethi %hi(0x40017000), %i5
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
}
server = &_Scheduler_CBS_Server_list[ server_id ];
if ( !server->initialized ) {
40008ca0: b1 2e 20 05 sll %i0, 5, %i0
40008ca4: ba 17 62 f8 or %i5, 0x2f8, %i5
40008ca8: 82 07 40 18 add %i5, %i0, %g1
40008cac: c2 08 60 1c ldub [ %g1 + 0x1c ], %g1
40008cb0: 80 a0 60 00 cmp %g1, 0
40008cb4: 02 80 00 1c be 40008d24 <_Scheduler_CBS_Detach_thread+0x9c>
40008cb8: 01 00 00 00 nop
return SCHEDULER_CBS_ERROR_NOSERVER;
}
if ( server->task_id != task_id ) {
40008cbc: d0 07 40 18 ld [ %i5 + %i0 ], %o0
40008cc0: 80 a2 00 19 cmp %o0, %i1
40008cc4: 12 80 00 16 bne 40008d1c <_Scheduler_CBS_Detach_thread+0x94>
40008cc8: 01 00 00 00 nop
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
}
the_thread = _Thread_Get( task_id, &lock_context );
40008ccc: 40 00 04 df call 4000a048 <_Thread_Get>
40008cd0: 92 07 bf fc add %fp, -4, %o1
if ( the_thread == NULL ) {
40008cd4: 80 a2 20 00 cmp %o0, 0
40008cd8: 02 80 00 11 be 40008d1c <_Scheduler_CBS_Detach_thread+0x94>
40008cdc: 01 00 00 00 nop
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
}
node = _Scheduler_CBS_Thread_get_node( the_thread );
node->cbs_server = NULL;
40008ce0: c2 02 20 38 ld [ %o0 + 0x38 ], %g1
<== NOT EXECUTED
40008ce4: c0 20 60 50 clr [ %g1 + 0x50 ]
<== NOT EXECUTED
server->task_id = -1;
40008ce8: 82 10 3f ff mov -1, %g1
<== NOT EXECUTED
40008cec: c2 27 40 18 st %g1, [ %i5 + %i0 ]
<== NOT EXECUTED
the_thread->budget_algorithm = the_thread->Start.budget_algorithm;
40008cf0: c6 02 20 b0 ld [ %o0 + 0xb0 ], %g3
<== NOT EXECUTED
the_thread->budget_callout = the_thread->Start.budget_callout;
40008cf4: c4 02 20 b4 ld [ %o0 + 0xb4 ], %g2
<== NOT EXECUTED
the_thread->is_preemptible = the_thread->Start.is_preemptible;
40008cf8: c2 0a 20 ac ldub [ %o0 + 0xac ], %g1
<== NOT EXECUTED
the_thread->budget_algorithm = the_thread->Start.budget_algorithm;
40008cfc: c6 22 20 90 st %g3, [ %o0 + 0x90 ]
<== NOT EXECUTED
the_thread->budget_callout = the_thread->Start.budget_callout;
40008d00: c4 22 20 94 st %g2, [ %o0 + 0x94 ]
<== NOT EXECUTED
the_thread->is_preemptible = the_thread->Start.is_preemptible;
40008d04: c2 2a 20 89 stb %g1, [ %o0 + 0x89 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008d08: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008d0c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008d10: 01 00 00 00 nop
_ISR_lock_ISR_enable( &lock_context );
return SCHEDULER_CBS_OK;
40008d14: 81 c7 e0 08 ret
40008d18: 91 e8 20 00 restore %g0, 0, %o0
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
40008d1c: 81 c7 e0 08 ret
40008d20: 91 e8 3f ee restore %g0, -18, %o0
}
40008d24: 81 c7 e0 08 ret
40008d28: 91 e8 3f e7 restore %g0, -25, %o0
40008d7c <_Scheduler_CBS_Get_execution_time>:
int _Scheduler_CBS_Get_execution_time (
Scheduler_CBS_Server_id server_id,
time_t *exec_time,
time_t *abs_time
)
{
40008d7c: 9d e3 bf 98 save %sp, -104, %sp
Scheduler_CBS_Server *server;
ISR_lock_Context lock_context;
Thread_Control *the_thread;
if ( server_id >= _Scheduler_CBS_Maximum_servers ) {
40008d80: 03 10 00 47 sethi %hi(0x40011c00), %g1
40008d84: c2 00 63 c8 ld [ %g1 + 0x3c8 ], %g1 ! 40011fc8 <_Scheduler_CBS_Maximum_servers>
40008d88: 80 a0 40 18 cmp %g1, %i0
40008d8c: 08 80 00 22 bleu 40008e14 <_Scheduler_CBS_Get_execution_time+0x98>
40008d90: 03 10 00 5c sethi %hi(0x40017000), %g1
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
}
server = &_Scheduler_CBS_Server_list[ server_id ];
if ( !server->initialized ) {
40008d94: b1 2e 20 05 sll %i0, 5, %i0
40008d98: 82 10 62 f8 or %g1, 0x2f8, %g1
40008d9c: ba 00 40 18 add %g1, %i0, %i5
40008da0: c4 0f 60 1c ldub [ %i5 + 0x1c ], %g2
40008da4: 80 a0 a0 00 cmp %g2, 0
40008da8: 02 80 00 1d be 40008e1c <_Scheduler_CBS_Get_execution_time+0xa0>
40008dac: 01 00 00 00 nop
return SCHEDULER_CBS_ERROR_NOSERVER;
}
if ( server->task_id == -1 ) {
40008db0: d0 00 40 18 ld [ %g1 + %i0 ], %o0
40008db4: 80 a2 3f ff cmp %o0, -1
40008db8: 22 80 00 11 be,a 40008dfc <_Scheduler_CBS_Get_execution_time+0x80>
40008dbc: c0 26 40 00 clr [ %i1 ]
*exec_time = 0;
return SCHEDULER_CBS_OK;
}
the_thread = _Thread_Get( server->task_id, &lock_context );
40008dc0: 40 00 04 a2 call 4000a048 <_Thread_Get>
40008dc4: 92 07 bf fc add %fp, -4, %o1
if ( the_thread != NULL ) {
40008dc8: 80 a2 20 00 cmp %o0, 0
40008dcc: 22 80 00 0f be,a 40008e08 <_Scheduler_CBS_Get_execution_time+0x8c>
40008dd0: c4 1f 60 10 ldd [ %i5 + 0x10 ], %g2
*exec_time = server->parameters.budget - the_thread->cpu_time_budget;
40008dd4: f8 1f 60 10 ldd [ %i5 + 0x10 ], %i4
<== NOT EXECUTED
40008dd8: c2 02 20 8c ld [ %o0 + 0x8c ], %g1
<== NOT EXECUTED
40008ddc: 86 a7 40 01 subcc %i5, %g1, %g3
<== NOT EXECUTED
40008de0: 84 67 20 00 subx %i4, 0, %g2
<== NOT EXECUTED
40008de4: c4 3e 40 00 std %g2, [ %i1 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008de8: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008dec: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008df0: 01 00 00 00 nop
_ISR_lock_ISR_enable( &lock_context );
} else {
*exec_time = server->parameters.budget;
}
return SCHEDULER_CBS_OK;
40008df4: 81 c7 e0 08 ret
40008df8: 91 e8 20 00 restore %g0, 0, %o0
*exec_time = 0;
40008dfc: c0 26 60 04 clr [ %i1 + 4 ]
return SCHEDULER_CBS_OK;
40008e00: 81 c7 e0 08 ret
40008e04: 91 e8 20 00 restore %g0, 0, %o0
*exec_time = server->parameters.budget;
40008e08: c4 3e 40 00 std %g2, [ %i1 ]
return SCHEDULER_CBS_OK;
40008e0c: 81 c7 e0 08 ret
40008e10: 91 e8 20 00 restore %g0, 0, %o0
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
40008e14: 81 c7 e0 08 ret
40008e18: 91 e8 3f ee restore %g0, -18, %o0
}
40008e1c: 81 c7 e0 08 ret
40008e20: 91 e8 3f e7 restore %g0, -25, %o0
40008e7c <_Scheduler_CBS_Get_remaining_budget>:
int _Scheduler_CBS_Get_remaining_budget (
Scheduler_CBS_Server_id server_id,
time_t *remaining_budget
)
{
40008e7c: 9d e3 bf 98 save %sp, -104, %sp
Scheduler_CBS_Server *server;
ISR_lock_Context lock_context;
Thread_Control *the_thread;
if ( server_id >= _Scheduler_CBS_Maximum_servers ) {
40008e80: 03 10 00 47 sethi %hi(0x40011c00), %g1
40008e84: c2 00 63 c8 ld [ %g1 + 0x3c8 ], %g1 ! 40011fc8 <_Scheduler_CBS_Maximum_servers>
40008e88: 80 a0 40 18 cmp %g1, %i0
40008e8c: 08 80 00 20 bleu 40008f0c <_Scheduler_CBS_Get_remaining_budget+0x90>
40008e90: 03 10 00 5c sethi %hi(0x40017000), %g1
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
}
server = &_Scheduler_CBS_Server_list[ server_id ];
if ( !server->initialized ) {
40008e94: b1 2e 20 05 sll %i0, 5, %i0
40008e98: 82 10 62 f8 or %g1, 0x2f8, %g1
40008e9c: 84 00 40 18 add %g1, %i0, %g2
40008ea0: c6 08 a0 1c ldub [ %g2 + 0x1c ], %g3
40008ea4: 80 a0 e0 00 cmp %g3, 0
40008ea8: 02 80 00 1b be 40008f14 <_Scheduler_CBS_Get_remaining_budget+0x98>
40008eac: 01 00 00 00 nop
return SCHEDULER_CBS_ERROR_NOSERVER;
}
if ( server->task_id == -1 ) {
40008eb0: d0 00 40 18 ld [ %g1 + %i0 ], %o0
40008eb4: 80 a2 3f ff cmp %o0, -1
40008eb8: 22 80 00 0f be,a 40008ef4 <_Scheduler_CBS_Get_remaining_budget+0x78>
40008ebc: c4 18 a0 10 ldd [ %g2 + 0x10 ], %g2
*remaining_budget = server->parameters.budget;
return SCHEDULER_CBS_OK;
}
the_thread = _Thread_Get( server->task_id, &lock_context );
40008ec0: 40 00 04 62 call 4000a048 <_Thread_Get>
40008ec4: 92 07 bf fc add %fp, -4, %o1
if ( the_thread != NULL ) {
40008ec8: 80 a2 20 00 cmp %o0, 0
40008ecc: 22 80 00 0d be,a 40008f00 <_Scheduler_CBS_Get_remaining_budget+0x84>
40008ed0: c0 26 40 00 clr [ %i1 ]
*remaining_budget = the_thread->cpu_time_budget;
40008ed4: c2 02 20 8c ld [ %o0 + 0x8c ], %g1
<== NOT EXECUTED
40008ed8: c2 26 60 04 st %g1, [ %i1 + 4 ]
<== NOT EXECUTED
40008edc: c0 26 40 00 clr [ %i1 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008ee0: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008ee4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008ee8: 01 00 00 00 nop
_ISR_lock_ISR_enable( &lock_context );
} else {
*remaining_budget = 0;
}
return SCHEDULER_CBS_OK;
40008eec: 81 c7 e0 08 ret
40008ef0: 91 e8 20 00 restore %g0, 0, %o0
*remaining_budget = server->parameters.budget;
40008ef4: c4 3e 40 00 std %g2, [ %i1 ]
return SCHEDULER_CBS_OK;
40008ef8: 81 c7 e0 08 ret
40008efc: 91 e8 20 00 restore %g0, 0, %o0
*remaining_budget = 0;
40008f00: c0 26 60 04 clr [ %i1 + 4 ]
return SCHEDULER_CBS_OK;
40008f04: 81 c7 e0 08 ret
40008f08: 91 e8 20 00 restore %g0, 0, %o0
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
40008f0c: 81 c7 e0 08 ret
40008f10: 91 e8 3f ee restore %g0, -18, %o0
}
40008f14: 81 c7 e0 08 ret
40008f18: 91 e8 3f e7 restore %g0, -25, %o0
40008f78 <_Scheduler_CBS_Set_parameters>:
int _Scheduler_CBS_Set_parameters (
Scheduler_CBS_Server_id server_id,
Scheduler_CBS_Parameters *params
)
{
if ( server_id >= _Scheduler_CBS_Maximum_servers )
40008f78: 03 10 00 47 sethi %hi(0x40011c00), %g1
40008f7c: c2 00 63 c8 ld [ %g1 + 0x3c8 ], %g1 ! 40011fc8 <_Scheduler_CBS_Maximum_servers>
40008f80: 80 a0 40 08 cmp %g1, %o0
40008f84: 08 80 00 1e bleu 40008ffc <_Scheduler_CBS_Set_parameters+0x84>
40008f88: 01 00 00 00 nop
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
if ( params->budget <= 0 ||
40008f8c: c2 02 60 08 ld [ %o1 + 8 ], %g1
40008f90: 80 a0 60 00 cmp %g1, 0
40008f94: 04 80 00 1e ble 4000900c <_Scheduler_CBS_Set_parameters+0x94>
40008f98: 01 00 00 00 nop
40008f9c: c2 02 40 00 ld [ %o1 ], %g1
<== NOT EXECUTED
40008fa0: 80 a0 60 00 cmp %g1, 0
40008fa4: 04 80 00 10 ble 40008fe4 <_Scheduler_CBS_Set_parameters+0x6c>
40008fa8: 01 00 00 00 nop
params->deadline <= 0 ||
params->budget >= SCHEDULER_EDF_PRIO_MSB ||
params->deadline >= SCHEDULER_EDF_PRIO_MSB )
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
if ( !_Scheduler_CBS_Server_list[server_id].initialized )
40008fac: 91 2a 20 05 sll %o0, 5, %o0
<== NOT EXECUTED
40008fb0: 03 10 00 5c sethi %hi(0x40017000), %g1
40008fb4: 82 10 62 f8 or %g1, 0x2f8, %g1 ! 400172f8 <_Scheduler_CBS_Server_list>
40008fb8: 82 00 40 08 add %g1, %o0, %g1
40008fbc: c4 08 60 1c ldub [ %g1 + 0x1c ], %g2
40008fc0: 80 a0 a0 00 cmp %g2, 0
40008fc4: 02 80 00 10 be 40009004 <_Scheduler_CBS_Set_parameters+0x8c>
40008fc8: 01 00 00 00 nop
return SCHEDULER_CBS_ERROR_NOSERVER;
_Scheduler_CBS_Server_list[server_id].parameters = *params;
40008fcc: c4 1a 40 00 ldd [ %o1 ], %g2
40008fd0: c4 38 60 08 std %g2, [ %g1 + 8 ]
return SCHEDULER_CBS_OK;
40008fd4: 90 10 20 00 clr %o0
_Scheduler_CBS_Server_list[server_id].parameters = *params;
40008fd8: c4 1a 60 08 ldd [ %o1 + 8 ], %g2
return SCHEDULER_CBS_OK;
40008fdc: 81 c3 e0 08 retl
40008fe0: c4 38 60 10 std %g2, [ %g1 + 0x10 ]
if ( params->budget <= 0 ||
40008fe4: 12 80 00 06 bne 40008ffc <_Scheduler_CBS_Set_parameters+0x84>
40008fe8: 01 00 00 00 nop
40008fec: c2 02 60 04 ld [ %o1 + 4 ], %g1
40008ff0: 80 a0 60 00 cmp %g1, 0
40008ff4: 32 bf ff ef bne,a 40008fb0 <_Scheduler_CBS_Set_parameters+0x38>
<== ALWAYS TAKEN
40008ff8: 91 2a 20 05 sll %o0, 5, %o0
return SCHEDULER_CBS_ERROR_INVALID_PARAMETER;
40008ffc: 81 c3 e0 08 retl
40009000: 90 10 3f ee mov -18, %o0
}
40009004: 81 c3 e0 08 retl
40009008: 90 10 3f e7 mov -25, %o0
if ( params->budget <= 0 ||
4000900c: 12 bf ff fc bne 40008ffc <_Scheduler_CBS_Set_parameters+0x84>
40009010: 01 00 00 00 nop
40009014: c2 02 60 0c ld [ %o1 + 0xc ], %g1
40009018: 80 a0 60 00 cmp %g1, 0
4000901c: 32 bf ff e1 bne,a 40008fa0 <_Scheduler_CBS_Set_parameters+0x28>
<== ALWAYS TAKEN
40009020: c2 02 40 00 ld [ %o1 ], %g1
40009024: 30 bf ff f6 b,a 40008ffc <_Scheduler_CBS_Set_parameters+0x84>
<== NOT EXECUTED
40007e4c <_Scheduler_CBS_Unblock>:
void _Scheduler_CBS_Unblock(
const Scheduler_Control *scheduler,
Thread_Control *the_thread,
Scheduler_Node *node
)
{
40007e4c: 9d e3 bf 78 save %sp, -136, %sp
Scheduler_CBS_Node *the_node;
Scheduler_CBS_Server *serv_info;
Priority_Control priority;
the_node = _Scheduler_CBS_Node_downcast( node );
serv_info = the_node->cbs_server;
40007e50: c2 06 a0 50 ld [ %i2 + 0x50 ], %g1
priority = _Scheduler_Node_get_priority( &the_node->Base.Base );
priority = SCHEDULER_PRIORITY_PURIFY( priority );
40007e54: c8 06 a0 34 ld [ %i2 + 0x34 ], %g4
40007e58: c4 06 a0 30 ld [ %i2 + 0x30 ], %g2
* Late unblock rule for deadline-driven tasks. The remaining time to
* deadline must be sufficient to serve the remaining computation time
* without increased utilization of this task. It might cause a deadline
* miss of another task.
*/
if ( serv_info != NULL && ( priority & SCHEDULER_EDF_PRIO_MSB ) == 0 ) {
40007e5c: 80 a0 60 00 cmp %g1, 0
40007e60: 02 80 00 1c be 40007ed0 <_Scheduler_CBS_Unblock+0x84>
40007e64: 86 09 3f fe and %g4, -2, %g3
40007e68: 80 a0 a0 00 cmp %g2, 0
40007e6c: 06 80 00 19 bl 40007ed0 <_Scheduler_CBS_Unblock+0x84>
40007e70: 09 10 00 55 sethi %hi(0x40015400), %g4
time_t deadline = serv_info->parameters.deadline;
time_t budget = serv_info->parameters.budget;
uint32_t deadline_left = the_thread->cpu_time_budget;
Priority_Control budget_left = priority - _Watchdog_Ticks_since_boot;
if ( deadline * budget_left > budget * deadline_left ) {
40007e74: fa 00 60 08 ld [ %g1 + 8 ], %i5
Priority_Control budget_left = priority - _Watchdog_Ticks_since_boot;
40007e78: c8 01 22 20 ld [ %g4 + 0x220 ], %g4
40007e7c: 9a a0 c0 04 subcc %g3, %g4, %o5
if ( deadline * budget_left > budget * deadline_left ) {
40007e80: f6 06 60 8c ld [ %i1 + 0x8c ], %i3
Priority_Control budget_left = priority - _Watchdog_Ticks_since_boot;
40007e84: 98 60 a0 00 subx %g2, 0, %o4
if ( deadline * budget_left > budget * deadline_left ) {
40007e88: f8 00 60 14 ld [ %g1 + 0x14 ], %i4
40007e8c: c4 00 60 0c ld [ %g1 + 0xc ], %g2
40007e90: ba 5f 40 0d smul %i5, %o5, %i5
40007e94: c2 00 60 10 ld [ %g1 + 0x10 ], %g1
40007e98: 88 58 80 0c smul %g2, %o4, %g4
40007e9c: 82 58 40 1b smul %g1, %i3, %g1
40007ea0: 88 01 00 1d add %g4, %i5, %g4
40007ea4: 86 50 80 0d umul %g2, %o5, %g3
40007ea8: 85 40 00 00 rd %y, %g2
40007eac: ba 57 00 1b umul %i4, %i3, %i5
40007eb0: b9 40 00 00 rd %y, %i4
40007eb4: 84 01 00 02 add %g4, %g2, %g2
40007eb8: b8 00 40 1c add %g1, %i4, %i4
40007ebc: 80 a0 80 1c cmp %g2, %i4
40007ec0: 38 80 00 0d bgu,a 40007ef4 <_Scheduler_CBS_Unblock+0xa8>
<== NEVER TAKEN
40007ec4: d4 06 a0 54 ld [ %i2 + 0x54 ], %o2
<== NOT EXECUTED
40007ec8: 02 80 00 08 be 40007ee8 <_Scheduler_CBS_Unblock+0x9c>
40007ecc: 80 a0 c0 1d cmp %g3, %i5
&queue_context
);
}
}
_Scheduler_EDF_Unblock( scheduler, the_thread, &the_node->Base.Base );
40007ed0: 94 10 00 1a mov %i2, %o2
40007ed4: 92 10 00 19 mov %i1, %o1
40007ed8: 40 00 17 6a call 4000dc80 <_Scheduler_EDF_Unblock>
40007edc: 90 10 00 18 mov %i0, %o0
}
40007ee0: 81 c7 e0 08 ret
40007ee4: 81 e8 00 00 restore
if ( deadline * budget_left > budget * deadline_left ) {
40007ee8: 08 bf ff fb bleu 40007ed4 <_Scheduler_CBS_Unblock+0x88>
40007eec: 94 10 00 1a mov %i2, %o2
_Scheduler_CBS_Cancel_job(
40007ef0: d4 06 a0 54 ld [ %i2 + 0x54 ], %o2
40007ef4: 92 10 00 19 mov %i1, %o1
40007ef8: 90 10 00 18 mov %i0, %o0
*/
RTEMS_INLINE_ROUTINE void _Thread_queue_Context_clear_priority_updates(
Thread_queue_Context *queue_context
)
{
queue_context->Priority.update_count = 0;
40007efc: c0 27 bf f0 clr [ %fp + -16 ]
40007f00: 7f ff ff c8 call 40007e20 <_Scheduler_CBS_Cancel_job>
40007f04: 96 07 bf dc add %fp, -36, %o3
_Scheduler_EDF_Unblock( scheduler, the_thread, &the_node->Base.Base );
40007f08: 94 10 00 1a mov %i2, %o2
40007f0c: 92 10 00 19 mov %i1, %o1
40007f10: 40 00 17 5c call 4000dc80 <_Scheduler_EDF_Unblock>
40007f14: 90 10 00 18 mov %i0, %o0
}
40007f18: 81 c7 e0 08 ret
40007f1c: 81 e8 00 00 restore
40007c60 <_Scheduler_EDF_Schedule>:
void _Scheduler_EDF_Schedule(
const Scheduler_Control *scheduler,
Thread_Control *the_thread
)
{
40007c60: 9d e3 bf a0 save %sp, -96, %sp
first = _RBTree_Minimum( &context->Ready );
40007c64: 40 00 02 b7 call 40008740 <_RBTree_Minimum>
40007c68: d0 06 00 00 ld [ %i0 ], %o0
_Scheduler_Update_heir( node->Base.owner, force_dispatch );
40007c6c: f6 02 3f c8 ld [ %o0 + -56 ], %i3
Thread_Control *heir = _Thread_Heir;
40007c70: fa 01 a0 24 ld [ %g6 + 0x24 ], %i5
if ( heir != new_heir && ( heir->is_preemptible || force_dispatch ) ) {
40007c74: 80 a6 c0 1d cmp %i3, %i5
40007c78: 02 80 00 06 be 40007c90 <_Scheduler_EDF_Schedule+0x30>
40007c7c: b8 10 00 06 mov %g6, %i4
40007c80: c2 0f 60 89 ldub [ %i5 + 0x89 ], %g1
<== NOT EXECUTED
40007c84: 80 a0 60 00 cmp %g1, 0
<== NOT EXECUTED
40007c88: 12 80 00 04 bne 40007c98 <_Scheduler_EDF_Schedule+0x38>
<== NOT EXECUTED
40007c8c: 01 00 00 00 nop
<== NOT EXECUTED
_Scheduler_EDF_Schedule_body( scheduler, the_thread, false );
}
40007c90: 81 c7 e0 08 ret
40007c94: 81 e8 00 00 restore
40007c98: 40 00 10 e8 call 4000c038 <_Timecounter_Sbinuptime>
<== NOT EXECUTED
40007c9c: e0 19 a0 28 ldd [ %g6 + 0x28 ], %l0
<== NOT EXECUTED
40007ca0: d0 3f 20 28 std %o0, [ %i4 + 0x28 ]
<== NOT EXECUTED
*_result = *_end - *_start;
40007ca4: b2 a2 40 11 subcc %o1, %l1, %i1
<== NOT EXECUTED
*_time += *_add;
40007ca8: d8 1f 60 98 ldd [ %i5 + 0x98 ], %o4
<== NOT EXECUTED
*_result = *_end - *_start;
40007cac: b0 62 00 10 subx %o0, %l0, %i0
<== NOT EXECUTED
*_time += *_add;
40007cb0: 86 83 40 19 addcc %o5, %i1, %g3
<== NOT EXECUTED
40007cb4: 84 43 00 18 addx %o4, %i0, %g2
<== NOT EXECUTED
40007cb8: c4 3f 60 98 std %g2, [ %i5 + 0x98 ]
<== NOT EXECUTED
_Thread_Dispatch_necessary = true;
40007cbc: 84 10 20 01 mov 1, %g2
<== NOT EXECUTED
_Thread_Heir = new_heir;
40007cc0: f6 21 a0 24 st %i3, [ %g6 + 0x24 ]
<== NOT EXECUTED
_Thread_Dispatch_necessary = true;
40007cc4: c4 29 a0 1c stb %g2, [ %g6 + 0x1c ]
<== NOT EXECUTED
40007cc8: 81 c7 e0 08 ret
<== NOT EXECUTED
40007ccc: 81 e8 00 00 restore
<== NOT EXECUTED
40007bc0 <_Scheduler_EDF_Unmap_priority>:
Priority_Control _Scheduler_EDF_Unmap_priority(
const Scheduler_Control *scheduler,
Priority_Control priority
)
{
return SCHEDULER_PRIORITY_UNMAP( priority & ~SCHEDULER_EDF_PRIO_MSB );
40007bc0: 95 32 a0 01 srl %o2, 1, %o2
<== NOT EXECUTED
40007bc4: 83 2a 60 1f sll %o1, 0x1f, %g1
<== NOT EXECUTED
40007bc8: 91 2a 60 01 sll %o1, 1, %o0
<== NOT EXECUTED
}
40007bcc: 92 10 40 0a or %g1, %o2, %o1
<== NOT EXECUTED
40007bd0: 81 c3 e0 08 retl
<== NOT EXECUTED
40007bd4: 91 32 20 02 srl %o0, 2, %o0
<== NOT EXECUTED
40007a5c <_Scheduler_EDF_Update_priority>:
void _Scheduler_EDF_Update_priority(
const Scheduler_Control *scheduler,
Thread_Control *the_thread,
Scheduler_Node *node
)
{
40007a5c: 9d e3 bf a0 save %sp, -96, %sp
Scheduler_EDF_Context *context;
Scheduler_EDF_Node *the_node;
Priority_Control priority;
Priority_Control insert_priority;
if ( !_Thread_Is_ready( the_thread ) ) {
40007a60: c2 06 60 1c ld [ %i1 + 0x1c ], %g1
40007a64: 80 a0 60 00 cmp %g1, 0
40007a68: 12 80 00 4d bne 40007b9c <_Scheduler_EDF_Update_priority+0x140>
40007a6c: 01 00 00 00 nop
/* Nothing to do */
return;
}
the_node = _Scheduler_EDF_Node_downcast( node );
insert_priority = _Scheduler_Node_get_priority( &the_node->Base );
40007a70: fa 06 a0 30 ld [ %i2 + 0x30 ], %i5
40007a74: f8 06 a0 34 ld [ %i2 + 0x34 ], %i4
priority = SCHEDULER_PRIORITY_PURIFY( insert_priority );
if ( priority == the_node->priority ) {
40007a78: c4 06 a0 48 ld [ %i2 + 0x48 ], %g2
40007a7c: 80 a0 80 1d cmp %g2, %i5
40007a80: 02 80 00 34 be 40007b50 <_Scheduler_EDF_Update_priority+0xf4>
40007a84: 82 0f 3f fe and %i4, -2, %g1
/* Nothing to do */
return;
}
the_node->priority = priority;
40007a88: c2 26 a0 4c st %g1, [ %i2 + 0x4c ]
_RBTree_Extract( &context->Ready, &node->Node );
40007a8c: b6 06 a0 38 add %i2, 0x38, %i3
40007a90: fa 26 a0 48 st %i5, [ %i2 + 0x48 ]
40007a94: 92 10 00 1b mov %i3, %o1
40007a98: f2 06 00 00 ld [ %i0 ], %i1
40007a9c: 40 00 01 2b call 40007f48 <_RBTree_Extract>
40007aa0: 90 10 00 19 mov %i1, %o0
{
RBTree_Node **link;
RBTree_Node *parent;
bool is_new_minimum;
link = _RBTree_Root_reference( the_rbtree );
40007aa4: 84 10 00 19 mov %i1, %g2
parent = NULL;
is_new_minimum = true;
while ( *link != NULL ) {
40007aa8: c2 00 80 00 ld [ %g2 ], %g1
40007aac: 80 a0 60 00 cmp %g1, 0
40007ab0: 02 80 00 12 be 40007af8 <_Scheduler_EDF_Update_priority+0x9c>
40007ab4: 86 10 20 00 clr %g3
parent = *link;
if ( ( *less )( key, parent ) ) {
40007ab8: c4 00 60 10 ld [ %g1 + 0x10 ], %g2
40007abc: 80 a0 80 1d cmp %g2, %i5
40007ac0: 0a 80 00 09 bcs 40007ae4 <_Scheduler_EDF_Update_priority+0x88>
40007ac4: 84 00 60 04 add %g1, 4, %g2
40007ac8: 12 80 00 28 bne 40007b68 <_Scheduler_EDF_Update_priority+0x10c>
40007acc: 84 10 00 01 mov %g1, %g2
40007ad0: c4 00 60 14 ld [ %g1 + 0x14 ], %g2
40007ad4: 80 a0 80 1c cmp %g2, %i4
40007ad8: 1a 80 00 24 bcc 40007b68 <_Scheduler_EDF_Update_priority+0x10c>
40007adc: 84 10 00 01 mov %g1, %g2
return &RB_RIGHT( the_node, Node );
40007ae0: 84 00 60 04 add %g1, 4, %g2
{
40007ae4: 86 10 00 01 mov %g1, %g3
while ( *link != NULL ) {
40007ae8: c2 00 80 00 ld [ %g2 ], %g1
40007aec: 80 a0 60 00 cmp %g1, 0
40007af0: 32 bf ff f3 bne,a 40007abc <_Scheduler_EDF_Update_priority+0x60>
40007af4: c4 00 60 10 ld [ %g1 + 0x10 ], %g2
RB_SET( child, parent, Node );
40007af8: c6 26 a0 40 st %g3, [ %i2 + 0x40 ]
40007afc: a0 10 20 01 mov 1, %l0
40007b00: c0 26 a0 3c clr [ %i2 + 0x3c ]
is_new_minimum = false;
}
}
_RBTree_Add_child( the_node, parent, link );
_RBTree_Insert_color( the_rbtree, the_node );
40007b04: 92 10 00 1b mov %i3, %o1
RB_SET( child, parent, Node );
40007b08: c0 26 a0 38 clr [ %i2 + 0x38 ]
_RBTree_Insert_color( the_rbtree, the_node );
40007b0c: 90 10 00 19 mov %i1, %o0
RB_SET( child, parent, Node );
40007b10: e0 26 a0 44 st %l0, [ %i2 + 0x44 ]
_RBTree_Insert_color( the_rbtree, the_node );
40007b14: 40 00 02 6f call 400084d0 <_RBTree_Insert_color>
40007b18: f6 20 80 00 st %i3, [ %g2 ]
first = _RBTree_Minimum( &context->Ready );
40007b1c: 40 00 03 09 call 40008740 <_RBTree_Minimum>
40007b20: d0 06 00 00 ld [ %i0 ], %o0
_Scheduler_Update_heir( node->Base.owner, force_dispatch );
40007b24: f6 02 3f c8 ld [ %o0 + -56 ], %i3
Thread_Control *heir = _Thread_Heir;
40007b28: fa 01 a0 24 ld [ %g6 + 0x24 ], %i5
if ( heir != new_heir && ( heir->is_preemptible || force_dispatch ) ) {
40007b2c: 80 a6 c0 1d cmp %i3, %i5
40007b30: 02 80 00 06 be 40007b48 <_Scheduler_EDF_Update_priority+0xec>
40007b34: b8 10 00 06 mov %g6, %i4
40007b38: c2 0f 60 89 ldub [ %i5 + 0x89 ], %g1
40007b3c: 80 a0 60 00 cmp %g1, 0
40007b40: 12 80 00 0c bne 40007b70 <_Scheduler_EDF_Update_priority+0x114>
40007b44: 01 00 00 00 nop
context = _Scheduler_EDF_Get_context( scheduler );
_Scheduler_EDF_Extract( context, the_node );
_Scheduler_EDF_Enqueue( context, the_node, insert_priority );
_Scheduler_EDF_Schedule_body( scheduler, the_thread, false );
}
40007b48: 81 c7 e0 08 ret
40007b4c: 81 e8 00 00 restore
if ( priority == the_node->priority ) {
40007b50: c4 06 a0 4c ld [ %i2 + 0x4c ], %g2
40007b54: 80 a0 80 01 cmp %g2, %g1
40007b58: 32 bf ff cd bne,a 40007a8c <_Scheduler_EDF_Update_priority+0x30>
<== ALWAYS TAKEN
40007b5c: c2 26 a0 4c st %g1, [ %i2 + 0x4c ]
}
40007b60: 81 c7 e0 08 ret
<== NOT EXECUTED
40007b64: 81 e8 00 00 restore
<== NOT EXECUTED
{
40007b68: 10 bf ff e0 b 40007ae8 <_Scheduler_EDF_Update_priority+0x8c>
40007b6c: 86 10 00 01 mov %g1, %g3
40007b70: 40 00 11 32 call 4000c038 <_Timecounter_Sbinuptime>
40007b74: f0 19 a0 28 ldd [ %g6 + 0x28 ], %i0
40007b78: d0 3f 20 28 std %o0, [ %i4 + 0x28 ]
*_result = *_end - *_start;
40007b7c: 9a a2 40 19 subcc %o1, %i1, %o5
40007b80: 98 62 00 18 subx %o0, %i0, %o4
*_time += *_add;
40007b84: f0 1f 60 98 ldd [ %i5 + 0x98 ], %i0
40007b88: 86 86 40 0d addcc %i1, %o5, %g3
40007b8c: 84 46 00 0c addx %i0, %o4, %g2
40007b90: c4 3f 60 98 std %g2, [ %i5 + 0x98 ]
_Thread_Heir = new_heir;
40007b94: f6 21 a0 24 st %i3, [ %g6 + 0x24 ]
_Thread_Dispatch_necessary = true;
40007b98: e0 29 a0 1c stb %l0, [ %g6 + 0x1c ]
}
40007b9c: 81 c7 e0 08 ret
40007ba0: 81 e8 00 00 restore
40013d60 <_Scheduler_Set_affinity>:
bool _Scheduler_Set_affinity(
Thread_Control *the_thread,
size_t cpusetsize,
const cpu_set_t *cpuset
)
{
40013d60: 9d e3 bf 98 save %sp, -104, %sp
Processor_mask *dst,
size_t src_size,
const cpu_set_t *src
)
{
return _Processor_mask_Copy(
40013d64: 92 10 20 04 mov 4, %o1
40013d68: 96 10 00 19 mov %i1, %o3
40013d6c: 94 10 00 1a mov %i2, %o2
40013d70: 90 07 bf fc add %fp, -4, %o0
40013d74: 40 00 11 ad call 40018428 <_Processor_mask_Copy>
40013d78: b0 10 20 00 clr %i0
Scheduler_Node *node;
ISR_lock_Context lock_context;
bool ok;
status = _Processor_mask_From_cpu_set_t( &affinity, cpusetsize, cpuset );
if ( !_Processor_mask_Is_at_most_partial_loss( status ) ) {
40013d7c: 80 a2 20 01 cmp %o0, 1
40013d80: 38 80 00 09 bgu,a 40013da4 <_Scheduler_Set_affinity+0x44>
<== NEVER TAKEN
40013d84: b0 0e 20 01 and %i0, 1, %i0
<== NOT EXECUTED
BIT_AND2( CPU_MAXIMUM_PROCESSORS, a, b, c );
40013d88: 03 10 01 85 sethi %hi(0x40061400), %g1
40013d8c: c4 00 61 d0 ld [ %g1 + 0x1d0 ], %g2 ! 400615d0 <_Processor_mask_The_one_and_only>
return BIT_SUBSET( CPU_MAXIMUM_PROCESSORS, big, small );
40013d90: c2 07 bf fc ld [ %fp + -4 ], %g1
40013d94: 82 28 80 01 andn %g2, %g1, %g1
40013d98: 80 a0 00 01 cmp %g0, %g1
40013d9c: b0 60 3f ff subx %g0, -1, %i0
);
#endif
_Scheduler_Release_critical( scheduler, &lock_context );
return ok;
}
40013da0: b0 0e 20 01 and %i0, 1, %i0
40013da4: 81 c7 e0 08 ret
40013da8: 81 e8 00 00 restore
40007668 <_Scheduler_priority_Block>:
void _Scheduler_priority_Block(
const Scheduler_Control *scheduler,
Thread_Control *the_thread,
Scheduler_Node *node
)
{
40007668: 9d e3 bf a0 save %sp, -96, %sp
Chain_Control *ready_chain = ready_queue->ready_chain;
4000766c: c2 06 a0 3c ld [ %i2 + 0x3c ], %g1
if ( _Chain_Has_only_one_node( ready_chain ) ) {
40007670: c6 00 40 00 ld [ %g1 ], %g3
40007674: c4 00 60 08 ld [ %g1 + 8 ], %g2
40007678: 80 a0 c0 02 cmp %g3, %g2
4000767c: 22 80 00 31 be,a 40007740 <_Scheduler_priority_Block+0xd8>
40007680: c6 06 a0 40 ld [ %i2 + 0x40 ], %g3
next = the_node->next;
40007684: c4 06 40 00 ld [ %i1 ], %g2
previous = the_node->previous;
40007688: c2 06 60 04 ld [ %i1 + 4 ], %g1
next->previous = previous;
4000768c: c2 20 a0 04 st %g1, [ %g2 + 4 ]
previous->next = next;
40007690: c4 20 40 00 st %g2, [ %g1 ]
return ( the_thread == _Thread_Executing );
40007694: b8 10 00 06 mov %g6, %i4
{
( *extract )( scheduler, the_thread, node );
/* TODO: flash critical section? */
if ( _Thread_Is_executing( the_thread ) || _Thread_Is_heir( the_thread ) ) {
40007698: c2 01 a0 20 ld [ %g6 + 0x20 ], %g1
4000769c: 80 a6 40 01 cmp %i1, %g1
400076a0: 02 80 00 07 be 400076bc <_Scheduler_priority_Block+0x54>
400076a4: f6 01 a0 24 ld [ %g6 + 0x24 ], %i3
400076a8: 80 a6 40 1b cmp %i1, %i3
400076ac: 22 80 00 05 be,a 400076c0 <_Scheduler_priority_Block+0x58>
400076b0: f4 06 00 00 ld [ %i0 ], %i2
the_thread,
node,
_Scheduler_priority_Extract_body,
_Scheduler_priority_Schedule_body
);
}
400076b4: 81 c7 e0 08 ret
400076b8: 81 e8 00 00 restore
return (Scheduler_priority_Context *) _Scheduler_Get_context( scheduler );
400076bc: f4 06 00 00 ld [ %i0 ], %i2
bit_number = (unsigned int) __builtin_clz( value )
400076c0: 40 00 1c 2f call 4000e77c <__clzsi2>
400076c4: d0 16 80 00 lduh [ %i2 ], %o0
400076c8: ba 02 3f f0 add %o0, -16, %i5
minor = _Bitfield_Find_first_bit( bit_map->bit_map[ major ] );
400076cc: 83 2f 60 01 sll %i5, 1, %g1
return (_Priority_Bits_index( major ) << 4) +
400076d0: bb 2f 60 04 sll %i5, 4, %i5
minor = _Bitfield_Find_first_bit( bit_map->bit_map[ major ] );
400076d4: 82 06 80 01 add %i2, %g1, %g1
bit_number = (unsigned int) __builtin_clz( value )
400076d8: 40 00 1c 29 call 4000e77c <__clzsi2>
400076dc: d0 10 60 02 lduh [ %g1 + 2 ], %o0
Chain_Node *first = _Chain_First( &ready_queues[ index ] );
400076e0: 90 02 00 1d add %o0, %i5, %o0
400076e4: 90 02 3f f0 add %o0, -16, %o0
return _Chain_Immutable_head( the_chain )->next;
400076e8: bb 2a 20 01 sll %o0, 1, %i5
400076ec: 90 07 40 08 add %i5, %o0, %o0
400076f0: 91 2a 20 02 sll %o0, 2, %o0
400076f4: b4 06 80 08 add %i2, %o0, %i2
400076f8: fa 06 a0 24 ld [ %i2 + 0x24 ], %i5
bool force_dispatch
)
{
Thread_Control *heir = _Thread_Heir;
if ( heir != new_heir && ( heir->is_preemptible || force_dispatch ) ) {
400076fc: 80 a7 40 1b cmp %i5, %i3
40007700: 02 80 00 0e be 40007738 <_Scheduler_priority_Block+0xd0>
<== NEVER TAKEN
40007704: 01 00 00 00 nop
*time = _Timecounter_Sbinuptime();
40007708: 40 00 0d 5c call 4000ac78 <_Timecounter_Sbinuptime>
4000770c: e0 1f 20 28 ldd [ %i4 + 0x28 ], %l0
40007710: d0 3f 20 28 std %o0, [ %i4 + 0x28 ]
const Timestamp_Control *_start,
const Timestamp_Control *_end,
Timestamp_Control *_result
)
{
*_result = *_end - *_start;
40007714: b2 a2 40 11 subcc %o1, %l1, %i1
*_time += *_add;
40007718: d8 1e e0 98 ldd [ %i3 + 0x98 ], %o4
*_result = *_end - *_start;
4000771c: b0 62 00 10 subx %o0, %l0, %i0
*_time += *_add;
40007720: 86 83 40 19 addcc %o5, %i1, %g3
40007724: 84 43 00 18 addx %o4, %i0, %g2
40007728: c4 3e e0 98 std %g2, [ %i3 + 0x98 ]
heir->Scheduler.state = THREAD_SCHEDULER_BLOCKED;
new_heir->Scheduler.state = THREAD_SCHEDULER_SCHEDULED;
#endif
_Thread_Update_CPU_time_used( heir, _Thread_Get_CPU( heir ) );
_Thread_Heir = new_heir;
_Thread_Dispatch_necessary = true;
4000772c: 84 10 20 01 mov 1, %g2
_Thread_Heir = new_heir;
40007730: fa 21 a0 24 st %i5, [ %g6 + 0x24 ]
_Thread_Dispatch_necessary = true;
40007734: c4 29 a0 1c stb %g2, [ %g6 + 0x1c ]
40007738: 81 c7 e0 08 ret
4000773c: 81 e8 00 00 restore
*bit_map_info->minor &= bit_map_info->block_minor;
40007740: c4 10 c0 00 lduh [ %g3 ], %g2
40007744: f8 16 a0 4a lduh [ %i2 + 0x4a ], %i4
return (Scheduler_priority_Context *) _Scheduler_Get_context( scheduler );
40007748: c8 06 00 00 ld [ %i0 ], %g4
return &the_chain->Tail.Node;
4000774c: ba 00 60 04 add %g1, 4, %i5
head->previous = NULL;
40007750: c0 20 60 04 clr [ %g1 + 4 ]
40007754: 84 08 80 1c and %g2, %i4, %g2
head->next = tail;
40007758: fa 20 40 00 st %i5, [ %g1 ]
if ( *bit_map_info->minor == 0 )
4000775c: bb 28 a0 10 sll %g2, 0x10, %i5
tail->previous = head;
40007760: c2 20 60 08 st %g1, [ %g1 + 8 ]
40007764: 80 a7 60 00 cmp %i5, 0
40007768: 12 bf ff cb bne 40007694 <_Scheduler_priority_Block+0x2c>
4000776c: c4 30 c0 00 sth %g2, [ %g3 ]
bit_map->major_bit_map &= bit_map_info->block_major;
40007770: c2 11 00 00 lduh [ %g4 ], %g1
40007774: c4 16 a0 48 lduh [ %i2 + 0x48 ], %g2
40007778: 82 08 40 02 and %g1, %g2, %g1
4000777c: 10 bf ff c6 b 40007694 <_Scheduler_priority_Block+0x2c>
40007780: c2 31 00 00 sth %g1, [ %g4 ]
40007a14 <_Scheduler_priority_Unblock>:
void _Scheduler_priority_Unblock (
const Scheduler_Control *scheduler,
Thread_Control *the_thread,
Scheduler_Node *node
)
{
40007a14: 9d e3 bf a0 save %sp, -96, %sp
unsigned int priority;
unsigned int unmapped_priority;
context = _Scheduler_priority_Get_context( scheduler );
the_node = _Scheduler_priority_Node_downcast( node );
priority = (unsigned int ) _Scheduler_Node_get_priority( &the_node->Base );
40007a18: f6 06 a0 34 ld [ %i2 + 0x34 ], %i3
unmapped_priority = SCHEDULER_PRIORITY_UNMAP( priority );
if ( unmapped_priority != the_node->Ready_queue.current_priority ) {
40007a1c: c2 06 a0 38 ld [ %i2 + 0x38 ], %g1
unmapped_priority = SCHEDULER_PRIORITY_UNMAP( priority );
40007a20: 87 36 e0 01 srl %i3, 1, %g3
if ( unmapped_priority != the_node->Ready_queue.current_priority ) {
40007a24: 80 a0 40 03 cmp %g1, %g3
40007a28: 02 80 00 4a be 40007b50 <_Scheduler_priority_Unblock+0x13c>
40007a2c: fa 06 00 00 ld [ %i0 ], %i5
ready_queue->ready_chain = &ready_queues[ new_priority ];
40007a30: b9 28 e0 01 sll %g3, 1, %i4
40007a34: b8 07 00 03 add %i4, %g3, %i4
40007a38: b9 2f 20 02 sll %i4, 2, %i4
_Scheduler_priority_Ready_queue_update(
40007a3c: 84 07 60 24 add %i5, 0x24, %g2
40007a40: 84 00 80 1c add %g2, %i4, %g2
return the_priority % 16;
40007a44: b8 08 e0 0f and %g3, 0xf, %i4
return (Priority_bit_map_Word) ( 0x8000u >> bit_number );
40007a48: 09 00 00 20 sethi %hi(0x8000), %g4
return the_priority / 16;
40007a4c: 83 36 e0 05 srl %i3, 5, %g1
ready_queue->current_priority = new_priority;
40007a50: c6 26 a0 38 st %g3, [ %i2 + 0x38 ]
return (Priority_bit_map_Word) ( 0x8000u >> bit_number );
40007a54: b1 31 00 01 srl %g4, %g1, %i0
40007a58: 87 31 00 1c srl %g4, %i4, %g3
bit_map_info->minor = &bit_map->bit_map[ _Priority_Bits_index( major ) ];
40007a5c: 82 00 60 01 inc %g1
bit_map_info->block_major = (Priority_bit_map_Word) ~mask;
40007a60: 9e 38 00 18 xnor %g0, %i0, %o7
bit_map_info->minor = &bit_map->bit_map[ _Priority_Bits_index( major ) ];
40007a64: 83 28 60 01 sll %g1, 1, %g1
bit_map_info->block_minor = (Priority_bit_map_Word) ~mask;
40007a68: b8 38 00 03 xnor %g0, %g3, %i4
bit_map_info->minor = &bit_map->bit_map[ _Priority_Bits_index( major ) ];
40007a6c: 82 07 40 01 add %i5, %g1, %g1
ready_queue->ready_chain = &ready_queues[ new_priority ];
40007a70: c4 26 a0 3c st %g2, [ %i2 + 0x3c ]
return (Priority_bit_map_Word) ( 0x8000u >> bit_number );
40007a74: 88 10 00 03 mov %g3, %g4
bit_map_info->minor = &bit_map->bit_map[ _Priority_Bits_index( major ) ];
40007a78: c2 26 a0 40 st %g1, [ %i2 + 0x40 ]
bit_map_info->ready_major = mask;
40007a7c: f0 36 a0 44 sth %i0, [ %i2 + 0x44 ]
bit_map_info->block_major = (Priority_bit_map_Word) ~mask;
40007a80: de 36 a0 48 sth %o7, [ %i2 + 0x48 ]
bit_map_info->ready_minor = mask;
40007a84: c6 36 a0 46 sth %g3, [ %i2 + 0x46 ]
bit_map_info->block_minor = (Priority_bit_map_Word) ~mask;
40007a88: f8 36 a0 4a sth %i4, [ %i2 + 0x4a ]
return &the_chain->Tail.Node;
40007a8c: b8 00 a0 04 add %g2, 4, %i4
old_last = tail->previous;
40007a90: c6 00 a0 08 ld [ %g2 + 8 ], %g3
the_node->next = tail;
40007a94: f8 26 40 00 st %i4, [ %i1 ]
tail->previous = the_node;
40007a98: f2 20 a0 08 st %i1, [ %g2 + 8 ]
old_last->next = the_node;
40007a9c: f2 20 c0 00 st %i1, [ %g3 ]
*bit_map_info->minor |= bit_map_info->ready_minor;
40007aa0: c4 10 40 00 lduh [ %g1 ], %g2
the_node->previous = old_last;
40007aa4: c6 26 60 04 st %g3, [ %i1 + 4 ]
40007aa8: 84 10 80 04 or %g2, %g4, %g2
40007aac: c4 30 40 00 sth %g2, [ %g1 ]
* a context switch.
* Pseudo-ISR case:
* Even if the thread isn't preemptible, if the new heir is
* a pseudo-ISR system task, we need to do a context switch.
*/
if ( priority < _Thread_Get_priority( _Thread_Heir ) ) {
40007ab0: f8 01 a0 24 ld [ %g6 + 0x24 ], %i4
bit_map->major_bit_map |= bit_map_info->ready_major;
40007ab4: c4 16 a0 44 lduh [ %i2 + 0x44 ], %g2
40007ab8: c2 17 40 00 lduh [ %i5 ], %g1
40007abc: 82 10 40 02 or %g1, %g2, %g1
return _Priority_Get_priority( &scheduler_node->Wait.Priority );
40007ac0: c4 07 20 38 ld [ %i4 + 0x38 ], %g2
40007ac4: c2 37 40 00 sth %g1, [ %i5 ]
40007ac8: c2 00 a0 18 ld [ %g2 + 0x18 ], %g1
40007acc: 80 a0 60 00 cmp %g1, 0
40007ad0: 18 80 00 09 bgu 40007af4 <_Scheduler_priority_Unblock+0xe0>
<== NEVER TAKEN
40007ad4: b0 10 00 06 mov %g6, %i0
40007ad8: 22 80 00 04 be,a 40007ae8 <_Scheduler_priority_Unblock+0xd4>
<== ALWAYS TAKEN
40007adc: c2 00 a0 1c ld [ %g2 + 0x1c ], %g1
_Scheduler_Update_heir( the_thread, priority == PRIORITY_PSEUDO_ISR );
}
}
40007ae0: 81 c7 e0 08 ret
<== NOT EXECUTED
40007ae4: 81 e8 00 00 restore
<== NOT EXECUTED
if ( priority < _Thread_Get_priority( _Thread_Heir ) ) {
40007ae8: 80 a0 40 1b cmp %g1, %i3
40007aec: 08 80 00 17 bleu 40007b48 <_Scheduler_priority_Unblock+0x134>
40007af0: 01 00 00 00 nop
if ( heir != new_heir && ( heir->is_preemptible || force_dispatch ) ) {
40007af4: 80 a7 00 19 cmp %i4, %i1
40007af8: 02 bf ff fa be 40007ae0 <_Scheduler_priority_Unblock+0xcc>
<== NEVER TAKEN
40007afc: 80 a6 e0 00 cmp %i3, 0
40007b00: 02 80 00 06 be 40007b18 <_Scheduler_priority_Unblock+0x104>
40007b04: 01 00 00 00 nop
40007b08: c2 0f 20 89 ldub [ %i4 + 0x89 ], %g1
40007b0c: 80 a0 60 00 cmp %g1, 0
40007b10: 02 80 00 0e be 40007b48 <_Scheduler_priority_Unblock+0x134>
40007b14: 01 00 00 00 nop
40007b18: 40 00 0c 58 call 4000ac78 <_Timecounter_Sbinuptime>
40007b1c: e0 1e 20 28 ldd [ %i0 + 0x28 ], %l0
40007b20: d0 3e 20 28 std %o0, [ %i0 + 0x28 ]
*_result = *_end - *_start;
40007b24: b6 a2 40 11 subcc %o1, %l1, %i3
*_time += *_add;
40007b28: d8 1f 20 98 ldd [ %i4 + 0x98 ], %o4
*_result = *_end - *_start;
40007b2c: b4 62 00 10 subx %o0, %l0, %i2
*_time += *_add;
40007b30: 86 83 40 1b addcc %o5, %i3, %g3
40007b34: 84 43 00 1a addx %o4, %i2, %g2
40007b38: c4 3f 20 98 std %g2, [ %i4 + 0x98 ]
_Thread_Dispatch_necessary = true;
40007b3c: 84 10 20 01 mov 1, %g2
_Thread_Heir = new_heir;
40007b40: f2 21 a0 24 st %i1, [ %g6 + 0x24 ]
_Thread_Dispatch_necessary = true;
40007b44: c4 29 a0 1c stb %g2, [ %g6 + 0x1c ]
}
40007b48: 81 c7 e0 08 ret
40007b4c: 81 e8 00 00 restore
40007b50: c4 06 a0 3c ld [ %i2 + 0x3c ], %g2
40007b54: c2 06 a0 40 ld [ %i2 + 0x40 ], %g1
40007b58: 10 bf ff cd b 40007a8c <_Scheduler_priority_Unblock+0x78>
40007b5c: c8 16 a0 46 lduh [ %i2 + 0x46 ], %g4
40007784 <_Scheduler_priority_Update_priority>:
void _Scheduler_priority_Update_priority(
const Scheduler_Control *scheduler,
Thread_Control *the_thread,
Scheduler_Node *node
)
{
40007784: 9d e3 bf a0 save %sp, -96, %sp
Scheduler_priority_Context *context;
Scheduler_priority_Node *the_node;
unsigned int new_priority;
unsigned int unmapped_priority;
if ( !_Thread_Is_ready( the_thread ) ) {
40007788: c2 06 60 1c ld [ %i1 + 0x1c ], %g1
4000778c: 80 a0 60 00 cmp %g1, 0
40007790: 12 80 00 5c bne 40007900 <_Scheduler_priority_Update_priority+0x17c>
40007794: 01 00 00 00 nop
/* Nothing to do */
return;
}
the_node = _Scheduler_priority_Node_downcast( node );
new_priority = (unsigned int)
40007798: f6 06 a0 34 ld [ %i2 + 0x34 ], %i3
_Scheduler_Node_get_priority( &the_node->Base );
unmapped_priority = SCHEDULER_PRIORITY_UNMAP( new_priority );
if ( unmapped_priority == the_node->Ready_queue.current_priority ) {
4000779c: c2 06 a0 38 ld [ %i2 + 0x38 ], %g1
unmapped_priority = SCHEDULER_PRIORITY_UNMAP( new_priority );
400077a0: 87 36 e0 01 srl %i3, 1, %g3
if ( unmapped_priority == the_node->Ready_queue.current_priority ) {
400077a4: 80 a0 40 03 cmp %g1, %g3
400077a8: 02 80 00 56 be 40007900 <_Scheduler_priority_Update_priority+0x17c>
400077ac: 01 00 00 00 nop
Chain_Control *ready_chain = ready_queue->ready_chain;
400077b0: c2 06 a0 3c ld [ %i2 + 0x3c ], %g1
if ( _Chain_Has_only_one_node( ready_chain ) ) {
400077b4: c8 00 40 00 ld [ %g1 ], %g4
400077b8: c4 00 60 08 ld [ %g1 + 8 ], %g2
400077bc: 80 a1 00 02 cmp %g4, %g2
400077c0: 02 80 00 52 be 40007908 <_Scheduler_priority_Update_priority+0x184>
400077c4: fa 06 00 00 ld [ %i0 ], %i5
next = the_node->next;
400077c8: c4 06 40 00 ld [ %i1 ], %g2
previous = the_node->previous;
400077cc: c2 06 60 04 ld [ %i1 + 4 ], %g1
next->previous = previous;
400077d0: c2 20 a0 04 st %g1, [ %g2 + 4 ]
previous->next = next;
400077d4: c4 20 40 00 st %g2, [ %g1 ]
return the_priority / 16;
400077d8: 85 36 e0 05 srl %i3, 5, %g2
return (Priority_bit_map_Word) ( 0x8000u >> bit_number );
400077dc: 03 00 00 20 sethi %hi(0x8000), %g1
ready_queue->ready_chain = &ready_queues[ new_priority ];
400077e0: 89 28 e0 01 sll %g3, 1, %g4
400077e4: 9f 30 40 02 srl %g1, %g2, %o7
400077e8: 88 01 00 03 add %g4, %g3, %g4
return the_priority % 16;
400077ec: 96 08 e0 0f and %g3, 0xf, %o3
&the_thread->Object.Node,
&the_node->Ready_queue,
&context->Bit_map
);
_Scheduler_priority_Ready_queue_update(
400077f0: 9a 07 60 24 add %i5, 0x24, %o5
return (Priority_bit_map_Word) ( 0x8000u >> bit_number );
400077f4: 83 30 40 0b srl %g1, %o3, %g1
bit_map_info->minor = &bit_map->bit_map[ _Priority_Bits_index( major ) ];
400077f8: b8 00 a0 01 add %g2, 1, %i4
400077fc: 89 29 20 02 sll %g4, 2, %g4
40007800: b9 2f 20 01 sll %i4, 1, %i4
40007804: b0 03 40 04 add %o5, %g4, %i0
40007808: b8 07 40 1c add %i5, %i4, %i4
bit_map_info->block_major = (Priority_bit_map_Word) ~mask;
4000780c: 98 38 00 0f xnor %g0, %o7, %o4
ready_queue->current_priority = new_priority;
40007810: c6 26 a0 38 st %g3, [ %i2 + 0x38 ]
bit_map_info->block_minor = (Priority_bit_map_Word) ~mask;
40007814: 86 38 00 01 xnor %g0, %g1, %g3
ready_queue->ready_chain = &ready_queues[ new_priority ];
40007818: f0 26 a0 3c st %i0, [ %i2 + 0x3c ]
unmapped_priority,
&context->Bit_map,
&context->Ready[ 0 ]
);
if ( SCHEDULER_PRIORITY_IS_APPEND( new_priority ) ) {
4000781c: 80 8e e0 01 btst 1, %i3
bit_map_info->minor = &bit_map->bit_map[ _Priority_Bits_index( major ) ];
40007820: f8 26 a0 40 st %i4, [ %i2 + 0x40 ]
bit_map_info->ready_major = mask;
40007824: de 36 a0 44 sth %o7, [ %i2 + 0x44 ]
bit_map_info->block_major = (Priority_bit_map_Word) ~mask;
40007828: d8 36 a0 48 sth %o4, [ %i2 + 0x48 ]
bit_map_info->ready_minor = mask;
4000782c: c2 36 a0 46 sth %g1, [ %i2 + 0x46 ]
40007830: 02 80 00 47 be 4000794c <_Scheduler_priority_Update_priority+0x1c8>
40007834: c6 36 a0 4a sth %g3, [ %i2 + 0x4a ]
old_last = tail->previous;
40007838: c6 06 20 08 ld [ %i0 + 8 ], %g3
return &the_chain->Tail.Node;
4000783c: 88 06 20 04 add %i0, 4, %g4
the_node->next = tail;
40007840: c8 26 40 00 st %g4, [ %i1 ]
40007844: 85 28 a0 01 sll %g2, 1, %g2
tail->previous = the_node;
40007848: f2 26 20 08 st %i1, [ %i0 + 8 ]
4000784c: 84 07 40 02 add %i5, %g2, %g2
old_last->next = the_node;
40007850: f2 20 c0 00 st %i1, [ %g3 ]
*bit_map_info->minor |= bit_map_info->ready_minor;
40007854: c8 10 a0 02 lduh [ %g2 + 2 ], %g4
the_node->previous = old_last;
40007858: c6 26 60 04 st %g3, [ %i1 + 4 ]
4000785c: 82 10 40 04 or %g1, %g4, %g1
40007860: c2 30 a0 02 sth %g1, [ %g2 + 2 ]
bit_map->major_bit_map |= bit_map_info->ready_major;
40007864: c4 16 a0 44 lduh [ %i2 + 0x44 ], %g2
40007868: c2 17 40 00 lduh [ %i5 ], %g1
4000786c: 82 10 40 02 or %g1, %g2, %g1
40007870: c2 37 40 00 sth %g1, [ %i5 ]
bit_number = (unsigned int) __builtin_clz( value )
40007874: 40 00 1b c2 call 4000e77c <__clzsi2>
40007878: d0 17 40 00 lduh [ %i5 ], %o0
4000787c: b8 02 3f f0 add %o0, -16, %i4
minor = _Bitfield_Find_first_bit( bit_map->bit_map[ major ] );
40007880: 83 2f 20 01 sll %i4, 1, %g1
return (_Priority_Bits_index( major ) << 4) +
40007884: b9 2f 20 04 sll %i4, 4, %i4
minor = _Bitfield_Find_first_bit( bit_map->bit_map[ major ] );
40007888: 82 07 40 01 add %i5, %g1, %g1
bit_number = (unsigned int) __builtin_clz( value )
4000788c: 40 00 1b bc call 4000e77c <__clzsi2>
40007890: d0 10 60 02 lduh [ %g1 + 2 ], %o0
Chain_Node *first = _Chain_First( &ready_queues[ index ] );
40007894: 90 02 00 1c add %o0, %i4, %o0
Thread_Control *heir = _Thread_Heir;
40007898: f6 01 a0 24 ld [ %g6 + 0x24 ], %i3
4000789c: 90 02 3f f0 add %o0, -16, %o0
return _Chain_Immutable_head( the_chain )->next;
400078a0: b9 2a 20 01 sll %o0, 1, %i4
400078a4: 90 07 00 08 add %i4, %o0, %o0
400078a8: 91 2a 20 02 sll %o0, 2, %o0
400078ac: ba 07 40 08 add %i5, %o0, %i5
400078b0: fa 07 60 24 ld [ %i5 + 0x24 ], %i5
if ( heir != new_heir && ( heir->is_preemptible || force_dispatch ) ) {
400078b4: 80 a7 40 1b cmp %i5, %i3
400078b8: 02 80 00 12 be 40007900 <_Scheduler_priority_Update_priority+0x17c>
400078bc: b4 10 00 06 mov %g6, %i2
400078c0: c2 0e e0 89 ldub [ %i3 + 0x89 ], %g1
400078c4: 80 a0 60 00 cmp %g1, 0
400078c8: 02 80 00 0e be 40007900 <_Scheduler_priority_Update_priority+0x17c>
<== ALWAYS TAKEN
400078cc: 01 00 00 00 nop
400078d0: 40 00 0c ea call 4000ac78 <_Timecounter_Sbinuptime>
400078d4: e0 19 a0 28 ldd [ %g6 + 0x28 ], %l0
400078d8: d0 3e a0 28 std %o0, [ %i2 + 0x28 ]
*_result = *_end - *_start;
400078dc: b2 a2 40 11 subcc %o1, %l1, %i1
*_time += *_add;
400078e0: d8 1e e0 98 ldd [ %i3 + 0x98 ], %o4
*_result = *_end - *_start;
400078e4: b0 62 00 10 subx %o0, %l0, %i0
*_time += *_add;
400078e8: 86 83 40 19 addcc %o5, %i1, %g3
400078ec: 84 43 00 18 addx %o4, %i0, %g2
400078f0: c4 3e e0 98 std %g2, [ %i3 + 0x98 ]
_Thread_Dispatch_necessary = true;
400078f4: 84 10 20 01 mov 1, %g2
_Thread_Heir = new_heir;
400078f8: fa 21 a0 24 st %i5, [ %g6 + 0x24 ]
_Thread_Dispatch_necessary = true;
400078fc: c4 29 a0 1c stb %g2, [ %g6 + 0x1c ]
&context->Bit_map
);
}
_Scheduler_priority_Schedule_body( scheduler, the_thread, false );
}
40007900: 81 c7 e0 08 ret
40007904: 81 e8 00 00 restore
*bit_map_info->minor &= bit_map_info->block_minor;
40007908: c8 06 a0 40 ld [ %i2 + 0x40 ], %g4
4000790c: c4 11 00 00 lduh [ %g4 ], %g2
40007910: f0 16 a0 4a lduh [ %i2 + 0x4a ], %i0
return &the_chain->Tail.Node;
40007914: b8 00 60 04 add %g1, 4, %i4
head->previous = NULL;
40007918: c0 20 60 04 clr [ %g1 + 4 ]
4000791c: 84 08 80 18 and %g2, %i0, %g2
head->next = tail;
40007920: f8 20 40 00 st %i4, [ %g1 ]
if ( *bit_map_info->minor == 0 )
40007924: b9 28 a0 10 sll %g2, 0x10, %i4
tail->previous = head;
40007928: c2 20 60 08 st %g1, [ %g1 + 8 ]
4000792c: 80 a7 20 00 cmp %i4, 0
40007930: 12 bf ff aa bne 400077d8 <_Scheduler_priority_Update_priority+0x54>
40007934: c4 31 00 00 sth %g2, [ %g4 ]
bit_map->major_bit_map &= bit_map_info->block_major;
40007938: c2 17 40 00 lduh [ %i5 ], %g1
4000793c: c4 16 a0 48 lduh [ %i2 + 0x48 ], %g2
40007940: 82 08 40 02 and %g1, %g2, %g1
40007944: 10 bf ff a5 b 400077d8 <_Scheduler_priority_Update_priority+0x54>
40007948: c2 37 40 00 sth %g1, [ %i5 ]
the_node->previous = after_node;
4000794c: f0 26 60 04 st %i0, [ %i1 + 4 ]
40007950: 85 28 a0 01 sll %g2, 1, %g2
before_node = after_node->next;
40007954: c6 03 40 04 ld [ %o5 + %g4 ], %g3
after_node->next = the_node;
40007958: f2 23 40 04 st %i1, [ %o5 + %g4 ]
4000795c: 84 07 40 02 add %i5, %g2, %g2
the_node->next = before_node;
40007960: c6 26 40 00 st %g3, [ %i1 ]
*bit_map_info->minor |= bit_map_info->ready_minor;
40007964: c8 10 a0 02 lduh [ %g2 + 2 ], %g4
before_node->previous = the_node;
40007968: 10 bf ff bd b 4000785c <_Scheduler_priority_Update_priority+0xd8>
4000796c: f2 20 e0 04 st %i1, [ %g3 + 4 ]
40007944 <_Scheduler_simple_Block>:
void _Scheduler_simple_Block(
const Scheduler_Control *scheduler,
Thread_Control *the_thread,
Scheduler_Node *node
)
{
40007944: 9d e3 bf a0 save %sp, -96, %sp
previous = the_node->previous;
40007948: c2 06 60 04 ld [ %i1 + 4 ], %g1
next = the_node->next;
4000794c: c4 06 40 00 ld [ %i1 ], %g2
next->previous = previous;
40007950: c2 20 a0 04 st %g1, [ %g2 + 4 ]
return ( the_thread == _Thread_Executing );
40007954: ba 10 00 06 mov %g6, %i5
previous->next = next;
40007958: c4 20 40 00 st %g2, [ %g1 ]
{
( *extract )( scheduler, the_thread, node );
/* TODO: flash critical section? */
if ( _Thread_Is_executing( the_thread ) || _Thread_Is_heir( the_thread ) ) {
4000795c: c2 01 a0 20 ld [ %g6 + 0x20 ], %g1
40007960: 80 a6 40 01 cmp %i1, %g1
40007964: 02 80 00 07 be 40007980 <_Scheduler_simple_Block+0x3c>
40007968: f8 01 a0 24 ld [ %g6 + 0x24 ], %i4
4000796c: 80 a6 40 1c cmp %i1, %i4
40007970: 22 80 00 05 be,a 40007984 <_Scheduler_simple_Block+0x40>
<== NEVER TAKEN
40007974: c2 06 00 00 ld [ %i0 ], %g1
<== NOT EXECUTED
the_thread,
node,
_Scheduler_simple_Extract,
_Scheduler_simple_Schedule_body
);
}
40007978: 81 c7 e0 08 ret
4000797c: 81 e8 00 00 restore
return _Chain_Immutable_head( the_chain )->next;
40007980: c2 06 00 00 ld [ %i0 ], %g1
40007984: f6 00 40 00 ld [ %g1 ], %i3
bool force_dispatch
)
{
Thread_Control *heir = _Thread_Heir;
if ( heir != new_heir && ( heir->is_preemptible || force_dispatch ) ) {
40007988: 80 a6 c0 1c cmp %i3, %i4
4000798c: 02 80 00 0e be 400079c4 <_Scheduler_simple_Block+0x80>
40007990: 01 00 00 00 nop
*time = _Timecounter_Sbinuptime();
40007994: 40 00 0f 29 call 4000b638 <_Timecounter_Sbinuptime>
40007998: e0 1f 60 28 ldd [ %i5 + 0x28 ], %l0
4000799c: d0 3f 60 28 std %o0, [ %i5 + 0x28 ]
const Timestamp_Control *_start,
const Timestamp_Control *_end,
Timestamp_Control *_result
)
{
*_result = *_end - *_start;
400079a0: b2 a2 40 11 subcc %o1, %l1, %i1
*_time += *_add;
400079a4: d8 1f 20 98 ldd [ %i4 + 0x98 ], %o4
*_result = *_end - *_start;
400079a8: b0 62 00 10 subx %o0, %l0, %i0
*_time += *_add;
400079ac: 86 83 40 19 addcc %o5, %i1, %g3
400079b0: 84 43 00 18 addx %o4, %i0, %g2
400079b4: c4 3f 20 98 std %g2, [ %i4 + 0x98 ]
heir->Scheduler.state = THREAD_SCHEDULER_BLOCKED;
new_heir->Scheduler.state = THREAD_SCHEDULER_SCHEDULED;
#endif
_Thread_Update_CPU_time_used( heir, _Thread_Get_CPU( heir ) );
_Thread_Heir = new_heir;
_Thread_Dispatch_necessary = true;
400079b8: 84 10 20 01 mov 1, %g2
_Thread_Heir = new_heir;
400079bc: f6 21 a0 24 st %i3, [ %g6 + 0x24 ]
_Thread_Dispatch_necessary = true;
400079c0: c4 29 a0 1c stb %g2, [ %g6 + 0x1c ]
400079c4: 81 c7 e0 08 ret
400079c8: 81 e8 00 00 restore
40007adc <_Scheduler_simple_Schedule>:
void _Scheduler_simple_Schedule(
const Scheduler_Control *scheduler,
Thread_Control *the_thread
)
{
40007adc: 9d e3 bf a0 save %sp, -96, %sp
<== NOT EXECUTED
40007ae0: c2 06 00 00 ld [ %i0 ], %g1
<== NOT EXECUTED
40007ae4: f6 00 40 00 ld [ %g1 ], %i3
<== NOT EXECUTED
Thread_Control *heir = _Thread_Heir;
40007ae8: fa 01 a0 24 ld [ %g6 + 0x24 ], %i5
<== NOT EXECUTED
if ( heir != new_heir && ( heir->is_preemptible || force_dispatch ) ) {
40007aec: 80 a6 c0 1d cmp %i3, %i5
<== NOT EXECUTED
40007af0: 02 80 00 06 be 40007b08 <_Scheduler_simple_Schedule+0x2c>
<== NOT EXECUTED
40007af4: b8 10 00 06 mov %g6, %i4
<== NOT EXECUTED
40007af8: c2 0f 60 89 ldub [ %i5 + 0x89 ], %g1
<== NOT EXECUTED
40007afc: 80 a0 60 00 cmp %g1, 0
<== NOT EXECUTED
40007b00: 12 80 00 04 bne 40007b10 <_Scheduler_simple_Schedule+0x34>
<== NOT EXECUTED
40007b04: 01 00 00 00 nop
<== NOT EXECUTED
_Scheduler_simple_Schedule_body( scheduler, the_thread, false );
}
40007b08: 81 c7 e0 08 ret
<== NOT EXECUTED
40007b0c: 81 e8 00 00 restore
<== NOT EXECUTED
40007b10: 40 00 0e ca call 4000b638 <_Timecounter_Sbinuptime>
<== NOT EXECUTED
40007b14: e0 19 a0 28 ldd [ %g6 + 0x28 ], %l0
<== NOT EXECUTED
40007b18: d0 3f 20 28 std %o0, [ %i4 + 0x28 ]
<== NOT EXECUTED
*_result = *_end - *_start;
40007b1c: b2 a2 40 11 subcc %o1, %l1, %i1
<== NOT EXECUTED
*_time += *_add;
40007b20: d8 1f 60 98 ldd [ %i5 + 0x98 ], %o4
<== NOT EXECUTED
*_result = *_end - *_start;
40007b24: b0 62 00 10 subx %o0, %l0, %i0
<== NOT EXECUTED
*_time += *_add;
40007b28: 86 83 40 19 addcc %o5, %i1, %g3
<== NOT EXECUTED
40007b2c: 84 43 00 18 addx %o4, %i0, %g2
<== NOT EXECUTED
40007b30: c4 3f 60 98 std %g2, [ %i5 + 0x98 ]
<== NOT EXECUTED
_Thread_Dispatch_necessary = true;
40007b34: 84 10 20 01 mov 1, %g2
<== NOT EXECUTED
_Thread_Heir = new_heir;
40007b38: f6 21 a0 24 st %i3, [ %g6 + 0x24 ]
<== NOT EXECUTED
_Thread_Dispatch_necessary = true;
40007b3c: c4 29 a0 1c stb %g2, [ %g6 + 0x1c ]
<== NOT EXECUTED
40007b40: 81 c7 e0 08 ret
<== NOT EXECUTED
40007b44: 81 e8 00 00 restore
<== NOT EXECUTED
40007b48 <_Scheduler_simple_Unblock>:
void _Scheduler_simple_Unblock(
const Scheduler_Control *scheduler,
Thread_Control *the_thread,
Scheduler_Node *node
)
{
40007b48: 9d e3 bf a0 save %sp, -96, %sp
40007b4c: c6 06 00 00 ld [ %i0 ], %g3
40007b50: c2 06 60 38 ld [ %i1 + 0x38 ], %g1
40007b54: f8 00 60 1c ld [ %g1 + 0x1c ], %i4
40007b58: c2 00 c0 00 ld [ %g3 ], %g1
return &the_chain->Tail.Node;
40007b5c: 86 00 e0 04 add %g3, 4, %g3
while ( next != tail && !( *order )( left, next ) ) {
40007b60: 80 a0 c0 01 cmp %g3, %g1
40007b64: 02 80 00 18 be 40007bc4 <_Scheduler_simple_Unblock+0x7c>
40007b68: b6 17 20 01 or %i4, 1, %i3
40007b6c: c4 00 60 38 ld [ %g1 + 0x38 ], %g2
40007b70: c8 00 a0 18 ld [ %g2 + 0x18 ], %g4
40007b74: 80 a1 20 00 cmp %g4, 0
40007b78: 12 80 00 12 bne 40007bc0 <_Scheduler_simple_Unblock+0x78>
40007b7c: ba 10 20 00 clr %i5
40007b80: c4 00 a0 1c ld [ %g2 + 0x1c ], %g2
40007b84: 80 a0 80 1b cmp %g2, %i3
40007b88: 3a 80 00 0f bcc,a 40007bc4 <_Scheduler_simple_Unblock+0x7c>
40007b8c: 86 10 00 01 mov %g1, %g3
next = _Chain_Next( next );
40007b90: c2 00 40 00 ld [ %g1 ], %g1
while ( next != tail && !( *order )( left, next ) ) {
40007b94: 80 a0 c0 01 cmp %g3, %g1
40007b98: 22 80 00 0c be,a 40007bc8 <_Scheduler_simple_Unblock+0x80>
40007b9c: c2 00 e0 04 ld [ %g3 + 4 ], %g1
40007ba0: c4 00 60 38 ld [ %g1 + 0x38 ], %g2
40007ba4: c8 00 a0 18 ld [ %g2 + 0x18 ], %g4
40007ba8: 80 a7 40 04 cmp %i5, %g4
40007bac: 12 80 00 05 bne 40007bc0 <_Scheduler_simple_Unblock+0x78>
40007bb0: c4 00 a0 1c ld [ %g2 + 0x1c ], %g2
40007bb4: 80 a6 c0 02 cmp %i3, %g2
40007bb8: 38 bf ff f7 bgu,a 40007b94 <_Scheduler_simple_Unblock+0x4c>
40007bbc: c2 00 40 00 ld [ %g1 ], %g1
40007bc0: 86 10 00 01 mov %g1, %g3
_Chain_Insert_unprotected( _Chain_Previous( next ), to_insert );
40007bc4: c2 00 e0 04 ld [ %g3 + 4 ], %g1
the_node->previous = after_node;
40007bc8: c2 26 60 04 st %g1, [ %i1 + 4 ]
before_node = after_node->next;
40007bcc: c4 00 40 00 ld [ %g1 ], %g2
after_node->next = the_node;
40007bd0: f2 20 40 00 st %i1, [ %g1 ]
the_node->next = before_node;
40007bd4: c4 26 40 00 st %g2, [ %i1 ]
* a context switch.
* Pseudo-ISR case:
* Even if the thread isn't preemptible, if the new heir is
* a pseudo-ISR system task, we need to do a context switch.
*/
if ( priority < _Thread_Get_priority( _Thread_Heir ) ) {
40007bd8: fa 01 a0 24 ld [ %g6 + 0x24 ], %i5
40007bdc: c2 07 60 38 ld [ %i5 + 0x38 ], %g1
before_node->previous = the_node;
40007be0: f2 20 a0 04 st %i1, [ %g2 + 4 ]
40007be4: c4 00 60 18 ld [ %g1 + 0x18 ], %g2
40007be8: 80 a0 a0 00 cmp %g2, 0
40007bec: 18 80 00 09 bgu 40007c10 <_Scheduler_simple_Unblock+0xc8>
40007bf0: b6 10 00 06 mov %g6, %i3
40007bf4: 22 80 00 04 be,a 40007c04 <_Scheduler_simple_Unblock+0xbc>
<== ALWAYS TAKEN
40007bf8: c2 00 60 1c ld [ %g1 + 0x1c ], %g1
_Scheduler_Update_heir(
the_thread,
priority == PRIORITY_PSEUDO_ISR
);
}
}
40007bfc: 81 c7 e0 08 ret
<== NOT EXECUTED
40007c00: 81 e8 00 00 restore
<== NOT EXECUTED
if ( priority < _Thread_Get_priority( _Thread_Heir ) ) {
40007c04: 80 a0 40 1c cmp %g1, %i4
40007c08: 08 80 00 17 bleu 40007c64 <_Scheduler_simple_Unblock+0x11c>
40007c0c: 01 00 00 00 nop
if ( heir != new_heir && ( heir->is_preemptible || force_dispatch ) ) {
40007c10: 80 a7 40 19 cmp %i5, %i1
40007c14: 02 bf ff fa be 40007bfc <_Scheduler_simple_Unblock+0xb4>
40007c18: 80 a7 20 00 cmp %i4, 0
40007c1c: 02 80 00 06 be 40007c34 <_Scheduler_simple_Unblock+0xec>
40007c20: 01 00 00 00 nop
40007c24: c2 0f 60 89 ldub [ %i5 + 0x89 ], %g1
40007c28: 80 a0 60 00 cmp %g1, 0
40007c2c: 02 80 00 0e be 40007c64 <_Scheduler_simple_Unblock+0x11c>
40007c30: 01 00 00 00 nop
40007c34: 40 00 0e 81 call 4000b638 <_Timecounter_Sbinuptime>
40007c38: e0 1e e0 28 ldd [ %i3 + 0x28 ], %l0
40007c3c: d0 3e e0 28 std %o0, [ %i3 + 0x28 ]
*_result = *_end - *_start;
40007c40: b6 a2 40 11 subcc %o1, %l1, %i3
*_time += *_add;
40007c44: d8 1f 60 98 ldd [ %i5 + 0x98 ], %o4
*_result = *_end - *_start;
40007c48: b4 62 00 10 subx %o0, %l0, %i2
*_time += *_add;
40007c4c: 86 83 40 1b addcc %o5, %i3, %g3
40007c50: 84 43 00 1a addx %o4, %i2, %g2
40007c54: c4 3f 60 98 std %g2, [ %i5 + 0x98 ]
_Thread_Dispatch_necessary = true;
40007c58: 84 10 20 01 mov 1, %g2
_Thread_Heir = new_heir;
40007c5c: f2 21 a0 24 st %i1, [ %g6 + 0x24 ]
_Thread_Dispatch_necessary = true;
40007c60: c4 29 a0 1c stb %g2, [ %g6 + 0x1c ]
}
40007c64: 81 c7 e0 08 ret
40007c68: 81 e8 00 00 restore
400079cc <_Scheduler_simple_Update_priority>:
void _Scheduler_simple_Update_priority(
const Scheduler_Control *scheduler,
Thread_Control *the_thread,
Scheduler_Node *node
)
{
400079cc: 9d e3 bf a0 save %sp, -96, %sp
Scheduler_simple_Context *context;
unsigned int new_priority;
if ( !_Thread_Is_ready( the_thread ) ) {
400079d0: c2 06 60 1c ld [ %i1 + 0x1c ], %g1
400079d4: 80 a0 60 00 cmp %g1, 0
400079d8: 22 80 00 04 be,a 400079e8 <_Scheduler_simple_Update_priority+0x1c>
<== ALWAYS TAKEN
400079dc: c2 06 60 04 ld [ %i1 + 4 ], %g1
new_priority = (unsigned int ) _Scheduler_Node_get_priority( node );
_Scheduler_simple_Extract( scheduler, the_thread, node );
_Scheduler_simple_Insert( &context->Ready, the_thread, new_priority );
_Scheduler_simple_Schedule_body( scheduler, the_thread, false );
}
400079e0: 81 c7 e0 08 ret
400079e4: 81 e8 00 00 restore
next = the_node->next;
400079e8: c4 06 40 00 ld [ %i1 ], %g2
400079ec: f8 06 00 00 ld [ %i0 ], %i4
new_priority = (unsigned int ) _Scheduler_Node_get_priority( node );
400079f0: f6 06 a0 34 ld [ %i2 + 0x34 ], %i3
next->previous = previous;
400079f4: c2 20 a0 04 st %g1, [ %g2 + 4 ]
return &the_chain->Tail.Node;
400079f8: 88 07 20 04 add %i4, 4, %g4
previous->next = next;
400079fc: c4 20 40 00 st %g2, [ %g1 ]
return _Chain_Immutable_head( the_chain )->next;
40007a00: c2 07 00 00 ld [ %i4 ], %g1
)
{
const Chain_Node *tail = _Chain_Immutable_tail( the_chain );
Chain_Node *next = _Chain_First( the_chain );
while ( next != tail && !( *order )( left, next ) ) {
40007a04: 80 a1 00 01 cmp %g4, %g1
40007a08: 22 80 00 19 be,a 40007a6c <_Scheduler_simple_Update_priority+0xa0>
<== NEVER TAKEN
40007a0c: c2 01 20 04 ld [ %g4 + 4 ], %g1
<== NOT EXECUTED
return _Priority_Get_priority( &scheduler_node->Wait.Priority );
40007a10: c4 00 60 38 ld [ %g1 + 0x38 ], %g2
40007a14: c6 00 a0 18 ld [ %g2 + 0x18 ], %g3
40007a18: 80 a0 e0 00 cmp %g3, 0
40007a1c: 12 80 00 12 bne 40007a64 <_Scheduler_simple_Update_priority+0x98>
40007a20: ba 10 20 00 clr %i5
40007a24: c4 00 a0 1c ld [ %g2 + 0x1c ], %g2
40007a28: 80 a0 80 1b cmp %g2, %i3
40007a2c: 3a 80 00 0f bcc,a 40007a68 <_Scheduler_simple_Update_priority+0x9c>
40007a30: 88 10 00 01 mov %g1, %g4
next = _Chain_Next( next );
40007a34: c2 00 40 00 ld [ %g1 ], %g1
while ( next != tail && !( *order )( left, next ) ) {
40007a38: 80 a1 00 01 cmp %g4, %g1
40007a3c: 22 80 00 0c be,a 40007a6c <_Scheduler_simple_Update_priority+0xa0>
40007a40: c2 01 20 04 ld [ %g4 + 4 ], %g1
40007a44: c4 00 60 38 ld [ %g1 + 0x38 ], %g2
40007a48: c6 00 a0 18 ld [ %g2 + 0x18 ], %g3
40007a4c: 80 a7 40 03 cmp %i5, %g3
40007a50: 12 80 00 05 bne 40007a64 <_Scheduler_simple_Update_priority+0x98>
40007a54: c4 00 a0 1c ld [ %g2 + 0x1c ], %g2
40007a58: 80 a6 c0 02 cmp %i3, %g2
40007a5c: 38 bf ff f7 bgu,a 40007a38 <_Scheduler_simple_Update_priority+0x6c>
40007a60: c2 00 40 00 ld [ %g1 ], %g1
40007a64: 88 10 00 01 mov %g1, %g4
}
_Chain_Insert_unprotected( _Chain_Previous( next ), to_insert );
40007a68: c2 01 20 04 ld [ %g4 + 4 ], %g1
the_node->previous = after_node;
40007a6c: c2 26 60 04 st %g1, [ %i1 + 4 ]
before_node = after_node->next;
40007a70: c4 00 40 00 ld [ %g1 ], %g2
after_node->next = the_node;
40007a74: f2 20 40 00 st %i1, [ %g1 ]
the_node->next = before_node;
40007a78: c4 26 40 00 st %g2, [ %i1 ]
before_node->previous = the_node;
40007a7c: f2 20 a0 04 st %i1, [ %g2 + 4 ]
return _Chain_Immutable_head( the_chain )->next;
40007a80: f8 07 00 00 ld [ %i4 ], %i4
Thread_Control *heir = _Thread_Heir;
40007a84: fa 01 a0 24 ld [ %g6 + 0x24 ], %i5
if ( heir != new_heir && ( heir->is_preemptible || force_dispatch ) ) {
40007a88: 80 a7 00 1d cmp %i4, %i5
40007a8c: 02 bf ff d5 be 400079e0 <_Scheduler_simple_Update_priority+0x14>
40007a90: b6 10 00 06 mov %g6, %i3
40007a94: c2 0f 60 89 ldub [ %i5 + 0x89 ], %g1
40007a98: 80 a0 60 00 cmp %g1, 0
40007a9c: 02 80 00 0e be 40007ad4 <_Scheduler_simple_Update_priority+0x108>
40007aa0: 01 00 00 00 nop
40007aa4: 40 00 0e e5 call 4000b638 <_Timecounter_Sbinuptime>
<== NOT EXECUTED
40007aa8: f0 19 a0 28 ldd [ %g6 + 0x28 ], %i0
<== NOT EXECUTED
40007aac: d0 3e e0 28 std %o0, [ %i3 + 0x28 ]
<== NOT EXECUTED
*_result = *_end - *_start;
40007ab0: b6 a2 40 19 subcc %o1, %i1, %i3
<== NOT EXECUTED
40007ab4: b4 62 00 18 subx %o0, %i0, %i2
<== NOT EXECUTED
*_time += *_add;
40007ab8: f0 1f 60 98 ldd [ %i5 + 0x98 ], %i0
<== NOT EXECUTED
40007abc: 86 86 40 1b addcc %i1, %i3, %g3
<== NOT EXECUTED
40007ac0: 84 46 00 1a addx %i0, %i2, %g2
<== NOT EXECUTED
40007ac4: c4 3f 60 98 std %g2, [ %i5 + 0x98 ]
<== NOT EXECUTED
_Thread_Dispatch_necessary = true;
40007ac8: 84 10 20 01 mov 1, %g2
<== NOT EXECUTED
_Thread_Heir = new_heir;
40007acc: f8 21 a0 24 st %i4, [ %g6 + 0x24 ]
<== NOT EXECUTED
_Thread_Dispatch_necessary = true;
40007ad0: c4 29 a0 1c stb %g2, [ %g6 + 0x1c ]
<== NOT EXECUTED
}
40007ad4: 81 c7 e0 08 ret
40007ad8: 81 e8 00 00 restore
40007c6c <_Scheduler_simple_Yield>:
void _Scheduler_simple_Yield(
const Scheduler_Control *scheduler,
Thread_Control *the_thread,
Scheduler_Node *node
)
{
40007c6c: 9d e3 bf a0 save %sp, -96, %sp
next = the_node->next;
40007c70: c4 06 40 00 ld [ %i1 ], %g2
previous = the_node->previous;
40007c74: c2 06 60 04 ld [ %i1 + 4 ], %g1
40007c78: f8 06 00 00 ld [ %i0 ], %i4
next->previous = previous;
40007c7c: c2 20 a0 04 st %g1, [ %g2 + 4 ]
return &the_chain->Tail.Node;
40007c80: 88 07 20 04 add %i4, 4, %g4
previous->next = next;
40007c84: c4 20 40 00 st %g2, [ %g1 ]
40007c88: c2 06 60 38 ld [ %i1 + 0x38 ], %g1
context = _Scheduler_simple_Get_context( scheduler );
(void) node;
_Chain_Extract_unprotected( &the_thread->Object.Node );
insert_priority = (unsigned int) _Thread_Get_priority( the_thread );
40007c8c: c4 00 60 1c ld [ %g1 + 0x1c ], %g2
return _Chain_Immutable_head( the_chain )->next;
40007c90: c2 07 00 00 ld [ %i4 ], %g1
while ( next != tail && !( *order )( left, next ) ) {
40007c94: 80 a1 00 01 cmp %g4, %g1
40007c98: 02 80 00 18 be 40007cf8 <_Scheduler_simple_Yield+0x8c>
40007c9c: b6 10 a0 01 or %g2, 1, %i3
40007ca0: c4 00 60 38 ld [ %g1 + 0x38 ], %g2
40007ca4: c6 00 a0 18 ld [ %g2 + 0x18 ], %g3
40007ca8: 80 a0 e0 00 cmp %g3, 0
40007cac: 12 80 00 12 bne 40007cf4 <_Scheduler_simple_Yield+0x88>
40007cb0: ba 10 20 00 clr %i5
40007cb4: c4 00 a0 1c ld [ %g2 + 0x1c ], %g2
40007cb8: 80 a0 80 1b cmp %g2, %i3
40007cbc: 3a 80 00 0f bcc,a 40007cf8 <_Scheduler_simple_Yield+0x8c>
40007cc0: 88 10 00 01 mov %g1, %g4
next = _Chain_Next( next );
40007cc4: c2 00 40 00 ld [ %g1 ], %g1
while ( next != tail && !( *order )( left, next ) ) {
40007cc8: 80 a1 00 01 cmp %g4, %g1
40007ccc: 22 80 00 0c be,a 40007cfc <_Scheduler_simple_Yield+0x90>
<== NEVER TAKEN
40007cd0: c2 01 20 04 ld [ %g4 + 4 ], %g1
<== NOT EXECUTED
40007cd4: c4 00 60 38 ld [ %g1 + 0x38 ], %g2
40007cd8: c6 00 a0 18 ld [ %g2 + 0x18 ], %g3
40007cdc: 80 a7 40 03 cmp %i5, %g3
40007ce0: 12 80 00 05 bne 40007cf4 <_Scheduler_simple_Yield+0x88>
40007ce4: c4 00 a0 1c ld [ %g2 + 0x1c ], %g2
40007ce8: 80 a6 c0 02 cmp %i3, %g2
40007cec: 38 bf ff f7 bgu,a 40007cc8 <_Scheduler_simple_Yield+0x5c>
40007cf0: c2 00 40 00 ld [ %g1 ], %g1
40007cf4: 88 10 00 01 mov %g1, %g4
_Chain_Insert_unprotected( _Chain_Previous( next ), to_insert );
40007cf8: c2 01 20 04 ld [ %g4 + 4 ], %g1
the_node->previous = after_node;
40007cfc: c2 26 60 04 st %g1, [ %i1 + 4 ]
before_node = after_node->next;
40007d00: c4 00 40 00 ld [ %g1 ], %g2
after_node->next = the_node;
40007d04: f2 20 40 00 st %i1, [ %g1 ]
the_node->next = before_node;
40007d08: c4 26 40 00 st %g2, [ %i1 ]
before_node->previous = the_node;
40007d0c: f2 20 a0 04 st %i1, [ %g2 + 4 ]
return _Chain_Immutable_head( the_chain )->next;
40007d10: f8 07 00 00 ld [ %i4 ], %i4
Thread_Control *heir = _Thread_Heir;
40007d14: fa 01 a0 24 ld [ %g6 + 0x24 ], %i5
if ( heir != new_heir && ( heir->is_preemptible || force_dispatch ) ) {
40007d18: 80 a7 00 1d cmp %i4, %i5
40007d1c: 02 80 00 06 be 40007d34 <_Scheduler_simple_Yield+0xc8>
40007d20: b6 10 00 06 mov %g6, %i3
40007d24: c2 0f 60 89 ldub [ %i5 + 0x89 ], %g1
40007d28: 80 a0 60 00 cmp %g1, 0
40007d2c: 12 80 00 04 bne 40007d3c <_Scheduler_simple_Yield+0xd0>
40007d30: 01 00 00 00 nop
insert_priority = SCHEDULER_PRIORITY_APPEND( insert_priority );
_Scheduler_simple_Insert( &context->Ready, the_thread, insert_priority );
_Scheduler_simple_Schedule_body( scheduler, the_thread, false );
}
40007d34: 81 c7 e0 08 ret
40007d38: 81 e8 00 00 restore
40007d3c: 40 00 0e 3f call 4000b638 <_Timecounter_Sbinuptime>
<== NOT EXECUTED
40007d40: f0 19 a0 28 ldd [ %g6 + 0x28 ], %i0
<== NOT EXECUTED
40007d44: d0 3e e0 28 std %o0, [ %i3 + 0x28 ]
<== NOT EXECUTED
*_result = *_end - *_start;
40007d48: b6 a2 40 19 subcc %o1, %i1, %i3
<== NOT EXECUTED
40007d4c: b4 62 00 18 subx %o0, %i0, %i2
<== NOT EXECUTED
*_time += *_add;
40007d50: f0 1f 60 98 ldd [ %i5 + 0x98 ], %i0
<== NOT EXECUTED
40007d54: 86 86 40 1b addcc %i1, %i3, %g3
<== NOT EXECUTED
40007d58: 84 46 00 1a addx %i0, %i2, %g2
<== NOT EXECUTED
40007d5c: c4 3f 60 98 std %g2, [ %i5 + 0x98 ]
<== NOT EXECUTED
_Thread_Dispatch_necessary = true;
40007d60: 84 10 20 01 mov 1, %g2
<== NOT EXECUTED
_Thread_Heir = new_heir;
40007d64: f8 21 a0 24 st %i4, [ %g6 + 0x24 ]
<== NOT EXECUTED
_Thread_Dispatch_necessary = true;
40007d68: c4 29 a0 1c stb %g2, [ %g6 + 0x1c ]
<== NOT EXECUTED
40007d6c: 81 c7 e0 08 ret
<== NOT EXECUTED
40007d70: 81 e8 00 00 restore
<== NOT EXECUTED
40010ae4 <_Semaphore_Post>:
_Sem_Queue_release( sem, level, &queue_context );
return eno;
}
void _Semaphore_Post( struct _Semaphore_Control *_sem )
{
40010ae4: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40010ae8: 91 d0 20 09 ta 9
<== NOT EXECUTED
sem = _Sem_Get( _sem );
_Thread_queue_Context_initialize( &queue_context );
_Thread_queue_Context_ISR_disable( &queue_context, level );
_Sem_Queue_acquire_critical( sem, &queue_context );
heads = sem->Queue.Queue.heads;
40010aec: d0 06 20 08 ld [ %i0 + 8 ], %o0
if ( RTEMS_PREDICT_TRUE( heads == NULL ) ) {
40010af0: 80 a2 20 00 cmp %o0, 0
40010af4: 32 80 00 09 bne,a 40010b18 <_Semaphore_Post+0x34>
40010af8: c2 27 bf dc st %g1, [ %fp + -36 ]
++sem->count;
40010afc: c4 06 20 14 ld [ %i0 + 0x14 ], %g2
<== NOT EXECUTED
40010b00: 84 00 a0 01 inc %g2
<== NOT EXECUTED
40010b04: c4 26 20 14 st %g2, [ %i0 + 0x14 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40010b08: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40010b0c: 01 00 00 00 nop
40010b10: 81 c7 e0 08 ret
40010b14: 81 e8 00 00 restore
const Thread_queue_Operations *operations;
Thread_Control *first;
_Thread_queue_Context_set_ISR_level( &queue_context, level );
operations = SEMAPHORE_TQ_OPERATIONS;
first = ( *operations->first )( heads );
40010b18: 3b 10 01 4d sethi %hi(0x40053400), %i5
40010b1c: ba 17 63 70 or %i5, 0x370, %i5 ! 40053770 <_Thread_queue_Operations_priority>
40010b20: c2 07 60 10 ld [ %i5 + 0x10 ], %g1
40010b24: 9f c0 40 00 call %g1
40010b28: 01 00 00 00 nop
_Thread_queue_Extract_critical(
40010b2c: 96 07 bf dc add %fp, -36, %o3
40010b30: 94 10 00 08 mov %o0, %o2
40010b34: 92 10 00 1d mov %i5, %o1
40010b38: 7f ff f7 7e call 4000e930 <_Thread_queue_Extract_critical>
40010b3c: 90 06 20 08 add %i0, 8, %o0
operations,
first,
&queue_context
);
}
}
40010b40: 81 c7 e0 08 ret
<== NOT EXECUTED
40010b44: 81 e8 00 00 restore
4000ddf0 <_Semaphore_Post_binary>:
);
}
}
void _Semaphore_Post_binary( struct _Semaphore_Control *_sem )
{
4000ddf0: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000ddf4: 91 d0 20 09 ta 9
<== NOT EXECUTED
sem = _Sem_Get( _sem );
_Thread_queue_Context_initialize( &queue_context );
_Thread_queue_Context_ISR_disable( &queue_context, level );
_Sem_Queue_acquire_critical( sem, &queue_context );
heads = sem->Queue.Queue.heads;
4000ddf8: d0 06 20 08 ld [ %i0 + 8 ], %o0
if ( RTEMS_PREDICT_TRUE( heads == NULL ) ) {
4000ddfc: 80 a2 20 00 cmp %o0, 0
4000de00: 12 80 00 07 bne 4000de1c <_Semaphore_Post_binary+0x2c>
4000de04: 84 10 20 01 mov 1, %g2
sem->count = 1;
4000de08: c4 26 20 14 st %g2, [ %i0 + 0x14 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000de0c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000de10: 01 00 00 00 nop
4000de14: 81 c7 e0 08 ret
4000de18: 81 e8 00 00 restore
4000de1c: c2 27 bf dc st %g1, [ %fp + -36 ]
const Thread_queue_Operations *operations;
Thread_Control *first;
_Thread_queue_Context_set_ISR_level( &queue_context, level );
operations = SEMAPHORE_TQ_OPERATIONS;
first = ( *operations->first )( heads );
4000de20: 3b 10 00 4d sethi %hi(0x40013400), %i5
4000de24: ba 17 63 60 or %i5, 0x360, %i5 ! 40013760 <_Thread_queue_Operations_priority>
4000de28: c2 07 60 10 ld [ %i5 + 0x10 ], %g1
4000de2c: 9f c0 40 00 call %g1
4000de30: 01 00 00 00 nop
_Thread_queue_Extract_critical(
4000de34: 96 07 bf dc add %fp, -36, %o3
4000de38: 94 10 00 08 mov %o0, %o2
4000de3c: 92 10 00 1d mov %i5, %o1
4000de40: 7f ff f7 4d call 4000bb74 <_Thread_queue_Extract_critical>
4000de44: 90 06 20 08 add %i0, 8, %o0
operations,
first,
&queue_context
);
}
}
4000de48: 81 c7 e0 08 ret
4000de4c: 81 e8 00 00 restore
4000ddac <_Semaphore_Try_wait>:
int _Semaphore_Try_wait( struct _Semaphore_Control *_sem )
{
4000ddac: 86 10 00 08 mov %o0, %g3
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000ddb0: 91 d0 20 09 ta 9
<== NOT EXECUTED
sem = _Sem_Get( _sem );
_Thread_queue_Context_initialize( &queue_context );
_Thread_queue_Context_ISR_disable( &queue_context, level );
_Sem_Queue_acquire_critical( sem, &queue_context );
count = sem->count;
4000ddb4: c4 02 20 14 ld [ %o0 + 0x14 ], %g2
if ( RTEMS_PREDICT_TRUE( count > 0 ) ) {
4000ddb8: 80 a0 a0 00 cmp %g2, 0
4000ddbc: 02 80 00 08 be 4000dddc <_Semaphore_Try_wait+0x30>
4000ddc0: 84 00 bf ff add %g2, -1, %g2
sem->count = count - 1;
eno = 0;
4000ddc4: 90 10 20 00 clr %o0
<== NOT EXECUTED
sem->count = count - 1;
4000ddc8: c4 20 e0 14 st %g2, [ %g3 + 0x14 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000ddcc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000ddd0: 01 00 00 00 nop
eno = EAGAIN;
}
_Sem_Queue_release( sem, level, &queue_context );
return eno;
}
4000ddd4: 81 c3 e0 08 retl
4000ddd8: 01 00 00 00 nop
eno = EAGAIN;
4000dddc: 90 10 20 0b mov 0xb, %o0 ! b <_TLS_Alignment+0xa>
<== NOT EXECUTED
4000dde0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000dde4: 01 00 00 00 nop
}
4000dde8: 81 c3 e0 08 retl
4000ddec: 01 00 00 00 nop
4000dcc0 <_Semaphore_Wait>:
sizeof( Sem_Control ) == sizeof( struct _Semaphore_Control ),
SEMAPHORE_CONTROL_SIZE
);
void _Semaphore_Wait( struct _Semaphore_Control *_sem )
{
4000dcc0: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000dcc4: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000dcc8: 86 10 00 01 mov %g1, %g3
sem = _Sem_Get( _sem );
_Thread_queue_Context_initialize( &queue_context );
_Thread_queue_Context_ISR_disable( &queue_context, level );
executing = _Sem_Queue_acquire_critical( sem, &queue_context );
count = sem->count;
4000dccc: c4 06 20 14 ld [ %i0 + 0x14 ], %g2
if ( RTEMS_PREDICT_TRUE( count > 0 ) ) {
4000dcd0: 80 a0 a0 00 cmp %g2, 0
4000dcd4: 02 80 00 07 be 4000dcf0 <_Semaphore_Wait+0x30>
4000dcd8: 84 00 bf ff add %g2, -1, %g2
sem->count = count - 1;
4000dcdc: c4 26 20 14 st %g2, [ %i0 + 0x14 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000dce0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000dce4: 01 00 00 00 nop
4000dce8: 81 c7 e0 08 ret
4000dcec: 81 e8 00 00 restore
queue_context->thread_state = thread_state;
4000dcf0: 82 10 20 02 mov 2, %g1
Thread_queue_Context *queue_context
)
{
Thread_Control *executing;
executing = _Thread_Executing;
4000dcf4: d4 01 a0 20 ld [ %g6 + 0x20 ], %o2
4000dcf8: c2 27 bf e0 st %g1, [ %fp + -32 ]
queue_context->enqueue_callout = _Thread_queue_Enqueue_do_nothing_extra;
4000dcfc: 03 10 00 2e sethi %hi(0x4000b800), %g1
4000dd00: 82 10 61 84 or %g1, 0x184, %g1 ! 4000b984 <_Thread_queue_Enqueue_do_nothing_extra>
&queue_context,
STATES_WAITING_FOR_SEMAPHORE
);
_Thread_queue_Context_set_enqueue_do_nothing_extra( &queue_context );
_Thread_queue_Context_set_ISR_level( &queue_context, level );
_Thread_queue_Enqueue(
4000dd04: 96 07 bf dc add %fp, -36, %o3
4000dd08: c2 27 bf e4 st %g1, [ %fp + -28 ]
4000dd0c: 13 10 00 4d sethi %hi(0x40013400), %o1
4000dd10: c6 27 bf dc st %g3, [ %fp + -36 ]
4000dd14: 92 12 63 60 or %o1, 0x360, %o1
4000dd18: 7f ff f7 21 call 4000b99c <_Thread_queue_Enqueue>
4000dd1c: 90 06 20 08 add %i0, 8, %o0
SEMAPHORE_TQ_OPERATIONS,
executing,
&queue_context
);
}
}
4000dd20: 81 c7 e0 08 ret
<== NOT EXECUTED
4000dd24: 81 e8 00 00 restore
4000dd28 <_Semaphore_Wait_timed_ticks>:
int _Semaphore_Wait_timed_ticks( struct _Semaphore_Control *_sem, uint32_t ticks )
{
4000dd28: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000dd2c: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000dd30: 86 10 00 01 mov %g1, %g3
sem = _Sem_Get( _sem );
_Thread_queue_Context_initialize( &queue_context );
_Thread_queue_Context_ISR_disable( &queue_context, level );
executing = _Sem_Queue_acquire_critical( sem, &queue_context );
count = sem->count;
4000dd34: c4 06 20 14 ld [ %i0 + 0x14 ], %g2
if ( RTEMS_PREDICT_TRUE( count > 0 ) ) {
4000dd38: 80 a0 a0 00 cmp %g2, 0
4000dd3c: 02 80 00 07 be 4000dd58 <_Semaphore_Wait_timed_ticks+0x30>
4000dd40: 84 00 bf ff add %g2, -1, %g2
sem->count = count - 1;
4000dd44: c4 26 20 14 st %g2, [ %i0 + 0x14 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000dd48: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000dd4c: 01 00 00 00 nop
_Sem_Queue_release( sem, level, &queue_context );
return 0;
4000dd50: 81 c7 e0 08 ret
4000dd54: 91 e8 20 00 restore %g0, 0, %o0
queue_context->thread_state = thread_state;
4000dd58: 82 10 20 02 mov 2, %g1
4000dd5c: fa 01 a0 20 ld [ %g6 + 0x20 ], %i5
4000dd60: c2 27 bf e0 st %g1, [ %fp + -32 ]
queue_context->enqueue_callout = _Thread_queue_Add_timeout_ticks;
4000dd64: 03 10 00 42 sethi %hi(0x40010800), %g1
4000dd68: 82 10 62 a4 or %g1, 0x2a4, %g1 ! 40010aa4 <_Thread_queue_Add_timeout_ticks>
&queue_context,
STATES_WAITING_FOR_SEMAPHORE
);
_Thread_queue_Context_set_enqueue_timeout_ticks( &queue_context, ticks );
_Thread_queue_Context_set_ISR_level( &queue_context, level );
_Thread_queue_Enqueue(
4000dd6c: 90 06 20 08 add %i0, 8, %o0
4000dd70: c2 27 bf e4 st %g1, [ %fp + -28 ]
4000dd74: 96 07 bf dc add %fp, -36, %o3
queue_context->Timeout.ticks = ticks;
4000dd78: f2 27 bf e8 st %i1, [ %fp + -24 ]
4000dd7c: 94 10 00 1d mov %i5, %o2
4000dd80: c6 27 bf dc st %g3, [ %fp + -36 ]
4000dd84: 13 10 00 4d sethi %hi(0x40013400), %o1
4000dd88: 7f ff f7 05 call 4000b99c <_Thread_queue_Enqueue>
4000dd8c: 92 12 63 60 or %o1, 0x360, %o1 ! 40013760 <_Thread_queue_Operations_priority>
&sem->Queue.Queue,
SEMAPHORE_TQ_OPERATIONS,
executing,
&queue_context
);
return STATUS_GET_POSIX( _Thread_Wait_get_status( executing ) );
4000dd90: c2 07 60 4c ld [ %i5 + 0x4c ], %g1
<== NOT EXECUTED
4000dd94: b1 38 60 1f sra %g1, 0x1f, %i0
<== NOT EXECUTED
4000dd98: b0 0e 20 ff and %i0, 0xff, %i0
<== NOT EXECUTED
4000dd9c: b0 06 00 01 add %i0, %g1, %i0
<== NOT EXECUTED
4000dda0: b1 3e 20 08 sra %i0, 8, %i0
<== NOT EXECUTED
}
}
4000dda4: 81 c7 e0 08 ret
<== NOT EXECUTED
4000dda8: 81 e8 00 00 restore
4000836c <_Stack_Free>:
#include <rtems/score/stackimpl.h>
#include <rtems/config.h>
void _Stack_Free( void *stack_area )
{
4000836c: 9d e3 bf a0 save %sp, -96, %sp
<== NOT EXECUTED
( *rtems_configuration_get_stack_free_hook() )( stack_area );
40008370: 03 10 00 5d sethi %hi(0x40017400), %g1
<== NOT EXECUTED
40008374: c2 00 63 34 ld [ %g1 + 0x334 ], %g1 ! 40017734 <_Stack_Allocator_free>
<== NOT EXECUTED
40008378: 9f c0 40 00 call %g1
<== NOT EXECUTED
4000837c: 90 10 00 18 mov %i0, %o0
<== NOT EXECUTED
}
40008380: 81 c7 e0 08 ret
40008384: 81 e8 00 00 restore
4000af78 <_TLS_Get_allocation_size>:
/*
* We must be careful with using _TLS_Size here since this could lead GCC to
* assume that this symbol is not 0 and the tests for 0 will be optimized
* away.
*/
size = (uintptr_t) _TLS_Size;
4000af78: 11 00 00 00 sethi %hi(0), %o0
4000af7c: 90 12 20 00 mov %o0, %o0 ! 0 <PROM_START>
uintptr_t allocation_size;
uintptr_t alignment;
size = _TLS_Get_size();
if ( size == 0 ) {
4000af80: 80 a2 20 00 cmp %o0, 0
4000af84: 02 80 00 16 be 4000afdc <_TLS_Get_allocation_size+0x64>
4000af88: 05 10 00 6f sethi %hi(0x4001bc00), %g2
return 0;
}
allocation_size = _TLS_Allocation_size;
4000af8c: c2 00 a1 9c ld [ %g2 + 0x19c ], %g1 ! 4001bd9c <_TLS_Allocation_size>
if ( allocation_size == 0 ) {
4000af90: 80 a0 60 00 cmp %g1, 0
4000af94: 32 80 00 12 bne,a 4000afdc <_TLS_Get_allocation_size+0x64>
4000af98: 90 10 00 01 mov %g1, %o0
*/
static inline uintptr_t _TLS_Heap_align_up( uintptr_t val )
{
uintptr_t msk = CPU_HEAP_ALIGNMENT - 1;
return (val + msk) & ~msk;
4000af9c: 90 02 20 07 add %o0, 7, %o0
4000afa0: 03 00 00 00 sethi %hi(0), %g1
4000afa4: 82 10 60 01 or %g1, 1, %g1 ! 1 <_TLS_Alignment>
4000afa8: 82 00 60 07 add %g1, 7, %g1
4000afac: 82 08 7f f8 and %g1, -8, %g1
/*
* The stack allocator does not support aligned allocations. Allocate
* enough to do the alignment manually.
*/
if ( alignment > CPU_HEAP_ALIGNMENT ) {
4000afb0: 80 a0 60 08 cmp %g1, 8
4000afb4: 08 80 00 04 bleu 4000afc4 <_TLS_Get_allocation_size+0x4c>
4000afb8: 86 0a 3f f8 and %o0, -8, %g3
allocation_size += alignment;
4000afbc: 86 00 c0 01 add %g3, %g1, %g3
static inline uintptr_t _TLS_Get_thread_control_block_area_size(
uintptr_t alignment
)
{
return alignment <= sizeof(TLS_Thread_control_block) ?
sizeof(TLS_Thread_control_block) : alignment;
4000afc0: 80 a0 60 08 cmp %g1, 8
4000afc4: 2a 80 00 08 bcs,a 4000afe4 <_TLS_Get_allocation_size+0x6c>
<== NEVER TAKEN
4000afc8: 82 10 20 08 mov 8, %g1
<== NOT EXECUTED
}
allocation_size += _TLS_Get_thread_control_block_area_size( alignment );
#ifndef __i386__
allocation_size += sizeof(TLS_Dynamic_thread_vector);
4000afcc: 90 00 60 08 add %g1, 8, %o0
4000afd0: 90 02 00 03 add %o0, %g3, %o0
#endif
_TLS_Allocation_size = allocation_size;
4000afd4: 81 c3 e0 08 retl
4000afd8: d0 20 a1 9c st %o0, [ %g2 + 0x19c ]
}
return allocation_size;
}
4000afdc: 81 c3 e0 08 retl
4000afe0: 01 00 00 00 nop
allocation_size += sizeof(TLS_Dynamic_thread_vector);
4000afe4: 90 00 60 08 add %g1, 8, %o0
<== NOT EXECUTED
4000afe8: 90 02 00 03 add %o0, %g3, %o0
<== NOT EXECUTED
_TLS_Allocation_size = allocation_size;
4000afec: 81 c3 e0 08 retl
<== NOT EXECUTED
4000aff0: d0 20 a1 9c st %o0, [ %g2 + 0x19c ]
<== NOT EXECUTED
40008a58 <_TOD_Adjust>:
#include <rtems/score/todimpl.h>
void _TOD_Adjust(
const struct timespec *delta
)
{
40008a58: 9d e3 bf 88 save %sp, -120, %sp
* enhancement would be to adjust the time in smaller increments
* at each clock tick. Until then, there is no outstanding
* adjustment.
*/
_TOD_Lock();
40008a5c: 40 00 16 5d call 4000e3d0 <_TOD_Lock>
40008a60: 01 00 00 00 nop
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40008a64: 91 d0 20 09 ta 9
<== NOT EXECUTED
_Timecounter_Acquire( lock_context );
40008a68: c2 27 bf ec st %g1, [ %fp + -20 ]
_Timecounter_Nanotime( tod );
40008a6c: 40 00 06 65 call 4000a400 <_Timecounter_Nanotime>
40008a70: 90 07 bf f0 add %fp, -16, %o0
_TOD_Acquire( &lock_context );
_TOD_Get( &tod );
_Timespec_Add_to( &tod, delta );
40008a74: 92 10 00 18 mov %i0, %o1
40008a78: 40 00 16 1b call 4000e2e4 <_Timespec_Add_to>
40008a7c: 90 07 bf f0 add %fp, -16, %o0
_TOD_Set( &tod, &lock_context );
40008a80: 92 07 bf ec add %fp, -20, %o1
40008a84: 40 00 16 5d call 4000e3f8 <_TOD_Set>
40008a88: 90 07 bf f0 add %fp, -16, %o0
_TOD_Unlock();
40008a8c: 40 00 16 56 call 4000e3e4 <_TOD_Unlock>
40008a90: 01 00 00 00 nop
}
40008a94: 81 c7 e0 08 ret
40008a98: 81 e8 00 00 restore
4000a668 <_TOD_Set>:
bool _TOD_Set(
const struct timespec *tod,
ISR_lock_Context *lock_context
)
{
4000a668: 9d e3 bf 88 save %sp, -120, %sp
uint32_t cpu_index;
bool retval;
_Assert( _TOD_Is_owner() );
retval = _TOD_Hook_Run( TOD_ACTION_SET_CLOCK, tod );
4000a66c: 90 10 20 00 clr %o0
4000a670: 92 10 00 18 mov %i0, %o1
4000a674: 40 00 00 5b call 4000a7e0 <_TOD_Hook_Run>
4000a678: ba 10 00 18 mov %i0, %i5
if ( retval == false ) {
4000a67c: b0 92 20 00 orcc %o0, 0, %i0
4000a680: 32 80 00 07 bne,a 4000a69c <_TOD_Set+0x34>
4000a684: c4 07 60 08 ld [ %i5 + 8 ], %g2
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000a688: c2 06 40 00 ld [ %i1 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000a68c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000a690: 01 00 00 00 nop
_TOD_Release( lock_context );
return false;
4000a694: 81 c7 e0 08 ret
4000a698: 81 e8 00 00 restore
_bt->frac = _ts->tv_nsec * (uint64_t)18446744073LL;
4000a69c: 89 28 a0 02 sll %g2, 2, %g4
_bt->sec = _ts->tv_sec;
4000a6a0: f4 1f 40 00 ldd [ %i5 ], %i2
_bt->frac = _ts->tv_nsec * (uint64_t)18446744073LL;
4000a6a4: 83 38 a0 1f sra %g2, 0x1f, %g1
4000a6a8: 07 12 e0 be sethi %hi(0x4b82f800), %g3
4000a6ac: 86 10 e2 09 or %g3, 0x209, %g3 ! 4b82fa09 <RAM_END+0xb42fa09>
4000a6b0: 82 58 40 03 smul %g1, %g3, %g1
4000a6b4: 86 50 80 03 umul %g2, %g3, %g3
4000a6b8: 85 40 00 00 rd %y, %g2
4000a6bc: 82 00 40 04 add %g1, %g4, %g1
4000a6c0: 84 00 40 02 add %g1, %g2, %g2
_bt->sec = _ts->tv_sec;
4000a6c4: f4 3f bf f0 std %i2, [ %fp + -16 ]
}
timespec2bintime( tod, &tod_as_bintime );
_Timecounter_Set_clock( &tod_as_bintime, lock_context );
4000a6c8: 92 10 00 19 mov %i1, %o1
_bt->frac = _ts->tv_nsec * (uint64_t)18446744073LL;
4000a6cc: c4 3f bf f8 std %g2, [ %fp + -8 ]
4000a6d0: 40 00 07 70 call 4000c490 <_Timecounter_Set_clock>
4000a6d4: 90 07 bf f0 add %fp, -16, %o0
ticks = (uint64_t) ts->tv_sec;
4000a6d8: c6 07 40 00 ld [ %i5 ], %g3
<== NOT EXECUTED
4000a6dc: c4 07 60 04 ld [ %i5 + 4 ], %g2
<== NOT EXECUTED
ticks |= (uint32_t) ts->tv_nsec;
4000a6e0: d6 07 60 08 ld [ %i5 + 8 ], %o3
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000a6e4: 91 d0 20 09 ta 9
<== NOT EXECUTED
Watchdog_Control *first;
cpu = _Per_CPU_Get_by_index( cpu_index );
header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_REALTIME ];
_ISR_lock_ISR_disable_and_acquire( &cpu->Watchdog.Lock, &lock_context );
4000a6e8: c2 27 bf ec st %g1, [ %fp + -20 ]
first = _Watchdog_Header_first( header );
4000a6ec: 11 10 00 5d sethi %hi(0x40017400), %o0
4000a6f0: 90 12 23 c0 or %o0, 0x3c0, %o0 ! 400177c0 <_Per_CPU_Information>
4000a6f4: d2 02 20 44 ld [ %o0 + 0x44 ], %o1
if ( first != NULL ) {
4000a6f8: 80 a2 60 00 cmp %o1, 0
4000a6fc: 02 80 00 09 be 4000a720 <_TOD_Set+0xb8>
4000a700: 95 30 a0 02 srl %g2, 2, %o2
ticks <<= WATCHDOG_BITS_FOR_1E9_NANOSECONDS;
4000a704: 87 28 e0 1e sll %g3, 0x1e, %g3
4000a708: 85 28 a0 1e sll %g2, 0x1e, %g2
_Watchdog_Tickle(
4000a70c: 98 07 bf ec add %fp, -20, %o4
4000a710: 94 12 80 03 or %o2, %g3, %o2
4000a714: 96 12 c0 02 or %o3, %g2, %o3
4000a718: 40 00 00 6a call 4000a8c0 <_Watchdog_Do_tickle>
4000a71c: 90 02 20 40 add %o0, 0x40, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000a720: c2 07 bf ec ld [ %fp + -20 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000a724: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000a728: 01 00 00 00 nop
}
_ISR_lock_Release_and_ISR_enable( &cpu->Watchdog.Lock, &lock_context );
}
_TOD.is_set = true;
4000a72c: 03 10 00 5e sethi %hi(0x40017800), %g1
4000a730: 84 10 20 01 mov 1, %g2
4000a734: c4 28 60 1c stb %g2, [ %g1 + 0x1c ]
return true;
}
4000a738: 81 c7 e0 08 ret
4000a73c: 81 e8 00 00 restore
40009898 <_Terminate>:
void _Terminate(
Internal_errors_Source the_source,
Internal_errors_t the_error
)
{
40009898: 9d e3 bf 98 save %sp, -104, %sp
_User_extensions_Iterate(
4000989c: 94 10 20 00 clr %o2
400098a0: 90 07 bf f8 add %fp, -8, %o0
User_extensions_Fatal_context ctx = { source, error };
400098a4: f0 27 bf f8 st %i0, [ %fp + -8 ]
_User_extensions_Iterate(
400098a8: 13 10 00 25 sethi %hi(0x40009400), %o1
User_extensions_Fatal_context ctx = { source, error };
400098ac: f2 27 bf fc st %i1, [ %fp + -4 ]
_User_extensions_Iterate(
400098b0: 7f ff ff 7a call 40009698 <_User_extensions_Iterate>
400098b4: 92 12 62 48 or %o1, 0x248, %o1
_User_extensions_Fatal( the_source, the_error );
_Internal_errors_What_happened.the_source = the_source;
400098b8: 03 10 00 7a sethi %hi(0x4001e800), %g1
400098bc: 84 10 63 9c or %g1, 0x39c, %g2 ! 4001eb9c <_Internal_errors_What_happened>
400098c0: f0 20 63 9c st %i0, [ %g1 + 0x39c ]
_System_state_Current = state;
400098c4: 03 10 00 7a sethi %hi(0x4001e800), %g1
_Internal_errors_What_happened.the_error = the_error;
400098c8: f2 20 a0 04 st %i1, [ %g2 + 4 ]
400098cc: 84 10 20 03 mov 3, %g2
_System_state_Set( SYSTEM_STATE_TERMINATED );
_SMP_Request_shutdown();
_CPU_Fatal_halt( the_source, the_error );
400098d0: 92 10 00 19 mov %i1, %o1
400098d4: 90 10 00 18 mov %i0, %o0
400098d8: 40 00 16 05 call 4000f0ec <_CPU_Fatal_halt>
400098dc: c4 20 63 a4 st %g2, [ %g1 + 0x3a4 ]
400098e0: 01 00 00 00 nop
<== NOT EXECUTED
4000a41c <_Thread_Allocate_unlimited>:
}
}
}
Objects_Control *_Thread_Allocate_unlimited( Objects_Information *information )
{
4000a41c: 9d e3 bf a0 save %sp, -96, %sp
return _Chain_Immutable_head( the_chain )->next;
4000a420: f8 06 20 18 ld [ %i0 + 0x18 ], %i4
return &the_chain->Tail.Node;
4000a424: 82 06 20 1c add %i0, 0x1c, %g1
4000a428: ba 10 00 18 mov %i0, %i5
if ( !_Chain_Is_empty(the_chain))
4000a42c: 80 a7 00 01 cmp %i4, %g1
4000a430: 12 80 00 36 bne 4000a508 <_Thread_Allocate_unlimited+0xec>
4000a434: b4 06 20 18 add %i0, 0x18, %i2
block = _Objects_Extend_information( &information->Objects );
4000a438: 7f ff fc ec call 400097e8 <_Objects_Extend_information>
4000a43c: 90 10 00 18 mov %i0, %o0
if ( block > 0 ) {
4000a440: 91 2a 20 10 sll %o0, 0x10, %o0
4000a444: b7 32 20 10 srl %o0, 0x10, %i3
4000a448: 80 a6 e0 00 cmp %i3, 0
4000a44c: 32 80 00 22 bne,a 4000a4d4 <_Thread_Allocate_unlimited+0xb8>
<== ALWAYS TAKEN
4000a450: d4 16 20 12 lduh [ %i0 + 0x12 ], %o2
return _Chain_Immutable_head( the_chain )->next;
4000a454: f0 07 60 18 ld [ %i5 + 0x18 ], %i0
<== NOT EXECUTED
if ( !_Chain_Is_empty(the_chain))
4000a458: 80 a7 00 18 cmp %i4, %i0
4000a45c: 02 80 00 30 be 4000a51c <_Thread_Allocate_unlimited+0x100>
4000a460: 01 00 00 00 nop
new_first = old_first->next;
4000a464: c2 06 00 00 ld [ %i0 ], %g1
head->next = new_first;
4000a468: c2 27 60 18 st %g1, [ %i5 + 0x18 ]
new_first->previous = head;
4000a46c: f4 20 60 04 st %i2, [ %g1 + 4 ]
4000a470: c2 06 20 08 ld [ %i0 + 8 ], %g1
_Assert( _Objects_Is_auto_extend( information ) );
objects_per_block = information->objects_per_block;
block = _Objects_Get_index( the_object->id ) - OBJECTS_INDEX_MINIMUM;
if ( block > objects_per_block ) {
4000a474: c4 17 60 12 lduh [ %i5 + 0x12 ], %g2
block = _Objects_Get_index( the_object->id ) - OBJECTS_INDEX_MINIMUM;
4000a478: 82 00 7f ff add %g1, -1, %g1
if ( block > objects_per_block ) {
4000a47c: 83 28 60 10 sll %g1, 0x10, %g1
4000a480: 83 30 60 10 srl %g1, 0x10, %g1
4000a484: 80 a0 80 01 cmp %g2, %g1
4000a488: 1a 80 00 11 bcc 4000a4cc <_Thread_Allocate_unlimited+0xb0>
4000a48c: 01 00 00 00 nop
block /= objects_per_block;
information->inactive_per_block[ block ]--;
4000a490: c8 07 60 24 ld [ %i5 + 0x24 ], %g4
4000a494: 81 80 20 00 wr %g0, %y
4000a498: 01 00 00 00 nop
4000a49c: 01 00 00 00 nop
4000a4a0: 01 00 00 00 nop
4000a4a4: 86 70 40 02 udiv %g1, %g2, %g3
4000a4a8: 83 28 e0 01 sll %g3, 1, %g1
4000a4ac: c4 11 00 01 lduh [ %g4 + %g1 ], %g2
4000a4b0: 84 00 bf ff add %g2, -1, %g2
4000a4b4: c4 31 00 01 sth %g2, [ %g4 + %g1 ]
information->inactive--;
4000a4b8: c2 17 60 10 lduh [ %i5 + 0x10 ], %g1
4000a4bc: 82 00 7f ff add %g1, -1, %g1
4000a4c0: c2 37 60 10 sth %g1, [ %i5 + 0x10 ]
return _Objects_Allocate_with_extend(
4000a4c4: 81 c7 e0 08 ret
4000a4c8: 81 e8 00 00 restore
information,
_Thread_Extend_information
);
}
4000a4cc: 81 c7 e0 08 ret
4000a4d0: 81 e8 00 00 restore
new_heads = _Freechain_Extend(
4000a4d4: 96 10 20 48 mov 0x48, %o3
4000a4d8: 90 06 20 30 add %i0, 0x30, %o0
4000a4dc: 13 10 00 31 sethi %hi(0x4000c400), %o1
4000a4e0: 40 00 29 d4 call 40014c30 <_Freechain_Extend>
4000a4e4: 92 12 61 cc or %o1, 0x1cc, %o1 ! 4000c5cc <_Workspace_Allocate>
if ( new_heads == NULL ) {
4000a4e8: 80 a2 20 00 cmp %o0, 0
4000a4ec: 32 bf ff db bne,a 4000a458 <_Thread_Allocate_unlimited+0x3c>
<== ALWAYS TAKEN
4000a4f0: f0 07 60 18 ld [ %i5 + 0x18 ], %i0
_Objects_Free_objects_block( &information->Objects, block );
4000a4f4: 92 10 00 1b mov %i3, %o1
<== NOT EXECUTED
4000a4f8: 7f ff fd 8a call 40009b20 <_Objects_Free_objects_block>
<== NOT EXECUTED
4000a4fc: 90 10 00 18 mov %i0, %o0
<== NOT EXECUTED
return _Chain_Immutable_head( the_chain )->next;
4000a500: 10 bf ff d6 b 4000a458 <_Thread_Allocate_unlimited+0x3c>
<== NOT EXECUTED
4000a504: f0 07 60 18 ld [ %i5 + 0x18 ], %i0
<== NOT EXECUTED
new_first = old_first->next;
4000a508: c2 07 00 00 ld [ %i4 ], %g1
head->next = new_first;
4000a50c: c2 26 20 18 st %g1, [ %i0 + 0x18 ]
new_first->previous = head;
4000a510: b0 10 00 1c mov %i4, %i0
4000a514: 10 bf ff d7 b 4000a470 <_Thread_Allocate_unlimited+0x54>
4000a518: f4 20 60 04 st %i2, [ %g1 + 4 ]
return NULL;
4000a51c: 81 c7 e0 08 ret
<== NOT EXECUTED
4000a520: 91 e8 20 00 restore %g0, 0, %o0
<== NOT EXECUTED
4000abd0 <_Thread_Cancel>:
void _Thread_Cancel(
Thread_Control *the_thread,
Thread_Control *executing,
void *exit_value
)
{
4000abd0: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
4000abd4: ba 10 00 18 mov %i0, %i5
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000abd8: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000abdc: b8 10 00 01 mov %g1, %i4
previous = the_thread->Life.state;
4000abe0: c4 06 21 70 ld [ %i0 + 0x170 ], %g2
state |= set;
4000abe4: 86 10 a0 04 or %g2, 4, %g3
the_thread->Life.exit_value = exit_value;
4000abe8: f4 26 21 78 st %i2, [ %i0 + 0x178 ]
if (
4000abec: 80 88 a0 09 btst 9, %g2
4000abf0: 02 80 00 1e be 4000ac68 <_Thread_Cancel+0x98>
4000abf4: c6 26 21 70 st %g3, [ %i0 + 0x170 ]
disable_level = cpu_self->thread_dispatch_disable_level;
4000abf8: c4 01 a0 18 ld [ %g6 + 0x18 ], %g2
cpu_self->thread_dispatch_disable_level = disable_level + 1;
4000abfc: 84 00 a0 01 inc %g2
4000ac00: c4 21 a0 18 st %g2, [ %g6 + 0x18 ]
);
cpu_self = _Thread_Dispatch_disable_critical( &lock_context );
priority = _Thread_Get_priority( executing );
if ( _States_Is_dormant( the_thread->current_state ) ) {
4000ac04: c2 07 60 1c ld [ %i5 + 0x1c ], %g1
4000ac08: 80 a0 60 00 cmp %g1, 0
4000ac0c: 06 80 00 36 bl 4000ace4 <_Thread_Cancel+0x114>
4000ac10: b0 10 00 06 mov %g6, %i0
pending_requests = the_thread->Life.pending_life_change_requests;
4000ac14: c2 07 61 74 ld [ %i5 + 0x174 ], %g1
return _Priority_Get_priority( &scheduler_node->Wait.Priority );
4000ac18: c4 06 60 38 ld [ %i1 + 0x38 ], %g2
4000ac1c: f4 18 a0 18 ldd [ %g2 + 0x18 ], %i2
the_thread->Life.pending_life_change_requests = pending_requests + 1;
4000ac20: 84 00 60 01 add %g1, 1, %g2
if ( pending_requests == 0 ) {
4000ac24: 80 a0 60 00 cmp %g1, 0
4000ac28: 02 80 00 36 be 4000ad00 <_Thread_Cancel+0x130>
4000ac2c: c4 27 61 74 st %g2, [ %i5 + 0x174 ]
_Thread_State_release( the_thread, &lock_context );
_Thread_Finalize_life_change( the_thread, priority );
} else {
_Thread_Add_life_change_request( the_thread );
_Thread_Clear_state_locked( the_thread, STATES_SUSPENDED );
4000ac30: 13 00 00 20 sethi %hi(0x8000), %o1
<== NOT EXECUTED
4000ac34: 40 00 20 a2 call 40012ebc <_Thread_Clear_state_locked>
4000ac38: 90 10 00 1d mov %i5, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000ac3c: 82 10 00 1c mov %i4, %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000ac40: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000ac44: 01 00 00 00 nop
_Thread_State_release( the_thread, &lock_context );
_Thread_Raise_real_priority( the_thread, priority );
4000ac48: 90 10 00 1d mov %i5, %o0
4000ac4c: 92 10 00 1a mov %i2, %o1
4000ac50: 7f ff fe dc call 4000a7c0 <_Thread_Raise_real_priority>
4000ac54: 94 10 00 1b mov %i3, %o2
_Thread_Remove_life_change_request( the_thread );
4000ac58: 7f ff fe c5 call 4000a76c <_Thread_Remove_life_change_request>
4000ac5c: 90 10 00 1d mov %i5, %o0
}
_Thread_Dispatch_enable( cpu_self );
4000ac60: 7f ff fe 6e call 4000a618 <_Thread_Dispatch_enable>
4000ac64: 81 e8 00 00 restore
4000ac68: 7f ff fe fa call 4000a850 <_Thread_Change_life_locked.part.36>
4000ac6c: 90 10 00 18 mov %i0, %o0
disable_level = cpu_self->thread_dispatch_disable_level;
4000ac70: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
cpu_self->thread_dispatch_disable_level = disable_level + 1;
4000ac74: 82 00 60 01 inc %g1
4000ac78: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
4000ac7c: b0 10 00 06 mov %g6, %i0
4000ac80: c4 06 60 38 ld [ %i1 + 0x38 ], %g2
if ( _States_Is_dormant( the_thread->current_state ) ) {
4000ac84: c2 07 60 1c ld [ %i5 + 0x1c ], %g1
4000ac88: 80 a0 60 00 cmp %g1, 0
4000ac8c: 06 80 00 16 bl 4000ace4 <_Thread_Cancel+0x114>
4000ac90: f4 18 a0 18 ldd [ %g2 + 0x18 ], %i2
pending_requests = the_thread->Life.pending_life_change_requests;
4000ac94: c2 07 61 74 ld [ %i5 + 0x174 ], %g1
the_thread->Life.pending_life_change_requests = pending_requests + 1;
4000ac98: 84 00 60 01 add %g1, 1, %g2
if ( pending_requests == 0 ) {
4000ac9c: 80 a0 60 00 cmp %g1, 0
4000aca0: 12 80 00 05 bne 4000acb4 <_Thread_Cancel+0xe4>
4000aca4: c4 27 61 74 st %g2, [ %i5 + 0x174 ]
_Thread_Set_state_locked( the_thread, STATES_LIFE_IS_CHANGING );
4000aca8: 13 00 00 80 sethi %hi(0x20000), %o1
4000acac: 40 00 00 5e call 4000ae24 <_Thread_Set_state_locked>
4000acb0: 90 10 00 1d mov %i5, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000acb4: 82 10 00 1c mov %i4, %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000acb8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000acbc: 01 00 00 00 nop
_Thread_queue_Extract_with_proxy( the_thread );
4000acc0: 40 00 01 e1 call 4000b444 <_Thread_queue_Extract_with_proxy>
4000acc4: 90 10 00 1d mov %i5, %o0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000acc8: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000accc: c2 27 bf fc st %g1, [ %fp + -4 ]
4000acd0: d0 07 60 60 ld [ %i5 + 0x60 ], %o0
4000acd4: 40 00 04 b3 call 4000bfa0 <_Watchdog_Remove>
4000acd8: 92 07 60 68 add %i5, 0x68, %o1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000acdc: 10 bf ff d9 b 4000ac40 <_Thread_Cancel+0x70>
4000ace0: c2 07 bf fc ld [ %fp + -4 ], %g1
4000ace4: 82 10 00 1c mov %i4, %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000ace8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000acec: 01 00 00 00 nop
_Thread_Make_zombie( the_thread );
4000acf0: 7f ff fe f0 call 4000a8b0 <_Thread_Make_zombie>
4000acf4: 90 10 00 1d mov %i5, %o0
_Thread_Dispatch_enable( cpu_self );
4000acf8: 7f ff fe 48 call 4000a618 <_Thread_Dispatch_enable>
4000acfc: 81 e8 00 00 restore
_Thread_Set_state_locked( the_thread, STATES_LIFE_IS_CHANGING );
4000ad00: 13 00 00 80 sethi %hi(0x20000), %o1
4000ad04: 40 00 00 48 call 4000ae24 <_Thread_Set_state_locked>
4000ad08: 90 10 00 1d mov %i5, %o0
_Thread_Clear_state_locked( the_thread, STATES_SUSPENDED );
4000ad0c: 10 bf ff ca b 4000ac34 <_Thread_Cancel+0x64>
4000ad10: 13 00 00 20 sethi %hi(0x8000), %o1
40008268 <_Thread_Change_life>:
Thread_Life_state _Thread_Change_life(
Thread_Life_state clear,
Thread_Life_state set,
Thread_Life_state ignore
)
{
40008268: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000826c: 91 d0 20 09 ta 9
<== NOT EXECUTED
executing = _Thread_Executing;
40008270: d0 01 a0 20 ld [ %g6 + 0x20 ], %o0
previous = the_thread->Life.state;
40008274: fa 02 21 70 ld [ %o0 + 0x170 ], %i5
state &= ~clear;
40008278: 84 2f 40 18 andn %i5, %i0, %g2
state |= set;
4000827c: b2 16 40 02 or %i1, %g2, %i1
the_thread->Life.state = state;
40008280: f2 22 21 70 st %i1, [ %o0 + 0x170 ]
state &= ~ignore;
40008284: b2 2e 40 1a andn %i1, %i2, %i1
if (
40008288: 80 8e 60 09 btst 9, %i1
4000828c: 12 80 00 07 bne 400082a8 <_Thread_Change_life+0x40>
40008290: 80 8e 60 06 btst 6, %i1
&& _Thread_Is_life_changing( state )
40008294: 02 80 00 05 be 400082a8 <_Thread_Change_life+0x40>
40008298: 01 00 00 00 nop
4000829c: 7f ff ff 13 call 40007ee8 <_Thread_Change_life_locked.part.36>
400082a0: c2 27 bf fc st %g1, [ %fp + -4 ]
400082a4: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
disable_level = cpu_self->thread_dispatch_disable_level;
400082a8: c4 01 a0 18 ld [ %g6 + 0x18 ], %g2
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400082ac: 84 00 a0 01 inc %g2
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
400082b0: 90 10 00 06 mov %g6, %o0
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400082b4: c4 21 a0 18 st %g2, [ %g6 + 0x18 ]
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400082b8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400082bc: 01 00 00 00 nop
previous = _Thread_Change_life_locked( executing, clear, set, ignore );
cpu_self = _Thread_Dispatch_disable_critical( &lock_context );
_Thread_State_release( executing, &lock_context );
_Thread_Dispatch_enable( cpu_self );
400082c0: 7f ff fe b5 call 40007d94 <_Thread_Dispatch_enable>
400082c4: b0 10 00 1d mov %i5, %i0
return previous;
}
400082c8: 81 c7 e0 08 ret
400082cc: 81 e8 00 00 restore
4000d35c <_Thread_Clear_state>:
States_Control _Thread_Clear_state(
Thread_Control *the_thread,
States_Control state
)
{
4000d35c: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000d360: 91 d0 20 09 ta 9
<== NOT EXECUTED
previous_state = the_thread->current_state;
4000d364: fa 06 20 1c ld [ %i0 + 0x1c ], %i5
if ( ( previous_state & state ) != 0 ) {
4000d368: 80 8e 40 1d btst %i1, %i5
4000d36c: 02 80 00 06 be 4000d384 <_Thread_Clear_state+0x28>
4000d370: 01 00 00 00 nop
RTEMS_INLINE_ROUTINE States_Control _States_Clear (
States_Control states_to_clear,
States_Control current_state
)
{
return (current_state & ~states_to_clear);
4000d374: b2 2f 40 19 andn %i5, %i1, %i1
if ( _States_Is_ready( next_state ) ) {
4000d378: 80 a6 60 00 cmp %i1, 0
4000d37c: 02 80 00 06 be 4000d394 <_Thread_Clear_state+0x38>
4000d380: f2 26 20 1c st %i1, [ %i0 + 0x1c ]
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000d384: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000d388: 01 00 00 00 nop
_Thread_State_acquire( the_thread, &lock_context );
previous_state = _Thread_Clear_state_locked( the_thread, state );
_Thread_State_release( the_thread, &lock_context );
return previous_state;
}
4000d38c: 81 c7 e0 08 ret
4000d390: 91 e8 00 1d restore %g0, %i5, %o0
4000d394: c2 27 bf fc st %g1, [ %fp + -4 ]
4000d398: 7f ff ff dc call 4000d308 <_Thread_Clear_state_locked.part.10>
4000d39c: 90 10 00 18 mov %i0, %o0
4000d3a0: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
4000d3a4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000d3a8: 01 00 00 00 nop
4000d3ac: 81 c7 e0 08 ret
4000d3b0: 91 e8 00 1d restore %g0, %i5, %o0
4000d32c <_Thread_Clear_state_locked>:
{
4000d32c: 9d e3 bf a0 save %sp, -96, %sp
<== NOT EXECUTED
previous_state = the_thread->current_state;
4000d330: fa 06 20 1c ld [ %i0 + 0x1c ], %i5
<== NOT EXECUTED
if ( ( previous_state & state ) != 0 ) {
4000d334: 80 8f 40 19 btst %i5, %i1
<== NOT EXECUTED
4000d338: 02 80 00 07 be 4000d354 <_Thread_Clear_state_locked+0x28>
<== NOT EXECUTED
4000d33c: b2 2f 40 19 andn %i5, %i1, %i1
<== NOT EXECUTED
if ( _States_Is_ready( next_state ) ) {
4000d340: 80 a6 60 00 cmp %i1, 0
<== NOT EXECUTED
4000d344: 12 80 00 04 bne 4000d354 <_Thread_Clear_state_locked+0x28>
<== NOT EXECUTED
4000d348: f2 26 20 1c st %i1, [ %i0 + 0x1c ]
<== NOT EXECUTED
4000d34c: 7f ff ff ef call 4000d308 <_Thread_Clear_state_locked.part.10>
<== NOT EXECUTED
4000d350: 90 10 00 18 mov %i0, %o0
<== NOT EXECUTED
}
4000d354: 81 c7 e0 08 ret
<== NOT EXECUTED
4000d358: 91 e8 00 1d restore %g0, %i5, %o0
<== NOT EXECUTED
40008440 <_Thread_Continue>:
#include <rtems/score/threadimpl.h>
#include <rtems/score/status.h>
void _Thread_Continue( Thread_Control *the_thread, Status_Control status )
{
40008440: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
queue_context->Priority.update_count = 0;
40008444: c0 27 bf f0 clr [ %fp + -16 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40008448: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable( &queue_context->Lock_context.Lock_context );
4000844c: c2 27 bf dc st %g1, [ %fp + -36 ]
_Thread_queue_Context_initialize( &queue_context );
_Thread_queue_Context_clear_priority_updates( &queue_context );
_Thread_Wait_acquire( the_thread, &queue_context );
wait_flags = _Thread_Wait_flags_get( the_thread );
40008450: fa 06 20 50 ld [ %i0 + 0x50 ], %i5
if ( ( wait_flags & THREAD_WAIT_STATE_READY_AGAIN ) == 0 ) {
40008454: 80 8f 60 04 btst 4, %i5
40008458: 12 80 00 20 bne 400084d8 <_Thread_Continue+0x98>
4000845c: 92 10 00 18 mov %i0, %o1
( *the_thread->Wait.operations->extract )(
40008460: c2 06 20 58 ld [ %i0 + 0x58 ], %g1
40008464: c2 00 60 08 ld [ %g1 + 8 ], %g1
40008468: d0 06 20 54 ld [ %i0 + 0x54 ], %o0
4000846c: 9f c0 40 00 call %g1
40008470: 94 07 bf dc add %fp, -36, %o2
the_thread->Wait.operations = &_Thread_queue_Operations_default;
40008474: 03 10 00 5d sethi %hi(0x40017400), %g1
40008478: 82 10 62 68 or %g1, 0x268, %g1 ! 40017668 <_Thread_queue_Operations_default>
4000847c: c2 26 20 58 st %g1, [ %i0 + 0x58 ]
_Thread_Wait_cancel( the_thread, &queue_context );
the_thread->Wait.return_code = status;
wait_class = wait_flags & THREAD_WAIT_CLASS_MASK;
40008480: 03 00 00 3f sethi %hi(0xfc00), %g1
40008484: 82 10 63 00 or %g1, 0x300, %g1 ! ff00 <_ISR_Stack_size+0xef00>
if ( success ) {
40008488: c4 06 20 50 ld [ %i0 + 0x50 ], %g2
4000848c: ba 0f 40 01 and %i5, %g1, %i5
the_thread->Wait.queue = NULL;
40008490: c0 26 20 54 clr [ %i0 + 0x54 ]
ready_again = wait_class | THREAD_WAIT_STATE_READY_AGAIN;
success = _Thread_Wait_flags_try_change_release(
40008494: 82 17 60 01 or %i5, 1, %g1
the_thread->Wait.return_code = status;
40008498: f2 26 20 4c st %i1, [ %i0 + 0x4c ]
ready_again = wait_class | THREAD_WAIT_STATE_READY_AGAIN;
4000849c: ba 17 60 04 or %i5, 4, %i5
if ( success ) {
400084a0: 80 a0 40 02 cmp %g1, %g2
400084a4: 02 80 00 0d be 400084d8 <_Thread_Continue+0x98>
400084a8: fa 26 20 50 st %i5, [ %i0 + 0x50 ]
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400084ac: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400084b0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400084b4: 01 00 00 00 nop
} else {
unblock = false;
}
_Thread_Wait_release( the_thread, &queue_context );
_Thread_Priority_update( &queue_context );
400084b8: 40 00 13 7c call 4000d2a8 <_Thread_Priority_update>
400084bc: 90 07 bf dc add %fp, -36, %o0
_Thread_Clear_state( the_thread, STATES_BLOCKED );
400084c0: 90 10 00 18 mov %i0, %o0
400084c4: 13 0c 00 57 sethi %hi(0x30015c00), %o1
400084c8: 40 00 13 a5 call 4000d35c <_Thread_Clear_state>
400084cc: 92 12 63 ff or %o1, 0x3ff, %o1 ! 30015fff <RAM_SIZE+0x2fc15fff>
if ( !_Objects_Is_local_id( the_thread->Object.id ) ) {
_Thread_MP_Free_proxy( the_thread );
}
#endif
}
}
400084d0: 81 c7 e0 08 ret
400084d4: 81 e8 00 00 restore
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400084d8: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400084dc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400084e0: 01 00 00 00 nop
_Thread_Priority_update( &queue_context );
400084e4: 40 00 13 71 call 4000d2a8 <_Thread_Priority_update>
400084e8: 90 07 bf dc add %fp, -36, %o0
}
400084ec: 81 c7 e0 08 ret
400084f0: 81 e8 00 00 restore
4000ae30 <_Thread_Dispatch>:
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000ae30: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000ae34: 92 10 00 01 mov %g1, %o1
_ISR_Local_disable( level );
cpu_self = _Per_CPU_Get();
if ( cpu_self->dispatch_necessary ) {
4000ae38: c4 09 a0 1c ldub [ %g6 + 0x1c ], %g2
4000ae3c: 80 a0 a0 00 cmp %g2, 0
4000ae40: 12 80 00 06 bne 4000ae58 <_Thread_Dispatch+0x28>
4000ae44: 90 10 00 06 mov %g6, %o0
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000ae48: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000ae4c: 01 00 00 00 nop
cpu_self->thread_dispatch_disable_level = 1;
_Thread_Do_dispatch( cpu_self, level );
} else {
_ISR_Local_enable( level );
}
}
4000ae50: 81 c3 e0 08 retl
4000ae54: 01 00 00 00 nop
cpu_self->thread_dispatch_disable_level = 1;
4000ae58: 82 10 20 01 mov 1, %g1 ! 1 <_TLS_Alignment>
4000ae5c: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
_Thread_Do_dispatch( cpu_self, level );
4000ae60: 82 13 c0 00 mov %o7, %g1
4000ae64: 7f ff ff ad call 4000ad18 <_Thread_Do_dispatch>
4000ae68: 9e 10 40 00 mov %g1, %o7
40007d68 <_Thread_Dispatch_direct>:
_ISR_Local_enable( level );
}
}
void _Thread_Dispatch_direct( Per_CPU_Control *cpu_self )
{
40007d68: 9d e3 bf a0 save %sp, -96, %sp
ISR_Level level;
if ( cpu_self->thread_dispatch_disable_level != 1 ) {
40007d6c: c2 06 20 18 ld [ %i0 + 0x18 ], %g1
40007d70: 80 a0 60 01 cmp %g1, 1
40007d74: 12 80 00 05 bne 40007d88 <_Thread_Dispatch_direct+0x20>
40007d78: 01 00 00 00 nop
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007d7c: 91 d0 20 09 ta 9
<== NOT EXECUTED
_Internal_error( INTERNAL_ERROR_BAD_THREAD_DISPATCH_DISABLE_LEVEL );
}
_ISR_Local_disable( level );
_Thread_Do_dispatch( cpu_self, level );
40007d80: 7f ff ff b4 call 40007c50 <_Thread_Do_dispatch>
40007d84: 93 e8 00 01 restore %g0, %g1, %o1
_Internal_error( INTERNAL_ERROR_BAD_THREAD_DISPATCH_DISABLE_LEVEL );
40007d88: 40 00 06 d7 call 400098e4 <_Internal_error>
40007d8c: 90 10 20 1e mov 0x1e, %o0
40007d90: 01 00 00 00 nop
<== NOT EXECUTED
40007d94 <_Thread_Dispatch_enable>:
}
void _Thread_Dispatch_enable( Per_CPU_Control *cpu_self )
{
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
40007d94: c2 02 20 18 ld [ %o0 + 0x18 ], %g1
if ( disable_level == 1 ) {
40007d98: 80 a0 60 01 cmp %g1, 1
40007d9c: 02 80 00 05 be 40007db0 <_Thread_Dispatch_enable+0x1c>
40007da0: 82 00 7f ff add %g1, -1, %g1
_Profiling_Thread_dispatch_enable( cpu_self, 0 );
_ISR_Local_enable( level );
}
} else {
_Assert( disable_level > 0 );
cpu_self->thread_dispatch_disable_level = disable_level - 1;
40007da4: c2 22 20 18 st %g1, [ %o0 + 0x18 ]
}
}
40007da8: 81 c3 e0 08 retl
40007dac: 01 00 00 00 nop
40007db0: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
40007db4: 92 10 00 01 mov %g1, %o1
if (
40007db8: c6 0a 20 1c ldub [ %o0 + 0x1c ], %g3
40007dbc: 80 a0 e0 00 cmp %g3, 0
40007dc0: 12 80 00 07 bne 40007ddc <_Thread_Dispatch_enable+0x48>
40007dc4: 01 00 00 00 nop
cpu_self->thread_dispatch_disable_level = 0;
40007dc8: c0 22 20 18 clr [ %o0 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007dcc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007dd0: 01 00 00 00 nop
40007dd4: 81 c3 e0 08 retl
40007dd8: 01 00 00 00 nop
_Thread_Do_dispatch( cpu_self, level );
40007ddc: 82 13 c0 00 mov %o7, %g1
40007de0: 7f ff ff 9c call 40007c50 <_Thread_Do_dispatch>
40007de4: 9e 10 40 00 mov %g1, %o7
40007c50 <_Thread_Do_dispatch>:
_Thread_State_release( executing, &lock_context );
}
void _Thread_Do_dispatch( Per_CPU_Control *cpu_self, ISR_Level level )
{
40007c50: 9d e3 bf 98 save %sp, -104, %sp
) {
_Internal_error( INTERNAL_ERROR_BAD_THREAD_DISPATCH_ENVIRONMENT );
}
#endif
executing = cpu_self->executing;
40007c54: f6 06 20 20 ld [ %i0 + 0x20 ], %i3
{
40007c58: 82 10 00 19 mov %i1, %g1
/*
* Since heir and executing are not the same, we need to do a real
* context switch.
*/
if ( heir->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE )
heir->cpu_time_budget = rtems_configuration_get_ticks_per_timeslice();
40007c5c: 23 10 00 5d sethi %hi(0x40017400), %l1
return _Chain_Immutable_head( the_chain )->next;
40007c60: 33 10 00 68 sethi %hi(0x4001a000), %i1
#if !defined(RTEMS_SMP)
_User_extensions_Thread_switch( executing, heir );
#endif
_Thread_Save_fp( executing );
_Context_Switch( &executing->Registers, &heir->Registers );
40007c64: a0 06 e0 f0 add %i3, 0xf0, %l0
40007c68: b2 16 63 0c or %i1, 0x30c, %i1
chain = &_User_extensions_Switches_list;
tail = _Chain_Immutable_tail( chain );
node = _Chain_Immutable_first( chain );
if ( node != tail ) {
40007c6c: b4 06 60 04 add %i1, 4, %i2
heir = cpu_self->heir;
40007c70: f8 06 20 24 ld [ %i0 + 0x24 ], %i4
cpu_self->dispatch_necessary = false;
40007c74: c0 2e 20 1c clrb [ %i0 + 0x1c ]
if ( heir == executing )
40007c78: 80 a6 c0 1c cmp %i3, %i4
40007c7c: 02 80 00 1e be 40007cf4 <_Thread_Do_dispatch+0xa4>
40007c80: f8 26 20 20 st %i4, [ %i0 + 0x20 ]
if ( heir->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE )
40007c84: c4 07 20 90 ld [ %i4 + 0x90 ], %g2
40007c88: 80 a0 a0 01 cmp %g2, 1
<== NOT EXECUTED
40007c8c: 12 80 00 03 bne 40007c98 <_Thread_Do_dispatch+0x48>
<== NOT EXECUTED
40007c90: c4 04 62 7c ld [ %l1 + 0x27c ], %g2
<== NOT EXECUTED
heir->cpu_time_budget = rtems_configuration_get_ticks_per_timeslice();
40007c94: c4 27 20 8c st %g2, [ %i4 + 0x8c ]
<== NOT EXECUTED
40007c98: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007c9c: 01 00 00 00 nop
<== NOT EXECUTED
40007ca0: c2 06 40 00 ld [ %i1 ], %g1
<== NOT EXECUTED
40007ca4: 80 a0 40 1a cmp %g1, %i2
<== NOT EXECUTED
40007ca8: 02 80 00 0b be 40007cd4 <_Thread_Do_dispatch+0x84>
<== NOT EXECUTED
40007cac: 92 07 20 f0 add %i4, 0xf0, %o1
<== NOT EXECUTED
while ( node != tail ) {
const User_extensions_Switch_control *extension;
extension = (const User_extensions_Switch_control *) node;
node = _Chain_Immutable_next( node );
(*extension->thread_switch)( executing, heir );
40007cb0: c4 00 60 08 ld [ %g1 + 8 ], %g2
<== NOT EXECUTED
node = _Chain_Immutable_next( node );
40007cb4: fa 00 40 00 ld [ %g1 ], %i5
<== NOT EXECUTED
(*extension->thread_switch)( executing, heir );
40007cb8: 92 10 00 1c mov %i4, %o1
<== NOT EXECUTED
40007cbc: 9f c0 80 00 call %g2
<== NOT EXECUTED
40007cc0: 90 10 00 1b mov %i3, %o0
<== NOT EXECUTED
while ( node != tail ) {
40007cc4: 80 a7 40 1a cmp %i5, %i2
<== NOT EXECUTED
40007cc8: 12 bf ff fa bne 40007cb0 <_Thread_Do_dispatch+0x60>
<== NOT EXECUTED
40007ccc: 82 10 00 1d mov %i5, %g1
<== NOT EXECUTED
_Context_Switch( &executing->Registers, &heir->Registers );
40007cd0: 92 07 20 f0 add %i4, 0xf0, %o1
<== NOT EXECUTED
40007cd4: 40 00 0d 6e call 4000b28c <_CPU_Context_switch>
<== NOT EXECUTED
40007cd8: 90 10 00 10 mov %l0, %o0
<== NOT EXECUTED
/*
* We have to obtain this value again after the context switch since the
* heir thread may have migrated from another processor. Values from the
* stack or non-volatile registers reflect the old execution environment.
*/
cpu_self = _Per_CPU_Get();
40007cdc: b0 10 00 06 mov %g6, %i0
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007ce0: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_Local_disable( level );
} while ( cpu_self->dispatch_necessary );
40007ce4: c4 09 a0 1c ldub [ %g6 + 0x1c ], %g2
<== NOT EXECUTED
40007ce8: 80 a0 a0 00 cmp %g2, 0
<== NOT EXECUTED
40007cec: 32 bf ff e2 bne,a 40007c74 <_Thread_Do_dispatch+0x24>
<== NOT EXECUTED
40007cf0: f8 06 20 24 ld [ %i0 + 0x24 ], %i4
<== NOT EXECUTED
post_switch:
_Assert( cpu_self->thread_dispatch_disable_level == 1 );
cpu_self->thread_dispatch_disable_level = 0;
40007cf4: c0 26 20 18 clr [ %i0 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007cf8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007cfc: 01 00 00 00 nop
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007d00: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable( lock_context );
40007d04: c2 27 bf fc st %g1, [ %fp + -4 ]
<== NOT EXECUTED
40007d08: d2 06 e0 e0 ld [ %i3 + 0xe0 ], %o1
<== NOT EXECUTED
return &the_chain->Tail.Node;
40007d0c: ba 06 e0 e4 add %i3, 0xe4, %i5
if ( !_Chain_Is_empty(the_chain))
40007d10: 80 a2 40 1d cmp %o1, %i5
40007d14: 02 80 00 10 be 40007d54 <_Thread_Do_dispatch+0x104>
40007d18: b8 06 e0 e0 add %i3, 0xe0, %i4
new_first = old_first->next;
40007d1c: c2 02 40 00 ld [ %o1 ], %g1
head->next = new_first;
40007d20: c2 26 e0 e0 st %g1, [ %i3 + 0xe0 ]
( *action->handler )( executing, action, &lock_context );
40007d24: 94 07 bf fc add %fp, -4, %o2
<== NOT EXECUTED
new_first->previous = head;
40007d28: f8 20 60 04 st %i4, [ %g1 + 4 ]
<== NOT EXECUTED
node->next = NULL;
40007d2c: c0 22 40 00 clr [ %o1 ]
<== NOT EXECUTED
40007d30: c2 02 60 08 ld [ %o1 + 8 ], %g1
<== NOT EXECUTED
40007d34: 9f c0 40 00 call %g1
<== NOT EXECUTED
40007d38: 90 10 00 1b mov %i3, %o0
<== NOT EXECUTED
40007d3c: 91 d0 20 09 ta 9
<== NOT EXECUTED
40007d40: c2 27 bf fc st %g1, [ %fp + -4 ]
<== NOT EXECUTED
return _Chain_Immutable_head( the_chain )->next;
40007d44: d2 06 e0 e0 ld [ %i3 + 0xe0 ], %o1
<== NOT EXECUTED
if ( !_Chain_Is_empty(the_chain))
40007d48: 80 a7 40 09 cmp %i5, %o1
<== NOT EXECUTED
40007d4c: 32 bf ff f5 bne,a 40007d20 <_Thread_Do_dispatch+0xd0>
<== NOT EXECUTED
40007d50: c2 02 40 00 ld [ %o1 ], %g1
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007d54: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007d58: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007d5c: 01 00 00 00 nop
<== NOT EXECUTED
_Profiling_Thread_dispatch_enable( cpu_self, 0 );
_ISR_Local_enable( level );
_Thread_Run_post_switch_actions( executing );
}
40007d60: 81 c7 e0 08 ret
<== NOT EXECUTED
40007d64: 81 e8 00 00 restore
4000ad64 <_Thread_Exit>:
void _Thread_Exit(
Thread_Control *executing,
Thread_Life_state set,
void *exit_value
)
{
4000ad64: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000ad68: 91 d0 20 09 ta 9
<== NOT EXECUTED
state |= set;
4000ad6c: c4 06 21 70 ld [ %i0 + 0x170 ], %g2
4000ad70: b2 16 40 02 or %i1, %g2, %i1
the_thread->Life.exit_value = exit_value;
4000ad74: f4 26 21 78 st %i2, [ %i0 + 0x178 ]
&& _Thread_Is_life_changing( state )
4000ad78: 80 8e 60 06 btst 6, %i1
4000ad7c: 02 80 00 06 be 4000ad94 <_Thread_Exit+0x30>
4000ad80: f2 26 21 70 st %i1, [ %i0 + 0x170 ]
4000ad84: c2 27 bf fc st %g1, [ %fp + -4 ]
4000ad88: 7f ff fe b2 call 4000a850 <_Thread_Change_life_locked.part.36>
4000ad8c: 90 10 00 18 mov %i0, %o0
4000ad90: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000ad94: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000ad98: 01 00 00 00 nop
0,
set,
THREAD_LIFE_PROTECTED | THREAD_LIFE_CHANGE_DEFERRED
);
_Thread_State_release( executing, &lock_context );
}
4000ad9c: 81 c7 e0 08 ret
4000ada0: 81 e8 00 00 restore
40007de8 <_Thread_Get>:
ISR_lock_Context *lock_context
)
{
Objects_Information *information;
if ( _Objects_Are_ids_equal( id, OBJECTS_ID_OF_SELF ) ) {
40007de8: 80 a2 20 00 cmp %o0, 0
40007dec: 02 80 00 11 be 40007e30 <_Thread_Get+0x48>
40007df0: 83 32 20 18 srl %o0, 0x18, %g1
*/
RTEMS_INLINE_ROUTINE Objects_APIs _Objects_Get_API(
Objects_Id id
)
{
return (Objects_APIs) ((id >> OBJECTS_API_START_BIT) & OBJECTS_API_VALID_BITS);
40007df4: 82 08 60 07 and %g1, 7, %g1
*/
RTEMS_INLINE_ROUTINE bool _Objects_Is_api_valid(
uint32_t the_api
)
{
if ( !the_api || the_api > OBJECTS_APIS_LAST )
40007df8: 84 00 7f ff add %g1, -1, %g2
40007dfc: 80 a0 a0 02 cmp %g2, 2
40007e00: 18 80 00 10 bgu 40007e40 <_Thread_Get+0x58>
40007e04: 83 28 60 02 sll %g1, 2, %g1
return _Objects_Information_table[ the_api ][ 1 ];
40007e08: 05 10 00 5d sethi %hi(0x40017400), %g2
40007e0c: 84 10 a2 d0 or %g2, 0x2d0, %g2 ! 400176d0 <_Objects_Information_table>
40007e10: c2 00 80 01 ld [ %g2 + %g1 ], %g1
40007e14: d4 00 60 04 ld [ %g1 + 4 ], %o2
_ISR_lock_ISR_disable( lock_context );
return _Thread_Executing;
}
information = _Thread_Get_objects_information( id );
if ( information == NULL ) {
40007e18: 80 a2 a0 00 cmp %o2, 0
40007e1c: 02 80 00 09 be 40007e40 <_Thread_Get+0x58>
<== NEVER TAKEN
40007e20: 01 00 00 00 nop
return NULL;
}
return (Thread_Control *)
40007e24: 82 13 c0 00 mov %o7, %g1
40007e28: 40 00 12 11 call 4000c66c <_Objects_Get>
40007e2c: 9e 10 40 00 mov %g1, %o7
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007e30: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable( lock_context );
40007e34: c2 22 40 00 st %g1, [ %o1 ]
return _Thread_Executing;
40007e38: 81 c3 e0 08 retl
40007e3c: d0 01 a0 20 ld [ %g6 + 0x20 ], %o0
_Objects_Get( id, lock_context, information );
}
40007e40: 81 c3 e0 08 retl
40007e44: 90 10 20 00 clr %o0
400095a0 <_Thread_Get_CPU_time_used>:
void _Thread_Get_CPU_time_used(
Thread_Control *the_thread,
Timestamp_Control *cpu_time_used
)
{
400095a0: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400095a4: 91 d0 20 09 ta 9
<== NOT EXECUTED
_Thread_State_acquire( the_thread, &state_lock_context );
scheduler = _Thread_Scheduler_get_home( the_thread );
_Scheduler_Acquire_critical( scheduler, &scheduler_lock_context );
if ( _Thread_Is_scheduled( the_thread ) ) {
400095a8: c4 01 a0 20 ld [ %g6 + 0x20 ], %g2
400095ac: 80 a6 00 02 cmp %i0, %g2
400095b0: 02 80 00 08 be 400095d0 <_Thread_Get_CPU_time_used+0x30>
400095b4: ba 10 00 06 mov %g6, %i5
400095b8: c4 1e 20 98 ldd [ %i0 + 0x98 ], %g2
<== NOT EXECUTED
_Thread_Update_CPU_time_used( the_thread, _Thread_Get_CPU( the_thread ) );
}
*cpu_time_used = the_thread->cpu_time_used;
400095bc: c4 3e 40 00 std %g2, [ %i1 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400095c0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400095c4: 01 00 00 00 nop
_Scheduler_Release_critical( scheduler, &scheduler_lock_context );
_Thread_State_release( the_thread, &state_lock_context );
}
400095c8: 81 c7 e0 08 ret
400095cc: 81 e8 00 00 restore
last = cpu->cpu_usage_timestamp;
400095d0: e0 19 a0 28 ldd [ %g6 + 0x28 ], %l0
400095d4: 40 00 0a fa call 4000c1bc <_Timecounter_Sbinuptime>
400095d8: c2 27 bf fc st %g1, [ %fp + -4 ]
400095dc: d0 3f 60 28 std %o0, [ %i5 + 0x28 ]
<== NOT EXECUTED
*_result = *_end - *_start;
400095e0: b6 a2 40 11 subcc %o1, %l1, %i3
<== NOT EXECUTED
*_time += *_add;
400095e4: f8 1e 20 98 ldd [ %i0 + 0x98 ], %i4
<== NOT EXECUTED
*_result = *_end - *_start;
400095e8: b4 62 00 10 subx %o0, %l0, %i2
<== NOT EXECUTED
*_time += *_add;
400095ec: 86 86 c0 1d addcc %i3, %i5, %g3
<== NOT EXECUTED
400095f0: 84 46 80 1c addx %i2, %i4, %g2
<== NOT EXECUTED
400095f4: c4 3e 20 98 std %g2, [ %i0 + 0x98 ]
<== NOT EXECUTED
400095f8: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
*cpu_time_used = the_thread->cpu_time_used;
400095fc: c4 3e 40 00 std %g2, [ %i1 ]
<== NOT EXECUTED
40009600: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009604: 01 00 00 00 nop
}
40009608: 81 c7 e0 08 ret
4000960c: 81 e8 00 00 restore
40007e48 <_Thread_Handler>:
}
#endif
}
void _Thread_Handler( void )
{
40007e48: 9d e3 bf a0 save %sp, -96, %sp
/*
* Some CPUs need to tinker with the call frame or registers when the
* thread actually begins to execute for the first time. This is a
* hook point where the port gets a shot at doing whatever it requires.
*/
_Context_Initialization_at_thread_begin();
40007e4c: 3f 10 00 1f sethi %hi(0x40007c00), %i7
40007e50: be 17 e2 48 or %i7, 0x248, %i7 ! 40007e48 <_Thread_Handler>
executing = _Thread_Executing;
40007e54: fa 01 a0 20 ld [ %g6 + 0x20 ], %i5
40007e58: 90 10 00 06 mov %g6, %o0
/*
* have to put level into a register for those cpu's that use
* inline asm here
*/
level = executing->Start.isr_level;
40007e5c: c2 07 60 b8 ld [ %i5 + 0xb8 ], %g1
<== NOT EXECUTED
_ISR_Set_level( level );
40007e60: 83 28 60 08 sll %g1, 8, %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007e64: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007e68: 01 00 00 00 nop
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007e6c: 91 d0 20 09 ta 9
<== NOT EXECUTED
* Make sure we lose no thread dispatch necessary update and execute the
* post-switch actions. As a side-effect change the thread dispatch level
* from one to zero. Do not use _Thread_Enable_dispatch() since there is no
* valid thread dispatch necessary indicator in this context.
*/
_Thread_Do_dispatch( cpu_self, level );
40007e70: 7f ff ff 78 call 40007c50 <_Thread_Do_dispatch>
40007e74: 92 10 00 01 mov %g1, %o1
_User_extensions_Iterate(
40007e78: 94 10 20 00 clr %o2
40007e7c: 90 10 00 1d mov %i5, %o0
40007e80: 13 10 00 25 sethi %hi(0x40009400), %o1
40007e84: 40 00 06 05 call 40009698 <_User_extensions_Iterate>
40007e88: 92 12 62 00 or %o1, 0x200, %o1 ! 40009600 <_User_extensions_Thread_begin_visitor>
if ( executing->Object.id == _Thread_Global_constructor ) {
40007e8c: 03 10 00 7a sethi %hi(0x4001e800), %g1
40007e90: c6 07 60 08 ld [ %i5 + 8 ], %g3
40007e94: c4 00 63 98 ld [ %g1 + 0x398 ], %g2
40007e98: 80 a0 c0 02 cmp %g3, %g2
40007e9c: 02 80 00 0c be 40007ecc <_Thread_Handler+0x84>
40007ea0: 01 00 00 00 nop
/*
* RTEMS supports multiple APIs and each API can define a different
* thread/task prototype. The following code supports invoking the
* user thread entry point using the prototype expected.
*/
( *executing->Start.Entry.adaptor )( executing );
40007ea4: c2 07 60 a0 ld [ %i5 + 0xa0 ], %g1
40007ea8: 9f c0 40 00 call %g1
40007eac: 90 10 00 1d mov %i5, %o0
*
* @param created The thread.
*/
static inline void _User_extensions_Thread_exitted( Thread_Control *executing )
{
_User_extensions_Iterate(
40007eb0: 90 10 00 1d mov %i5, %o0
40007eb4: 94 10 20 00 clr %o2
40007eb8: 13 10 00 25 sethi %hi(0x40009400), %o1
40007ebc: 40 00 05 f7 call 40009698 <_User_extensions_Iterate>
40007ec0: 92 12 62 24 or %o1, 0x224, %o1 ! 40009624 <_User_extensions_Thread_exitted_visitor>
* able to fit in a (void *).
*/
_User_extensions_Thread_exitted( executing );
_Internal_error( INTERNAL_ERROR_THREAD_EXITTED );
40007ec4: 40 00 06 88 call 400098e4 <_Internal_error>
40007ec8: 90 10 20 05 mov 5, %o0
INIT_NAME();
40007ecc: 40 00 40 6f call 40018088 <_init>
40007ed0: c0 20 63 98 clr [ %g1 + 0x398 ]
( *executing->Start.Entry.adaptor )( executing );
40007ed4: 10 bf ff f5 b 40007ea8 <_Thread_Handler+0x60>
40007ed8: c2 07 60 a0 ld [ %i5 + 0xa0 ], %g1
4000cf70 <_Thread_Handler_initialization>:
_Thread_queue_Heads_size
);
}
void _Thread_Handler_initialization(void)
{
4000cf70: 9d e3 bf a0 save %sp, -96, %sp
#if defined(RTEMS_MULTIPROCESSING)
uint32_t maximum_proxies =
_MPCI_Configuration.maximum_proxies;
#endif
if ( rtems_configuration_get_stack_allocate_hook() == NULL ||
4000cf74: 03 10 00 5d sethi %hi(0x40017400), %g1
4000cf78: c2 00 63 38 ld [ %g1 + 0x338 ], %g1 ! 40017738 <_Stack_Allocator_allocate>
4000cf7c: 80 a0 60 00 cmp %g1, 0
rtems_stack_allocate_init_hook stack_allocate_init_hook =
4000cf80: 03 10 00 5d sethi %hi(0x40017400), %g1
if ( rtems_configuration_get_stack_allocate_hook() == NULL ||
4000cf84: 02 80 00 0f be 4000cfc0 <_Thread_Handler_initialization+0x50>
4000cf88: fa 00 63 3c ld [ %g1 + 0x33c ], %i5 ! 4001773c <_Stack_Allocator_initialize>
rtems_configuration_get_stack_free_hook() == NULL)
4000cf8c: 03 10 00 5d sethi %hi(0x40017400), %g1
if ( rtems_configuration_get_stack_allocate_hook() == NULL ||
4000cf90: c2 00 63 34 ld [ %g1 + 0x334 ], %g1 ! 40017734 <_Stack_Allocator_free>
4000cf94: 80 a0 60 00 cmp %g1, 0
4000cf98: 02 80 00 0a be 4000cfc0 <_Thread_Handler_initialization+0x50>
<== NEVER TAKEN
4000cf9c: 80 a7 60 00 cmp %i5, 0
_Internal_error( INTERNAL_ERROR_BAD_STACK_HOOK );
if ( stack_allocate_init_hook != NULL )
4000cfa0: 02 80 00 06 be 4000cfb8 <_Thread_Handler_initialization+0x48>
4000cfa4: 31 10 00 68 sethi %hi(0x4001a000), %i0
(*stack_allocate_init_hook)( rtems_configuration_get_stack_space_size() );
4000cfa8: 7f ff f5 e1 call 4000a72c <rtems_configuration_get_stack_space_size>
4000cfac: 01 00 00 00 nop
4000cfb0: 9f c7 40 00 call %i5
4000cfb4: 01 00 00 00 nop
/*
* Initialize the internal class of threads. We need an IDLE thread
* per CPU in an SMP system. In addition, if this is a loosely
* coupled multiprocessing system, account for the MPCI Server Thread.
*/
_Thread_Initialize_information( &_Thread_Information );
4000cfb8: 7f ff ff e6 call 4000cf50 <_Thread_Initialize_information>
4000cfbc: 91 ee 21 80 restore %i0, 0x180, %o0
_Internal_error( INTERNAL_ERROR_BAD_STACK_HOOK );
4000cfc0: 7f ff f2 49 call 400098e4 <_Internal_error>
4000cfc4: 90 10 20 0e mov 0xe, %o0
4000cfc8: 01 00 00 00 nop
<== NOT EXECUTED
4000d4d4 <_Thread_Initialize>:
bool _Thread_Initialize(
Thread_Information *information,
Thread_Control *the_thread,
const Thread_Configuration *config
)
{
4000d4d4: 9d e3 bf 98 save %sp, -104, %sp
Per_CPU_Control *cpu = _Per_CPU_Get_by_index( 0 );
memset(
&the_thread->Join_queue,
0,
information->Objects.object_size - offsetof( Thread_Control, Join_queue )
4000d4d8: d4 16 20 14 lduh [ %i0 + 0x14 ], %o2
memset(
4000d4dc: 94 02 bf f0 add %o2, -16, %o2
4000d4e0: 92 10 20 00 clr %o1
4000d4e4: 40 00 08 ae call 4000f79c <memset>
4000d4e8: 90 06 60 10 add %i1, 0x10, %o0
);
for ( i = 0 ; i < _Thread_Control_add_on_count ; ++i ) {
4000d4ec: 03 10 00 5a sethi %hi(0x40016800), %g1
4000d4f0: fa 00 62 84 ld [ %g1 + 0x284 ], %i5 ! 40016a84 <_Thread_Control_add_on_count>
4000d4f4: 80 a7 60 00 cmp %i5, 0
4000d4f8: 02 80 00 0c be 4000d528 <_Thread_Initialize+0x54>
4000d4fc: 03 10 00 5a sethi %hi(0x40016800), %g1
4000d500: 86 10 20 00 clr %g3
4000d504: 82 10 62 88 or %g1, 0x288, %g1
const Thread_Control_add_on *add_on = &_Thread_Control_add_ons[ i ];
*(void **) ( (char *) the_thread + add_on->destination_offset ) =
(char *) the_thread + add_on->source_offset;
4000d508: c4 00 60 04 ld [ %g1 + 4 ], %g2
*(void **) ( (char *) the_thread + add_on->destination_offset ) =
4000d50c: c8 00 40 00 ld [ %g1 ], %g4
(char *) the_thread + add_on->source_offset;
4000d510: 84 06 40 02 add %i1, %g2, %g2
*(void **) ( (char *) the_thread + add_on->destination_offset ) =
4000d514: c4 26 40 04 st %g2, [ %i1 + %g4 ]
for ( i = 0 ; i < _Thread_Control_add_on_count ; ++i ) {
4000d518: 86 00 e0 01 inc %g3
4000d51c: 80 a0 c0 1d cmp %g3, %i5
4000d520: 12 bf ff fa bne 4000d508 <_Thread_Initialize+0x34>
4000d524: 82 00 60 08 add %g1, 8, %g1
}
/* Set everything to perform the error case clean up */
scheduler_index = 0;
the_thread->Start.allocated_stack = config->allocated_stack;
4000d528: c2 06 a0 0c ld [ %i2 + 0xc ], %g1
4000d52c: c2 26 60 c8 st %g1, [ %i1 + 0xc8 ]
stack_area = config->stack_area;
stack_size = config->stack_size;
/* Allocate floating-point context in stack area */
#if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE )
if ( config->is_fp ) {
4000d530: c2 0e a0 28 ldub [ %i2 + 0x28 ], %g1
stack_area = config->stack_area;
4000d534: fa 06 a0 04 ld [ %i2 + 4 ], %i5
if ( config->is_fp ) {
4000d538: 80 a0 60 00 cmp %g1, 0
4000d53c: 02 80 00 06 be 4000d554 <_Thread_Initialize+0x80>
4000d540: f6 06 a0 08 ld [ %i2 + 8 ], %i3
the_thread->fp_context = ( Context_Control_fp *) stack_area;
4000d544: fa 26 61 50 st %i5, [ %i1 + 0x150 ]
the_thread->Start.fp_context = ( Context_Control_fp *) stack_area;
stack_size -= CONTEXT_FP_SIZE;
4000d548: b6 06 ff 78 add %i3, -136, %i3
the_thread->Start.fp_context = ( Context_Control_fp *) stack_area;
4000d54c: fa 26 60 d4 st %i5, [ %i1 + 0xd4 ]
stack_area += CONTEXT_FP_SIZE;
4000d550: ba 07 60 88 add %i5, 0x88, %i5
}
#endif
tls_size = _TLS_Get_allocation_size();
4000d554: 7f ff f6 89 call 4000af78 <_TLS_Get_allocation_size>
<== NOT EXECUTED
4000d558: 01 00 00 00 nop
/* Allocate thread-local storage (TLS) area in stack area */
if ( tls_size > 0 ) {
4000d55c: 80 a2 20 00 cmp %o0, 0
4000d560: 22 80 00 0c be,a 4000d590 <_Thread_Initialize+0xbc>
4000d564: c2 06 20 30 ld [ %i0 + 0x30 ], %g1
uintptr_t tls_align;
tls_align = (uintptr_t) _TLS_Alignment;
4000d568: 03 00 00 00 sethi %hi(0), %g1
4000d56c: 82 10 60 01 or %g1, 1, %g1 ! 1 <_TLS_Alignment>
the_thread->Start.tls_area = (void *)
( ( (uintptr_t) stack_area + tls_align - 1 ) & ~( tls_align - 1 ) );
4000d570: 84 00 7f ff add %g1, -1, %g2
4000d574: 82 20 00 01 neg %g1
4000d578: 84 07 40 02 add %i5, %g2, %g2
4000d57c: 82 08 80 01 and %g2, %g1, %g1
the_thread->Start.tls_area = (void *)
4000d580: c2 26 60 d8 st %g1, [ %i1 + 0xd8 ]
stack_size -= tls_size;
4000d584: b6 26 c0 08 sub %i3, %o0, %i3
stack_area += tls_size;
4000d588: ba 07 40 08 add %i5, %o0, %i5
old_first = head->next;
4000d58c: c2 06 20 30 ld [ %i0 + 0x30 ], %g1
new_first = old_first->next;
4000d590: c4 00 40 00 ld [ %g1 ], %g2
the_stack->area = starting_address;
4000d594: fa 26 60 d0 st %i5, [ %i1 + 0xd0 ]
);
/*
* Get thread queue heads
*/
the_thread->Wait.spare_heads = _Freechain_Pop(
4000d598: b8 06 20 30 add %i0, 0x30, %i4
the_stack->size = size;
4000d59c: f6 26 60 cc st %i3, [ %i1 + 0xcc ]
return &the_chain->Tail.Node;
4000d5a0: 86 00 60 30 add %g1, 0x30, %g3
head->next = new_first;
4000d5a4: c4 26 20 30 st %g2, [ %i0 + 0x30 ]
return &the_chain->Tail.Node;
4000d5a8: 88 00 60 34 add %g1, 0x34, %g4
new_first->previous = head;
4000d5ac: f8 20 a0 04 st %i4, [ %g2 + 4 ]
4000d5b0: c2 26 60 5c st %g1, [ %i1 + 0x5c ]
head->next = tail;
4000d5b4: c8 20 60 30 st %g4, [ %g1 + 0x30 ]
tail->previous = head;
4000d5b8: c6 20 60 38 st %g3, [ %g1 + 0x38 ]
head->previous = NULL;
4000d5bc: c0 20 60 34 clr [ %g1 + 0x34 ]
*/
the_thread->is_fp = config->is_fp;
the_thread->Start.isr_level = config->isr_level;
the_thread->Start.is_preemptible = config->is_preemptible;
the_thread->Start.budget_algorithm = config->budget_algorithm;
4000d5c0: c2 06 a0 18 ld [ %i2 + 0x18 ], %g1
the_thread->is_fp = config->is_fp;
4000d5c4: fa 0e a0 28 ldub [ %i2 + 0x28 ], %i5
the_thread->Start.isr_level = config->isr_level;
4000d5c8: c8 06 a0 24 ld [ %i2 + 0x24 ], %g4
the_thread->Start.is_preemptible = config->is_preemptible;
4000d5cc: c6 0e a0 29 ldub [ %i2 + 0x29 ], %g3
the_thread->Start.budget_callout = config->budget_callout;
4000d5d0: c4 06 a0 1c ld [ %i2 + 0x1c ], %g2
_Thread_Timer_initialize( &the_thread->Timer, cpu );
switch ( config->budget_algorithm ) {
4000d5d4: 80 a0 60 02 cmp %g1, 2
the_thread->Start.budget_algorithm = config->budget_algorithm;
4000d5d8: c2 26 60 b0 st %g1, [ %i1 + 0xb0 ]
timer->header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_TICKS ];
4000d5dc: 03 10 00 7a sethi %hi(0x4001e800), %g1
4000d5e0: 82 10 63 78 or %g1, 0x378, %g1 ! 4001eb78 <_Per_CPU_Information+0x38>
the_thread->is_fp = config->is_fp;
4000d5e4: fa 2e 60 8a stb %i5, [ %i1 + 0x8a ]
4000d5e8: c2 26 60 60 st %g1, [ %i1 + 0x60 ]
RB_COLOR( &the_watchdog->Node.RBTree, Node ) = state;
4000d5ec: 82 10 20 02 mov 2, %g1
the_thread->Start.isr_level = config->isr_level;
4000d5f0: c8 26 60 b8 st %g4, [ %i1 + 0xb8 ]
the_thread->Start.is_preemptible = config->is_preemptible;
4000d5f4: c6 2e 60 ac stb %g3, [ %i1 + 0xac ]
the_thread->Start.budget_callout = config->budget_callout;
4000d5f8: c4 26 60 b4 st %g2, [ %i1 + 0xb4 ]
<== NOT EXECUTED
switch ( config->budget_algorithm ) {
4000d5fc: 12 80 00 05 bne 4000d610 <_Thread_Initialize+0x13c>
<== NOT EXECUTED
4000d600: c2 26 60 74 st %g1, [ %i1 + 0x74 ]
<== NOT EXECUTED
case THREAD_CPU_BUDGET_ALGORITHM_NONE:
case THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE:
break;
#if defined(RTEMS_SCORE_THREAD_ENABLE_EXHAUST_TIMESLICE)
case THREAD_CPU_BUDGET_ALGORITHM_EXHAUST_TIMESLICE:
the_thread->cpu_time_budget =
4000d604: 03 10 00 5d sethi %hi(0x40017400), %g1
4000d608: c2 00 62 7c ld [ %g1 + 0x27c ], %g1 ! 4001767c <_Watchdog_Ticks_per_timeslice>
4000d60c: c2 26 60 8c st %g1, [ %i1 + 0x8c ]
( *scheduler->Operations.node_initialize )(
4000d610: 94 10 00 19 mov %i1, %o2
&scheduler_node->Thread.Scheduler_node.Chain
);
#else
scheduler_node = _Thread_Scheduler_get_home_node( the_thread );
_Scheduler_Node_initialize(
config->scheduler,
4000d614: d0 06 80 00 ld [ %i2 ], %o0
scheduler_node = _Thread_Scheduler_get_home_node( the_thread );
4000d618: fa 06 60 38 ld [ %i1 + 0x38 ], %i5
4000d61c: c2 02 20 24 ld [ %o0 + 0x24 ], %g1
4000d620: d6 06 a0 10 ld [ %i2 + 0x10 ], %o3
4000d624: d8 06 a0 14 ld [ %i2 + 0x14 ], %o4
4000d628: 9f c0 40 00 call %g1
4000d62c: 92 10 00 1d mov %i5, %o1
config->priority
);
scheduler_index = 1;
#endif
_Priority_Node_initialize( &the_thread->Real_priority, config->priority );
4000d630: c4 1e a0 10 ldd [ %i2 + 0x10 ], %g2
node->priority = priority;
4000d634: c4 3e 60 30 std %g2, [ %i1 + 0x30 ]
_RBTree_Initialize_one( &aggregation->Contributors, &node->Node.RBTree );
4000d638: 82 06 60 20 add %i1, 0x20, %g1
node->priority = priority;
4000d63c: c4 3f 60 18 std %g2, [ %i5 + 0x18 ]
#endif
/* Initialize the CPU for the non-SMP schedulers */
_Thread_Set_CPU( the_thread, cpu );
the_thread->current_state = STATES_DORMANT;
4000d640: 09 20 00 00 sethi %hi(0x80000000), %g4
RB_ROOT( the_rbtree ) = the_node;
4000d644: c2 27 60 20 st %g1, [ %i5 + 0x20 ]
return &the_chain->Tail.Node;
4000d648: 9e 06 60 e0 add %i1, 0xe0, %o7
the_thread->Wait.operations = &_Thread_queue_Operations_default;
the_thread->Start.initial_priority = config->priority;
4000d64c: c4 1e a0 10 ldd [ %i2 + 0x10 ], %g2
4000d650: f6 06 a0 20 ld [ %i2 + 0x20 ], %i3
information->local_table[ index - OBJECTS_INDEX_MINIMUM ] = the_object;
4000d654: c2 16 60 0a lduh [ %i1 + 0xa ], %g1
the_thread->current_state = STATES_DORMANT;
4000d658: c8 26 60 1c st %g4, [ %i1 + 0x1c ]
4000d65c: 9a 06 60 e4 add %i1, 0xe4, %o5
the_thread->Start.initial_priority = config->priority;
4000d660: c4 3e 60 c0 std %g2, [ %i1 + 0xc0 ]
the_thread->Wait.operations = &_Thread_queue_Operations_default;
4000d664: 09 10 00 5d sethi %hi(0x40017400), %g4
4000d668: c4 06 20 04 ld [ %i0 + 4 ], %g2
RB_PARENT( the_node, Node ) = NULL;
4000d66c: c0 26 60 28 clr [ %i1 + 0x28 ]
4000d670: 88 11 22 68 or %g4, 0x268, %g4
RB_LEFT( the_node, Node ) = NULL;
4000d674: c0 26 60 20 clr [ %i1 + 0x20 ]
4000d678: 83 28 60 02 sll %g1, 2, %g1
RB_RIGHT( the_node, Node ) = NULL;
4000d67c: c0 26 60 24 clr [ %i1 + 0x24 ]
4000d680: 82 00 7f fc add %g1, -4, %g1
RB_COLOR( the_node, Node ) = RB_BLACK;
4000d684: c0 26 60 2c clr [ %i1 + 0x2c ]
_User_extensions_Iterate(
4000d688: 94 10 20 00 clr %o2
4000d68c: c8 26 60 58 st %g4, [ %i1 + 0x58 ]
4000d690: 13 10 00 25 sethi %hi(0x40009400), %o1
RB_INIT( the_rbtree );
4000d694: c0 26 61 60 clr [ %i1 + 0x160 ]
4000d698: 92 12 61 58 or %o1, 0x158, %o1
head->next = tail;
4000d69c: da 26 60 e0 st %o5, [ %i1 + 0xe0 ]
4000d6a0: 90 07 bf f8 add %fp, -8, %o0
head->previous = NULL;
4000d6a4: c0 26 60 e4 clr [ %i1 + 0xe4 ]
tail->previous = head;
4000d6a8: de 26 60 e8 st %o7, [ %i1 + 0xe8 ]
the_object->name = name;
4000d6ac: f6 26 60 0c st %i3, [ %i1 + 0xc ]
information->local_table[ index - OBJECTS_INDEX_MINIMUM ] = the_object;
4000d6b0: f2 20 80 01 st %i1, [ %g2 + %g1 ]
User_extensions_Thread_create_context ctx = { created, true };
4000d6b4: 82 10 20 01 mov 1, %g1
4000d6b8: f2 27 bf f8 st %i1, [ %fp + -8 ]
_User_extensions_Iterate(
4000d6bc: 7f ff ef f7 call 40009698 <_User_extensions_Iterate>
<== NOT EXECUTED
4000d6c0: c2 2f bf fc stb %g1, [ %fp + -4 ]
<== NOT EXECUTED
* user extensions with dispatching enabled. The Allocator
* Mutex provides sufficient protection to let the user extensions
* run safely.
*/
extension_status = _User_extensions_Thread_create( the_thread );
if ( extension_status )
4000d6c4: f0 0f bf fc ldub [ %fp + -4 ], %i0
<== NOT EXECUTED
4000d6c8: 80 a6 20 00 cmp %i0, 0
<== NOT EXECUTED
4000d6cc: 12 80 00 0b bne 4000d6f8 <_Thread_Initialize+0x224>
<== NOT EXECUTED
4000d6d0: 01 00 00 00 nop
<== NOT EXECUTED
--scheduler_index;
_Scheduler_Node_destroy( scheduler_for_index, scheduler_node_for_index );
}
#else
if ( scheduler_index > 0 ) {
_Scheduler_Node_destroy( config->scheduler, scheduler_node );
4000d6d4: d0 06 80 00 ld [ %i2 ], %o0
<== NOT EXECUTED
( *scheduler->Operations.node_destroy )( scheduler, node );
4000d6d8: c2 02 20 28 ld [ %o0 + 0x28 ], %g1
<== NOT EXECUTED
4000d6dc: 9f c0 40 00 call %g1
<== NOT EXECUTED
4000d6e0: 92 10 00 1d mov %i5, %o1
<== NOT EXECUTED
}
#endif
_Freechain_Put(
4000d6e4: d2 06 60 5c ld [ %i1 + 0x5c ], %o1
<== NOT EXECUTED
4000d6e8: 7f ff fc 05 call 4000c6fc <_Freechain_Put>
<== NOT EXECUTED
4000d6ec: 90 10 00 1c mov %i4, %o0
<== NOT EXECUTED
&information->Thread_queue_heads.Free,
the_thread->Wait.spare_heads
);
_Stack_Free( the_thread->Start.allocated_stack );
4000d6f0: 7f ff eb 1f call 4000836c <_Stack_Free>
4000d6f4: d0 06 60 c8 ld [ %i1 + 0xc8 ], %o0
return false;
}
4000d6f8: 81 c7 e0 08 ret
<== NOT EXECUTED
4000d6fc: 81 e8 00 00 restore
<== NOT EXECUTED
4000c15c <_Thread_Iterate>:
void _Thread_Iterate(
Thread_Visitor visitor,
void *arg
)
{
4000c15c: 9d e3 bf a0 save %sp, -96, %sp
4000c160: 35 10 00 6d sethi %hi(0x4001b400), %i2
4000c164: b4 16 a2 a0 or %i2, 0x2a0, %i2 ! 4001b6a0 <_Objects_Information_table>
4000c168: a0 06 a0 0c add %i2, 0xc, %l0
const Objects_Information *information;
Objects_Maximum maximum;
Objects_Maximum index;
_Assert( _Objects_Information_table[ api_index ] != NULL );
information = _Objects_Information_table[ api_index ][ 1 ];
4000c16c: c2 06 a0 04 ld [ %i2 + 4 ], %g1
4000c170: f6 00 60 04 ld [ %g1 + 4 ], %i3
if ( information == NULL ) {
4000c174: 80 a6 e0 00 cmp %i3, 0
4000c178: 22 80 00 1c be,a 4000c1e8 <_Thread_Iterate+0x8c>
4000c17c: b4 06 a0 04 add %i2, 4, %i2
continue;
}
maximum = _Objects_Get_maximum_index( information );
for ( index = 0 ; index < maximum ; ++index ) {
4000c180: c4 16 e0 02 lduh [ %i3 + 2 ], %g2
4000c184: 80 a0 a0 00 cmp %g2, 0
4000c188: 02 80 00 17 be 4000c1e4 <_Thread_Iterate+0x88>
4000c18c: c2 06 c0 00 ld [ %i3 ], %g1
4000c190: b8 00 7f ff add %g1, -1, %i4
4000c194: ba 10 20 00 clr %i5
4000c198: b9 2f 20 10 sll %i4, 0x10, %i4
4000c19c: b9 37 20 0e srl %i4, 0xe, %i4
4000c1a0: 10 80 00 05 b 4000c1b4 <_Thread_Iterate+0x58>
4000c1a4: b8 07 20 04 add %i4, 4, %i4
4000c1a8: 80 a7 00 1d cmp %i4, %i5
4000c1ac: 22 80 00 0f be,a 4000c1e8 <_Thread_Iterate+0x8c>
4000c1b0: b4 06 a0 04 add %i2, 4, %i2
Thread_Control *the_thread;
the_thread = (Thread_Control *) information->local_table[ index ];
4000c1b4: c2 06 e0 04 ld [ %i3 + 4 ], %g1
4000c1b8: d0 00 40 1d ld [ %g1 + %i5 ], %o0
if ( the_thread != NULL ) {
4000c1bc: 80 a2 20 00 cmp %o0, 0
4000c1c0: 22 bf ff fa be,a 4000c1a8 <_Thread_Iterate+0x4c>
4000c1c4: ba 07 60 04 add %i5, 4, %i5
bool done;
done = (* visitor )( the_thread, arg );
4000c1c8: 9f c6 00 00 call %i0
4000c1cc: 92 10 00 19 mov %i1, %o1
if ( done ) {
4000c1d0: 80 a2 20 00 cmp %o0, 0
4000c1d4: 02 bf ff f5 be 4000c1a8 <_Thread_Iterate+0x4c>
4000c1d8: ba 07 60 04 add %i5, 4, %i5
4000c1dc: 81 c7 e0 08 ret
<== NOT EXECUTED
4000c1e0: 81 e8 00 00 restore
<== NOT EXECUTED
4000c1e4: b4 06 a0 04 add %i2, 4, %i2
<== NOT EXECUTED
for ( api_index = 1 ; api_index <= OBJECTS_APIS_LAST ; ++api_index ) {
4000c1e8: 80 a4 00 1a cmp %l0, %i2
4000c1ec: 32 bf ff e1 bne,a 4000c170 <_Thread_Iterate+0x14>
4000c1f0: c2 06 a0 04 ld [ %i2 + 4 ], %g1
return;
}
}
}
}
}
4000c1f4: 81 c7 e0 08 ret
4000c1f8: 81 e8 00 00 restore
40008154 <_Thread_Kill_zombies>:
{
40008154: 9d e3 bf a0 save %sp, -96, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40008158: 91 d0 20 09 ta 9
<== NOT EXECUTED
return _Chain_Immutable_head( the_chain )->next;
4000815c: 05 10 00 68 sethi %hi(0x4001a000), %g2
40008160: fa 00 a3 18 ld [ %g2 + 0x318 ], %i5 ! 4001a318 <_Thread_Zombies>
40008164: b6 10 a3 18 or %g2, 0x318, %i3
if ( !_Chain_Is_empty(the_chain))
40008168: b0 06 e0 04 add %i3, 4, %i0
4000816c: 80 a7 40 18 cmp %i5, %i0
40008170: 02 80 00 3a be 40008258 <_Thread_Kill_zombies+0x104>
40008174: 33 10 00 25 sethi %hi(0x40009400), %i1
new_first = old_first->next;
40008178: c6 07 40 00 ld [ %i5 ], %g3
<== NOT EXECUTED
head->next = new_first;
4000817c: c6 20 a3 18 st %g3, [ %g2 + 0x318 ]
<== NOT EXECUTED
new_first->previous = head;
40008180: f6 20 e0 04 st %i3, [ %g3 + 4 ]
<== NOT EXECUTED
40008184: 35 10 00 5a sethi %hi(0x40016800), %i2
<== NOT EXECUTED
_User_extensions_Iterate(
40008188: b2 16 61 94 or %i1, 0x194, %i1
<== NOT EXECUTED
4000818c: b4 16 a2 b0 or %i2, 0x2b0, %i2
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008190: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008194: 01 00 00 00 nop
<== NOT EXECUTED
Thread_Information *information = (Thread_Information *)
40008198: 40 00 11 2f call 4000c654 <_Objects_Get_information_id>
<== NOT EXECUTED
4000819c: d0 07 60 08 ld [ %i5 + 8 ], %o0
<== NOT EXECUTED
400081a0: 94 10 20 01 mov 1, %o2
<== NOT EXECUTED
400081a4: b8 10 00 08 mov %o0, %i4
<== NOT EXECUTED
400081a8: 92 10 00 19 mov %i1, %o1
<== NOT EXECUTED
400081ac: 40 00 05 3b call 40009698 <_User_extensions_Iterate>
<== NOT EXECUTED
400081b0: 90 10 00 1d mov %i5, %o0
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400081b4: 91 d0 20 09 ta 9
<== NOT EXECUTED
iter = the_thread->last_user_extensions_iterator;
400081b8: c4 07 61 8c ld [ %i5 + 0x18c ], %g2
<== NOT EXECUTED
while ( iter != NULL ) {
400081bc: 80 a0 a0 00 cmp %g2, 0
<== NOT EXECUTED
400081c0: 02 80 00 0a be 400081e8 <_Thread_Kill_zombies+0x94>
<== NOT EXECUTED
400081c4: 01 00 00 00 nop
<== NOT EXECUTED
next = the_node->next;
400081c8: c8 00 80 00 ld [ %g2 ], %g4
<== NOT EXECUTED
previous = the_node->previous;
400081cc: c6 00 a0 04 ld [ %g2 + 4 ], %g3
<== NOT EXECUTED
next->previous = previous;
400081d0: c6 21 20 04 st %g3, [ %g4 + 4 ]
<== NOT EXECUTED
previous->next = next;
400081d4: c8 20 c0 00 st %g4, [ %g3 ]
<== NOT EXECUTED
iter = iter->previous;
400081d8: c4 00 a0 10 ld [ %g2 + 0x10 ], %g2
<== NOT EXECUTED
while ( iter != NULL ) {
400081dc: 80 a0 a0 00 cmp %g2, 0
<== NOT EXECUTED
400081e0: 32 bf ff fb bne,a 400081cc <_Thread_Kill_zombies+0x78>
<== NOT EXECUTED
400081e4: c8 00 80 00 ld [ %g2 ], %g4
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400081e8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400081ec: 01 00 00 00 nop
<== NOT EXECUTED
( *scheduler->Operations.node_destroy )( scheduler, node );
400081f0: c2 06 a0 28 ld [ %i2 + 0x28 ], %g1
<== NOT EXECUTED
400081f4: d2 07 60 38 ld [ %i5 + 0x38 ], %o1
<== NOT EXECUTED
400081f8: 9f c0 40 00 call %g1
<== NOT EXECUTED
400081fc: 90 10 00 1a mov %i2, %o0
<== NOT EXECUTED
_Freechain_Put(
40008200: d2 07 60 5c ld [ %i5 + 0x5c ], %o1
<== NOT EXECUTED
40008204: 40 00 11 3e call 4000c6fc <_Freechain_Put>
<== NOT EXECUTED
40008208: 90 07 20 30 add %i4, 0x30, %o0
<== NOT EXECUTED
_Stack_Free( the_thread->Start.allocated_stack );
4000820c: 40 00 00 58 call 4000836c <_Stack_Free>
<== NOT EXECUTED
40008210: d0 07 60 c8 ld [ %i5 + 0xc8 ], %o0
<== NOT EXECUTED
_Context_Destroy( the_thread, &the_thread->Registers );
40008214: c4 01 a0 04 ld [ %g6 + 4 ], %g2
<== NOT EXECUTED
40008218: 80 a0 80 1d cmp %g2, %i5
<== NOT EXECUTED
4000821c: 22 80 00 02 be,a 40008224 <_Thread_Kill_zombies+0xd0>
<== NOT EXECUTED
40008220: c0 21 a0 04 clr [ %g6 + 4 ]
<== NOT EXECUTED
Objects_Control *the_object
)
{
_Assert( _Objects_Allocator_is_owner() );
_Assert( information->deallocate != NULL );
( *information->deallocate )( information, the_object );
40008224: 92 10 00 1d mov %i5, %o1
<== NOT EXECUTED
40008228: c2 07 20 0c ld [ %i4 + 0xc ], %g1
<== NOT EXECUTED
4000822c: 9f c0 40 00 call %g1
<== NOT EXECUTED
40008230: 90 10 00 1c mov %i4, %o0
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40008234: 91 d0 20 09 ta 9
<== NOT EXECUTED
return _Chain_Immutable_head( the_chain )->next;
40008238: fa 06 c0 00 ld [ %i3 ], %i5
<== NOT EXECUTED
if ( !_Chain_Is_empty(the_chain))
4000823c: 80 a7 40 18 cmp %i5, %i0
<== NOT EXECUTED
40008240: 02 80 00 06 be 40008258 <_Thread_Kill_zombies+0x104>
<== NOT EXECUTED
40008244: 01 00 00 00 nop
<== NOT EXECUTED
new_first = old_first->next;
40008248: c4 07 40 00 ld [ %i5 ], %g2
<== NOT EXECUTED
head->next = new_first;
4000824c: c4 26 c0 00 st %g2, [ %i3 ]
<== NOT EXECUTED
new_first->previous = head;
40008250: 10 bf ff d0 b 40008190 <_Thread_Kill_zombies+0x3c>
<== NOT EXECUTED
40008254: f6 20 a0 04 st %i3, [ %g2 + 4 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008258: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000825c: 01 00 00 00 nop
<== NOT EXECUTED
}
40008260: 81 c7 e0 08 ret
<== NOT EXECUTED
40008264: 81 e8 00 00 restore
<== NOT EXECUTED
4000d2a8 <_Thread_Priority_update>:
replacement_node
);
}
void _Thread_Priority_update( Thread_queue_Context *queue_context )
{
4000d2a8: 9d e3 bf 98 save %sp, -104, %sp
size_t i;
size_t n;
n = queue_context->Priority.update_count;
4000d2ac: fa 06 20 14 ld [ %i0 + 0x14 ], %i5
/*
* Update the priority of all threads of the set. Do not care to clear the
* set, since the thread queue context will soon get destroyed anyway.
*/
for ( i = 0; i < n ; ++i ) {
4000d2b0: 80 a7 60 00 cmp %i5, 0
4000d2b4: 02 80 00 13 be 4000d300 <_Thread_Priority_update+0x58>
4000d2b8: 39 10 00 5a sethi %hi(0x40016800), %i4
4000d2bc: b8 17 22 b0 or %i4, 0x2b0, %i4 ! 40016ab0 <_Scheduler_Table>
( *scheduler->Operations.update_priority )(
4000d2c0: f6 07 20 18 ld [ %i4 + 0x18 ], %i3
4000d2c4: bb 2f 60 02 sll %i5, 2, %i5
4000d2c8: ba 06 00 1d add %i0, %i5, %i5
Thread_Control *the_thread;
ISR_lock_Context lock_context;
the_thread = queue_context->Priority.update[ i ];
4000d2cc: d2 06 20 18 ld [ %i0 + 0x18 ], %o1
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000d2d0: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000d2d4: c2 27 bf fc st %g1, [ %fp + -4 ]
4000d2d8: d4 02 60 38 ld [ %o1 + 0x38 ], %o2
4000d2dc: 9f c6 c0 00 call %i3
4000d2e0: 90 10 00 1c mov %i4, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000d2e4: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000d2e8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000d2ec: 01 00 00 00 nop
4000d2f0: b0 06 20 04 add %i0, 4, %i0
for ( i = 0; i < n ; ++i ) {
4000d2f4: 80 a6 00 1d cmp %i0, %i5
4000d2f8: 32 bf ff f6 bne,a 4000d2d0 <_Thread_Priority_update+0x28>
4000d2fc: d2 06 20 18 ld [ %i0 + 0x18 ], %o1
_Thread_State_acquire( the_thread, &lock_context );
_Scheduler_Update_priority( the_thread );
_Thread_State_release( the_thread, &lock_context );
}
}
4000d300: 81 c7 e0 08 ret
4000d304: 81 e8 00 00 restore
40008118 <_Thread_Restart_other>:
bool _Thread_Restart_other(
Thread_Control *the_thread,
const Thread_Entry_information *entry,
ISR_lock_Context *lock_context
)
{
40008118: 9d e3 bf 98 save %sp, -104, %sp
Thread_Life_state previous;
Per_CPU_Control *cpu_self;
_Thread_State_acquire_critical( the_thread, lock_context );
if ( _States_Is_dormant( the_thread->current_state ) ) {
4000811c: c2 06 20 1c ld [ %i0 + 0x1c ], %g1
40008120: 80 a0 60 00 cmp %g1, 0
40008124: 06 80 00 3e bl 4000821c <_Thread_Restart_other+0x104>
40008128: 01 00 00 00 nop
_Thread_State_release( the_thread, lock_context );
return false;
}
the_thread->Start.Entry = *entry;
4000812c: c2 06 40 00 ld [ %i1 ], %g1
40008130: c2 26 20 a0 st %g1, [ %i0 + 0xa0 ]
40008134: c2 06 60 04 ld [ %i1 + 4 ], %g1
40008138: c2 26 20 a4 st %g1, [ %i0 + 0xa4 ]
previous = the_thread->Life.state;
4000813c: c2 06 21 70 ld [ %i0 + 0x170 ], %g1
the_thread->Start.Entry = *entry;
40008140: c6 06 60 08 ld [ %i1 + 8 ], %g3
state |= set;
40008144: 84 10 60 02 or %g1, 2, %g2
the_thread->Start.Entry = *entry;
40008148: c6 26 20 a8 st %g3, [ %i0 + 0xa8 ]
if (
4000814c: 80 88 60 09 btst 9, %g1
40008150: 02 80 00 12 be 40008198 <_Thread_Restart_other+0x80>
40008154: c4 26 21 70 st %g2, [ %i0 + 0x170 ]
disable_level = cpu_self->thread_dispatch_disable_level;
40008158: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
4000815c: 82 00 60 01 inc %g1
<== NOT EXECUTED
40008160: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40008164: ba 10 00 06 mov %g6, %i5
<== NOT EXECUTED
_Thread_Finalize_life_change(
the_thread,
the_thread->Start.initial_priority
);
} else {
_Thread_Clear_state_locked( the_thread, STATES_SUSPENDED );
40008168: 13 00 00 20 sethi %hi(0x8000), %o1
<== NOT EXECUTED
4000816c: 40 00 14 57 call 4000d2c8 <_Thread_Clear_state_locked>
<== NOT EXECUTED
40008170: 90 10 00 18 mov %i0, %o0
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008174: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008178: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000817c: 01 00 00 00 nop
<== NOT EXECUTED
_Thread_State_release( the_thread, lock_context );
}
_Thread_Dispatch_enable( cpu_self );
40008180: 90 10 00 1d mov %i5, %o0
<== NOT EXECUTED
40008184: 7f ff fd 77 call 40007760 <_Thread_Dispatch_enable>
40008188: b0 10 20 01 mov 1, %i0
4000818c: b0 0e 20 ff and %i0, 0xff, %i0
return true;
}
40008190: 81 c7 e0 08 ret
40008194: 81 e8 00 00 restore
40008198: 7f ff fe 8b call 40007bc4 <_Thread_Change_life_locked.part.36>
4000819c: 90 10 00 18 mov %i0, %o0
disable_level = cpu_self->thread_dispatch_disable_level;
400081a0: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
pending_requests = the_thread->Life.pending_life_change_requests;
400081a4: c4 06 21 74 ld [ %i0 + 0x174 ], %g2
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400081a8: 82 00 60 01 inc %g1
400081ac: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
the_thread->Life.pending_life_change_requests = pending_requests + 1;
400081b0: 82 00 a0 01 add %g2, 1, %g1
400081b4: c2 26 21 74 st %g1, [ %i0 + 0x174 ]
if ( pending_requests == 0 ) {
400081b8: 80 a0 a0 00 cmp %g2, 0
400081bc: 02 80 00 1f be 40008238 <_Thread_Restart_other+0x120>
400081c0: ba 10 00 06 mov %g6, %i5
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400081c4: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400081c8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400081cc: 01 00 00 00 nop
_Thread_Finalize_life_change(
400081d0: f4 1e 20 c0 ldd [ %i0 + 0xc0 ], %i2
_Thread_queue_Extract_with_proxy( the_thread );
400081d4: 40 00 01 f1 call 40008998 <_Thread_queue_Extract_with_proxy>
400081d8: 90 10 00 18 mov %i0, %o0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400081dc: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
400081e0: c2 27 bf fc st %g1, [ %fp + -4 ]
400081e4: d0 06 20 60 ld [ %i0 + 0x60 ], %o0
400081e8: 40 00 04 81 call 400093ec <_Watchdog_Remove>
400081ec: 92 06 20 68 add %i0, 0x68, %o1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400081f0: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400081f4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400081f8: 01 00 00 00 nop
_Thread_Raise_real_priority( the_thread, priority );
400081fc: 90 10 00 18 mov %i0, %o0
40008200: 92 10 00 1a mov %i2, %o1
40008204: 7f ff fe 4c call 40007b34 <_Thread_Raise_real_priority>
40008208: 94 10 00 1b mov %i3, %o2
_Thread_Remove_life_change_request( the_thread );
4000820c: 7f ff fe 35 call 40007ae0 <_Thread_Remove_life_change_request>
40008210: 90 10 00 18 mov %i0, %o0
_Thread_Dispatch_enable( cpu_self );
40008214: 10 bf ff dc b 40008184 <_Thread_Restart_other+0x6c>
40008218: 90 10 00 1d mov %i5, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000821c: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008220: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008224: 01 00 00 00 nop
return false;
40008228: b0 10 20 00 clr %i0 ! 0 <PROM_START>
4000822c: b0 0e 20 ff and %i0, 0xff, %i0
}
40008230: 81 c7 e0 08 ret
40008234: 81 e8 00 00 restore
_Thread_Set_state_locked( the_thread, STATES_LIFE_IS_CHANGING );
40008238: 13 00 00 80 sethi %hi(0x20000), %o1
4000823c: 40 00 00 48 call 4000835c <_Thread_Set_state_locked>
40008240: 90 10 00 18 mov %i0, %o0
40008244: 30 bf ff e0 b,a 400081c4 <_Thread_Restart_other+0xac>
40008248 <_Thread_Restart_self>:
void _Thread_Restart_self(
Thread_Control *executing,
const Thread_Entry_information *entry,
ISR_lock_Context *lock_context
)
{
40008248: 9d e3 bf 78 save %sp, -136, %sp
_Thread_queue_Context_initialize( &queue_context );
_Thread_queue_Context_clear_priority_updates( &queue_context );
_Thread_State_acquire_critical( executing, lock_context );
executing->Start.Entry = *entry;
4000824c: c2 06 40 00 ld [ %i1 ], %g1
40008250: c2 26 20 a0 st %g1, [ %i0 + 0xa0 ]
40008254: 90 10 00 18 mov %i0, %o0
40008258: c2 06 60 04 ld [ %i1 + 4 ], %g1
4000825c: c2 26 20 a4 st %g1, [ %i0 + 0xa4 ]
state |= set;
40008260: c2 06 21 70 ld [ %i0 + 0x170 ], %g1
executing->Start.Entry = *entry;
40008264: c4 06 60 08 ld [ %i1 + 8 ], %g2
state |= set;
40008268: 82 10 60 02 or %g1, 2, %g1
executing->Start.Entry = *entry;
4000826c: c4 26 20 a8 st %g2, [ %i0 + 0xa8 ]
the_thread->Life.state = state;
40008270: c2 26 21 70 st %g1, [ %i0 + 0x170 ]
40008274: 7f ff fe 54 call 40007bc4 <_Thread_Change_life_locked.part.36>
40008278: c0 27 bf f0 clr [ %fp + -16 ]
disable_level = cpu_self->thread_dispatch_disable_level;
4000827c: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40008280: 82 00 60 01 inc %g1
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40008284: ba 10 00 06 mov %g6, %i5
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40008288: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000828c: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008290: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008294: 01 00 00 00 nop
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40008298: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable( lock_context );
4000829c: c2 26 80 00 st %g1, [ %i2 ]
400082a0: c4 1e 20 c0 ldd [ %i0 + 0xc0 ], %g2
400082a4: c4 3e 20 30 std %g2, [ %i0 + 0x30 ]
_Thread_Priority_changed(
400082a8: 94 10 20 00 clr %o2
400082ac: 96 07 bf dc add %fp, -36, %o3
400082b0: 92 06 20 20 add %i0, 0x20, %o1
400082b4: 7f ff fc bb call 400075a0 <_Thread_Priority_changed>
400082b8: 90 10 00 18 mov %i0, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400082bc: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400082c0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400082c4: 01 00 00 00 nop
false,
&queue_context
);
_Thread_Wait_release_default( executing, lock_context );
_Thread_Priority_update( &queue_context );
400082c8: 7f ff fc bd call 400075bc <_Thread_Priority_update>
400082cc: 90 07 bf dc add %fp, -36, %o0
_Thread_Dispatch_direct( cpu_self );
400082d0: 7f ff fd 19 call 40007734 <_Thread_Dispatch_direct>
400082d4: 90 10 00 1d mov %i5, %o0
400082d8: 01 00 00 00 nop
<== NOT EXECUTED
40008320 <_Thread_Set_state>:
States_Control _Thread_Set_state(
Thread_Control *the_thread,
States_Control state
)
{
40008320: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
40008324: 92 10 00 18 mov %i0, %o1
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40008328: 91 d0 20 09 ta 9
<== NOT EXECUTED
previous_state = the_thread->current_state;
4000832c: f0 06 20 1c ld [ %i0 + 0x1c ], %i0
40008330: b2 16 40 18 or %i1, %i0, %i1
if ( _States_Is_ready( previous_state ) ) {
40008334: 80 a6 20 00 cmp %i0, 0
40008338: 12 80 00 09 bne 4000835c <_Thread_Set_state+0x3c>
4000833c: f2 22 60 1c st %i1, [ %o1 + 0x1c ]
40008340: d4 02 60 38 ld [ %o1 + 0x38 ], %o2
40008344: 11 10 00 5a sethi %hi(0x40016800), %o0
40008348: 90 12 22 b0 or %o0, 0x2b0, %o0 ! 40016ab0 <_Scheduler_Table>
4000834c: c4 02 20 10 ld [ %o0 + 0x10 ], %g2
40008350: 9f c0 80 00 call %g2
40008354: c2 27 bf fc st %g1, [ %fp + -4 ]
40008358: c2 07 bf fc ld [ %fp + -4 ], %g1
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000835c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008360: 01 00 00 00 nop
_Thread_State_acquire( the_thread, &lock_context );
previous_state = _Thread_Set_state_locked( the_thread, state );
_Thread_State_release( the_thread, &lock_context );
return previous_state;
}
40008364: 81 c7 e0 08 ret
40008368: 81 e8 00 00 restore
400082e8 <_Thread_Set_state_locked>:
States_Control _Thread_Set_state_locked(
Thread_Control *the_thread,
States_Control state
)
{
400082e8: 9d e3 bf a0 save %sp, -96, %sp
<== NOT EXECUTED
400082ec: 92 10 00 18 mov %i0, %o1
<== NOT EXECUTED
States_Control next_state;
_Assert( state != 0 );
_Assert( _Thread_State_is_owner( the_thread ) );
previous_state = the_thread->current_state;
400082f0: f0 06 20 1c ld [ %i0 + 0x1c ], %i0
<== NOT EXECUTED
RTEMS_INLINE_ROUTINE States_Control _States_Set (
States_Control states_to_set,
States_Control current_state
)
{
return (current_state | states_to_set);
400082f4: b2 16 00 19 or %i0, %i1, %i1
<== NOT EXECUTED
next_state = _States_Set( state, previous_state);
the_thread->current_state = next_state;
if ( _States_Is_ready( previous_state ) ) {
400082f8: 80 a6 20 00 cmp %i0, 0
<== NOT EXECUTED
400082fc: 12 80 00 07 bne 40008318 <_Thread_Set_state_locked+0x30>
<== NOT EXECUTED
40008300: f2 22 60 1c st %i1, [ %o1 + 0x1c ]
<== NOT EXECUTED
( *scheduler->Operations.block )(
40008304: 11 10 00 5a sethi %hi(0x40016800), %o0
<== NOT EXECUTED
40008308: 90 12 22 b0 or %o0, 0x2b0, %o0 ! 40016ab0 <_Scheduler_Table>
<== NOT EXECUTED
4000830c: c2 02 20 10 ld [ %o0 + 0x10 ], %g1
<== NOT EXECUTED
40008310: 9f c0 40 00 call %g1
<== NOT EXECUTED
40008314: d4 02 60 38 ld [ %o1 + 0x38 ], %o2
<== NOT EXECUTED
_Scheduler_Block( the_thread );
}
return previous_state;
}
40008318: 81 c7 e0 08 ret
<== NOT EXECUTED
4000831c: 81 e8 00 00 restore
<== NOT EXECUTED
40008388 <_Thread_Start>:
bool _Thread_Start(
Thread_Control *the_thread,
const Thread_Entry_information *entry,
ISR_lock_Context *lock_context
)
{
40008388: 9d e3 bf a0 save %sp, -96, %sp
Per_CPU_Control *cpu_self;
_Thread_State_acquire_critical( the_thread, lock_context );
if ( !_States_Is_dormant( the_thread->current_state ) ) {
4000838c: c2 06 20 1c ld [ %i0 + 0x1c ], %g1
40008390: 80 a0 60 00 cmp %g1, 0
40008394: 26 80 00 09 bl,a 400083b8 <_Thread_Start+0x30>
40008398: c2 06 40 00 ld [ %i1 ], %g1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000839c: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400083a0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400083a4: 01 00 00 00 nop
_Thread_State_release( the_thread, lock_context );
return false;
400083a8: b0 10 20 00 clr %i0 ! 0 <PROM_START>
_User_extensions_Thread_start( the_thread );
_Thread_Dispatch_enable( cpu_self );
return true;
}
400083ac: b0 0e 20 01 and %i0, 1, %i0
400083b0: 81 c7 e0 08 ret
400083b4: 81 e8 00 00 restore
the_thread->Start.Entry = *entry;
400083b8: c2 26 20 a0 st %g1, [ %i0 + 0xa0 ]
_Thread_Load_environment( the_thread );
400083bc: 90 10 00 18 mov %i0, %o0
the_thread->Start.Entry = *entry;
400083c0: c2 06 60 04 ld [ %i1 + 4 ], %g1
400083c4: c2 26 20 a4 st %g1, [ %i0 + 0xa4 ]
400083c8: c2 06 60 08 ld [ %i1 + 8 ], %g1
_Thread_Load_environment( the_thread );
400083cc: 40 00 14 cd call 4000d700 <_Thread_Load_environment>
400083d0: c2 26 20 a8 st %g1, [ %i0 + 0xa8 ]
_Thread_Clear_state_locked( the_thread, STATES_ALL_SET );
400083d4: 92 10 3f ff mov -1, %o1
400083d8: 40 00 13 d5 call 4000d32c <_Thread_Clear_state_locked>
400083dc: 90 10 00 18 mov %i0, %o0
disable_level = cpu_self->thread_dispatch_disable_level;
400083e0: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400083e4: 82 00 60 01 inc %g1
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
400083e8: ba 10 00 06 mov %g6, %i5
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400083ec: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400083f0: c2 06 80 00 ld [ %i2 ], %g1
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400083f4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400083f8: 01 00 00 00 nop
_User_extensions_Iterate(
400083fc: 94 10 20 00 clr %o2 ! 0 <PROM_START>
40008400: 90 10 00 18 mov %i0, %o0
40008404: 13 10 00 25 sethi %hi(0x40009400), %o1
40008408: 40 00 04 a4 call 40009698 <_User_extensions_Iterate>
4000840c: 92 12 61 b8 or %o1, 0x1b8, %o1 ! 400095b8 <_User_extensions_Thread_start_visitor>
_Thread_Dispatch_enable( cpu_self );
40008410: 90 10 00 1d mov %i5, %o0
40008414: 7f ff fe 60 call 40007d94 <_Thread_Dispatch_enable>
40008418: b0 10 20 01 mov 1, %i0
}
4000841c: b0 0e 20 01 and %i0, 1, %i0
40008420: 81 c7 e0 08 ret
40008424: 81 e8 00 00 restore
4000d778 <_Thread_Start_multitasking>:
#include <rtems/score/threadimpl.h>
#include <rtems/score/assert.h>
void _Thread_Start_multitasking( void )
{
4000d778: 9d e3 bf a0 save %sp, -96, %sp
heir = cpu_self->heir;
4000d77c: c4 01 a0 24 ld [ %g6 + 0x24 ], %g2
cpu_self->dispatch_necessary = false;
4000d780: c0 29 a0 1c clrb [ %g6 + 0x1c ]
_CPU_Context_Set_is_executing( &trash, true );
_CPU_Context_switch( &trash, &heir->Registers );
RTEMS_UNREACHABLE();
}
#else
_CPU_Context_Restart_self( &heir->Registers );
4000d784: 90 00 a0 f0 add %g2, 0xf0, %o0
4000d788: 7f ff f7 04 call 4000b398 <_CPU_Context_restore>
4000d78c: c4 21 a0 20 st %g2, [ %g6 + 0x20 ]
4000d790: 01 00 00 00 nop
<== NOT EXECUTED
400084f4 <_Thread_Timeout>:
the_thread = RTEMS_CONTAINER_OF(
the_watchdog,
Thread_Control,
Timer.Watchdog
);
_Thread_Continue( the_thread, STATUS_TIMEOUT );
400084f4: 13 00 00 1d sethi %hi(0x7400), %o1
<== NOT EXECUTED
400084f8: 90 02 3f 98 add %o0, -104, %o0
<== NOT EXECUTED
400084fc: 92 12 60 06 or %o1, 6, %o1
<== NOT EXECUTED
40008500: 82 13 c0 00 mov %o7, %g1
<== NOT EXECUTED
40008504: 7f ff ff cf call 40008440 <_Thread_Continue>
<== NOT EXECUTED
40008508: 9e 10 40 00 mov %g1, %o7
<== NOT EXECUTED
4000850c <_Thread_Yield>:
#include <rtems/score/threadimpl.h>
#include <rtems/score/schedulerimpl.h>
void _Thread_Yield( Thread_Control *executing )
{
4000850c: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40008510: 91 d0 20 09 ta 9
<== NOT EXECUTED
ISR_lock_Context lock_context;
_Thread_State_acquire( executing, &lock_context );
if ( _States_Is_ready( executing->current_state ) ) {
40008514: c4 06 20 1c ld [ %i0 + 0x1c ], %g2
40008518: 80 a0 a0 00 cmp %g2, 0
4000851c: 12 80 00 09 bne 40008540 <_Thread_Yield+0x34>
40008520: 11 10 00 5a sethi %hi(0x40016800), %o0
( *scheduler->Operations.yield )(
40008524: d4 06 20 38 ld [ %i0 + 0x38 ], %o2
40008528: 90 12 22 b0 or %o0, 0x2b0, %o0
4000852c: c4 02 20 0c ld [ %o0 + 0xc ], %g2
40008530: c2 27 bf fc st %g1, [ %fp + -4 ]
40008534: 9f c0 80 00 call %g2
40008538: 92 10 00 18 mov %i0, %o1
4000853c: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008540: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008544: 01 00 00 00 nop
_Scheduler_Yield( executing );
}
_Thread_State_release( executing, &lock_context );
}
40008548: 81 c7 e0 08 ret
4000854c: 81 e8 00 00 restore
4000f7e4 <_Thread_queue_Add_timeout_ticks>:
Thread_queue_Queue *queue,
Thread_Control *the_thread,
Per_CPU_Control *cpu_self,
Thread_queue_Context *queue_context
)
{
4000f7e4: 9d e3 bf 98 save %sp, -104, %sp
Watchdog_Interval ticks;
ticks = queue_context->Timeout.ticks;
4000f7e8: c4 06 e0 0c ld [ %i3 + 0xc ], %g2
if ( ticks != WATCHDOG_NO_TIMEOUT ) {
4000f7ec: 80 a0 a0 00 cmp %g2, 0
4000f7f0: 12 80 00 04 bne 4000f800 <_Thread_queue_Add_timeout_ticks+0x1c>
4000f7f4: 01 00 00 00 nop
the_thread,
cpu_self,
queue_context->Timeout.ticks
);
}
}
4000f7f8: 81 c7 e0 08 ret
4000f7fc: 81 e8 00 00 restore
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000f800: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000f804: c2 27 bf fc st %g1, [ %fp + -4 ]
the_thread->Timer.Watchdog.routine = _Thread_Timeout;
4000f808: 07 10 00 3a sethi %hi(0x4000e800), %g3
expire = ticks + cpu->Watchdog.ticks;
4000f80c: d4 1e a0 30 ldd [ %i2 + 0x30 ], %o2
&cpu->Watchdog.Header[ PER_CPU_WATCHDOG_TICKS ];
4000f810: 90 06 a0 38 add %i2, 0x38, %o0
the_thread->Timer.Watchdog.routine = _Thread_Timeout;
4000f814: 86 10 e0 84 or %g3, 0x84, %g3
the_thread->Timer.header =
4000f818: d0 26 60 60 st %o0, [ %i1 + 0x60 ]
_Watchdog_Insert(header, the_watchdog, expire);
4000f81c: b6 82 c0 02 addcc %o3, %g2, %i3
the_thread->Timer.Watchdog.routine = _Thread_Timeout;
4000f820: c6 26 60 78 st %g3, [ %i1 + 0x78 ]
4000f824: b4 42 a0 00 addx %o2, 0, %i2
4000f828: 92 06 60 68 add %i1, 0x68, %o1
4000f82c: 94 10 00 1a mov %i2, %o2
4000f830: 40 00 00 07 call 4000f84c <_Watchdog_Insert>
4000f834: 96 10 00 1b mov %i3, %o3
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000f838: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000f83c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000f840: 01 00 00 00 nop
4000f844: 81 c7 e0 08 ret
4000f848: 81 e8 00 00 restore
400085b4 <_Thread_queue_Deadlock_fatal>:
{
400085b4: 9d e3 bf a0 save %sp, -96, %sp
_Internal_error( INTERNAL_ERROR_THREAD_QUEUE_DEADLOCK );
400085b8: 40 00 04 cb call 400098e4 <_Internal_error>
400085bc: 90 10 20 1c mov 0x1c, %o0
400085c0: 01 00 00 00 nop
<== NOT EXECUTED
400085c4 <_Thread_queue_Enqueue>:
{
400085c4: 9d e3 bf 98 save %sp, -104, %sp
the_thread->Wait.queue = queue;
400085c8: f0 26 a0 54 st %i0, [ %i2 + 0x54 ]
400085cc: 10 80 00 08 b 400085ec <_Thread_queue_Enqueue+0x28>
400085d0: 82 10 00 18 mov %i0, %g1
if ( owner == the_thread ) {
400085d4: 22 80 00 44 be,a 400086e4 <_Thread_queue_Enqueue+0x120>
400085d8: c0 26 a0 54 clr [ %i2 + 0x54 ]
queue = owner->Wait.queue;
400085dc: c2 00 60 54 ld [ %g1 + 0x54 ], %g1
} while ( queue != NULL );
400085e0: 80 a0 60 00 cmp %g1, 0
400085e4: 22 80 00 07 be,a 40008600 <_Thread_queue_Enqueue+0x3c>
400085e8: c0 26 e0 14 clr [ %i3 + 0x14 ]
owner = queue->owner;
400085ec: c2 00 60 04 ld [ %g1 + 4 ], %g1
if ( owner == NULL ) {
400085f0: 80 a0 60 00 cmp %g1, 0
400085f4: 12 bf ff f8 bne 400085d4 <_Thread_queue_Enqueue+0x10>
<== NEVER TAKEN
400085f8: 80 a6 80 01 cmp %i2, %g1
400085fc: c0 26 e0 14 clr [ %i3 + 0x14 ]
( *operations->enqueue )( queue, the_thread, queue_context );
40008600: 94 10 00 1b mov %i3, %o2
the_thread->Wait.operations = operations;
40008604: f2 26 a0 58 st %i1, [ %i2 + 0x58 ]
40008608: 92 10 00 1a mov %i2, %o1
4000860c: c2 06 60 04 ld [ %i1 + 4 ], %g1
40008610: 9f c0 40 00 call %g1
40008614: 90 10 00 18 mov %i0, %o0
the_thread->Wait.flags = flags;
40008618: 82 10 24 01 mov 0x401, %g1
4000861c: c2 26 a0 50 st %g1, [ %i2 + 0x50 ]
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40008620: ba 10 00 06 mov %g6, %i5
disable_level = cpu_self->thread_dispatch_disable_level;
40008624: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
the_thread->Wait.return_code = STATUS_SUCCESSFUL;
40008628: c0 26 a0 4c clr [ %i2 + 0x4c ]
cpu_self->thread_dispatch_disable_level = disable_level + 1;
4000862c: 82 00 60 01 inc %g1
40008630: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008634: c2 06 c0 00 ld [ %i3 ], %g1
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008638: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000863c: 01 00 00 00 nop
( *queue_context->enqueue_callout )(
40008640: c2 06 e0 08 ld [ %i3 + 8 ], %g1
40008644: 96 10 00 1b mov %i3, %o3
40008648: 94 10 00 06 mov %g6, %o2
4000864c: 92 10 00 1a mov %i2, %o1
40008650: 9f c0 40 00 call %g1
40008654: 90 10 00 18 mov %i0, %o0
_Thread_Set_state( the_thread, queue_context->thread_state );
40008658: d2 06 e0 04 ld [ %i3 + 4 ], %o1
4000865c: 7f ff ff 31 call 40008320 <_Thread_Set_state>
40008660: 90 10 00 1a mov %i2, %o0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40008664: 91 d0 20 09 ta 9
<== NOT EXECUTED
bool success = ( the_thread->Wait.flags == expected_flags );
40008668: c4 06 a0 50 ld [ %i2 + 0x50 ], %g2
if ( success ) {
4000866c: 80 a0 a4 01 cmp %g2, 0x401
40008670: 02 80 00 28 be 40008710 <_Thread_queue_Enqueue+0x14c>
40008674: 86 10 24 02 mov 0x402, %g3
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008678: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000867c: 01 00 00 00 nop
if ( !success ) {
40008680: 80 a0 a4 01 cmp %g2, 0x401
40008684: 12 80 00 07 bne 400086a0 <_Thread_queue_Enqueue+0xdc>
40008688: 01 00 00 00 nop
_Thread_Priority_update( queue_context );
4000868c: 90 10 00 1b mov %i3, %o0
<== NOT EXECUTED
40008690: 40 00 13 06 call 4000d2a8 <_Thread_Priority_update>
40008694: b0 10 00 1d mov %i5, %i0
_Thread_Dispatch_direct( cpu_self );
40008698: 7f ff fd b4 call 40007d68 <_Thread_Dispatch_direct>
4000869c: 81 e8 00 00 restore
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400086a0: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
400086a4: c2 27 bf fc st %g1, [ %fp + -4 ]
400086a8: d0 06 a0 60 ld [ %i2 + 0x60 ], %o0
400086ac: 40 00 03 6e call 40009464 <_Watchdog_Remove>
400086b0: 92 06 a0 68 add %i2, 0x68, %o1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400086b4: c2 07 bf fc ld [ %fp + -4 ], %g1
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400086b8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400086bc: 01 00 00 00 nop
_Thread_Clear_state( the_thread, STATES_BLOCKED );
400086c0: 13 0c 00 57 sethi %hi(0x30015c00), %o1
400086c4: 90 10 00 1a mov %i2, %o0
400086c8: 40 00 13 25 call 4000d35c <_Thread_Clear_state>
400086cc: 92 12 63 ff or %o1, 0x3ff, %o1
_Thread_Priority_update( queue_context );
400086d0: 90 10 00 1b mov %i3, %o0
400086d4: 40 00 12 f5 call 4000d2a8 <_Thread_Priority_update>
400086d8: b0 10 00 1d mov %i5, %i0
_Thread_Dispatch_direct( cpu_self );
400086dc: 7f ff fd a3 call 40007d68 <_Thread_Dispatch_direct>
400086e0: 81 e8 00 00 restore
the_thread->Wait.operations = &_Thread_queue_Operations_default;
400086e4: 03 10 00 5d sethi %hi(0x40017400), %g1
<== NOT EXECUTED
400086e8: 82 10 62 68 or %g1, 0x268, %g1 ! 40017668 <_Thread_queue_Operations_default>
<== NOT EXECUTED
400086ec: c2 26 a0 58 st %g1, [ %i2 + 0x58 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400086f0: c2 06 c0 00 ld [ %i3 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400086f4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400086f8: 01 00 00 00 nop
( *queue_context->deadlock_callout )( the_thread );
400086fc: c2 06 e0 20 ld [ %i3 + 0x20 ], %g1
40008700: 9f c0 40 00 call %g1
40008704: 90 10 00 1a mov %i2, %o0
}
40008708: 81 c7 e0 08 ret
4000870c: 81 e8 00 00 restore
the_thread->Wait.flags = desired_flags;
40008710: c6 26 a0 50 st %g3, [ %i2 + 0x50 ]
40008714: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008718: 01 00 00 00 nop
if ( !success ) {
4000871c: 80 a0 a4 01 cmp %g2, 0x401
40008720: 22 bf ff dc be,a 40008690 <_Thread_queue_Enqueue+0xcc>
<== ALWAYS TAKEN
40008724: 90 10 00 1b mov %i3, %o0
40008728: 30 bf ff de b,a 400086a0 <_Thread_queue_Enqueue+0xdc>
<== NOT EXECUTED
4000879c <_Thread_queue_Extract>:
&queue_context->Lock_context.Lock_context
);
}
void _Thread_queue_Extract( Thread_Control *the_thread )
{
4000879c: 9d e3 bf 78 save %sp, -136, %sp
<== NOT EXECUTED
400087a0: c0 27 bf f0 clr [ %fp + -16 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400087a4: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable( &queue_context->Lock_context.Lock_context );
400087a8: c2 27 bf dc st %g1, [ %fp + -36 ]
_Thread_queue_Context_initialize( &queue_context );
_Thread_queue_Context_clear_priority_updates( &queue_context );
_Thread_Wait_acquire( the_thread, &queue_context );
queue = the_thread->Wait.queue;
400087ac: d0 06 20 54 ld [ %i0 + 0x54 ], %o0
if ( queue != NULL ) {
400087b0: 80 a2 20 00 cmp %o0, 0
400087b4: 02 80 00 1c be 40008824 <_Thread_queue_Extract+0x88>
400087b8: 92 10 00 18 mov %i0, %o1
( *operations->extract )( queue, the_thread, queue_context );
400087bc: c2 06 20 58 ld [ %i0 + 0x58 ], %g1
400087c0: c2 00 60 08 ld [ %g1 + 8 ], %g1
400087c4: 9f c0 40 00 call %g1
400087c8: 94 07 bf dc add %fp, -36, %o2
if ( success ) {
400087cc: c2 06 20 50 ld [ %i0 + 0x50 ], %g1
400087d0: 80 a0 64 01 cmp %g1, 0x401
the_thread->Wait.queue = NULL;
400087d4: c0 26 20 54 clr [ %i0 + 0x54 ]
the_thread->Wait.flags = desired_flags;
400087d8: 82 10 24 04 mov 0x404, %g1
if ( success ) {
400087dc: 02 80 00 0a be 40008804 <_Thread_queue_Extract+0x68>
400087e0: c2 26 20 50 st %g1, [ %i0 + 0x50 ]
the_thread->Wait.operations = &_Thread_queue_Operations_default;
400087e4: 03 10 00 5d sethi %hi(0x40017400), %g1
400087e8: 82 10 62 68 or %g1, 0x268, %g1 ! 40017668 <_Thread_queue_Operations_default>
400087ec: c2 26 20 58 st %g1, [ %i0 + 0x58 ]
400087f0: 92 07 bf dc add %fp, -36, %o1
400087f4: 7f ff ff 57 call 40008550 <_Thread_queue_Unblock_critical.part.31>
400087f8: 90 10 00 18 mov %i0, %o0
&queue_context.Lock_context.Lock_context
);
} else {
_Thread_Wait_release( the_thread, &queue_context );
}
}
400087fc: 81 c7 e0 08 ret
40008800: 81 e8 00 00 restore
40008804: 03 10 00 5d sethi %hi(0x40017400), %g1
<== NOT EXECUTED
40008808: 82 10 62 68 or %g1, 0x268, %g1 ! 40017668 <_Thread_queue_Operations_default>
<== NOT EXECUTED
4000880c: c2 26 20 58 st %g1, [ %i0 + 0x58 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008810: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008814: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008818: 01 00 00 00 nop
<== NOT EXECUTED
4000881c: 81 c7 e0 08 ret
<== NOT EXECUTED
40008820: 81 e8 00 00 restore
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008824: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008828: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000882c: 01 00 00 00 nop
40008830: 81 c7 e0 08 ret
40008834: 81 e8 00 00 restore
4000eb54 <_Thread_queue_Extract_critical>:
Thread_queue_Queue *queue,
const Thread_queue_Operations *operations,
Thread_Control *the_thread,
Thread_queue_Context *queue_context
)
{
4000eb54: 9d e3 bf a0 save %sp, -96, %sp
( *operations->extract )( queue, the_thread, queue_context );
4000eb58: c2 06 60 08 ld [ %i1 + 8 ], %g1
4000eb5c: 92 10 00 1a mov %i2, %o1
4000eb60: 94 10 00 1b mov %i3, %o2
4000eb64: 9f c0 40 00 call %g1
4000eb68: 90 10 00 18 mov %i0, %o0
if ( success ) {
4000eb6c: c2 06 a0 50 ld [ %i2 + 0x50 ], %g1
4000eb70: 80 a0 64 01 cmp %g1, 0x401
the_thread->Wait.queue = NULL;
4000eb74: c0 26 a0 54 clr [ %i2 + 0x54 ]
the_thread->Wait.flags = desired_flags;
4000eb78: 82 10 24 04 mov 0x404, %g1
if ( success ) {
4000eb7c: 02 80 00 08 be 4000eb9c <_Thread_queue_Extract_critical+0x48>
4000eb80: c2 26 a0 50 st %g1, [ %i2 + 0x50 ]
the_thread->Wait.operations = &_Thread_queue_Operations_default;
4000eb84: 03 10 00 6e sethi %hi(0x4001b800), %g1
4000eb88: 82 10 62 50 or %g1, 0x250, %g1 ! 4001ba50 <_Thread_queue_Operations_default>
4000eb8c: c2 26 a0 58 st %g1, [ %i2 + 0x58 ]
4000eb90: b2 10 00 1b mov %i3, %i1
4000eb94: 7f ff ff 59 call 4000e8f8 <_Thread_queue_Unblock_critical.part.31>
4000eb98: 91 e8 00 1a restore %g0, %i2, %o0
4000eb9c: 03 10 00 6e sethi %hi(0x4001b800), %g1
<== NOT EXECUTED
4000eba0: 82 10 62 50 or %g1, 0x250, %g1 ! 4001ba50 <_Thread_queue_Operations_default>
<== NOT EXECUTED
4000eba4: c2 26 a0 58 st %g1, [ %i2 + 0x58 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000eba8: c2 06 c0 00 ld [ %i3 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000ebac: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000ebb0: 01 00 00 00 nop
unblock,
queue,
the_thread,
&queue_context->Lock_context.Lock_context
);
}
4000ebb4: 81 c7 e0 08 ret
4000ebb8: 81 e8 00 00 restore
4000872c <_Thread_queue_Extract_locked>:
{
4000872c: 9d e3 bf a0 save %sp, -96, %sp
<== NOT EXECUTED
( *operations->extract )( queue, the_thread, queue_context );
40008730: c2 06 60 08 ld [ %i1 + 8 ], %g1
<== NOT EXECUTED
40008734: 94 10 00 1b mov %i3, %o2
<== NOT EXECUTED
40008738: 92 10 00 1a mov %i2, %o1
<== NOT EXECUTED
4000873c: 9f c0 40 00 call %g1
<== NOT EXECUTED
40008740: 90 10 00 18 mov %i0, %o0
<== NOT EXECUTED
if ( success ) {
40008744: c2 06 a0 50 ld [ %i2 + 0x50 ], %g1
<== NOT EXECUTED
40008748: 80 a0 64 01 cmp %g1, 0x401
<== NOT EXECUTED
4000874c: 02 80 00 0b be 40008778 <_Thread_queue_Extract_locked+0x4c>
<== NOT EXECUTED
40008750: 82 10 24 04 mov 0x404, %g1
<== NOT EXECUTED
unblock = true;
40008754: b0 10 20 01 mov 1, %i0
<== NOT EXECUTED
the_thread->Wait.flags = flags;
40008758: c2 26 a0 50 st %g1, [ %i2 + 0x50 ]
<== NOT EXECUTED
return _Thread_queue_Make_ready_again( the_thread );
4000875c: b0 0e 20 ff and %i0, 0xff, %i0
<== NOT EXECUTED
the_thread->Wait.queue = NULL;
40008760: c0 26 a0 54 clr [ %i2 + 0x54 ]
<== NOT EXECUTED
the_thread->Wait.operations = &_Thread_queue_Operations_default;
40008764: 03 10 00 5d sethi %hi(0x40017400), %g1
<== NOT EXECUTED
40008768: 82 10 62 68 or %g1, 0x268, %g1 ! 40017668 <_Thread_queue_Operations_default>
<== NOT EXECUTED
4000876c: c2 26 a0 58 st %g1, [ %i2 + 0x58 ]
<== NOT EXECUTED
}
40008770: 81 c7 e0 08 ret
<== NOT EXECUTED
40008774: 81 e8 00 00 restore
<== NOT EXECUTED
unblock = false;
40008778: b0 10 20 00 clr %i0
<== NOT EXECUTED
the_thread->Wait.flags = desired_flags;
4000877c: c2 26 a0 50 st %g1, [ %i2 + 0x50 ]
<== NOT EXECUTED
return _Thread_queue_Make_ready_again( the_thread );
40008780: b0 0e 20 ff and %i0, 0xff, %i0
<== NOT EXECUTED
the_thread->Wait.queue = NULL;
40008784: c0 26 a0 54 clr [ %i2 + 0x54 ]
<== NOT EXECUTED
the_thread->Wait.operations = &_Thread_queue_Operations_default;
40008788: 03 10 00 5d sethi %hi(0x40017400), %g1
<== NOT EXECUTED
4000878c: 82 10 62 68 or %g1, 0x268, %g1 ! 40017668 <_Thread_queue_Operations_default>
<== NOT EXECUTED
40008790: c2 26 a0 58 st %g1, [ %i2 + 0x58 ]
<== NOT EXECUTED
}
40008794: 81 c7 e0 08 ret
<== NOT EXECUTED
40008798: 81 e8 00 00 restore
<== NOT EXECUTED
4000f9d8 <_Thread_queue_First>:
Thread_Control *_Thread_queue_First(
Thread_queue_Control *the_thread_queue,
const Thread_queue_Operations *operations
)
{
4000f9d8: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000f9dc: 91 d0 20 09 ta 9
<== NOT EXECUTED
Thread_Control *the_thread;
Thread_queue_Context queue_context;
_Thread_queue_Acquire( the_thread_queue, &queue_context );
the_thread = _Thread_queue_First_locked( the_thread_queue, operations );
4000f9e0: d0 06 00 00 ld [ %i0 ], %o0
const Thread_queue_Operations *operations
)
{
Thread_queue_Heads *heads = the_thread_queue->Queue.heads;
if ( heads != NULL ) {
4000f9e4: 80 a2 20 00 cmp %o0, 0
4000f9e8: 22 80 00 07 be,a 4000fa04 <_Thread_queue_First+0x2c>
4000f9ec: b0 10 20 00 clr %i0
return ( *operations->first )( heads );
4000f9f0: c4 06 60 10 ld [ %i1 + 0x10 ], %g2
4000f9f4: 9f c0 80 00 call %g2
4000f9f8: c2 27 bf fc st %g1, [ %fp + -4 ]
4000f9fc: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
4000fa00: b0 10 00 08 mov %o0, %i0
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000fa04: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000fa08: 01 00 00 00 nop
_Thread_queue_Release( the_thread_queue, &queue_context );
return the_thread;
}
4000fa0c: 81 c7 e0 08 ret
4000fa10: 81 e8 00 00 restore
40008914 <_Thread_queue_Flush_critical>:
Thread_queue_Queue *queue,
const Thread_queue_Operations *operations,
Thread_queue_Flush_filter filter,
Thread_queue_Context *queue_context
)
{
40008914: 9d e3 bf 88 save %sp, -120, %sp
head->next = tail;
40008918: a0 07 bf f8 add %fp, -8, %l0
tail->previous = head;
4000891c: 82 07 bf f4 add %fp, -12, %g1
head->previous = NULL;
40008920: c0 27 bf f8 clr [ %fp + -8 ]
40008924: b8 10 00 18 mov %i0, %i4
head->next = tail;
40008928: e0 27 bf f4 st %l0, [ %fp + -12 ]
tail->previous = head;
4000892c: c2 27 bf fc st %g1, [ %fp + -4 ]
while ( true ) {
Thread_queue_Heads *heads;
Thread_Control *first;
bool do_unblock;
heads = queue->heads;
40008930: d0 06 00 00 ld [ %i0 ], %o0
owner = queue->owner;
40008934: e2 06 20 04 ld [ %i0 + 4 ], %l1
if ( heads == NULL ) {
40008938: 80 a2 20 00 cmp %o0, 0
4000893c: 12 80 00 16 bne 40008994 <_Thread_queue_Flush_critical+0x80>
<== NEVER TAKEN
40008940: b0 10 20 00 clr %i0
40008944: 30 80 00 4c b,a 40008a74 <_Thread_queue_Flush_critical+0x160>
* updates, so clear it each time. We unconditionally do the priority
* update for the owner later if it exists.
*/
_Thread_queue_Context_clear_priority_updates( queue_context );
do_unblock = _Thread_queue_Extract_locked(
40008948: 96 10 00 1b mov %i3, %o3
4000894c: 94 10 00 1d mov %i5, %o2
40008950: 92 10 00 19 mov %i1, %o1
40008954: 7f ff ff 76 call 4000872c <_Thread_queue_Extract_locked>
40008958: 90 10 00 1c mov %i4, %o0
queue,
operations,
first,
queue_context
);
if ( do_unblock ) {
4000895c: 80 a2 20 00 cmp %o0, 0
40008960: 22 80 00 0a be,a 40008988 <_Thread_queue_Flush_critical+0x74>
40008964: d0 07 00 00 ld [ %i4 ], %o0
Scheduler_Node *scheduler_node;
scheduler_node = _Thread_Scheduler_get_home_node( first );
40008968: c2 07 60 38 ld [ %i5 + 0x38 ], %g1
old_last = tail->previous;
4000896c: c4 07 bf fc ld [ %fp + -4 ], %g2
the_node->next = tail;
40008970: e0 20 60 08 st %l0, [ %g1 + 8 ]
_Chain_Append_unprotected(
40008974: 86 00 60 08 add %g1, 8, %g3
tail->previous = the_node;
40008978: c6 27 bf fc st %g3, [ %fp + -4 ]
old_last->next = the_node;
4000897c: c6 20 80 00 st %g3, [ %g2 ]
the_node->previous = old_last;
40008980: c4 20 60 0c st %g2, [ %g1 + 0xc ]
heads = queue->heads;
40008984: d0 07 00 00 ld [ %i4 ], %o0
if ( heads == NULL ) {
40008988: 80 a2 20 00 cmp %o0, 0
4000898c: 02 80 00 0b be 400089b8 <_Thread_queue_Flush_critical+0xa4>
<== ALWAYS TAKEN
40008990: b0 06 20 01 inc %i0
first = ( *operations->first )( heads );
40008994: c2 06 60 10 ld [ %i1 + 0x10 ], %g1
40008998: 9f c0 40 00 call %g1
4000899c: 01 00 00 00 nop
first = ( *filter )( first, queue, queue_context );
400089a0: 94 10 00 1b mov %i3, %o2
400089a4: 9f c6 80 00 call %i2
400089a8: 92 10 00 1c mov %i4, %o1
if ( first == NULL ) {
400089ac: ba 92 20 00 orcc %o0, 0, %i5
400089b0: 32 bf ff e6 bne,a 40008948 <_Thread_queue_Flush_critical+0x34>
400089b4: c0 26 e0 14 clr [ %i3 + 0x14 ]
return _Chain_Immutable_head( the_chain )->next;
400089b8: c4 07 bf f4 ld [ %fp + -12 ], %g2
}
node = _Chain_First( &unblock );
tail = _Chain_Tail( &unblock );
if ( node != tail ) {
400089bc: 80 a0 80 10 cmp %g2, %l0
400089c0: 02 80 00 2d be 40008a74 <_Thread_queue_Flush_critical+0x160>
400089c4: 01 00 00 00 nop
disable_level = cpu_self->thread_dispatch_disable_level;
400089c8: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400089cc: 82 00 60 01 inc %g1
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
400089d0: b4 10 00 06 mov %g6, %i2
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400089d4: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400089d8: c2 06 c0 00 ld [ %i3 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400089dc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400089e0: 01 00 00 00 nop
<== NOT EXECUTED
_Thread_Clear_state( the_thread, STATES_BLOCKED );
400089e4: 37 0c 00 57 sethi %hi(0x30015c00), %i3
<== NOT EXECUTED
400089e8: b6 16 e3 ff or %i3, 0x3ff, %i3 ! 30015fff <RAM_SIZE+0x2fc15fff>
<== NOT EXECUTED
do {
Scheduler_Node *scheduler_node;
Thread_Control *the_thread;
Chain_Node *next;
next = _Chain_Next( node );
400089ec: f8 00 80 00 ld [ %g2 ], %i4
<== NOT EXECUTED
scheduler_node = SCHEDULER_NODE_OF_WAIT_PRIORITY_NODE( node );
the_thread = _Scheduler_Node_get_owner( scheduler_node );
400089f0: fa 00 bf f8 ld [ %g2 + -8 ], %i5
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400089f4: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
400089f8: c2 27 bf ec st %g1, [ %fp + -20 ]
400089fc: d0 07 60 60 ld [ %i5 + 0x60 ], %o0
40008a00: 40 00 02 99 call 40009464 <_Watchdog_Remove>
40008a04: 92 07 60 68 add %i5, 0x68, %o1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008a08: c2 07 bf ec ld [ %fp + -20 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008a0c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008a10: 01 00 00 00 nop
40008a14: 92 10 00 1b mov %i3, %o1
40008a18: 40 00 12 51 call 4000d35c <_Thread_Clear_state>
40008a1c: 90 10 00 1d mov %i5, %o0
_Thread_Remove_timer_and_unblock( the_thread, queue );
node = next;
} while ( node != tail );
40008a20: 80 a7 00 10 cmp %i4, %l0
40008a24: 12 bf ff f2 bne 400089ec <_Thread_queue_Flush_critical+0xd8>
40008a28: 84 10 00 1c mov %i4, %g2
if ( owner != NULL ) {
40008a2c: 80 a4 60 00 cmp %l1, 0
40008a30: 02 80 00 0d be 40008a64 <_Thread_queue_Flush_critical+0x150>
40008a34: 01 00 00 00 nop
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40008a38: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
40008a3c: c2 27 bf ec st %g1, [ %fp + -20 ]
( *scheduler->Operations.update_priority )(
40008a40: 11 10 00 5a sethi %hi(0x40016800), %o0
40008a44: d4 04 60 38 ld [ %l1 + 0x38 ], %o2
40008a48: 90 12 22 b0 or %o0, 0x2b0, %o0
40008a4c: c4 02 20 18 ld [ %o0 + 0x18 ], %g2
40008a50: 9f c0 80 00 call %g2
40008a54: 92 10 00 11 mov %l1, %o1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008a58: c2 07 bf ec ld [ %fp + -20 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008a5c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008a60: 01 00 00 00 nop
_Thread_State_acquire( owner, &lock_context );
_Scheduler_Update_priority( owner );
_Thread_State_release( owner, &lock_context );
}
_Thread_Dispatch_enable( cpu_self );
40008a64: 7f ff fc cc call 40007d94 <_Thread_Dispatch_enable>
40008a68: 90 10 00 1a mov %i2, %o0
40008a6c: 81 c7 e0 08 ret
40008a70: 81 e8 00 00 restore
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008a74: c2 06 c0 00 ld [ %i3 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008a78: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008a7c: 01 00 00 00 nop
} else {
_Thread_queue_Queue_release( queue, &queue_context->Lock_context.Lock_context );
}
return flushed;
}
40008a80: 81 c7 e0 08 ret
40008a84: 81 e8 00 00 restore
40043f98 <_Thread_queue_Queue_get_name_and_id>:
const Thread_queue_Queue *queue,
char *buffer,
size_t buffer_size,
Objects_Id *id
)
{
40043f98: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
const char *name;
name = queue->name;
40043f9c: c4 06 20 08 ld [ %i0 + 8 ], %g2
<== NOT EXECUTED
if ( name == _Thread_queue_Object_name ) {
40043fa0: 03 10 02 48 sethi %hi(0x40092000), %g1
<== NOT EXECUTED
40043fa4: 82 10 61 10 or %g1, 0x110, %g1 ! 40092110 <_Thread_queue_Object_name>
<== NOT EXECUTED
40043fa8: 80 a0 80 01 cmp %g2, %g1
<== NOT EXECUTED
40043fac: 02 80 00 0c be 40043fdc <_Thread_queue_Queue_get_name_and_id+0x44>
<== NOT EXECUTED
40043fb0: 94 10 00 19 mov %i1, %o2
<== NOT EXECUTED
false,
buffer,
buffer_size
);
} else {
if ( name == NULL ) {
40043fb4: 80 a0 a0 00 cmp %g2, 0
<== NOT EXECUTED
40043fb8: 02 80 00 05 be 40043fcc <_Thread_queue_Queue_get_name_and_id+0x34>
<== NOT EXECUTED
40043fbc: c0 26 c0 00 clr [ %i3 ]
<== NOT EXECUTED
name = _Thread_queue_Object_name;
}
*id = 0;
return strlcpy( buffer, name, buffer_size );
40043fc0: b2 10 00 02 mov %g2, %i1
<== NOT EXECUTED
40043fc4: 40 00 5e 26 call 4005b85c <strlcpy>
<== NOT EXECUTED
40043fc8: 91 e8 00 0a restore %g0, %o2, %o0
<== NOT EXECUTED
name = _Thread_queue_Object_name;
40043fcc: 84 10 00 01 mov %g1, %g2
<== NOT EXECUTED
return strlcpy( buffer, name, buffer_size );
40043fd0: b0 10 00 0a mov %o2, %i0
<== NOT EXECUTED
40043fd4: 40 00 5e 22 call 4005b85c <strlcpy>
<== NOT EXECUTED
40043fd8: 93 e8 00 02 restore %g0, %g2, %o1
<== NOT EXECUTED
*id = queue_object->Object.id;
40043fdc: c4 06 3f f8 ld [ %i0 + -8 ], %g2
<== NOT EXECUTED
40043fe0: c4 26 c0 00 st %g2, [ %i3 ]
<== NOT EXECUTED
return _Objects_Name_to_string(
40043fe4: 96 10 00 1a mov %i2, %o3
<== NOT EXECUTED
40043fe8: c2 06 3f fc ld [ %i0 + -4 ], %g1
<== NOT EXECUTED
40043fec: c2 27 bf fc st %g1, [ %fp + -4 ]
<== NOT EXECUTED
40043ff0: 92 10 20 00 clr %o1
<== NOT EXECUTED
40043ff4: 7f ff d6 6a call 4003999c <_Objects_Name_to_string>
<== NOT EXECUTED
40043ff8: 90 07 bf fc add %fp, -4, %o0
<== NOT EXECUTED
}
}
40043ffc: 81 c7 e0 08 ret
<== NOT EXECUTED
40044000: 91 e8 00 08 restore %g0, %o0, %o0
<== NOT EXECUTED
40008838 <_Thread_queue_Surrender>:
Thread_queue_Heads *heads,
Thread_Control *previous_owner,
Thread_queue_Context *queue_context,
const Thread_queue_Operations *operations
)
{
40008838: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
4000883c: c0 26 e0 14 clr [ %i3 + 0x14 ]
<== NOT EXECUTED
Per_CPU_Control *cpu_self;
_Assert( heads != NULL );
_Thread_queue_Context_clear_priority_updates( queue_context );
new_owner = ( *operations->surrender )(
40008840: 96 10 00 1b mov %i3, %o3
<== NOT EXECUTED
40008844: c2 07 20 0c ld [ %i4 + 0xc ], %g1
<== NOT EXECUTED
40008848: 94 10 00 1a mov %i2, %o2
<== NOT EXECUTED
4000884c: 92 10 00 19 mov %i1, %o1
<== NOT EXECUTED
40008850: 9f c0 40 00 call %g1
<== NOT EXECUTED
40008854: 90 10 00 18 mov %i0, %o0
<== NOT EXECUTED
queue,
heads,
previous_owner,
queue_context
);
queue->owner = new_owner;
40008858: d0 26 20 04 st %o0, [ %i0 + 4 ]
<== NOT EXECUTED
if ( success ) {
4000885c: c2 02 20 50 ld [ %o0 + 0x50 ], %g1
<== NOT EXECUTED
40008860: 80 a0 64 01 cmp %g1, 0x401
<== NOT EXECUTED
40008864: 02 80 00 25 be 400088f8 <_Thread_queue_Surrender+0xc0>
<== NOT EXECUTED
40008868: ba 10 00 08 mov %o0, %i5
<== NOT EXECUTED
the_thread->Wait.flags = flags;
4000886c: 82 10 24 04 mov 0x404, %g1
<== NOT EXECUTED
40008870: c2 22 20 50 st %g1, [ %o0 + 0x50 ]
<== NOT EXECUTED
unblock = true;
40008874: b8 10 20 01 mov 1, %i4
<== NOT EXECUTED
disable_level = cpu_self->thread_dispatch_disable_level;
40008878: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
the_thread->Wait.queue = NULL;
4000887c: c0 27 60 54 clr [ %i5 + 0x54 ]
<== NOT EXECUTED
the_thread->Wait.operations = &_Thread_queue_Operations_default;
40008880: 05 10 00 5d sethi %hi(0x40017400), %g2
<== NOT EXECUTED
40008884: 84 10 a2 68 or %g2, 0x268, %g2 ! 40017668 <_Thread_queue_Operations_default>
<== NOT EXECUTED
40008888: c4 27 60 58 st %g2, [ %i5 + 0x58 ]
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
4000888c: 82 00 60 01 inc %g1
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40008890: b0 10 00 06 mov %g6, %i0
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40008894: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008898: c2 06 c0 00 ld [ %i3 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000889c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400088a0: 01 00 00 00 nop
_Thread_queue_Queue_release(
queue,
&queue_context->Lock_context.Lock_context
);
_Thread_Priority_update( queue_context );
400088a4: 40 00 12 81 call 4000d2a8 <_Thread_Priority_update>
400088a8: 90 10 00 1b mov %i3, %o0
if ( unblock ) {
400088ac: 80 8f 20 ff btst 0xff, %i4
400088b0: 12 80 00 04 bne 400088c0 <_Thread_queue_Surrender+0x88>
400088b4: 01 00 00 00 nop
_Thread_Remove_timer_and_unblock( new_owner, queue );
}
_Thread_Dispatch_enable( cpu_self );
400088b8: 7f ff fd 37 call 40007d94 <_Thread_Dispatch_enable>
<== NOT EXECUTED
400088bc: 81 e8 00 00 restore
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400088c0: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
400088c4: c2 27 bf fc st %g1, [ %fp + -4 ]
400088c8: d0 07 60 60 ld [ %i5 + 0x60 ], %o0
400088cc: 40 00 02 e6 call 40009464 <_Watchdog_Remove>
400088d0: 92 07 60 68 add %i5, 0x68, %o1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400088d4: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400088d8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400088dc: 01 00 00 00 nop
_Thread_Clear_state( the_thread, STATES_BLOCKED );
400088e0: 13 0c 00 57 sethi %hi(0x30015c00), %o1
400088e4: 90 10 00 1d mov %i5, %o0
400088e8: 40 00 12 9d call 4000d35c <_Thread_Clear_state>
400088ec: 92 12 63 ff or %o1, 0x3ff, %o1
400088f0: 7f ff fd 29 call 40007d94 <_Thread_Dispatch_enable>
400088f4: 81 e8 00 00 restore
the_thread->Wait.flags = desired_flags;
400088f8: 82 10 24 04 mov 0x404, %g1
<== NOT EXECUTED
unblock = false;
400088fc: b8 10 20 00 clr %i4
<== NOT EXECUTED
40008900: 10 bf ff de b 40008878 <_Thread_queue_Surrender+0x40>
<== NOT EXECUTED
40008904: c2 22 20 50 st %g1, [ %o0 + 0x50 ]
<== NOT EXECUTED
4000ad0c <_Timecounter_Bintime>:
{
4000ad0c: 9d e3 bf a0 save %sp, -96, %sp
4000ad10: 33 10 00 68 sethi %hi(0x4001a000), %i1
4000ad14: b2 16 63 74 or %i1, 0x374, %i1 ! 4001a374 <timehands>
th = timehands;
4000ad18: fa 06 40 00 ld [ %i1 ], %i5
gen = atomic_load_acq_int(&th->th_generation);
4000ad1c: f4 07 60 70 ld [ %i5 + 0x70 ], %i2
*bt = th->th_bintime;
4000ad20: c4 1f 60 30 ldd [ %i5 + 0x30 ], %g2
4000ad24: c4 3e 00 00 std %g2, [ %i0 ]
4000ad28: c4 1f 60 38 ldd [ %i5 + 0x38 ], %g2
bintime_addx(bt, th->th_scale * tc_delta(th));
4000ad2c: f6 07 40 00 ld [ %i5 ], %i3
*bt = th->th_bintime;
4000ad30: c4 3e 20 08 std %g2, [ %i0 + 8 ]
return ((tc->tc_get_timecount(tc) - th->th_offset_count) &
4000ad34: 90 10 00 1b mov %i3, %o0
4000ad38: c2 06 c0 00 ld [ %i3 ], %g1
bintime_addx(bt, th->th_scale * tc_delta(th));
4000ad3c: f8 07 60 10 ld [ %i5 + 0x10 ], %i4
return ((tc->tc_get_timecount(tc) - th->th_offset_count) &
4000ad40: 9f c0 40 00 call %g1
4000ad44: e0 07 60 14 ld [ %i5 + 0x14 ], %l0
4000ad48: c4 1e 20 08 ldd [ %i0 + 8 ], %g2
4000ad4c: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
4000ad50: f6 06 e0 04 ld [ %i3 + 4 ], %i3
4000ad54: 90 22 00 01 sub %o0, %g1, %o0
4000ad58: 90 0a 00 1b and %o0, %i3, %o0
bintime_addx(bt, th->th_scale * tc_delta(th));
4000ad5c: b8 5f 00 08 smul %i4, %o0, %i4
4000ad60: 92 52 00 10 umul %o0, %l0, %o1
4000ad64: 91 40 00 00 rd %y, %o0
4000ad68: 90 07 00 08 add %i4, %o0, %o0
4000ad6c: 9a 82 40 03 addcc %o1, %g3, %o5
4000ad70: 98 c2 00 02 addxcc %o0, %g2, %o4
4000ad74: 0a 80 00 12 bcs 4000adbc <_Timecounter_Bintime+0xb0>
4000ad78: 88 10 20 00 clr %g4
if (_u > _bt->frac)
4000ad7c: 80 a1 20 00 cmp %g4, 0
4000ad80: 02 80 00 06 be 4000ad98 <_Timecounter_Bintime+0x8c>
<== ALWAYS TAKEN
4000ad84: d8 3e 20 08 std %o4, [ %i0 + 8 ]
_bt->sec++;
4000ad88: c4 1e 00 00 ldd [ %i0 ], %g2
4000ad8c: 9a 80 e0 01 addcc %g3, 1, %o5
4000ad90: 98 40 a0 00 addx %g2, 0, %o4
4000ad94: d8 3e 00 00 std %o4, [ %i0 ]
} while (gen == 0 || gen != th->th_generation);
4000ad98: 80 a6 a0 00 cmp %i2, 0
4000ad9c: 02 bf ff df be 4000ad18 <_Timecounter_Bintime+0xc>
4000ada0: 01 00 00 00 nop
4000ada4: c2 07 60 70 ld [ %i5 + 0x70 ], %g1
4000ada8: 80 a0 40 1a cmp %g1, %i2
4000adac: 12 bf ff db bne 4000ad18 <_Timecounter_Bintime+0xc>
4000adb0: 01 00 00 00 nop
}
4000adb4: 81 c7 e0 08 ret
4000adb8: 81 e8 00 00 restore
4000adbc: 10 bf ff f0 b 4000ad7c <_Timecounter_Bintime+0x70>
4000adc0: 88 10 20 01 mov 1, %g4
4000ae4c <_Timecounter_Getbintime>:
{
4000ae4c: 07 10 00 68 sethi %hi(0x4001a000), %g3
4000ae50: 86 10 e3 74 or %g3, 0x374, %g3 ! 4001a374 <timehands>
th = timehands;
4000ae54: c2 00 c0 00 ld [ %g3 ], %g1
gen = atomic_load_acq_int(&th->th_generation);
4000ae58: c4 00 60 70 ld [ %g1 + 0x70 ], %g2
*bt = th->th_bintime;
4000ae5c: d8 18 60 30 ldd [ %g1 + 0x30 ], %o4
4000ae60: d8 3a 00 00 std %o4, [ %o0 ]
4000ae64: d8 18 60 38 ldd [ %g1 + 0x38 ], %o4
4000ae68: d8 3a 20 08 std %o4, [ %o0 + 8 ]
} while (gen == 0 || gen != th->th_generation);
4000ae6c: 80 a0 a0 00 cmp %g2, 0
4000ae70: 02 bf ff f9 be 4000ae54 <_Timecounter_Getbintime+0x8>
<== NEVER TAKEN
4000ae74: 01 00 00 00 nop
4000ae78: c2 00 60 70 ld [ %g1 + 0x70 ], %g1
4000ae7c: 80 a0 40 02 cmp %g1, %g2
4000ae80: 12 bf ff f5 bne 4000ae54 <_Timecounter_Getbintime+0x8>
4000ae84: 01 00 00 00 nop
}
4000ae88: 81 c3 e0 08 retl
4000ae8c: 01 00 00 00 nop
4000aed4 <_Timecounter_Install>:
{
4000aed4: 9d e3 bf 98 save %sp, -104, %sp
if (tc->tc_quality < timecounter->tc_quality)
4000aed8: 03 10 00 68 sethi %hi(0x4001a000), %g1
4000aedc: c4 00 63 70 ld [ %g1 + 0x370 ], %g2 ! 4001a370 <_Timecounter>
4000aee0: c6 00 a0 14 ld [ %g2 + 0x14 ], %g3
4000aee4: c8 06 20 14 ld [ %i0 + 0x14 ], %g4
4000aee8: 80 a1 00 03 cmp %g4, %g3
4000aeec: 06 80 00 16 bl 4000af44 <_Timecounter_Install+0x70>
4000aef0: 01 00 00 00 nop
if (tc->tc_quality == timecounter->tc_quality &&
4000aef4: 32 80 00 0f bne,a 4000af30 <_Timecounter_Install+0x5c>
4000aef8: f0 20 63 70 st %i0, [ %g1 + 0x370 ]
4000aefc: c8 00 a0 08 ld [ %g2 + 8 ], %g4
4000af00: c6 06 20 08 ld [ %i0 + 8 ], %g3
4000af04: 80 a1 00 03 cmp %g4, %g3
4000af08: 18 80 00 0f bgu 4000af44 <_Timecounter_Install+0x70>
4000af0c: 01 00 00 00 nop
4000af10: 32 80 00 08 bne,a 4000af30 <_Timecounter_Install+0x5c>
<== NEVER TAKEN
4000af14: f0 20 63 70 st %i0, [ %g1 + 0x370 ]
<== NOT EXECUTED
4000af18: c6 00 a0 0c ld [ %g2 + 0xc ], %g3
4000af1c: c4 06 20 0c ld [ %i0 + 0xc ], %g2
4000af20: 80 a0 c0 02 cmp %g3, %g2
4000af24: 18 80 00 08 bgu 4000af44 <_Timecounter_Install+0x70>
4000af28: 01 00 00 00 nop
timecounter = tc;
4000af2c: f0 20 63 70 st %i0, [ %g1 + 0x370 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000af30: 91 d0 20 09 ta 9
<== NOT EXECUTED
_Timecounter_Acquire(&lock_context);
4000af34: c2 27 bf fc st %g1, [ %fp + -4 ]
_Timecounter_Windup(new_boottimebin, &lock_context);
4000af38: 90 10 20 00 clr %o0
4000af3c: 7f ff fe aa call 4000a9e4 <_Timecounter_Windup>
4000af40: 92 07 bf fc add %fp, -4, %o1
}
4000af44: 81 c7 e0 08 ret
4000af48: 81 e8 00 00 restore
4000ac78 <_Timecounter_Sbinuptime>:
{
4000ac78: 9d e3 bf a0 save %sp, -96, %sp
4000ac7c: 33 10 00 68 sethi %hi(0x4001a000), %i1
4000ac80: b2 16 63 74 or %i1, 0x374, %i1 ! 4001a374 <timehands>
th = timehands;
4000ac84: fa 06 40 00 ld [ %i1 ], %i5
gen = atomic_load_acq_int(&th->th_generation);
4000ac88: f6 07 60 70 ld [ %i5 + 0x70 ], %i3
sbt += (th->th_scale * tc_delta(th)) >> 32;
4000ac8c: f8 07 40 00 ld [ %i5 ], %i4
return ((tc->tc_get_timecount(tc) - th->th_offset_count) &
4000ac90: c2 07 00 00 ld [ %i4 ], %g1
4000ac94: e2 07 60 24 ld [ %i5 + 0x24 ], %l1
4000ac98: e0 07 60 28 ld [ %i5 + 0x28 ], %l0
sbt += (th->th_scale * tc_delta(th)) >> 32;
4000ac9c: f4 07 60 10 ld [ %i5 + 0x10 ], %i2
4000aca0: e4 07 60 14 ld [ %i5 + 0x14 ], %l2
return ((tc->tc_get_timecount(tc) - th->th_offset_count) &
4000aca4: 9f c0 40 00 call %g1
4000aca8: 90 10 00 1c mov %i4, %o0
4000acac: c4 07 60 18 ld [ %i5 + 0x18 ], %g2
tc->tc_counter_mask);
4000acb0: c2 07 20 04 ld [ %i4 + 4 ], %g1
} while (gen == 0 || gen != th->th_generation);
4000acb4: 80 a6 e0 00 cmp %i3, 0
4000acb8: 02 bf ff f3 be 4000ac84 <_Timecounter_Sbinuptime+0xc>
4000acbc: 01 00 00 00 nop
4000acc0: c6 07 60 70 ld [ %i5 + 0x70 ], %g3
4000acc4: 80 a0 c0 1b cmp %g3, %i3
4000acc8: 12 bf ff ef bne 4000ac84 <_Timecounter_Sbinuptime+0xc>
<== NEVER TAKEN
4000accc: 84 22 00 02 sub %o0, %g2, %g2
return ((tc->tc_get_timecount(tc) - th->th_offset_count) &
4000acd0: 84 08 80 01 and %g2, %g1, %g2
sbt += (th->th_scale * tc_delta(th)) >> 32;
4000acd4: b4 5e 80 02 smul %i2, %g2, %i2
4000acd8: 86 50 80 12 umul %g2, %l2, %g3
4000acdc: 85 40 00 00 rd %y, %g2
return (((sbintime_t)_bt.sec << 32) + (_bt.frac >> 32));
4000ace0: 9a 10 20 00 clr %o5
4000ace4: ba 06 80 02 add %i2, %g2, %i5
4000ace8: b2 83 40 10 addcc %o5, %l0, %i1
4000acec: 84 10 20 00 clr %g2
4000acf0: b0 44 40 02 addx %l1, %g2, %i0
4000acf4: b8 10 20 00 clr %i4
}
4000acf8: 86 87 40 19 addcc %i5, %i1, %g3
4000acfc: 84 47 00 18 addx %i4, %i0, %g2
4000ad00: b2 10 00 03 mov %g3, %i1
4000ad04: 81 c7 e0 08 ret
4000ad08: 91 e8 00 02 restore %g0, %g2, %o0
4000af4c <_Timecounter_Tick>:
}
}
#else /* __rtems__ */
void
_Timecounter_Tick(void)
{
4000af4c: 9d e3 bf 98 save %sp, -104, %sp
Per_CPU_Control *cpu_self = _Per_CPU_Get();
4000af50: ba 10 00 06 mov %g6, %i5
<== NOT EXECUTED
4000af54: 91 d0 20 09 ta 9
<== NOT EXECUTED
_Timecounter_Acquire(&lock_context);
4000af58: c2 27 bf fc st %g1, [ %fp + -4 ]
_Timecounter_Windup(new_boottimebin, &lock_context);
4000af5c: 90 10 20 00 clr %o0
4000af60: 7f ff fe a1 call 4000a9e4 <_Timecounter_Windup>
4000af64: 92 07 bf fc add %fp, -4, %o1
if (_Per_CPU_Is_boot_processor(cpu_self)) {
tc_windup(NULL);
}
_Watchdog_Tick(cpu_self);
4000af68: 40 00 0a 3d call 4000d85c <_Watchdog_Tick>
4000af6c: 90 10 00 1d mov %i5, %o0
}
4000af70: 81 c7 e0 08 ret
4000af74: 81 e8 00 00 restore
4000cf98 <_Timecounter_Tick_simple>:
void
_Timecounter_Tick_simple(uint32_t delta, uint32_t offset,
ISR_lock_Context *lock_context)
{
4000cf98: 9d e3 bf a0 save %sp, -96, %sp
struct bintime bt;
struct timehands *th;
uint32_t ogen;
th = timehands;
4000cf9c: 03 10 00 54 sethi %hi(0x40015000), %g1
4000cfa0: c2 00 60 94 ld [ %g1 + 0x94 ], %g1 ! 40015094 <timehands>
ogen = th->th_generation;
th->th_offset_count = offset;
4000cfa4: f2 20 60 18 st %i1, [ %g1 + 0x18 ]
bintime_addx(&th->th_offset, th->th_scale * delta);
4000cfa8: c4 00 60 14 ld [ %g1 + 0x14 ], %g2
4000cfac: f8 18 60 28 ldd [ %g1 + 0x28 ], %i4
4000cfb0: c6 00 60 10 ld [ %g1 + 0x10 ], %g3
4000cfb4: 86 58 c0 18 smul %g3, %i0, %g3
ogen = th->th_generation;
4000cfb8: c8 00 60 70 ld [ %g1 + 0x70 ], %g4
bintime_addx(&th->th_offset, th->th_scale * delta);
4000cfbc: b2 50 80 18 umul %g2, %i0, %i1
4000cfc0: b1 40 00 00 rd %y, %i0
4000cfc4: b0 00 c0 18 add %g3, %i0, %i0
4000cfc8: 96 86 40 1d addcc %i1, %i5, %o3
4000cfcc: 94 c6 00 1c addxcc %i0, %i4, %o2
4000cfd0: 0a 80 00 30 bcs 4000d090 <_Timecounter_Tick_simple+0xf8>
4000cfd4: 84 10 20 00 clr %g2
if (_u > _bt->frac)
4000cfd8: 80 a0 a0 00 cmp %g2, 0
4000cfdc: 12 80 00 28 bne 4000d07c <_Timecounter_Tick_simple+0xe4>
4000cfe0: d4 38 60 28 std %o2, [ %g1 + 0x28 ]
4000cfe4: d8 18 60 20 ldd [ %g1 + 0x20 ], %o4
4000cfe8: c4 18 60 68 ldd [ %g1 + 0x68 ], %g2
4000cfec: b2 80 c0 0b addcc %g3, %o3, %i1
4000cff0: b0 c0 80 0a addxcc %g2, %o2, %i0
_bt->sec++;
4000cff4: 0a 80 00 29 bcs 4000d098 <_Timecounter_Tick_simple+0x100>
4000cff8: 96 83 60 01 addcc %o5, 1, %o3
bt = th->th_offset;
4000cffc: 94 10 00 0c mov %o4, %o2
4000d000: 96 10 00 0d mov %o5, %o3
_bt->sec += _bt2->sec;
4000d004: c4 18 60 60 ldd [ %g1 + 0x60 ], %g2
4000d008: ba 82 c0 03 addcc %o3, %g3, %i5
bintime_add(&bt, &th->th_boottime);
/* Update the UTC timestamps used by the get*() functions. */
th->th_bintime = bt;
4000d00c: f0 38 60 38 std %i0, [ %g1 + 0x38 ]
4000d010: b8 42 80 02 addx %o2, %g2, %i4
_tv->tv_usec = ((uint64_t)1000000 * (uint32_t)(_bt->frac >> 32)) >> 32;
4000d014: 15 00 03 d0 sethi %hi(0xf4000), %o2
_ts->tv_nsec = ((uint64_t)1000000000 *
4000d018: 05 0e e6 b2 sethi %hi(0x3b9ac800), %g2
_tv->tv_usec = ((uint64_t)1000000 * (uint32_t)(_bt->frac >> 32)) >> 32;
4000d01c: 94 12 a2 40 or %o2, 0x240, %o2
_ts->tv_nsec = ((uint64_t)1000000000 *
4000d020: 84 10 a2 00 or %g2, 0x200, %g2
_tv->tv_usec = ((uint64_t)1000000 * (uint32_t)(_bt->frac >> 32)) >> 32;
4000d024: 96 56 00 0a umul %i0, %o2, %o3
4000d028: 95 40 00 00 rd %y, %o2
_ts->tv_nsec = ((uint64_t)1000000000 *
4000d02c: 86 56 00 02 umul %i0, %g2, %g3
4000d030: 85 40 00 00 rd %y, %g2
4000d034: f8 38 60 30 std %i4, [ %g1 + 0x30 ]
/*
* Now that the struct timehands is again consistent, set the new
* generation number, making sure to not make it zero.
*/
if (++ogen == 0)
4000d038: 88 81 20 01 inccc %g4
_tv->tv_sec = _bt->sec;
4000d03c: f8 38 60 40 std %i4, [ %g1 + 0x40 ]
_tv->tv_usec = ((uint64_t)1000000 * (uint32_t)(_bt->frac >> 32)) >> 32;
4000d040: d4 20 60 48 st %o2, [ %g1 + 0x48 ]
_ts->tv_sec = _bt->sec;
4000d044: f8 38 60 50 std %i4, [ %g1 + 0x50 ]
4000d048: 12 80 00 03 bne 4000d054 <_Timecounter_Tick_simple+0xbc>
4000d04c: c4 20 60 58 st %g2, [ %g1 + 0x58 ]
ogen = 1;
4000d050: 88 10 20 01 mov 1, %g4
<== NOT EXECUTED
th->th_generation = ogen;
/* Go live with the new struct timehands. */
time_second = th->th_microtime.tv_sec;
4000d054: 05 10 00 54 sethi %hi(0x40015000), %g2
<== NOT EXECUTED
4000d058: f8 38 a0 88 std %i4, [ %g2 + 0x88 ] ! 40015088 <_Timecounter_Time_second>
<== NOT EXECUTED
th->th_generation = ogen;
4000d05c: c8 20 60 70 st %g4, [ %g1 + 0x70 ]
<== NOT EXECUTED
time_uptime = th->th_offset.sec;
4000d060: 03 10 00 54 sethi %hi(0x40015000), %g1
<== NOT EXECUTED
4000d064: da 20 60 80 st %o5, [ %g1 + 0x80 ] ! 40015080 <_Timecounter_Time_uptime>
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000d068: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000d06c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000d070: 01 00 00 00 nop
_Timecounter_Release(lock_context);
_Watchdog_Tick(_Per_CPU_Get_snapshot());
4000d074: 7f ff f8 d7 call 4000b3d0 <_Watchdog_Tick>
4000d078: 91 e8 00 06 restore %g0, %g6, %o0
_bt->sec++;
4000d07c: c4 18 60 20 ldd [ %g1 + 0x20 ], %g2
<== NOT EXECUTED
4000d080: 9a 80 e0 01 addcc %g3, 1, %o5
<== NOT EXECUTED
4000d084: 98 40 a0 00 addx %g2, 0, %o4
<== NOT EXECUTED
4000d088: 10 bf ff d8 b 4000cfe8 <_Timecounter_Tick_simple+0x50>
<== NOT EXECUTED
4000d08c: d8 38 60 20 std %o4, [ %g1 + 0x20 ]
<== NOT EXECUTED
4000d090: 10 bf ff d2 b 4000cfd8 <_Timecounter_Tick_simple+0x40>
<== NOT EXECUTED
4000d094: 84 10 20 01 mov 1, %g2
<== NOT EXECUTED
_bt->sec++;
4000d098: 10 bf ff db b 4000d004 <_Timecounter_Tick_simple+0x6c>
4000d09c: 94 43 20 00 addx %o4, 0, %o2
400102a8 <_Timespec_Less_than>:
bool _Timespec_Less_than(
const struct timespec *lhs,
const struct timespec *rhs
)
{
if ( lhs->tv_sec < rhs->tv_sec )
400102a8: c4 02 00 00 ld [ %o0 ], %g2
400102ac: c2 02 40 00 ld [ %o1 ], %g1
400102b0: c8 02 20 04 ld [ %o0 + 4 ], %g4
400102b4: 80 a0 40 02 cmp %g1, %g2
400102b8: 14 80 00 13 bg 40010304 <_Timespec_Less_than+0x5c>
400102bc: c6 02 60 04 ld [ %o1 + 4 ], %g3
400102c0: 02 80 00 0f be 400102fc <_Timespec_Less_than+0x54>
400102c4: 80 a0 c0 04 cmp %g3, %g4
return true;
if ( lhs->tv_sec > rhs->tv_sec )
400102c8: 80 a0 80 01 cmp %g2, %g1
<== NOT EXECUTED
400102cc: 34 80 00 0a bg,a 400102f4 <_Timespec_Less_than+0x4c>
<== NEVER TAKEN
400102d0: 90 10 20 00 clr %o0
<== NOT EXECUTED
400102d4: 02 80 00 0f be 40010310 <_Timespec_Less_than+0x68>
400102d8: 80 a1 00 03 cmp %g4, %g3
return false;
/* ASSERT: lhs->tv_sec == rhs->tv_sec */
if ( lhs->tv_nsec < rhs->tv_nsec )
400102dc: c4 02 20 08 ld [ %o0 + 8 ], %g2
<== NOT EXECUTED
400102e0: c2 02 60 08 ld [ %o1 + 8 ], %g1
400102e4: 80 a0 80 01 cmp %g2, %g1
400102e8: 06 80 00 03 bl 400102f4 <_Timespec_Less_than+0x4c>
400102ec: 90 10 20 01 mov 1, %o0
return false;
400102f0: 90 10 20 00 clr %o0
return true;
return false;
}
400102f4: 81 c3 e0 08 retl
400102f8: 90 0a 20 01 and %o0, 1, %o0
if ( lhs->tv_sec < rhs->tv_sec )
400102fc: 08 bf ff f4 bleu 400102cc <_Timespec_Less_than+0x24>
40010300: 80 a0 80 01 cmp %g2, %g1
return true;
40010304: 90 10 20 01 mov 1, %o0
}
40010308: 81 c3 e0 08 retl
4001030c: 90 0a 20 01 and %o0, 1, %o0
if ( lhs->tv_sec > rhs->tv_sec )
40010310: 28 bf ff f4 bleu,a 400102e0 <_Timespec_Less_than+0x38>
40010314: c4 02 20 08 ld [ %o0 + 8 ], %g2
return false;
40010318: 10 bf ff f7 b 400102f4 <_Timespec_Less_than+0x4c>
4001031c: 90 10 20 00 clr %o0
4000d964 <_User_extensions_Add_set>:
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000d964: 91 d0 20 09 ta 9
<== NOT EXECUTED
old_last = tail->previous;
4000d968: 05 10 00 68 sethi %hi(0x4001a000), %g2
4000d96c: 84 10 a3 24 or %g2, 0x324, %g2 ! 4001a324 <_User_extensions_List>
4000d970: c6 00 a0 08 ld [ %g2 + 8 ], %g3
the_node->next = tail;
4000d974: 88 00 a0 04 add %g2, 4, %g4
4000d978: c8 22 00 00 st %g4, [ %o0 ]
tail->previous = the_node;
4000d97c: d0 20 a0 08 st %o0, [ %g2 + 8 ]
old_last->next = the_node;
4000d980: d0 20 c0 00 st %o0, [ %g3 ]
the_node->previous = old_last;
4000d984: c6 22 20 04 st %g3, [ %o0 + 4 ]
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000d988: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000d98c: 01 00 00 00 nop
/*
* If a switch handler is present, append it to the switch chain.
*/
if ( the_extension->Callouts.thread_switch != NULL ) {
4000d990: c2 02 20 24 ld [ %o0 + 0x24 ], %g1
4000d994: 80 a0 60 00 cmp %g1, 0
4000d998: 02 80 00 0f be 4000d9d4 <_User_extensions_Add_set+0x70>
<== ALWAYS TAKEN
4000d99c: 01 00 00 00 nop
the_extension->Switch.thread_switch =
4000d9a0: c2 22 20 10 st %g1, [ %o0 + 0x10 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000d9a4: 91 d0 20 09 ta 9
<== NOT EXECUTED
old_last = tail->previous;
4000d9a8: 05 10 00 68 sethi %hi(0x4001a000), %g2
<== NOT EXECUTED
4000d9ac: 84 10 a3 0c or %g2, 0x30c, %g2 ! 4001a30c <_User_extensions_Switches_list>
<== NOT EXECUTED
4000d9b0: c6 00 a0 08 ld [ %g2 + 8 ], %g3
<== NOT EXECUTED
the_node->next = tail;
4000d9b4: 88 00 a0 04 add %g2, 4, %g4
<== NOT EXECUTED
4000d9b8: c8 22 20 08 st %g4, [ %o0 + 8 ]
<== NOT EXECUTED
the_extension->Callouts.thread_switch;
_Per_CPU_Acquire_all( &lock_context );
_User_extensions_Set_ancestors();
_Chain_Initialize_node( &the_extension->Switch.Node );
4000d9bc: 88 02 20 08 add %o0, 8, %g4
<== NOT EXECUTED
tail->previous = the_node;
4000d9c0: c8 20 a0 08 st %g4, [ %g2 + 8 ]
<== NOT EXECUTED
old_last->next = the_node;
4000d9c4: c8 20 c0 00 st %g4, [ %g3 ]
<== NOT EXECUTED
the_node->previous = old_last;
4000d9c8: c6 22 20 0c st %g3, [ %o0 + 0xc ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000d9cc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000d9d0: 01 00 00 00 nop
&_User_extensions_Switches_list,
&the_extension->Switch.Node
);
_Per_CPU_Release_all( &lock_context );
}
}
4000d9d4: 81 c3 e0 08 retl
4000d9d8: 01 00 00 00 nop
40009698 <_User_extensions_Iterate>:
void _User_extensions_Iterate(
void *arg,
User_extensions_Visitor visitor,
Chain_Iterator_direction direction
)
{
40009698: 9d e3 bf 88 save %sp, -120, %sp
ISR_lock_Context lock_context;
executing = _Thread_Get_executing();
initial_begin = _User_extensions_Initial_extensions;
initial_end = initial_begin + _User_extensions_Initial_count;
4000969c: 03 10 00 5a sethi %hi(0x40016800), %g1
400096a0: c2 00 63 c0 ld [ %g1 + 0x3c0 ], %g1 ! 40016bc0 <_User_extensions_Initial_count>
400096a4: b9 28 60 03 sll %g1, 3, %i4
400096a8: 21 10 00 5a sethi %hi(0x40016800), %l0
400096ac: b8 07 00 01 add %i4, %g1, %i4
400096b0: a0 14 23 c4 or %l0, 0x3c4, %l0
400096b4: b9 2f 20 02 sll %i4, 2, %i4
ISR_Level level;
_ISR_Local_disable( level );
#endif
executing = _Thread_Executing;
400096b8: fa 01 a0 20 ld [ %g6 + 0x20 ], %i5
if ( direction == CHAIN_ITERATOR_FORWARD ) {
400096bc: 80 a6 a0 00 cmp %i2, 0
400096c0: 12 80 00 47 bne 400097dc <_User_extensions_Iterate+0x144>
<== NEVER TAKEN
400096c4: b8 04 00 1c add %l0, %i4, %i4
initial_current = initial_begin;
while ( initial_current != initial_end ) {
400096c8: 80 a7 00 10 cmp %i4, %l0
400096cc: 02 80 00 0a be 400096f4 <_User_extensions_Iterate+0x5c>
400096d0: b6 10 00 10 mov %l0, %i3
(*visitor)( executing, arg, initial_current );
400096d4: 94 10 00 1b mov %i3, %o2
400096d8: 92 10 00 18 mov %i0, %o1
400096dc: 9f c6 40 00 call %i1
400096e0: 90 10 00 1d mov %i5, %o0
++initial_current;
400096e4: b6 06 e0 24 add %i3, 0x24, %i3
while ( initial_current != initial_end ) {
400096e8: 80 a7 00 1b cmp %i4, %i3
400096ec: 12 bf ff fb bne 400096d8 <_User_extensions_Iterate+0x40>
400096f0: 94 10 00 1b mov %i3, %o2
}
end = _Chain_Immutable_tail( &_User_extensions_List.Active );
400096f4: 37 10 00 68 sethi %hi(0x4001a000), %i3
400096f8: b6 16 e3 28 or %i3, 0x328, %i3 ! 4001a328 <_User_extensions_List+0x4>
400096fc: 84 06 ff fc add %i3, -4, %g2
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40009700: 91 d0 20 09 ta 9
<== NOT EXECUTED
old_last = tail->previous;
40009704: c8 00 a0 14 ld [ %g2 + 0x14 ], %g4
tail->previous = the_node;
40009708: 86 07 bf ec add %fp, -20, %g3
the_node->next = tail;
4000970c: 9e 00 a0 10 add %g2, 0x10, %o7
tail->previous = the_node;
40009710: c6 20 a0 14 st %g3, [ %g2 + 0x14 ]
&the_iterator->Registry_node
);
the_iterator->direction = direction;
if ( direction == CHAIN_ITERATOR_FORWARD ) {
40009714: 80 a6 a0 00 cmp %i2, 0
the_node->next = tail;
40009718: de 27 bf ec st %o7, [ %fp + -20 ]
old_last->next = the_node;
4000971c: c6 21 00 00 st %g3, [ %g4 ]
the_node->previous = old_last;
40009720: c8 27 bf f0 st %g4, [ %fp + -16 ]
if ( direction == CHAIN_ITERATOR_FORWARD ) {
40009724: 02 80 00 03 be 40009730 <_User_extensions_Iterate+0x98>
40009728: f4 27 bf f4 st %i2, [ %fp + -12 ]
the_iterator->position = _Chain_Head( the_chain );
} else {
the_iterator->position = _Chain_Tail( the_chain );
4000972c: 84 00 a0 04 add %g2, 4, %g2
&_User_extensions_List.Iterators,
&iter.Iterator,
direction
);
if ( executing != NULL ) {
40009730: 80 a7 60 00 cmp %i5, 0
40009734: 02 80 00 05 be 40009748 <_User_extensions_Iterate+0xb0>
40009738: c4 27 bf f8 st %g2, [ %fp + -8 ]
iter.previous = executing->last_user_extensions_iterator;
4000973c: c4 07 61 8c ld [ %i5 + 0x18c ], %g2
40009740: c4 27 bf fc st %g2, [ %fp + -4 ]
executing->last_user_extensions_iterator = &iter;
40009744: c6 27 61 8c st %g3, [ %i5 + 0x18c ]
end = _Chain_Immutable_head( &_User_extensions_List.Active );
40009748: 10 80 00 0f b 40009784 <_User_extensions_Iterate+0xec>
4000974c: 84 10 00 1a mov %i2, %g2
RTEMS_INLINE_ROUTINE Chain_Node *_Chain_Iterator_next(
const Chain_Iterator *the_iterator
)
{
if ( the_iterator->direction == CHAIN_ITERATOR_FORWARD ) {
return _Chain_Next( the_iterator->position );
40009750: d4 00 c0 00 ld [ %g3 ], %o2
}
while ( ( node = _Chain_Iterator_next( &iter.Iterator ) ) != end ) {
40009754: 80 a6 c0 0a cmp %i3, %o2
40009758: 02 80 00 13 be 400097a4 <_User_extensions_Iterate+0x10c>
4000975c: 80 a7 60 00 cmp %i5, 0
RTEMS_INLINE_ROUTINE void _Chain_Iterator_set_position(
Chain_Iterator *the_iterator,
Chain_Node *the_node
)
{
the_iterator->position = the_node;
40009760: d4 27 bf f8 st %o2, [ %fp + -8 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009764: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009768: 01 00 00 00 nop
_Chain_Iterator_set_position( &iter.Iterator, node );
_User_extensions_Release( &lock_context );
extension = (const User_extensions_Control *) node;
( *visitor )( executing, arg, &extension->Callouts );
4000976c: 94 02 a0 14 add %o2, 0x14, %o2
40009770: 92 10 00 18 mov %i0, %o1
40009774: 9f c6 40 00 call %i1
40009778: 90 10 00 1d mov %i5, %o0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000977c: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable_and_acquire(
40009780: c4 07 bf f4 ld [ %fp + -12 ], %g2
if ( the_iterator->direction == CHAIN_ITERATOR_FORWARD ) {
40009784: 80 a0 a0 00 cmp %g2, 0
40009788: 02 bf ff f2 be 40009750 <_User_extensions_Iterate+0xb8>
<== ALWAYS TAKEN
4000978c: c6 07 bf f8 ld [ %fp + -8 ], %g3
return _Chain_Previous( the_iterator->position );
40009790: d4 00 e0 04 ld [ %g3 + 4 ], %o2
while ( ( node = _Chain_Iterator_next( &iter.Iterator ) ) != end ) {
40009794: 80 a6 c0 0a cmp %i3, %o2
40009798: 32 bf ff f3 bne,a 40009764 <_User_extensions_Iterate+0xcc>
4000979c: d4 27 bf f8 st %o2, [ %fp + -8 ]
_User_extensions_Acquire( &lock_context );
}
if ( executing != NULL ) {
400097a0: 80 a7 60 00 cmp %i5, 0
400097a4: 02 80 00 03 be 400097b0 <_User_extensions_Iterate+0x118>
400097a8: c4 07 bf fc ld [ %fp + -4 ], %g2
executing->last_user_extensions_iterator = iter.previous;
400097ac: c4 27 61 8c st %g2, [ %i5 + 0x18c ]
next = the_node->next;
400097b0: c6 07 bf ec ld [ %fp + -20 ], %g3
previous = the_node->previous;
400097b4: c4 07 bf f0 ld [ %fp + -16 ], %g2
next->previous = previous;
400097b8: c4 20 e0 04 st %g2, [ %g3 + 4 ]
<== NOT EXECUTED
previous->next = next;
400097bc: c6 20 80 00 st %g3, [ %g2 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400097c0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400097c4: 01 00 00 00 nop
_Chain_Iterator_destroy( &iter.Iterator );
_User_extensions_Release( &lock_context );
if ( direction == CHAIN_ITERATOR_BACKWARD ) {
400097c8: 80 a6 a0 01 cmp %i2, 1
400097cc: 02 80 00 08 be 400097ec <_User_extensions_Iterate+0x154>
400097d0: 80 a7 00 10 cmp %i4, %l0
while ( initial_current != initial_begin ) {
--initial_current;
(*visitor)( executing, arg, initial_current );
}
}
}
400097d4: 81 c7 e0 08 ret
400097d8: 81 e8 00 00 restore
end = _Chain_Immutable_head( &_User_extensions_List.Active );
400097dc: 05 10 00 68 sethi %hi(0x4001a000), %g2
400097e0: 84 10 a3 24 or %g2, 0x324, %g2 ! 4001a324 <_User_extensions_List>
400097e4: 10 bf ff c7 b 40009700 <_User_extensions_Iterate+0x68>
400097e8: b6 10 00 02 mov %g2, %i3
while ( initial_current != initial_begin ) {
400097ec: 02 bf ff fa be 400097d4 <_User_extensions_Iterate+0x13c>
400097f0: 05 0e 38 e3 sethi %hi(0x38e38c00), %g2
400097f4: 84 10 a2 39 or %g2, 0x239, %g2 ! 38e38e39 <RAM_SIZE+0x38a38e39>
400097f8: b6 07 3f dc add %i4, -36, %i3
400097fc: 82 26 c0 10 sub %i3, %l0, %g1
40009800: 83 30 60 02 srl %g1, 2, %g1
40009804: 82 58 40 02 smul %g1, %g2, %g1
40009808: 05 30 00 00 sethi %hi(0xc0000000), %g2
4000980c: 82 28 40 02 andn %g1, %g2, %g1
40009810: 82 00 60 01 inc %g1
40009814: 85 28 60 03 sll %g1, 3, %g2
40009818: 82 00 80 01 add %g2, %g1, %g1
4000981c: 83 28 60 02 sll %g1, 2, %g1
40009820: b8 27 00 01 sub %i4, %g1, %i4
(*visitor)( executing, arg, initial_current );
40009824: 94 10 00 1b mov %i3, %o2
40009828: 92 10 00 18 mov %i0, %o1
4000982c: 9f c6 40 00 call %i1
40009830: 90 10 00 1d mov %i5, %o0
while ( initial_current != initial_begin ) {
40009834: 80 a6 c0 1c cmp %i3, %i4
40009838: 12 bf ff fb bne 40009824 <_User_extensions_Iterate+0x18c>
4000983c: b6 06 ff dc add %i3, -36, %i3
}
40009840: 81 c7 e0 08 ret
40009844: 81 e8 00 00 restore
4000da64 <_User_extensions_Remove_set>:
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000da64: 91 d0 20 09 ta 9
<== NOT EXECUTED
iter_node = _Chain_Head( &the_registry->Iterators );
4000da68: 05 10 00 54 sethi %hi(0x40015000), %g2
4000da6c: 84 10 a1 c0 or %g2, 0x1c0, %g2 ! 400151c0 <_User_extensions_List+0xc>
4000da70: 88 00 a0 04 add %g2, 4, %g4
while ( ( iter_node = _Chain_Next( iter_node ) ) != iter_tail ) {
4000da74: c4 00 80 00 ld [ %g2 ], %g2
4000da78: 80 a0 80 04 cmp %g2, %g4
4000da7c: 22 80 00 11 be,a 4000dac0 <_User_extensions_Remove_set+0x5c>
<== ALWAYS TAKEN
4000da80: c6 02 00 00 ld [ %o0 ], %g3
if ( iter->position == the_node_to_extract ) {
4000da84: c6 00 a0 0c ld [ %g2 + 0xc ], %g3
<== NOT EXECUTED
4000da88: 80 a2 00 03 cmp %o0, %g3
<== NOT EXECUTED
4000da8c: 32 bf ff fb bne,a 4000da78 <_User_extensions_Remove_set+0x14>
<== NOT EXECUTED
4000da90: c4 00 80 00 ld [ %g2 ], %g2
<== NOT EXECUTED
if ( iter->direction == CHAIN_ITERATOR_FORWARD ) {
4000da94: c6 00 a0 08 ld [ %g2 + 8 ], %g3
<== NOT EXECUTED
4000da98: 80 a0 e0 00 cmp %g3, 0
<== NOT EXECUTED
4000da9c: 32 80 00 1b bne,a 4000db08 <_User_extensions_Remove_set+0xa4>
<== NOT EXECUTED
4000daa0: c6 02 00 00 ld [ %o0 ], %g3
<== NOT EXECUTED
iter->position = _Chain_Previous( the_node_to_extract );
4000daa4: c6 02 20 04 ld [ %o0 + 4 ], %g3
<== NOT EXECUTED
4000daa8: c6 20 a0 0c st %g3, [ %g2 + 0xc ]
<== NOT EXECUTED
while ( ( iter_node = _Chain_Next( iter_node ) ) != iter_tail ) {
4000daac: c4 00 80 00 ld [ %g2 ], %g2
<== NOT EXECUTED
4000dab0: 80 a0 80 04 cmp %g2, %g4
<== NOT EXECUTED
4000dab4: 32 bf ff f5 bne,a 4000da88 <_User_extensions_Remove_set+0x24>
<== NOT EXECUTED
4000dab8: c6 00 a0 0c ld [ %g2 + 0xc ], %g3
<== NOT EXECUTED
next = the_node->next;
4000dabc: c6 02 00 00 ld [ %o0 ], %g3
<== NOT EXECUTED
previous = the_node->previous;
4000dac0: c4 02 20 04 ld [ %o0 + 4 ], %g2
<== NOT EXECUTED
next->previous = previous;
4000dac4: c4 20 e0 04 st %g2, [ %g3 + 4 ]
<== NOT EXECUTED
previous->next = next;
4000dac8: c6 20 80 00 st %g3, [ %g2 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000dacc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000dad0: 01 00 00 00 nop
/*
* If a switch handler is present, remove it.
*/
if ( the_extension->Callouts.thread_switch != NULL ) {
4000dad4: c2 02 20 24 ld [ %o0 + 0x24 ], %g1
4000dad8: 80 a0 60 00 cmp %g1, 0
4000dadc: 02 80 00 09 be 4000db00 <_User_extensions_Remove_set+0x9c>
4000dae0: 01 00 00 00 nop
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000dae4: 91 d0 20 09 ta 9
<== NOT EXECUTED
next = the_node->next;
4000dae8: c6 02 20 08 ld [ %o0 + 8 ], %g3
<== NOT EXECUTED
previous = the_node->previous;
4000daec: c4 02 20 0c ld [ %o0 + 0xc ], %g2
<== NOT EXECUTED
next->previous = previous;
4000daf0: c4 20 e0 04 st %g2, [ %g3 + 4 ]
<== NOT EXECUTED
previous->next = next;
4000daf4: c6 20 80 00 st %g3, [ %g2 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000daf8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000dafc: 01 00 00 00 nop
_Per_CPU_Acquire_all( &lock_context );
_Chain_Extract_unprotected( &the_extension->Switch.Node );
_Per_CPU_Release_all( &lock_context );
}
}
4000db00: 81 c3 e0 08 retl
4000db04: 01 00 00 00 nop
iter->position = _Chain_Next( the_node_to_extract );
4000db08: 10 bf ff db b 4000da74 <_User_extensions_Remove_set+0x10>
<== NOT EXECUTED
4000db0c: c6 20 a0 0c st %g3, [ %g2 + 0xc ]
<== NOT EXECUTED
40009558 <_User_extensions_Thread_create_visitor>:
void _User_extensions_Thread_create_visitor(
Thread_Control *executing,
void *arg,
const User_extensions_Table *callouts
)
{
40009558: 9d e3 bf a0 save %sp, -96, %sp
User_extensions_thread_create_extension callout = callouts->thread_create;
4000955c: c4 06 80 00 ld [ %i2 ], %g2
if ( callout != NULL ) {
40009560: 80 a0 a0 00 cmp %g2, 0
40009564: 02 80 00 0a be 4000958c <_User_extensions_Thread_create_visitor+0x34>
40009568: 01 00 00 00 nop
User_extensions_Thread_create_context *ctx = arg;
ctx->ok = ctx->ok && (*callout)( executing, ctx->created );
4000956c: d0 0e 60 04 ldub [ %i1 + 4 ], %o0
40009570: 80 8a 20 ff btst 0xff, %o0
40009574: 22 80 00 06 be,a 4000958c <_User_extensions_Thread_create_visitor+0x34>
<== NEVER TAKEN
40009578: d0 2e 60 04 stb %o0, [ %i1 + 4 ]
<== NOT EXECUTED
4000957c: d2 06 40 00 ld [ %i1 ], %o1
40009580: 9f c0 80 00 call %g2
40009584: 90 10 00 18 mov %i0, %o0
40009588: d0 2e 60 04 stb %o0, [ %i1 + 4 ]
}
}
4000958c: 81 c7 e0 08 ret
40009590: 81 e8 00 00 restore
4000d7ac <_Watchdog_Do_tickle>:
#ifdef RTEMS_SMP
ISR_lock_Control *lock,
#endif
ISR_lock_Context *lock_context
)
{
4000d7ac: 9d e3 bf a0 save %sp, -96, %sp
4000d7b0: ba 10 20 02 mov 2, %i5
do {
if ( first->expire <= now ) {
4000d7b4: c2 06 60 18 ld [ %i1 + 0x18 ], %g1
4000d7b8: 80 a0 40 1a cmp %g1, %i2
4000d7bc: 18 80 00 26 bgu 4000d854 <_Watchdog_Do_tickle+0xa8>
<== NEVER TAKEN
4000d7c0: 01 00 00 00 nop
4000d7c4: 22 80 00 21 be,a 4000d848 <_Watchdog_Do_tickle+0x9c>
4000d7c8: c2 06 60 1c ld [ %i1 + 0x1c ], %g1
RBTree_Node *node = _RBTree_Right( &the_watchdog->Node.RBTree );
4000d7cc: c4 06 60 04 ld [ %i1 + 4 ], %g2
if ( node != NULL ) {
4000d7d0: 80 a0 a0 00 cmp %g2, 0
4000d7d4: 32 80 00 05 bne,a 4000d7e8 <_Watchdog_Do_tickle+0x3c>
4000d7d8: c2 00 80 00 ld [ %g2 ], %g1
header->first = _RBTree_Parent( &the_watchdog->Node.RBTree );
4000d7dc: 10 80 00 19 b 4000d840 <_Watchdog_Do_tickle+0x94>
4000d7e0: c2 06 60 08 ld [ %i1 + 8 ], %g1
while ( ( left = _RBTree_Left( node ) ) != NULL ) {
4000d7e4: c2 00 80 00 ld [ %g2 ], %g1
<== NOT EXECUTED
4000d7e8: 80 a0 60 00 cmp %g1, 0
4000d7ec: 32 bf ff fe bne,a 4000d7e4 <_Watchdog_Do_tickle+0x38>
<== NEVER TAKEN
4000d7f0: 84 10 00 01 mov %g1, %g2
<== NOT EXECUTED
header->first = node;
4000d7f4: c4 26 20 04 st %g2, [ %i0 + 4 ]
Watchdog_Service_routine_entry routine;
_Watchdog_Next_first( header, first );
_RBTree_Extract( &header->Watchdogs, &first->Node.RBTree );
4000d7f8: 92 10 00 19 mov %i1, %o1
4000d7fc: 7f ff fb ca call 4000c724 <_RBTree_Extract>
4000d800: 90 10 00 18 mov %i0, %o0
_Watchdog_Set_state( first, WATCHDOG_INACTIVE );
routine = first->routine;
4000d804: c4 06 60 10 ld [ %i1 + 0x10 ], %g2
RB_COLOR( &the_watchdog->Node.RBTree, Node ) = state;
4000d808: fa 26 60 0c st %i5, [ %i1 + 0xc ]
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000d80c: c2 07 00 00 ld [ %i4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000d810: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000d814: 01 00 00 00 nop
_ISR_lock_Release_and_ISR_enable( lock, lock_context );
( *routine )( first );
4000d818: 9f c0 80 00 call %g2
4000d81c: 90 10 00 19 mov %i1, %o0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000d820: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable_and_acquire( lock, lock_context );
4000d824: c2 27 00 00 st %g1, [ %i4 ]
} else {
break;
}
first = _Watchdog_Header_first( header );
4000d828: f2 06 20 04 ld [ %i0 + 4 ], %i1
} while ( first != NULL );
4000d82c: 80 a6 60 00 cmp %i1, 0
4000d830: 32 bf ff e2 bne,a 4000d7b8 <_Watchdog_Do_tickle+0xc>
4000d834: c2 06 60 18 ld [ %i1 + 0x18 ], %g1
}
4000d838: 81 c7 e0 08 ret
4000d83c: 81 e8 00 00 restore
header->first = _RBTree_Parent( &the_watchdog->Node.RBTree );
4000d840: 10 bf ff ee b 4000d7f8 <_Watchdog_Do_tickle+0x4c>
4000d844: c2 26 20 04 st %g1, [ %i0 + 4 ]
if ( first->expire <= now ) {
4000d848: 80 a0 40 1b cmp %g1, %i3
4000d84c: 28 bf ff e1 bleu,a 4000d7d0 <_Watchdog_Do_tickle+0x24>
4000d850: c4 06 60 04 ld [ %i1 + 4 ], %g2
}
4000d854: 81 c7 e0 08 ret
4000d858: 81 e8 00 00 restore
40009464 <_Watchdog_Remove>:
void _Watchdog_Remove(
Watchdog_Header *header,
Watchdog_Control *the_watchdog
)
{
40009464: 9d e3 bf a0 save %sp, -96, %sp
if ( _Watchdog_Is_scheduled( the_watchdog ) ) {
40009468: c2 06 60 0c ld [ %i1 + 0xc ], %g1
4000946c: 80 a0 60 01 cmp %g1, 1
40009470: 28 80 00 04 bleu,a 40009480 <_Watchdog_Remove+0x1c>
40009474: c2 06 20 04 ld [ %i0 + 4 ], %g1
}
_RBTree_Extract( &header->Watchdogs, &the_watchdog->Node.RBTree );
_Watchdog_Set_state( the_watchdog, WATCHDOG_INACTIVE );
}
}
40009478: 81 c7 e0 08 ret
4000947c: 81 e8 00 00 restore
if ( header->first == &the_watchdog->Node.RBTree ) {
40009480: 80 a0 40 19 cmp %g1, %i1
40009484: 22 80 00 09 be,a 400094a8 <_Watchdog_Remove+0x44>
40009488: c4 06 60 04 ld [ %i1 + 4 ], %g2
_RBTree_Extract( &header->Watchdogs, &the_watchdog->Node.RBTree );
4000948c: 92 10 00 19 mov %i1, %o1
40009490: 40 00 0c a5 call 4000c724 <_RBTree_Extract>
40009494: 90 10 00 18 mov %i0, %o0
RB_COLOR( &the_watchdog->Node.RBTree, Node ) = state;
40009498: 82 10 20 02 mov 2, %g1
4000949c: c2 26 60 0c st %g1, [ %i1 + 0xc ]
}
400094a0: 81 c7 e0 08 ret
400094a4: 81 e8 00 00 restore
if ( node != NULL ) {
400094a8: 80 a0 a0 00 cmp %g2, 0
400094ac: 32 80 00 05 bne,a 400094c0 <_Watchdog_Remove+0x5c>
400094b0: c2 00 80 00 ld [ %g2 ], %g1
header->first = _RBTree_Parent( &the_watchdog->Node.RBTree );
400094b4: 10 80 00 08 b 400094d4 <_Watchdog_Remove+0x70>
400094b8: c2 06 60 08 ld [ %i1 + 8 ], %g1
while ( ( left = _RBTree_Left( node ) ) != NULL ) {
400094bc: c2 00 80 00 ld [ %g2 ], %g1
<== NOT EXECUTED
400094c0: 80 a0 60 00 cmp %g1, 0
400094c4: 32 bf ff fe bne,a 400094bc <_Watchdog_Remove+0x58>
<== NEVER TAKEN
400094c8: 84 10 00 01 mov %g1, %g2
<== NOT EXECUTED
header->first = node;
400094cc: 10 bf ff f0 b 4000948c <_Watchdog_Remove+0x28>
400094d0: c4 26 20 04 st %g2, [ %i0 + 4 ]
header->first = _RBTree_Parent( &the_watchdog->Node.RBTree );
400094d4: 10 bf ff ee b 4000948c <_Watchdog_Remove+0x28>
400094d8: c2 26 20 04 st %g1, [ %i0 + 4 ]
4000d85c <_Watchdog_Tick>:
void _Watchdog_Tick( Per_CPU_Control *cpu )
{
4000d85c: 9d e3 bf 88 save %sp, -120, %sp
Watchdog_Control *first;
uint64_t ticks;
struct timespec now;
if ( _Per_CPU_Is_boot_processor( cpu ) ) {
++_Watchdog_Ticks_since_boot;
4000d860: 05 10 00 7b sethi %hi(0x4001ec00), %g2
4000d864: c2 00 a0 14 ld [ %g2 + 0x14 ], %g1 ! 4001ec14 <_Watchdog_Ticks_since_boot>
4000d868: 82 00 60 01 inc %g1
4000d86c: c2 20 a0 14 st %g1, [ %g2 + 0x14 ]
4000d870: 91 d0 20 09 ta 9
<== NOT EXECUTED
}
_ISR_lock_ISR_disable_and_acquire( &cpu->Watchdog.Lock, &lock_context );
4000d874: c2 27 bf ec st %g1, [ %fp + -20 ]
ticks = cpu->Watchdog.ticks;
4000d878: c4 1e 20 30 ldd [ %i0 + 0x30 ], %g2
_Assert( ticks < UINT64_MAX );
++ticks;
4000d87c: 96 80 e0 01 addcc %g3, 1, %o3
4000d880: 94 40 a0 00 addx %g2, 0, %o2
cpu->Watchdog.ticks = ticks;
4000d884: d4 3e 20 30 std %o2, [ %i0 + 0x30 ]
header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_TICKS ];
first = _Watchdog_Header_first( header );
4000d888: d2 06 20 3c ld [ %i0 + 0x3c ], %o1
if ( first != NULL ) {
4000d88c: 80 a2 60 00 cmp %o1, 0
4000d890: 02 80 00 04 be 4000d8a0 <_Watchdog_Tick+0x44>
4000d894: 98 07 bf ec add %fp, -20, %o4
_Watchdog_Tickle(
4000d898: 7f ff ff c5 call 4000d7ac <_Watchdog_Do_tickle>
4000d89c: 90 06 20 38 add %i0, 0x38, %o0
&lock_context
);
}
header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_MONOTONIC ];
first = _Watchdog_Header_first( header );
4000d8a0: fa 06 20 4c ld [ %i0 + 0x4c ], %i5
if ( first != NULL ) {
4000d8a4: 80 a7 60 00 cmp %i5, 0
4000d8a8: 22 80 00 11 be,a 4000d8ec <_Watchdog_Tick+0x90>
4000d8ac: fa 06 20 44 ld [ %i0 + 0x44 ], %i5
_Timecounter_Getnanouptime( &now );
4000d8b0: 7f ff f5 52 call 4000adf8 <_Timecounter_Getnanouptime>
4000d8b4: 90 07 bf f0 add %fp, -16, %o0
ticks <<= WATCHDOG_BITS_FOR_1E9_NANOSECONDS;
4000d8b8: c2 07 bf f0 ld [ %fp + -16 ], %g1
ticks = (uint64_t) ts->tv_sec;
4000d8bc: d6 07 bf f4 ld [ %fp + -12 ], %o3
ticks <<= WATCHDOG_BITS_FOR_1E9_NANOSECONDS;
4000d8c0: 83 28 60 1e sll %g1, 0x1e, %g1
4000d8c4: 95 32 e0 02 srl %o3, 2, %o2
_Watchdog_Tickle(
4000d8c8: 94 12 80 01 or %o2, %g1, %o2
4000d8cc: c2 07 bf f8 ld [ %fp + -8 ], %g1
4000d8d0: 97 2a e0 1e sll %o3, 0x1e, %o3
4000d8d4: 98 07 bf ec add %fp, -20, %o4
4000d8d8: 96 10 40 0b or %g1, %o3, %o3
4000d8dc: 92 10 00 1d mov %i5, %o1
4000d8e0: 7f ff ff b3 call 4000d7ac <_Watchdog_Do_tickle>
4000d8e4: 90 06 20 48 add %i0, 0x48, %o0
&lock_context
);
}
header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_REALTIME ];
first = _Watchdog_Header_first( header );
4000d8e8: fa 06 20 44 ld [ %i0 + 0x44 ], %i5
if ( first != NULL ) {
4000d8ec: 80 a7 60 00 cmp %i5, 0
4000d8f0: 02 80 00 10 be 4000d930 <_Watchdog_Tick+0xd4>
4000d8f4: 01 00 00 00 nop
_Timecounter_Getnanotime( &now );
4000d8f8: 7f ff f5 66 call 4000ae90 <_Timecounter_Getnanotime>
4000d8fc: 90 07 bf f0 add %fp, -16, %o0
4000d900: c2 07 bf f0 ld [ %fp + -16 ], %g1
ticks = (uint64_t) ts->tv_sec;
4000d904: d6 07 bf f4 ld [ %fp + -12 ], %o3
ticks <<= WATCHDOG_BITS_FOR_1E9_NANOSECONDS;
4000d908: 83 28 60 1e sll %g1, 0x1e, %g1
4000d90c: 95 32 e0 02 srl %o3, 2, %o2
_Watchdog_Tickle(
4000d910: 94 12 80 01 or %o2, %g1, %o2
4000d914: c2 07 bf f8 ld [ %fp + -8 ], %g1
4000d918: 97 2a e0 1e sll %o3, 0x1e, %o3
4000d91c: 98 07 bf ec add %fp, -20, %o4
4000d920: 96 10 40 0b or %g1, %o3, %o3
4000d924: 92 10 00 1d mov %i5, %o1
4000d928: 7f ff ff a1 call 4000d7ac <_Watchdog_Do_tickle>
4000d92c: 90 06 20 40 add %i0, 0x40, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000d930: c2 07 bf ec ld [ %fp + -20 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000d934: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000d938: 01 00 00 00 nop
Thread_Control *executing = cpu->executing;
4000d93c: d2 06 20 20 ld [ %i0 + 0x20 ], %o1
if ( scheduler != NULL && executing != NULL ) {
4000d940: 80 a2 60 00 cmp %o1, 0
4000d944: 02 80 00 06 be 4000d95c <_Watchdog_Tick+0x100>
4000d948: 11 10 00 5a sethi %hi(0x40016800), %o0
( *scheduler->Operations.tick )( scheduler, executing );
4000d94c: 90 12 22 b0 or %o0, 0x2b0, %o0 ! 40016ab0 <_Scheduler_Table>
4000d950: c2 02 20 34 ld [ %o0 + 0x34 ], %g1
4000d954: 9f c0 40 00 call %g1
4000d958: 01 00 00 00 nop
}
_ISR_lock_Release_and_ISR_enable( &cpu->Watchdog.Lock, &lock_context );
_Scheduler_Tick( cpu );
}
4000d95c: 81 c7 e0 08 ret
4000d960: 81 e8 00 00 restore
400098f8 <_Workspace_Handler_initialization>:
void _Workspace_Handler_initialization(
const Memory_Information *mem,
Heap_Initialization_or_extend_handler extend
)
{
400098f8: 9d e3 bf a0 save %sp, -96, %sp
uintptr_t page_size;
uintptr_t overhead;
size_t i;
page_size = CPU_HEAP_ALIGNMENT;
remaining = rtems_configuration_get_work_space_size();
400098fc: 03 10 00 5d sethi %hi(0x40017400), %g1
40009900: c2 08 63 40 ldub [ %g1 + 0x340 ], %g1 ! 40017740 <_Stack_Allocator_avoids_workspace>
40009904: 80 a0 60 00 cmp %g1, 0
40009908: 02 80 00 41 be 40009a0c <_Workspace_Handler_initialization+0x114>
4000990c: 90 10 20 00 clr %o0
init_or_extend = _Heap_Initialize;
unified = rtems_configuration_get_unified_work_area();
overhead = _Heap_Area_overhead( page_size );
for ( i = 0; i < _Memory_Get_count( mem ); ++i ) {
40009910: c2 06 00 00 ld [ %i0 ], %g1
remaining = rtems_configuration_get_work_space_size();
40009914: 05 10 00 5a sethi %hi(0x40016800), %g2
40009918: e0 00 a2 7c ld [ %g2 + 0x27c ], %l0 ! 40016a7c <_Workspace_Size>
unified = rtems_configuration_get_unified_work_area();
4000991c: 07 10 00 5d sethi %hi(0x40017400), %g3
for ( i = 0; i < _Memory_Get_count( mem ); ++i ) {
40009920: 80 a0 60 00 cmp %g1, 0
40009924: 02 80 00 2b be 400099d0 <_Workspace_Handler_initialization+0xd8>
40009928: a0 02 00 10 add %o0, %l0, %l0
if ( free_size > overhead ) {
uintptr_t space_available;
uintptr_t size;
if ( unified ) {
4000992c: e4 08 e2 80 ldub [ %g3 + 0x280 ], %l2
init_or_extend = _Heap_Initialize;
40009930: 05 10 00 1a sethi %hi(0x40006800), %g2
<== NOT EXECUTED
} else {
size = 0;
}
}
space_available = ( *init_or_extend )(
40009934: 23 10 00 7a sethi %hi(0x4001e800), %l1
<== NOT EXECUTED
for ( i = 0; i < _Memory_Get_count( mem ); ++i ) {
40009938: b4 10 20 00 clr %i2
<== NOT EXECUTED
4000993c: b6 10 20 00 clr %i3
<== NOT EXECUTED
init_or_extend = _Heap_Initialize;
40009940: 84 10 a2 10 or %g2, 0x210, %g2
<== NOT EXECUTED
space_available = ( *init_or_extend )(
40009944: a2 14 63 a8 or %l1, 0x3a8, %l1
<== NOT EXECUTED
return &information->areas[ index ];
40009948: fa 06 20 04 ld [ %i0 + 4 ], %i5
<== NOT EXECUTED
4000994c: ba 07 40 1a add %i5, %i2, %i5
<== NOT EXECUTED
free_size = _Memory_Get_free_size( area );
40009950: d2 07 60 04 ld [ %i5 + 4 ], %o1
<== NOT EXECUTED
return (uintptr_t) area->end - (uintptr_t) area->free;
40009954: f8 07 60 08 ld [ %i5 + 8 ], %i4
<== NOT EXECUTED
40009958: b8 27 00 09 sub %i4, %o1, %i4
<== NOT EXECUTED
if ( free_size > overhead ) {
4000995c: 80 a7 20 16 cmp %i4, 0x16
<== NOT EXECUTED
40009960: 28 80 00 19 bleu,a 400099c4 <_Workspace_Handler_initialization+0xcc>
<== NOT EXECUTED
40009964: b6 06 e0 01 inc %i3
<== NOT EXECUTED
if ( unified ) {
40009968: 80 a4 a0 00 cmp %l2, 0
<== NOT EXECUTED
4000996c: 12 80 00 0a bne 40009994 <_Workspace_Handler_initialization+0x9c>
<== NOT EXECUTED
40009970: 94 10 00 1c mov %i4, %o2
if ( remaining > 0 ) {
40009974: 80 a4 20 00 cmp %l0, 0
40009978: 02 80 00 1b be 400099e4 <_Workspace_Handler_initialization+0xec>
4000997c: 96 10 20 08 mov 8, %o3
size = remaining < free_size - overhead ?
40009980: 82 07 3f ea add %i4, -22, %g1
remaining + overhead : free_size;
40009984: 80 a0 40 10 cmp %g1, %l0
40009988: 38 80 00 02 bgu,a 40009990 <_Workspace_Handler_initialization+0x98>
4000998c: b8 04 20 16 add %l0, 0x16, %i4
space_available = ( *init_or_extend )(
40009990: 94 10 00 1c mov %i4, %o2
40009994: 96 10 20 08 mov 8, %o3
40009998: 9f c0 80 00 call %g2
4000999c: 90 10 00 11 mov %l1, %o0
area->free = (char *) area->free + consume;
400099a0: c2 07 60 04 ld [ %i5 + 4 ], %g1
400099a4: b8 00 40 1c add %g1, %i4, %i4
page_size
);
_Memory_Consume( area, size );
if ( space_available < remaining ) {
400099a8: 80 a2 00 10 cmp %o0, %l0
400099ac: 1a 80 00 14 bcc 400099fc <_Workspace_Handler_initialization+0x104>
400099b0: f8 27 60 04 st %i4, [ %i5 + 4 ]
400099b4: c2 06 00 00 ld [ %i0 ], %g1
remaining -= space_available;
400099b8: a0 24 00 08 sub %l0, %o0, %l0
} else {
remaining = 0;
}
init_or_extend = extend;
400099bc: 84 10 00 19 mov %i1, %g2
<== NOT EXECUTED
for ( i = 0; i < _Memory_Get_count( mem ); ++i ) {
400099c0: b6 06 e0 01 inc %i3
400099c4: 80 a6 c0 01 cmp %i3, %g1
400099c8: 0a bf ff e0 bcs 40009948 <_Workspace_Handler_initialization+0x50>
<== NEVER TAKEN
400099cc: b4 06 a0 0c add %i2, 0xc, %i2
}
}
if ( remaining > 0 ) {
400099d0: 80 a4 20 00 cmp %l0, 0
400099d4: 12 80 00 12 bne 40009a1c <_Workspace_Handler_initialization+0x124>
<== NEVER TAKEN
400099d8: 01 00 00 00 nop
_Internal_error( INTERNAL_ERROR_TOO_LITTLE_WORKSPACE );
}
_Heap_Protection_set_delayed_free_fraction( &_Workspace_Area, 1 );
}
400099dc: 81 c7 e0 08 ret
400099e0: 81 e8 00 00 restore
space_available = ( *init_or_extend )(
400099e4: 94 10 20 00 clr %o2
400099e8: 9f c0 80 00 call %g2
400099ec: 90 10 00 11 mov %l1, %o0
init_or_extend = extend;
400099f0: 84 10 00 19 mov %i1, %g2
400099f4: 10 bf ff f3 b 400099c0 <_Workspace_Handler_initialization+0xc8>
400099f8: c2 06 00 00 ld [ %i0 ], %g1
400099fc: c2 06 00 00 ld [ %i0 ], %g1
40009a00: 84 10 00 19 mov %i1, %g2
remaining = 0;
40009a04: 10 bf ff ef b 400099c0 <_Workspace_Handler_initialization+0xc8>
40009a08: a0 10 20 00 clr %l0
remaining = rtems_configuration_get_work_space_size();
40009a0c: 40 00 03 48 call 4000a72c <rtems_configuration_get_stack_space_size>
40009a10: 01 00 00 00 nop
40009a14: 10 bf ff c0 b 40009914 <_Workspace_Handler_initialization+0x1c>
40009a18: c2 06 00 00 ld [ %i0 ], %g1
<== NOT EXECUTED
_Internal_error( INTERNAL_ERROR_TOO_LITTLE_WORKSPACE );
40009a1c: 7f ff ff b2 call 400098e4 <_Internal_error>
<== NOT EXECUTED
40009a20: 90 10 20 02 mov 2, %o0
40009a24: 01 00 00 00 nop