RTEMS-5
Annotated Report
Fri Aug 10 16:25:03 2018
4000f8d0 <_Event_Seize>:
Event_Control *event,
Thread_Wait_flags wait_class,
States_Control block_state,
ISR_lock_Context *lock_context
)
{
4000f8d0: 9d e3 bf 98 save %sp, -104, %sp
rtems_event_set pending_events;
bool success;
Thread_Wait_flags intend_to_block;
Per_CPU_Control *cpu_self;
pending_events = event->pending_events;
4000f8d4: c2 07 40 00 ld [ %i5 ], %g1
seized_events = _Event_sets_Get( pending_events, event_in );
if ( !_Event_sets_Is_empty( seized_events ) &&
4000f8d8: 84 88 40 18 andcc %g1, %i0, %g2
4000f8dc: 02 80 00 07 be 4000f8f8 <_Event_Seize+0x28>
4000f8e0: 80 8e 60 01 btst 1, %i1
4000f8e4: 80 a6 00 02 cmp %i0, %g2
4000f8e8: 02 80 00 3e be 4000f9e0 <_Event_Seize+0x110>
4000f8ec: 80 8e 60 02 btst 2, %i1
(seized_events == event_in || _Options_Is_any( option_set )) ) {
4000f8f0: 12 80 00 3c bne 4000f9e0 <_Event_Seize+0x110>
4000f8f4: 80 8e 60 01 btst 1, %i1
_Thread_Wait_release_default( executing, lock_context );
*event_out = seized_events;
return RTEMS_SUCCESSFUL;
}
if ( _Options_Is_no_wait( option_set ) ) {
4000f8f8: 12 80 00 33 bne 4000f9c4 <_Event_Seize+0xf4>
4000f8fc: c2 07 a0 5c ld [ %fp + 0x5c ], %g1
_Thread_Wait_release_default( executing, lock_context );
*event_out = seized_events;
return RTEMS_UNSATISFIED;
}
intend_to_block = wait_class | THREAD_WAIT_STATE_INTEND_TO_BLOCK;
4000f900: a0 10 60 01 or %g1, 1, %l0
<== NOT EXECUTED
disable_level = cpu_self->thread_dispatch_disable_level;
4000f904: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
* set properly when we are marked as in the event critical section.
*
* NOTE: Since interrupts are disabled, this isn't that much of an
* issue but better safe than sorry.
*/
executing->Wait.return_code = STATUS_SUCCESSFUL;
4000f908: c0 27 20 4c clr [ %i4 + 0x4c ]
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
4000f90c: 82 00 60 01 inc %g1
<== NOT EXECUTED
executing->Wait.option = option_set;
4000f910: f2 27 20 48 st %i1, [ %i4 + 0x48 ]
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
4000f914: ba 10 00 06 mov %g6, %i5
<== NOT EXECUTED
executing->Wait.count = event_in;
4000f918: f0 27 20 3c st %i0, [ %i4 + 0x3c ]
<== NOT EXECUTED
executing->Wait.return_argument = event_out;
4000f91c: f6 27 20 40 st %i3, [ %i4 + 0x40 ]
<== NOT EXECUTED
the_thread->Wait.flags = flags;
4000f920: e0 27 20 50 st %l0, [ %i4 + 0x50 ]
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
4000f924: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000f928: c2 07 a0 64 ld [ %fp + 0x64 ], %g1
<== NOT EXECUTED
4000f92c: c2 00 40 00 ld [ %g1 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000f930: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000f934: 01 00 00 00 nop
_Thread_Wait_flags_set( executing, intend_to_block );
cpu_self = _Thread_Dispatch_disable_critical( lock_context );
_Thread_Wait_release_default( executing, lock_context );
if ( ticks ) {
4000f938: 80 a6 a0 00 cmp %i2, 0
4000f93c: 12 80 00 32 bne 4000fa04 <_Event_Seize+0x134>
4000f940: 01 00 00 00 nop
_Thread_Add_timeout_ticks( executing, cpu_self, ticks );
}
_Thread_Set_state( executing, block_state );
4000f944: d2 07 a0 60 ld [ %fp + 0x60 ], %o1
4000f948: 7f ff f8 05 call 4000d95c <_Thread_Set_state>
4000f94c: 90 10 00 1c mov %i4, %o0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000f950: 91 d0 20 09 ta 9
<== NOT EXECUTED
bool success = ( the_thread->Wait.flags == expected_flags );
4000f954: c6 07 20 50 ld [ %i4 + 0x50 ], %g3
if ( success ) {
4000f958: 80 a4 00 03 cmp %l0, %g3
4000f95c: 12 80 00 04 bne 4000f96c <_Event_Seize+0x9c>
4000f960: c4 07 a0 5c ld [ %fp + 0x5c ], %g2
success = _Thread_Wait_flags_try_change_acquire(
4000f964: 84 10 a0 02 or %g2, 2, %g2
<== NOT EXECUTED
the_thread->Wait.flags = desired_flags;
4000f968: c4 27 20 50 st %g2, [ %i4 + 0x50 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000f96c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000f970: 01 00 00 00 nop
executing,
intend_to_block,
wait_class | THREAD_WAIT_STATE_BLOCKED
);
if ( !success ) {
4000f974: 80 a4 00 03 cmp %l0, %g3
4000f978: 02 80 00 0e be 4000f9b0 <_Event_Seize+0xe0>
4000f97c: 01 00 00 00 nop
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000f980: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000f984: c2 27 bf fc st %g1, [ %fp + -4 ]
_Watchdog_Remove(
4000f988: d0 07 20 60 ld [ %i4 + 0x60 ], %o0
4000f98c: 7f ff f9 e7 call 4000e128 <_Watchdog_Remove>
4000f990: 92 07 20 68 add %i4, 0x68, %o1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000f994: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000f998: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000f99c: 01 00 00 00 nop
_Thread_Clear_state( the_thread, STATES_BLOCKED );
4000f9a0: 13 0c 00 57 sethi %hi(0x30015c00), %o1
4000f9a4: 90 10 00 1c mov %i4, %o0
4000f9a8: 7f ff f0 e3 call 4000bd34 <_Thread_Clear_state>
4000f9ac: 92 12 63 ff or %o1, 0x3ff, %o1
_Thread_Timer_remove( executing );
_Thread_Unblock( executing );
}
_Thread_Dispatch_direct( cpu_self );
4000f9b0: 7f ff f1 83 call 4000bfbc <_Thread_Dispatch_direct>
4000f9b4: 90 10 00 1d mov %i5, %o0
RTEMS_INLINE_ROUTINE rtems_status_code _Status_Get(
Status_Control status
)
{
return (rtems_status_code) STATUS_GET_CLASSIC( status );
4000f9b8: f0 0f 20 4f ldub [ %i4 + 0x4f ], %i0
return _Status_Get_after_wait( executing );
}
4000f9bc: 81 c7 e0 08 ret
4000f9c0: 81 e8 00 00 restore
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000f9c4: c2 07 a0 64 ld [ %fp + 0x64 ], %g1
<== NOT EXECUTED
4000f9c8: c2 00 40 00 ld [ %g1 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000f9cc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000f9d0: 01 00 00 00 nop
*event_out = seized_events;
4000f9d4: c4 26 c0 00 st %g2, [ %i3 ]
return RTEMS_UNSATISFIED;
4000f9d8: 81 c7 e0 08 ret
4000f9dc: 91 e8 20 0d restore %g0, 0xd, %o0
RTEMS_INLINE_ROUTINE rtems_event_set _Event_sets_Clear(
rtems_event_set the_event_set,
rtems_event_set the_mask
)
{
return ( the_event_set & ~(the_mask) );
4000f9e0: 82 28 40 02 andn %g1, %g2, %g1
<== NOT EXECUTED
event->pending_events =
4000f9e4: c2 27 40 00 st %g1, [ %i5 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000f9e8: c2 07 a0 64 ld [ %fp + 0x64 ], %g1
<== NOT EXECUTED
4000f9ec: c2 00 40 00 ld [ %g1 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000f9f0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000f9f4: 01 00 00 00 nop
*event_out = seized_events;
4000f9f8: c4 26 c0 00 st %g2, [ %i3 ]
return RTEMS_SUCCESSFUL;
4000f9fc: 81 c7 e0 08 ret
4000fa00: 91 e8 20 00 restore %g0, 0, %o0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000fa04: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000fa08: c2 27 bf fc st %g1, [ %fp + -4 ]
_ISR_lock_ISR_disable_and_acquire( &the_thread->Timer.Lock, &lock_context );
the_thread->Timer.header =
&cpu->Watchdog.Header[ PER_CPU_WATCHDOG_TICKS ];
the_thread->Timer.Watchdog.routine = _Thread_Timeout;
4000fa0c: 05 10 00 36 sethi %hi(0x4000d800), %g2
expire = ticks + cpu->Watchdog.ticks;
4000fa10: d4 19 a0 30 ldd [ %g6 + 0x30 ], %o2
&cpu->Watchdog.Header[ PER_CPU_WATCHDOG_TICKS ];
4000fa14: 90 01 a0 38 add %g6, 0x38, %o0
the_thread->Timer.Watchdog.routine = _Thread_Timeout;
4000fa18: 84 10 a3 c8 or %g2, 0x3c8, %g2
the_thread->Timer.header =
4000fa1c: d0 27 20 60 st %o0, [ %i4 + 0x60 ]
_Watchdog_Insert(header, the_watchdog, expire);
4000fa20: 86 82 c0 1a addcc %o3, %i2, %g3
the_thread->Timer.Watchdog.routine = _Thread_Timeout;
4000fa24: c4 27 20 78 st %g2, [ %i4 + 0x78 ]
4000fa28: 84 42 a0 00 addx %o2, 0, %g2
4000fa2c: 92 07 20 68 add %i4, 0x68, %o1
4000fa30: 94 10 00 02 mov %g2, %o2
4000fa34: 7f ff f9 95 call 4000e088 <_Watchdog_Insert>
4000fa38: 96 10 00 03 mov %g3, %o3
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000fa3c: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000fa40: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000fa44: 01 00 00 00 nop
_Thread_Set_state( executing, block_state );
4000fa48: 10 bf ff c0 b 4000f948 <_Event_Seize+0x78>
4000fa4c: d2 07 a0 60 ld [ %fp + 0x60 ], %o1
4000e5f8 <_Event_Surrender>:
rtems_event_set event_in,
Event_Control *event,
Thread_Wait_flags wait_class,
ISR_lock_Context *lock_context
)
{
4000e5f8: 9d e3 bf 98 save %sp, -104, %sp
RTEMS_INLINE_ROUTINE void _Event_sets_Post(
rtems_event_set the_new_events,
rtems_event_set *the_event_set
)
{
*the_event_set |= the_new_events;
4000e5fc: c2 06 80 00 ld [ %i2 ], %g1
4000e600: b2 16 40 01 or %i1, %g1, %i1
4000e604: f2 26 80 00 st %i1, [ %i2 ]
return ( wait_flags & wait_mask ) == wait_class;
4000e608: 03 00 00 3f sethi %hi(0xfc00), %g1
4000e60c: c4 06 20 50 ld [ %i0 + 0x50 ], %g2
4000e610: 82 10 63 04 or %g1, 0x304, %g1
4000e614: 82 08 80 01 and %g2, %g1, %g1
_Thread_Wait_acquire_default_critical( the_thread, lock_context );
_Event_sets_Post( event_in, &event->pending_events );
pending_events = event->pending_events;
if (
4000e618: 80 a0 40 1b cmp %g1, %i3
4000e61c: 22 80 00 07 be,a 4000e638 <_Event_Surrender+0x40>
4000e620: c6 06 20 3c ld [ %i0 + 0x3c ], %g3
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000e624: c2 07 00 00 ld [ %i4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000e628: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000e62c: 01 00 00 00 nop
} else {
_Thread_Wait_release_default( the_thread, lock_context );
}
return RTEMS_SUCCESSFUL;
}
4000e630: 81 c7 e0 08 ret
4000e634: 91 e8 20 00 restore %g0, 0, %o0
&& ( *seized_events == event_condition || _Options_Is_any( option_set ) );
4000e638: 88 88 c0 19 andcc %g3, %i1, %g4
4000e63c: 02 bf ff fa be 4000e624 <_Event_Surrender+0x2c>
4000e640: 80 a0 c0 04 cmp %g3, %g4
4000e644: 02 80 00 05 be 4000e658 <_Event_Surrender+0x60>
4000e648: fa 06 20 48 ld [ %i0 + 0x48 ], %i5
4000e64c: 80 8f 60 02 btst 2, %i5
4000e650: 02 bf ff f5 be 4000e624 <_Event_Surrender+0x2c>
4000e654: 01 00 00 00 nop
4000e658: fa 06 20 40 ld [ %i0 + 0x40 ], %i5
RTEMS_INLINE_ROUTINE rtems_event_set _Event_sets_Clear(
rtems_event_set the_event_set,
rtems_event_set the_mask
)
{
return ( the_event_set & ~(the_mask) );
4000e65c: b2 2e 40 04 andn %i1, %g4, %i1
event->pending_events = _Event_sets_Clear( pending_events, seized_events );
4000e660: f2 26 80 00 st %i1, [ %i2 ]
success = _Thread_Wait_flags_try_change_release(
4000e664: 86 10 60 01 or %g1, 1, %g3
*(rtems_event_set *) the_thread->Wait.return_argument = seized_events;
4000e668: c8 27 40 00 st %g4, [ %i5 ]
ready_again = wait_class | THREAD_WAIT_STATE_READY_AGAIN;
4000e66c: 82 10 60 04 or %g1, 4, %g1
if ( success ) {
4000e670: 80 a0 c0 02 cmp %g3, %g2
4000e674: 02 bf ff ec be 4000e624 <_Event_Surrender+0x2c>
4000e678: c2 26 20 50 st %g1, [ %i0 + 0x50 ]
disable_level = cpu_self->thread_dispatch_disable_level;
4000e67c: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
4000e680: 82 00 60 01 inc %g1
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
4000e684: ba 10 00 06 mov %g6, %i5
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
4000e688: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000e68c: c2 07 00 00 ld [ %i4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000e690: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000e694: 01 00 00 00 nop
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000e698: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000e69c: c2 27 bf fc st %g1, [ %fp + -4 ]
_Watchdog_Remove(
4000e6a0: d0 06 20 60 ld [ %i0 + 0x60 ], %o0
4000e6a4: 7f ff f9 f4 call 4000ce74 <_Watchdog_Remove>
4000e6a8: 92 06 20 68 add %i0, 0x68, %o1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000e6ac: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000e6b0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000e6b4: 01 00 00 00 nop
_Thread_Clear_state( the_thread, STATES_BLOCKED );
4000e6b8: 13 0c 00 57 sethi %hi(0x30015c00), %o1
4000e6bc: 90 10 00 18 mov %i0, %o0
4000e6c0: 40 00 02 7d call 4000f0b4 <_Thread_Clear_state>
4000e6c4: 92 12 63 ff or %o1, 0x3ff, %o1
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
4000e6c8: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
if ( disable_level == 1 ) {
4000e6cc: 80 a0 60 01 cmp %g1, 1
4000e6d0: 02 80 00 04 be 4000e6e0 <_Event_Surrender+0xe8>
4000e6d4: 82 00 7f ff add %g1, -1, %g1
cpu_self->thread_dispatch_disable_level = disable_level - 1;
4000e6d8: c2 27 60 18 st %g1, [ %i5 + 0x18 ]
4000e6dc: 30 bf ff d5 b,a 4000e630 <_Event_Surrender+0x38>
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000e6e0: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
4000e6e4: c4 0f 60 1c ldub [ %i5 + 0x1c ], %g2
4000e6e8: 80 a0 a0 00 cmp %g2, 0
4000e6ec: 12 80 00 06 bne 4000e704 <_Event_Surrender+0x10c>
4000e6f0: 92 10 00 01 mov %g1, %o1
cpu_self->thread_dispatch_disable_level = 0;
4000e6f4: c0 27 60 18 clr [ %i5 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000e6f8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000e6fc: 01 00 00 00 nop
4000e700: 30 bf ff cc b,a 4000e630 <_Event_Surrender+0x38>
_Thread_Do_dispatch( cpu_self, level );
4000e704: c2 27 bf fc st %g1, [ %fp + -4 ]
4000e708: 7f ff f1 63 call 4000ac94 <_Thread_Do_dispatch>
4000e70c: 90 10 00 1d mov %i5, %o0
4000e710: 10 bf ff fa b 4000e6f8 <_Event_Surrender+0x100>
4000e714: c2 07 bf fc ld [ %fp + -4 ], %g1
40007108 <_RTEMS_tasks_Initialize_user_tasks_body>:
*
* Output parameters: NONE
*/
void _RTEMS_tasks_Initialize_user_tasks_body( void )
{
40007108: 9d e3 bf 98 save %sp, -104, %sp
rtems_task_entry entry_point;
/*
* Move information into local variables
*/
user_tasks = Configuration_RTEMS_API.User_initialization_tasks_table;
4000710c: 03 10 00 4b sethi %hi(0x40012c00), %g1
40007110: 82 10 63 04 or %g1, 0x304, %g1 ! 40012f04 <Configuration_RTEMS_API>
40007114: fa 00 60 28 ld [ %g1 + 0x28 ], %i5
maximum = Configuration_RTEMS_API.number_of_initialization_tasks;
/*
* Verify that we have a set of user tasks to iterate
*/
if ( !user_tasks )
40007118: 80 a7 60 00 cmp %i5, 0
4000711c: 02 80 00 21 be 400071a0 <_RTEMS_tasks_Initialize_user_tasks_body+0x98>
<== NEVER TAKEN
40007120: 01 00 00 00 nop
maximum = Configuration_RTEMS_API.number_of_initialization_tasks;
40007124: f4 00 60 24 ld [ %g1 + 0x24 ], %i2
return;
/*
* Now iterate over the initialization tasks and create/start them.
*/
for ( index=0 ; index < maximum ; index++ ) {
40007128: 80 a6 a0 00 cmp %i2, 0
4000712c: 02 80 00 1d be 400071a0 <_RTEMS_tasks_Initialize_user_tasks_body+0x98>
40007130: b8 10 20 00 clr %i4
user_tasks[ index ].argument
);
_Assert( rtems_is_status_successful( return_value ) );
(void) return_value;
if ( _Thread_Global_constructor == 0 ) {
40007134: 37 10 00 53 sethi %hi(0x40014c00), %i3
return_value = rtems_task_create(
40007138: d8 07 60 0c ld [ %i5 + 0xc ], %o4
4000713c: d6 07 60 14 ld [ %i5 + 0x14 ], %o3
40007140: d4 07 60 04 ld [ %i5 + 4 ], %o2
40007144: d2 07 60 08 ld [ %i5 + 8 ], %o1
40007148: d0 07 40 00 ld [ %i5 ], %o0
4000714c: 7f ff ff 64 call 40006edc <rtems_task_create>
40007150: 9a 07 bf fc add %fp, -4, %o5
if ( !rtems_is_status_successful( return_value ) ) {
40007154: 80 a2 20 00 cmp %o0, 0
40007158: 12 80 00 14 bne 400071a8 <_RTEMS_tasks_Initialize_user_tasks_body+0xa0>
4000715c: 01 00 00 00 nop
entry_point = user_tasks[ index ].entry_point;
40007160: d2 07 60 10 ld [ %i5 + 0x10 ], %o1
if ( entry_point == NULL ) {
40007164: 80 a2 60 00 cmp %o1, 0
40007168: 02 80 00 12 be 400071b0 <_RTEMS_tasks_Initialize_user_tasks_body+0xa8>
4000716c: 01 00 00 00 nop
return_value = rtems_task_start(
40007170: d4 07 60 18 ld [ %i5 + 0x18 ], %o2
40007174: 40 00 00 27 call 40007210 <rtems_task_start>
40007178: d0 07 bf fc ld [ %fp + -4 ], %o0
if ( _Thread_Global_constructor == 0 ) {
4000717c: c2 06 e0 d0 ld [ %i3 + 0xd0 ], %g1
40007180: 80 a0 60 00 cmp %g1, 0
40007184: 12 80 00 04 bne 40007194 <_RTEMS_tasks_Initialize_user_tasks_body+0x8c>
<== NEVER TAKEN
40007188: b8 07 20 01 inc %i4
_Thread_Global_constructor = id;
4000718c: c2 07 bf fc ld [ %fp + -4 ], %g1
40007190: c2 26 e0 d0 st %g1, [ %i3 + 0xd0 ]
for ( index=0 ; index < maximum ; index++ ) {
40007194: 80 a6 80 1c cmp %i2, %i4
40007198: 12 bf ff e8 bne 40007138 <_RTEMS_tasks_Initialize_user_tasks_body+0x30>
<== NEVER TAKEN
4000719c: ba 07 60 1c add %i5, 0x1c, %i5
}
}
}
400071a0: 81 c7 e0 08 ret
400071a4: 81 e8 00 00 restore
_Internal_error( INTERNAL_ERROR_RTEMS_INIT_TASK_CREATE_FAILED );
400071a8: 40 00 03 12 call 40007df0 <_Internal_error>
400071ac: 90 10 20 20 mov 0x20, %o0
_Internal_error( INTERNAL_ERROR_RTEMS_INIT_TASK_ENTRY_IS_NULL );
400071b0: 40 00 03 10 call 40007df0 <_Internal_error>
400071b4: 90 10 20 1a mov 0x1a, %o0
400071b8: 01 00 00 00 nop
<== NOT EXECUTED
40006598 <_Rate_monotonic_Cancel>:
void _Rate_monotonic_Cancel(
Rate_monotonic_Control *the_period,
Thread_Control *owner,
ISR_lock_Context *lock_context
)
{
40006598: 9d e3 bf 70 save %sp, -144, %sp
)
{
ISR_lock_Context lock_context;
_Watchdog_Per_CPU_acquire_critical( cpu, &lock_context );
_Watchdog_Remove(
4000659c: 11 10 00 4e sethi %hi(0x40013800), %o0
400065a0: 92 06 20 10 add %i0, 0x10, %o1
400065a4: 40 00 18 c3 call 4000c8b0 <_Watchdog_Remove>
400065a8: 90 12 23 f8 or %o0, 0x3f8, %o0
Thread_queue_Context queue_context;
_Rate_monotonic_Acquire_critical( the_period, lock_context );
_Watchdog_Per_CPU_remove_ticks( &the_period->Timer );
the_period->state = RATE_MONOTONIC_INACTIVE;
400065ac: c0 26 20 30 clr [ %i0 + 0x30 ]
)
{
const Scheduler_Control *scheduler = _Thread_Scheduler_get_home( the_thread );
_Thread_queue_Context_clear_priority_updates( queue_context );
( *scheduler->Operations.cancel_job )(
400065b0: 11 10 00 40 sethi %hi(0x40010000), %o0
RTEMS_INLINE_ROUTINE void _Thread_queue_Context_clear_priority_updates(
Thread_queue_Context *queue_context
)
{
queue_context->Priority.update_count = 0;
400065b4: c0 27 bf f0 clr [ %fp + -16 ]
400065b8: 90 12 22 40 or %o0, 0x240, %o0
_Scheduler_Cancel_job(
400065bc: d2 06 20 54 ld [ %i0 + 0x54 ], %o1
400065c0: c2 02 20 30 ld [ %o0 + 0x30 ], %g1
400065c4: 94 06 20 38 add %i0, 0x38, %o2
400065c8: 9f c0 40 00 call %g1
400065cc: 96 07 bf dc add %fp, -36, %o3
const ISR_lock_Context *lock_context
)
{
uint32_t disable_level;
disable_level = cpu_self->thread_dispatch_disable_level;
400065d0: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
_Profiling_Thread_dispatch_disable_critical(
cpu_self,
disable_level,
lock_context
);
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400065d4: 82 00 60 01 inc %g1
<== NOT EXECUTED
*/
RTEMS_INLINE_ROUTINE Per_CPU_Control *_Thread_Dispatch_disable_critical(
const ISR_lock_Context *lock_context
)
{
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
400065d8: ba 10 00 06 mov %g6, %i5
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400065dc: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400065e0: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400065e4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400065e8: 01 00 00 00 nop
&queue_context
);
cpu_self = _Thread_Dispatch_disable_critical( lock_context );
_Rate_monotonic_Release( the_period, lock_context );
_Thread_Priority_update( &queue_context );
400065ec: 40 00 10 90 call 4000a82c <_Thread_Priority_update>
400065f0: 90 07 bf dc add %fp, -36, %o0
*
* @param[in] cpu_self The current processor.
*/
RTEMS_INLINE_ROUTINE void _Thread_Dispatch_enable( Per_CPU_Control *cpu_self )
{
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
400065f4: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
if ( disable_level == 1 ) {
400065f8: 80 a0 60 01 cmp %g1, 1
400065fc: 02 80 00 05 be 40006610 <_Rate_monotonic_Cancel+0x78>
<== ALWAYS TAKEN
40006600: 82 00 7f ff add %g1, -1, %g1
}
_ISR_Local_enable( level );
} else {
_Assert( disable_level > 0 );
cpu_self->thread_dispatch_disable_level = disable_level - 1;
40006604: c2 27 60 18 st %g1, [ %i5 + 0x18 ]
<== NOT EXECUTED
_Thread_Dispatch_enable( cpu_self );
}
40006608: 81 c7 e0 08 ret
<== NOT EXECUTED
4000660c: 81 e8 00 00 restore
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40006610: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
40006614: c4 0f 60 1c ldub [ %i5 + 0x1c ], %g2
40006618: 80 a0 a0 00 cmp %g2, 0
4000661c: 12 80 00 07 bne 40006638 <_Rate_monotonic_Cancel+0xa0>
40006620: 92 10 00 01 mov %g1, %o1
cpu_self->thread_dispatch_disable_level = 0;
40006624: c0 27 60 18 clr [ %i5 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40006628: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000662c: 01 00 00 00 nop
40006630: 81 c7 e0 08 ret
40006634: 81 e8 00 00 restore
_Thread_Do_dispatch( cpu_self, level );
40006638: c2 27 bf d4 st %g1, [ %fp + -44 ]
4000663c: 40 00 11 03 call 4000aa48 <_Thread_Do_dispatch>
40006640: 90 10 00 1d mov %i5, %o0
40006644: c2 07 bf d4 ld [ %fp + -44 ], %g1
<== NOT EXECUTED
40006648: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000664c: 01 00 00 00 nop
40006650: 81 c7 e0 08 ret
40006654: 81 e8 00 00 restore
400070f0 <_Rate_monotonic_Get_status>:
{
400070f0: 9d e3 bf 98 save %sp, -104, %sp
*time = _Timecounter_Sbinuptime();
400070f4: 40 00 09 c3 call 40009800 <_Timecounter_Sbinuptime>
400070f8: fa 06 20 54 ld [ %i0 + 0x54 ], %i5
const Timestamp_Control *_start,
const Timestamp_Control *_end,
Timestamp_Control *_result
)
{
*_result = *_end - *_start;
400070fc: c4 1e 20 60 ldd [ %i0 + 0x60 ], %g2
40007100: 9a a2 40 03 subcc %o1, %g3, %o5
40007104: 98 62 00 02 subx %o0, %g2, %o4
40007108: 92 10 00 0d mov %o5, %o1
4000710c: 90 10 00 0c mov %o4, %o0
40007110: d0 3e 40 00 std %o0, [ %i1 ]
_Thread_Get_CPU_time_used( owning_thread, &used );
40007114: 90 10 00 1d mov %i5, %o0
40007118: 40 00 12 e2 call 4000bca0 <_Thread_Get_CPU_time_used>
4000711c: 92 07 bf f8 add %fp, -8, %o1
40007120: c4 1e 20 58 ldd [ %i0 + 0x58 ], %g2
40007124: f8 1f bf f8 ldd [ %fp + -8 ], %i4
if ( _Timestamp_Less_than( &used, &the_period->cpu_usage_period_initiated ) )
40007128: 80 a0 80 1c cmp %g2, %i4
4000712c: 14 80 00 0e bg 40007164 <_Rate_monotonic_Get_status+0x74>
<== NEVER TAKEN
40007130: b0 10 20 00 clr %i0
40007134: 02 80 00 09 be 40007158 <_Rate_monotonic_Get_status+0x68>
40007138: 80 a0 c0 1d cmp %g3, %i5
4000713c: 9a a7 40 03 subcc %i5, %g3, %o5
return true;
40007140: b0 10 20 01 mov 1, %i0
40007144: 98 67 00 02 subx %i4, %g2, %o4
}
40007148: b0 0e 20 01 and %i0, 1, %i0
4000714c: d8 3e 80 00 std %o4, [ %i2 ]
40007150: 81 c7 e0 08 ret
40007154: 81 e8 00 00 restore
if ( _Timestamp_Less_than( &used, &the_period->cpu_usage_period_initiated ) )
40007158: 08 bf ff fa bleu 40007140 <_Rate_monotonic_Get_status+0x50>
4000715c: 9a a7 40 03 subcc %i5, %g3, %o5
return false;
40007160: b0 10 20 00 clr %i0
}
40007164: b0 0e 20 01 and %i0, 1, %i0
40007168: 81 c7 e0 08 ret
4000716c: 81 e8 00 00 restore
400072ac <_Rate_monotonic_Restart>:
{
400072ac: 9d e3 bf 70 save %sp, -144, %sp
400072b0: 40 00 09 54 call 40009800 <_Timecounter_Sbinuptime>
400072b4: 01 00 00 00 nop
400072b8: d0 3e 20 60 std %o0, [ %i0 + 0x60 ]
_Thread_Get_CPU_time_used( owner, &the_period->cpu_usage_period_initiated );
400072bc: 92 06 20 58 add %i0, 0x58, %o1
400072c0: 40 00 12 78 call 4000bca0 <_Thread_Get_CPU_time_used>
400072c4: 90 10 00 19 mov %i1, %o0
disable_level = cpu_self->thread_dispatch_disable_level;
400072c8: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
_Rate_monotonic_Release_job(
400072cc: c8 06 20 50 ld [ %i0 + 0x50 ], %g4
header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_TICKS ];
_Watchdog_Set_CPU( the_watchdog, cpu );
_Watchdog_Per_CPU_acquire_critical( cpu, &lock_context );
expire = ticks + cpu->Watchdog.ticks;
400072d0: c4 19 a0 30 ldd [ %g6 + 0x30 ], %g2
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400072d4: 82 00 60 01 inc %g1
400072d8: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
400072dc: a2 80 c0 04 addcc %g3, %g4, %l1
_Watchdog_Insert(header, the_watchdog, expire);
400072e0: 92 06 20 10 add %i0, 0x10, %o1
expire = ticks + cpu->Watchdog.ticks;
400072e4: a0 40 a0 00 addx %g2, 0, %l0
_Watchdog_Insert(header, the_watchdog, expire);
400072e8: 96 10 00 11 mov %l1, %o3
400072ec: 94 10 00 10 mov %l0, %o2
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
400072f0: ba 10 00 06 mov %g6, %i5
400072f4: 40 00 1a 78 call 4000dcd4 <_Watchdog_Insert>
400072f8: 90 01 a0 38 add %g6, 0x38, %o0
400072fc: c0 27 bf f0 clr [ %fp + -16 ]
40007300: 11 10 00 68 sethi %hi(0x4001a000), %o0
40007304: 90 12 22 d0 or %o0, 0x2d0, %o0 ! 4001a2d0 <_Scheduler_Table>
40007308: c2 02 20 2c ld [ %o0 + 0x2c ], %g1
4000730c: 96 10 00 10 mov %l0, %o3
40007310: 98 10 00 11 mov %l1, %o4
40007314: 9a 07 bf dc add %fp, -36, %o5
40007318: 94 06 20 38 add %i0, 0x38, %o2
4000731c: 9f c0 40 00 call %g1
40007320: 92 10 00 19 mov %i1, %o1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007324: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007328: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000732c: 01 00 00 00 nop
_Thread_Priority_update( &queue_context );
40007330: 40 00 11 76 call 4000b908 <_Thread_Priority_update>
40007334: 90 07 bf dc add %fp, -36, %o0
*
* @param[in] cpu_self The current processor.
*/
RTEMS_INLINE_ROUTINE void _Thread_Dispatch_enable( Per_CPU_Control *cpu_self )
{
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
40007338: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
if ( disable_level == 1 ) {
4000733c: 80 a0 60 01 cmp %g1, 1
40007340: 02 80 00 05 be 40007354 <_Rate_monotonic_Restart+0xa8>
40007344: 82 00 7f ff add %g1, -1, %g1
}
_ISR_Local_enable( level );
} else {
_Assert( disable_level > 0 );
cpu_self->thread_dispatch_disable_level = disable_level - 1;
40007348: c2 27 60 18 st %g1, [ %i5 + 0x18 ]
}
4000734c: 81 c7 e0 08 ret
40007350: 81 e8 00 00 restore
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007354: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
40007358: c4 0f 60 1c ldub [ %i5 + 0x1c ], %g2
4000735c: 80 a0 a0 00 cmp %g2, 0
40007360: 12 80 00 07 bne 4000737c <_Rate_monotonic_Restart+0xd0>
<== NEVER TAKEN
40007364: 92 10 00 01 mov %g1, %o1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = 0;
40007368: c0 27 60 18 clr [ %i5 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000736c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007370: 01 00 00 00 nop
40007374: 81 c7 e0 08 ret
40007378: 81 e8 00 00 restore
_Thread_Do_dispatch( cpu_self, level );
4000737c: c2 27 bf d4 st %g1, [ %fp + -44 ]
<== NOT EXECUTED
40007380: 40 00 11 e9 call 4000bb24 <_Thread_Do_dispatch>
<== NOT EXECUTED
40007384: 90 10 00 1d mov %i5, %o0
<== NOT EXECUTED
40007388: c2 07 bf d4 ld [ %fp + -44 ], %g1
<== NOT EXECUTED
4000738c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007390: 01 00 00 00 nop
<== NOT EXECUTED
40007394: 81 c7 e0 08 ret
<== NOT EXECUTED
40007398: 81 e8 00 00 restore
<== NOT EXECUTED
4000755c <_Rate_monotonic_Timeout>:
_Rate_monotonic_Release( the_period, lock_context );
}
void _Rate_monotonic_Timeout( Watchdog_Control *the_watchdog )
{
4000755c: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
Rate_monotonic_Control *the_period;
Thread_Control *owner;
ISR_lock_Context lock_context;
Thread_Wait_flags wait_flags;
the_period = RTEMS_CONTAINER_OF( the_watchdog, Rate_monotonic_Control, Timer );
40007560: b0 06 3f f0 add %i0, -16, %i0
<== NOT EXECUTED
owner = the_period->owner;
40007564: fa 06 20 54 ld [ %i0 + 0x54 ], %i5
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007568: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable( &lock_context );
4000756c: c2 27 bf fc st %g1, [ %fp + -4 ]
40007570: c2 07 60 50 ld [ %i5 + 0x50 ], %g1
_Rate_monotonic_Acquire_critical( the_period, &lock_context );
wait_flags = _Thread_Wait_flags_get( owner );
if (
40007574: 80 88 68 00 btst 0x800, %g1
40007578: 22 80 00 07 be,a 40007594 <_Rate_monotonic_Timeout+0x38>
4000757c: c2 06 20 a0 ld [ %i0 + 0xa0 ], %g1
( wait_flags & THREAD_WAIT_CLASS_PERIOD ) != 0
&& owner->Wait.return_argument == the_period
40007580: d0 07 60 40 ld [ %i5 + 0x40 ], %o0
40007584: 80 a2 00 18 cmp %o0, %i0
40007588: 02 80 00 18 be 400075e8 <_Rate_monotonic_Timeout+0x8c>
4000758c: 80 a0 68 01 cmp %g1, 0x801
if ( the_period->postponed_jobs != UINT32_MAX ) {
40007590: c2 06 20 a0 ld [ %i0 + 0xa0 ], %g1
40007594: 80 a0 7f ff cmp %g1, -1
40007598: 02 80 00 03 be 400075a4 <_Rate_monotonic_Timeout+0x48>
4000759c: 82 00 60 01 inc %g1
++the_period->postponed_jobs;
400075a0: c2 26 20 a0 st %g1, [ %i0 + 0xa0 ]
the_period->state = RATE_MONOTONIC_EXPIRED;
400075a4: 82 10 20 02 mov 2, %g1
expire = ticks + cpu->Watchdog.ticks;
400075a8: c4 19 a0 30 ldd [ %g6 + 0x30 ], %g2
400075ac: c2 26 20 30 st %g1, [ %i0 + 0x30 ]
_Watchdog_Insert(header, the_watchdog, expire);
400075b0: 92 06 20 10 add %i0, 0x10, %o1
expire = ticks + cpu->Watchdog.ticks;
400075b4: c2 06 20 50 ld [ %i0 + 0x50 ], %g1
400075b8: ba 80 c0 01 addcc %g3, %g1, %i5
_Watchdog_Insert(header, the_watchdog, expire);
400075bc: 90 01 a0 38 add %g6, 0x38, %o0
expire = ticks + cpu->Watchdog.ticks;
400075c0: b8 40 a0 00 addx %g2, 0, %i4
_Watchdog_Insert(header, the_watchdog, expire);
400075c4: 96 10 00 1d mov %i5, %o3
400075c8: 40 00 19 c3 call 4000dcd4 <_Watchdog_Insert>
400075cc: 94 10 00 1c mov %i4, %o2
the_period->latest_deadline = deadline;
400075d0: f8 3e 20 a8 std %i4, [ %i0 + 0xa8 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400075d4: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400075d8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400075dc: 01 00 00 00 nop
_Thread_Unblock( owner );
}
} else {
_Rate_monotonic_Renew_deadline( the_period, &lock_context );
}
}
400075e0: 81 c7 e0 08 ret
400075e4: 81 e8 00 00 restore
owner->Wait.return_argument = NULL;
400075e8: c0 27 60 40 clr [ %i5 + 0x40 ]
the_thread->Wait.flags = desired_flags;
400075ec: 82 10 28 04 mov 0x804, %g1
if ( success ) {
400075f0: 02 80 00 0b be 4000761c <_Rate_monotonic_Timeout+0xc0>
400075f4: c2 27 60 50 st %g1, [ %i5 + 0x50 ]
_Rate_monotonic_Restart( the_period, owner, &lock_context );
400075f8: 92 10 00 1d mov %i5, %o1
400075fc: 7f ff ff 2c call 400072ac <_Rate_monotonic_Restart>
40007600: 94 07 bf fc add %fp, -4, %o2
_Thread_Clear_state( the_thread, STATES_BLOCKED );
40007604: 90 10 00 1d mov %i5, %o0
40007608: 13 0c 00 57 sethi %hi(0x30015c00), %o1
4000760c: 40 00 10 ec call 4000b9bc <_Thread_Clear_state>
40007610: 92 12 63 ff or %o1, 0x3ff, %o1 ! 30015fff <RAM_SIZE+0x2fc15fff>
}
40007614: 81 c7 e0 08 ret
40007618: 81 e8 00 00 restore
_Rate_monotonic_Restart( the_period, owner, &lock_context );
4000761c: 94 07 bf fc add %fp, -4, %o2
40007620: 7f ff ff 23 call 400072ac <_Rate_monotonic_Restart>
40007624: 92 10 00 1d mov %i5, %o1
40007628: 81 c7 e0 08 ret
4000762c: 81 e8 00 00 restore
40010d18 <_Region_Process_queue>:
#include <rtems/score/threadqimpl.h>
void _Region_Process_queue(
Region_Control *the_region
)
{
40010d18: 9d e3 bf 98 save %sp, -104, %sp
disable_level = cpu_self->thread_dispatch_disable_level;
40010d1c: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40010d20: 82 00 60 01 inc %g1
40010d24: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40010d28: b4 10 00 06 mov %g6, %i2
_RTEMS_Unlock_allocator();
40010d2c: 7f ff e1 05 call 40009140 <_RTEMS_Unlock_allocator>
40010d30: b6 06 20 10 add %i0, 0x10, %i3
return _Heap_Allocate( &the_region->Memory, size );
40010d34: 10 80 00 0c b 40010d64 <_Region_Process_queue+0x4c>
40010d38: b8 06 20 28 add %i0, 0x28, %i4
40010d3c: 7f ff e1 72 call 40009304 <_Heap_Allocate_aligned_with_boundary>
40010d40: d2 07 60 3c ld [ %i5 + 0x3c ], %o1
the_segment = (void **) _Region_Allocate_segment(
the_region,
the_thread->Wait.count
);
if ( the_segment == NULL )
40010d44: 80 a2 20 00 cmp %o0, 0
40010d48: 02 80 00 10 be 40010d88 <_Region_Process_queue+0x70>
40010d4c: 01 00 00 00 nop
break;
*(void **)the_thread->Wait.return_argument = the_segment;
40010d50: c2 07 60 40 ld [ %i5 + 0x40 ], %g1
40010d54: d0 20 40 00 st %o0, [ %g1 ]
_Thread_queue_Extract( the_thread );
40010d58: 7f ff f3 30 call 4000da18 <_Thread_queue_Extract>
40010d5c: 90 10 00 1d mov %i5, %o0
the_thread->Wait.return_code = STATUS_SUCCESSFUL;
40010d60: c0 27 60 4c clr [ %i5 + 0x4c ]
the_thread = _Thread_queue_First(
40010d64: 90 10 00 1b mov %i3, %o0
40010d68: 40 00 01 26 call 40011200 <_Thread_queue_First>
40010d6c: d2 06 20 1c ld [ %i0 + 0x1c ], %o1
40010d70: 96 10 20 00 clr %o3
40010d74: ba 10 00 08 mov %o0, %i5
40010d78: 94 10 20 00 clr %o2
if ( the_thread == NULL )
40010d7c: 80 a7 60 00 cmp %i5, 0
40010d80: 12 bf ff ef bne 40010d3c <_Region_Process_queue+0x24>
40010d84: 90 10 00 1c mov %i4, %o0
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
40010d88: c2 06 a0 18 ld [ %i2 + 0x18 ], %g1
if ( disable_level == 1 ) {
40010d8c: 80 a0 60 01 cmp %g1, 1
40010d90: 02 80 00 05 be 40010da4 <_Region_Process_queue+0x8c>
<== ALWAYS TAKEN
40010d94: 82 00 7f ff add %g1, -1, %g1
cpu_self->thread_dispatch_disable_level = disable_level - 1;
40010d98: c2 26 a0 18 st %g1, [ %i2 + 0x18 ]
<== NOT EXECUTED
}
_Thread_Dispatch_enable( cpu_self );
}
40010d9c: 81 c7 e0 08 ret
<== NOT EXECUTED
40010da0: 81 e8 00 00 restore
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40010da4: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
40010da8: c4 0e a0 1c ldub [ %i2 + 0x1c ], %g2
40010dac: 80 a0 a0 00 cmp %g2, 0
40010db0: 12 80 00 07 bne 40010dcc <_Region_Process_queue+0xb4>
40010db4: 92 10 00 01 mov %g1, %o1
cpu_self->thread_dispatch_disable_level = 0;
40010db8: c0 26 a0 18 clr [ %i2 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40010dbc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40010dc0: 01 00 00 00 nop
40010dc4: 81 c7 e0 08 ret
40010dc8: 81 e8 00 00 restore
_Thread_Do_dispatch( cpu_self, level );
40010dcc: c2 27 bf fc st %g1, [ %fp + -4 ]
40010dd0: 7f ff f0 cc call 4000d100 <_Thread_Do_dispatch>
40010dd4: 90 10 00 1a mov %i2, %o0
40010dd8: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
40010ddc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40010de0: 01 00 00 00 nop
40010de4: 81 c7 e0 08 ret
40010de8: 81 e8 00 00 restore
4000fba8 <_Signal_Action_handler>:
void _Signal_Action_handler(
Thread_Control *executing,
Thread_Action *action,
ISR_lock_Context *lock_context
)
{
4000fba8: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
/*
* Signal Processing
*/
api = executing->API_Extensions[ THREAD_API_RTEMS ];
4000fbac: fa 06 21 58 ld [ %i0 + 0x158 ], %i5
<== NOT EXECUTED
ASR_Information *asr
)
{
rtems_signal_set signal_set;
signal_set = asr->signals_posted;
4000fbb0: f8 07 60 14 ld [ %i5 + 0x14 ], %i4
<== NOT EXECUTED
asr->signals_posted = 0;
4000fbb4: c0 27 60 14 clr [ %i5 + 0x14 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000fbb8: c2 06 80 00 ld [ %i2 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000fbbc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000fbc0: 01 00 00 00 nop
asr = &api->Signal;
signal_set = _ASR_Get_posted_signals( asr );
_Thread_State_release( executing, lock_context );
if ( signal_set == 0 ) {
4000fbc4: 80 a7 20 00 cmp %i4, 0
4000fbc8: 32 80 00 04 bne,a 4000fbd8 <_Signal_Action_handler+0x30>
<== ALWAYS TAKEN
4000fbcc: c2 07 60 1c ld [ %i5 + 0x1c ], %g1
(*asr->handler)( signal_set );
asr->nest_level -= 1;
rtems_task_mode( prev_mode, RTEMS_ALL_MODE_MASKS, &prev_mode );
}
4000fbd0: 81 c7 e0 08 ret
<== NOT EXECUTED
4000fbd4: 81 e8 00 00 restore
<== NOT EXECUTED
asr->nest_level += 1;
4000fbd8: 82 00 60 01 inc %g1
4000fbdc: c2 27 60 1c st %g1, [ %i5 + 0x1c ]
rtems_task_mode( asr->mode_set, RTEMS_ALL_MODE_MASKS, &prev_mode );
4000fbe0: 94 07 bf fc add %fp, -4, %o2
4000fbe4: d0 07 60 10 ld [ %i5 + 0x10 ], %o0
4000fbe8: 37 00 00 3f sethi %hi(0xfc00), %i3
4000fbec: 7f ff e0 23 call 40007c78 <rtems_task_mode>
4000fbf0: 92 16 e3 ff or %i3, 0x3ff, %o1 ! ffff <_Configuration_Interrupt_stack_size+0xefff>
(*asr->handler)( signal_set );
4000fbf4: c2 07 60 0c ld [ %i5 + 0xc ], %g1
4000fbf8: 9f c0 40 00 call %g1
4000fbfc: 90 10 00 1c mov %i4, %o0
asr->nest_level -= 1;
4000fc00: c2 07 60 1c ld [ %i5 + 0x1c ], %g1
4000fc04: 82 00 7f ff add %g1, -1, %g1
4000fc08: c2 27 60 1c st %g1, [ %i5 + 0x1c ]
rtems_task_mode( prev_mode, RTEMS_ALL_MODE_MASKS, &prev_mode );
4000fc0c: 94 07 bf fc add %fp, -4, %o2
4000fc10: d0 07 bf fc ld [ %fp + -4 ], %o0
4000fc14: 7f ff e0 19 call 40007c78 <rtems_task_mode>
4000fc18: 92 16 e3 ff or %i3, 0x3ff, %o1
}
4000fc1c: 81 c7 e0 08 ret
4000fc20: 81 e8 00 00 restore
4001139c <_Status_Object_name_errors_to_status>:
4001139c: 00 00 00 00 00 00 00 03 00 00 00 09 00 00 00 04 ................
400113ac: 00 00 00 15 3f 00 00 00 00 00 00 00 52 54 45 4d ....?.......RTEM
400113bc: 53 5f 53 55 43 43 45 53 53 46 55 4c 00 00 00 00 S_SUCCESSFUL....
400113cc: 00 00 00 00 52 54 45 4d 53 5f 54 41 53 4b 5f 45 ....RTEMS_TASK_E
400113dc: 58 49 54 54 45 44 00 00 00 00 00 00 52 54 45 4d XITTED......RTEM
400113ec: 53 5f 4d 50 5f 4e 4f 54 5f 43 4f 4e 46 49 47 55 S_MP_NOT_CONFIGU
400113fc: 52 45 44 00 52 54 45 4d 53 5f 49 4e 56 41 4c 49 RED.RTEMS_INVALI
4001140c: 44 5f 4e 41 4d 45 00 00 00 00 00 00 52 54 45 4d D_NAME......RTEM
4001141c: 53 5f 49 4e 56 41 4c 49 44 5f 49 44 00 00 00 00 S_INVALID_ID....
4001142c: 00 00 00 00 52 54 45 4d 53 5f 54 4f 4f 5f 4d 41 ....RTEMS_TOO_MA
4001143c: 4e 59 00 00 52 54 45 4d 53 5f 54 49 4d 45 4f 55 NY..RTEMS_TIMEOU
4001144c: 54 00 00 00 52 54 45 4d 53 5f 4f 42 4a 45 43 54 T...RTEMS_OBJECT
4001145c: 5f 57 41 53 5f 44 45 4c 45 54 45 44 00 00 00 00 _WAS_DELETED....
4001146c: 00 00 00 00 52 54 45 4d 53 5f 49 4e 56 41 4c 49 ....RTEMS_INVALI
4001147c: 44 5f 53 49 5a 45 00 00 00 00 00 00 52 54 45 4d D_SIZE......RTEM
4001148c: 53 5f 49 4e 56 41 4c 49 44 5f 41 44 44 52 45 53 S_INVALID_ADDRES
4001149c: 53 00 00 00 52 54 45 4d 53 5f 49 4e 56 41 4c 49 S...RTEMS_INVALI
400114ac: 44 5f 4e 55 4d 42 45 52 00 00 00 00 52 54 45 4d D_NUMBER....RTEM
400114bc: 53 5f 4e 4f 54 5f 44 45 46 49 4e 45 44 00 00 00 S_NOT_DEFINED...
400114cc: 00 00 00 00 52 54 45 4d 53 5f 52 45 53 4f 55 52 ....RTEMS_RESOUR
400114dc: 43 45 5f 49 4e 5f 55 53 45 00 00 00 52 54 45 4d CE_IN_USE...RTEM
400114ec: 53 5f 55 4e 53 41 54 49 53 46 49 45 44 00 00 00 S_UNSATISFIED...
400114fc: 00 00 00 00 52 54 45 4d 53 5f 49 4e 43 4f 52 52 ....RTEMS_INCORR
4001150c: 45 43 54 5f 53 54 41 54 45 00 00 00 52 54 45 4d ECT_STATE...RTEM
4001151c: 53 5f 41 4c 52 45 41 44 59 5f 53 55 53 50 45 4e S_ALREADY_SUSPEN
4001152c: 44 45 44 00 52 54 45 4d 53 5f 49 4c 4c 45 47 41 DED.RTEMS_ILLEGA
4001153c: 4c 5f 4f 4e 5f 53 45 4c 46 00 00 00 52 54 45 4d L_ON_SELF...RTEM
4001154c: 53 5f 49 4c 4c 45 47 41 4c 5f 4f 4e 5f 52 45 4d S_ILLEGAL_ON_REM
4001155c: 4f 54 45 5f 4f 42 4a 45 43 54 00 00 52 54 45 4d OTE_OBJECT..RTEM
4001156c: 53 5f 43 41 4c 4c 45 44 5f 46 52 4f 4d 5f 49 53 S_CALLED_FROM_IS
4001157c: 52 00 00 00 52 54 45 4d 53 5f 49 4e 56 41 4c 49 R...RTEMS_INVALI
4001158c: 44 5f 50 52 49 4f 52 49 54 59 00 00 52 54 45 4d D_PRIORITY..RTEM
4001159c: 53 5f 49 4e 56 41 4c 49 44 5f 43 4c 4f 43 4b 00 S_INVALID_CLOCK.
400115ac: 00 00 00 00 52 54 45 4d 53 5f 49 4e 56 41 4c 49 ....RTEMS_INVALI
400115bc: 44 5f 4e 4f 44 45 00 00 00 00 00 00 52 54 45 4d D_NODE......RTEM
400115cc: 53 5f 4e 4f 54 5f 43 4f 4e 46 49 47 55 52 45 44 S_NOT_CONFIGURED
400115dc: 00 00 00 00 52 54 45 4d 53 5f 4e 4f 54 5f 4f 57 ....RTEMS_NOT_OW
400115ec: 4e 45 52 5f 4f 46 5f 52 45 53 4f 55 52 43 45 00 NER_OF_RESOURCE.
400115fc: 00 00 00 00 52 54 45 4d 53 5f 4e 4f 54 5f 49 4d ....RTEMS_NOT_IM
4001160c: 50 4c 45 4d 45 4e 54 45 44 00 00 00 52 54 45 4d PLEMENTED...RTEM
4001161c: 53 5f 49 4e 54 45 52 4e 41 4c 5f 45 52 52 4f 52 S_INTERNAL_ERROR
4001162c: 00 00 00 00 52 54 45 4d 53 5f 4e 4f 5f 4d 45 4d ....RTEMS_NO_MEM
4001163c: 4f 52 59 00 52 54 45 4d 53 5f 49 4f 5f 45 52 52 ORY.RTEMS_IO_ERR
4001164c: 4f 52 00 00 52 54 45 4d 53 5f 50 52 4f 58 59 5f OR..RTEMS_PROXY_
4001165c: 42 4c 4f 43 4b 49 4e 47 00 00 00 00 BLOCKING....
40011334 <_TOD_Days_per_month>:
40011334: 00 00 00 00 00 00 00 1f 00 00 00 1c 00 00 00 1f ................
40011344: 00 00 00 1e 00 00 00 1f 00 00 00 1e 00 00 00 1f ................
40011354: 00 00 00 1f 00 00 00 1e 00 00 00 1f 00 00 00 1e ................
40011364: 00 00 00 1f 00 00 00 00 00 00 00 1f 00 00 00 1d ................
40011374: 00 00 00 1f 00 00 00 1e 00 00 00 1f 00 00 00 1e ................
40011384: 00 00 00 1f 00 00 00 1f 00 00 00 1e 00 00 00 1f ................
40011394: 00 00 00 1e 00 00 00 1f ........
400112f8 <_TOD_Days_since_last_leap_year>:
400112f8: 00 00 01 6e 02 db 04 48 ...n...H
40011300 <_TOD_Days_to_date>:
40011300: 00 00 00 00 00 1f 00 3b 00 5a 00 78 00 97 00 b5 .......;.Z.x....
40011310: 00 d4 00 f3 01 11 01 30 01 4e 00 00 00 00 00 1f .......0.N......
40011320: 00 3c 00 5b 00 79 00 98 00 b6 00 d5 00 f4 01 12 .<.[.y..........
40011330: 01 31 01 4f .1.O
40006cc0 <_TOD_Validate>:
};
bool _TOD_Validate(
const rtems_time_of_day *the_tod
)
{
40006cc0: 9d e3 bf a0 save %sp, -96, %sp
uint32_t days_in_month;
uint32_t ticks_per_second;
ticks_per_second = TOD_MICROSECONDS_PER_SECOND /
rtems_configuration_get_microseconds_per_tick();
if ((!the_tod) ||
40006cc4: 80 a6 20 00 cmp %i0, 0
40006cc8: 02 80 00 1f be 40006d44 <_TOD_Validate+0x84>
<== NEVER TAKEN
40006ccc: 84 10 20 00 clr %g2
40006cd0: c8 06 20 18 ld [ %i0 + 0x18 ], %g4
ticks_per_second = TOD_MICROSECONDS_PER_SECOND /
40006cd4: 07 10 00 43 sethi %hi(0x40010c00), %g3
40006cd8: 03 00 03 d0 sethi %hi(0xf4000), %g1
40006cdc: 82 10 62 40 or %g1, 0x240, %g1 ! f4240 <_Configuration_Interrupt_stack_size+0xf3240>
40006ce0: 81 80 20 00 wr %g0, %y
40006ce4: de 00 e0 4c ld [ %g3 + 0x4c ], %o7
40006ce8: 01 00 00 00 nop
40006cec: 01 00 00 00 nop
40006cf0: 9e 70 40 0f udiv %g1, %o7, %o7
if ((!the_tod) ||
40006cf4: 80 a1 00 0f cmp %g4, %o7
40006cf8: 3a 80 00 14 bcc,a 40006d48 <_TOD_Validate+0x88>
40006cfc: b0 08 a0 01 and %g2, 1, %i0
(the_tod->ticks >= ticks_per_second) ||
40006d00: c2 06 20 14 ld [ %i0 + 0x14 ], %g1
40006d04: 80 a0 60 3b cmp %g1, 0x3b
40006d08: 38 80 00 10 bgu,a 40006d48 <_TOD_Validate+0x88>
40006d0c: b0 08 a0 01 and %g2, 1, %i0
(the_tod->second >= TOD_SECONDS_PER_MINUTE) ||
40006d10: c2 06 20 10 ld [ %i0 + 0x10 ], %g1
40006d14: 80 a0 60 3b cmp %g1, 0x3b
40006d18: 38 80 00 0c bgu,a 40006d48 <_TOD_Validate+0x88>
40006d1c: b0 08 a0 01 and %g2, 1, %i0
(the_tod->minute >= TOD_MINUTES_PER_HOUR) ||
40006d20: c2 06 20 0c ld [ %i0 + 0xc ], %g1
40006d24: 80 a0 60 17 cmp %g1, 0x17
40006d28: 38 80 00 08 bgu,a 40006d48 <_TOD_Validate+0x88>
40006d2c: b0 08 a0 01 and %g2, 1, %i0
(the_tod->hour >= TOD_HOURS_PER_DAY) ||
(the_tod->month == 0) ||
40006d30: c2 06 20 04 ld [ %i0 + 4 ], %g1
40006d34: 86 00 7f ff add %g1, -1, %g3
40006d38: 80 a0 e0 0b cmp %g3, 0xb
40006d3c: 28 80 00 05 bleu,a 40006d50 <_TOD_Validate+0x90>
40006d40: c6 06 00 00 ld [ %i0 ], %g3
if ( the_tod->day > days_in_month )
return false;
return true;
}
40006d44: b0 08 a0 01 and %g2, 1, %i0
40006d48: 81 c7 e0 08 ret
40006d4c: 81 e8 00 00 restore
(the_tod->month > TOD_MONTHS_PER_YEAR) ||
40006d50: 80 a0 e7 c3 cmp %g3, 0x7c3
40006d54: 28 bf ff fd bleu,a 40006d48 <_TOD_Validate+0x88>
40006d58: b0 08 a0 01 and %g2, 1, %i0
(the_tod->day == 0) )
40006d5c: c8 06 20 08 ld [ %i0 + 8 ], %g4
(the_tod->year < TOD_BASE_YEAR) ||
40006d60: 80 a1 20 00 cmp %g4, 0
40006d64: 02 bf ff f8 be 40006d44 <_TOD_Validate+0x84>
<== NEVER TAKEN
40006d68: 80 88 e0 03 btst 3, %g3
if (((the_tod->year % 4) == 0 && (the_tod->year % 100 != 0)) ||
40006d6c: 12 80 00 12 bne 40006db4 <_TOD_Validate+0xf4>
40006d70: 05 14 7a e1 sethi %hi(0x51eb8400), %g2
40006d74: 84 10 a1 1f or %g2, 0x11f, %g2 ! 51eb851f <RAM_END+0x11ab851f>
40006d78: 80 50 c0 02 umul %g3, %g2, %g0
40006d7c: 85 40 00 00 rd %y, %g2
40006d80: 85 30 a0 05 srl %g2, 5, %g2
40006d84: 84 58 a0 64 smul %g2, 0x64, %g2
40006d88: 80 a0 c0 02 cmp %g3, %g2
40006d8c: 22 80 00 0a be,a 40006db4 <_TOD_Validate+0xf4>
40006d90: 05 14 7a e1 sethi %hi(0x51eb8400), %g2
days_in_month = _TOD_Days_per_month[ 1 ][ the_tod->month ];
40006d94: 82 00 60 0d add %g1, 0xd, %g1
40006d98: 05 10 00 44 sethi %hi(0x40011000), %g2
40006d9c: 83 28 60 02 sll %g1, 2, %g1
40006da0: 84 10 a3 34 or %g2, 0x334, %g2
40006da4: c2 00 80 01 ld [ %g2 + %g1 ], %g1
if ( the_tod->day > days_in_month )
40006da8: 80 a0 40 04 cmp %g1, %g4
40006dac: 10 bf ff e6 b 40006d44 <_TOD_Validate+0x84>
40006db0: 84 60 3f ff subx %g0, -1, %g2
(the_tod->year % 400 == 0))
40006db4: 84 10 a1 1f or %g2, 0x11f, %g2
40006db8: 80 50 c0 02 umul %g3, %g2, %g0
40006dbc: 85 40 00 00 rd %y, %g2
40006dc0: 85 30 a0 07 srl %g2, 7, %g2
40006dc4: 84 58 a1 90 smul %g2, 0x190, %g2
if (((the_tod->year % 4) == 0 && (the_tod->year % 100 != 0)) ||
40006dc8: 80 a0 c0 02 cmp %g3, %g2
40006dcc: 22 bf ff f3 be,a 40006d98 <_TOD_Validate+0xd8>
40006dd0: 82 00 60 0d add %g1, 0xd, %g1
days_in_month = _TOD_Days_per_month[ 0 ][ the_tod->month ];
40006dd4: 83 28 60 02 sll %g1, 2, %g1
40006dd8: 05 10 00 44 sethi %hi(0x40011000), %g2
40006ddc: 84 10 a3 34 or %g2, 0x334, %g2 ! 40011334 <_TOD_Days_per_month>
40006de0: c2 00 80 01 ld [ %g2 + %g1 ], %g1
if ( the_tod->day > days_in_month )
40006de4: 80 a0 40 04 cmp %g1, %g4
40006de8: 10 bf ff d7 b 40006d44 <_TOD_Validate+0x84>
40006dec: 84 60 3f ff subx %g0, -1, %g2
40008128 <_Timer_Fire>:
{
40008128: 9d e3 bf 98 save %sp, -104, %sp
return (Timer_Control *) _Objects_Get(
4000812c: 15 10 00 5a sethi %hi(0x40016800), %o2
40008130: 90 10 00 18 mov %i0, %o0
40008134: 92 07 bf fc add %fp, -4, %o1
40008138: 94 12 a0 48 or %o2, 0x48, %o2
4000813c: 40 00 0a 50 call 4000aa7c <_Objects_Get>
40008140: b0 10 20 04 mov 4, %i0
if ( the_timer != NULL ) {
40008144: 80 a2 20 00 cmp %o0, 0
40008148: 02 80 00 1b be 400081b4 <_Timer_Fire+0x8c>
4000814c: a0 10 00 08 mov %o0, %l0
_Timer_Cancel( cpu, the_timer );
40008150: 92 10 00 08 mov %o0, %o1
40008154: 31 10 00 59 sethi %hi(0x40016400), %i0
40008158: 7f ff ff d6 call 400080b0 <_Timer_Cancel>
4000815c: 90 16 23 40 or %i0, 0x340, %o0 ! 40016740 <_Per_CPU_Information>
return (Watchdog_Interval) cpu->Watchdog.ticks;
40008160: 90 16 23 40 or %i0, 0x340, %o0
40008164: c4 1a 20 30 ldd [ %o0 + 0x30 ], %g2
40008168: c6 24 20 40 st %g3, [ %l0 + 0x40 ]
return ( the_class & mask ) == TIMER_CLASS_BIT_NOT_DORMANT;
4000816c: 82 0f 20 05 and %i4, 5, %g1
Watchdog_Control *the_watchdog,
Watchdog_Service_routine_entry routine
)
{
_Assert( _Watchdog_Get_state( the_watchdog ) == WATCHDOG_INACTIVE );
the_watchdog->routine = routine;
40008170: fa 24 20 20 st %i5, [ %l0 + 0x20 ]
40008174: 92 04 20 10 add %l0, 0x10, %o1
the_timer->the_class = the_class;
40008178: f8 24 20 30 st %i4, [ %l0 + 0x30 ]
4000817c: 94 10 20 00 clr %o2
the_timer->routine = routine;
40008180: f4 24 20 34 st %i2, [ %l0 + 0x34 ]
if ( _Timer_Is_interval_class( the_class ) ) {
40008184: 80 a0 60 04 cmp %g1, 4
the_timer->user_data = user_data;
40008188: f6 24 20 38 st %i3, [ %l0 + 0x38 ]
if ( _Timer_Is_interval_class( the_class ) ) {
4000818c: 02 80 00 0c be 400081bc <_Timer_Fire+0x94>
40008190: f2 24 20 3c st %i1, [ %l0 + 0x3c ]
_Watchdog_Insert(
40008194: 95 36 60 02 srl %i1, 2, %o2
40008198: 97 2e 60 1e sll %i1, 0x1e, %o3
4000819c: 40 00 17 bb call 4000e088 <_Watchdog_Insert>
400081a0: 90 02 20 40 add %o0, 0x40, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400081a4: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400081a8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400081ac: 01 00 00 00 nop
return RTEMS_SUCCESSFUL;
400081b0: b0 10 20 00 clr %i0 ! 0 <PROM_START>
}
400081b4: 81 c7 e0 08 ret
400081b8: 81 e8 00 00 restore
_Watchdog_Insert(
400081bc: ba 80 c0 19 addcc %g3, %i1, %i5
400081c0: 90 02 20 38 add %o0, 0x38, %o0
400081c4: b8 40 80 0a addx %g2, %o2, %i4
400081c8: 96 10 00 1d mov %i5, %o3
400081cc: 40 00 17 af call 4000e088 <_Watchdog_Insert>
400081d0: 94 10 00 1c mov %i4, %o2
400081d4: 30 bf ff f4 b,a 400081a4 <_Timer_Fire+0x7c>
400078dc <_Timer_server_Routine_adaptor>:
ts = _Timer_server;
400078dc: 03 10 00 56 sethi %hi(0x40015800), %g1
<== NOT EXECUTED
the_timer = RTEMS_CONTAINER_OF( the_watchdog, Timer_Control, Ticker );
400078e0: 86 02 3f f0 add %o0, -16, %g3
<== NOT EXECUTED
ts = _Timer_server;
400078e4: c4 00 61 04 ld [ %g1 + 0x104 ], %g2
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400078e8: 91 d0 20 09 ta 9
<== NOT EXECUTED
return (Watchdog_Interval) cpu->Watchdog.ticks;
400078ec: 09 10 00 55 sethi %hi(0x40015400), %g4
<== NOT EXECUTED
400078f0: c8 01 23 f4 ld [ %g4 + 0x3f4 ], %g4 ! 400157f4 <_Per_CPU_Information+0x34>
<== NOT EXECUTED
old_last = tail->previous;
400078f4: da 00 a0 08 ld [ %g2 + 8 ], %o5
<== NOT EXECUTED
return _Chain_Immutable_head( the_chain )->next;
400078f8: d8 00 80 00 ld [ %g2 ], %o4
<== NOT EXECUTED
400078fc: 96 10 20 03 mov 3, %o3
<== NOT EXECUTED
40007900: c8 20 e0 44 st %g4, [ %g3 + 0x44 ]
<== NOT EXECUTED
return &the_chain->Tail.Node;
40007904: 88 00 a0 04 add %g2, 4, %g4
<== NOT EXECUTED
40007908: d6 20 e0 1c st %o3, [ %g3 + 0x1c ]
<== NOT EXECUTED
the_node->next = tail;
4000790c: c8 20 e0 10 st %g4, [ %g3 + 0x10 ]
<== NOT EXECUTED
tail->previous = the_node;
40007910: d0 20 a0 08 st %o0, [ %g2 + 8 ]
<== NOT EXECUTED
old_last->next = the_node;
40007914: d0 23 40 00 st %o0, [ %o5 ]
<== NOT EXECUTED
the_node->previous = old_last;
40007918: da 20 e0 14 st %o5, [ %g3 + 0x14 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000791c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007920: 01 00 00 00 nop
if ( wakeup ) {
40007924: 80 a3 00 04 cmp %o4, %g4
40007928: 22 80 00 04 be,a 40007938 <_Timer_server_Routine_adaptor+0x5c>
4000792c: d0 00 a0 0c ld [ %g2 + 0xc ], %o0
}
40007930: 81 c3 e0 08 retl
40007934: 01 00 00 00 nop
(void) rtems_event_system_send( ts->server_id, RTEMS_EVENT_SYSTEM_SERVER );
40007938: 13 10 00 00 sethi %hi(0x40000000), %o1
4000793c: 82 13 c0 00 mov %o7, %g1
40007940: 7f ff fd eb call 400070ec <rtems_event_system_send>
40007944: 9e 10 40 00 mov %g1, %o7
40006920 <rtems_clock_get_tod>:
}
rtems_status_code rtems_clock_get_tod(
rtems_time_of_day *time_buffer
)
{
40006920: 9d e3 bf 90 save %sp, -112, %sp
uint32_t day_secs;
uint32_t year;
uint32_t year_days;
uint32_t leap_years;
if ( !time_buffer )
40006924: b8 96 20 00 orcc %i0, 0, %i4
40006928: 02 80 00 95 be 40006b7c <rtems_clock_get_tod+0x25c>
4000692c: 03 10 00 52 sethi %hi(0x40014800), %g1
return RTEMS_INVALID_ADDRESS;
if ( !_TOD_Is_set() )
40006930: c2 08 60 61 ldub [ %g1 + 0x61 ], %g1 ! 40014861 <_TOD>
40006934: 80 a0 60 00 cmp %g1, 0
40006938: 02 80 00 3f be 40006a34 <rtems_clock_get_tod+0x114>
4000693c: b0 10 20 0b mov 0xb, %i0
40006940: 40 00 09 a8 call 40008fe0 <_Timecounter_Microtime>
40006944: 90 07 bf f0 add %fp, -16, %o0
/* Obtain the current time */
_TOD_Get_timeval( &now );
/* How many days and how many seconds in the day ? */
days = now.tv_sec / RTEMS_SECS_PER_DAY;
40006948: f4 1f bf f0 ldd [ %fp + -16 ], %i2
4000694c: 94 10 20 00 clr %o2
40006950: 90 10 00 1a mov %i2, %o0
40006954: 92 10 00 1b mov %i3, %o1
40006958: 17 00 00 54 sethi %hi(0x15000), %o3
4000695c: 40 00 25 5a call 4000fec4 <__divdi3>
40006960: 96 12 e1 80 or %o3, 0x180, %o3 ! 15180 <_Configuration_Interrupt_stack_size+0x14180>
day_secs = now.tv_sec % RTEMS_SECS_PER_DAY;
40006964: 90 10 00 1a mov %i2, %o0
days = now.tv_sec / RTEMS_SECS_PER_DAY;
40006968: ba 10 00 09 mov %o1, %i5
day_secs = now.tv_sec % RTEMS_SECS_PER_DAY;
4000696c: 94 10 20 00 clr %o2
40006970: 92 10 00 1b mov %i3, %o1
40006974: 17 00 00 54 sethi %hi(0x15000), %o3
40006978: 40 00 25 de call 400100f0 <__moddi3>
4000697c: 96 12 e1 80 or %o3, 0x180, %o3 ! 15180 <_Configuration_Interrupt_stack_size+0x14180>
/* How many non-leap year years ? */
year = ( days / RTEMS_DAYS_PER_YEAR ) + RTEMS_YEAR_BASE;
40006980: 03 19 c6 7c sethi %hi(0x6719f000), %g1
40006984: 82 10 63 61 or %g1, 0x361, %g1 ! 6719f361 <RAM_END+0x26d9f361>
40006988: 80 57 40 01 umul %i5, %g1, %g0
4000698c: 89 40 00 00 rd %y, %g4
40006990: 84 27 40 04 sub %i5, %g4, %g2
40006994: 85 30 a0 01 srl %g2, 1, %g2
40006998: 88 01 00 02 add %g4, %g2, %g4
return (year / 4) - (year / 100) + (year / 400);
4000699c: 05 14 7a e1 sethi %hi(0x51eb8400), %g2
year = ( days / RTEMS_DAYS_PER_YEAR ) + RTEMS_YEAR_BASE;
400069a0: 89 31 20 08 srl %g4, 8, %g4
return (year / 4) - (year / 100) + (year / 400);
400069a4: 84 10 a1 1f or %g2, 0x11f, %g2
year -= 1;
400069a8: b6 01 27 b1 add %g4, 0x7b1, %i3
return (year / 4) - (year / 100) + (year / 400);
400069ac: 80 56 c0 02 umul %i3, %g2, %g0
400069b0: 85 40 00 00 rd %y, %g2
400069b4: 87 36 e0 02 srl %i3, 2, %g3
400069b8: b1 30 a0 07 srl %g2, 7, %i0
400069bc: 85 30 a0 05 srl %g2, 5, %g2
return _Leap_years_before( to ) - _Leap_years_before( from + 1 );
400069c0: 86 00 c0 18 add %g3, %i0, %g3
400069c4: 86 00 fe 23 add %g3, -477, %g3
400069c8: 86 20 c0 02 sub %g3, %g2, %g3
/* Determine the number of leap years. */
leap_years = _Leap_years_between( RTEMS_YEAR_BASE, year );
/* Adjust the remaining number of days based on the leap years. */
year_days = ( days - leap_years ) % RTEMS_DAYS_PER_YEAR;
400069cc: b4 27 40 03 sub %i5, %g3, %i2
400069d0: 80 56 80 01 umul %i2, %g1, %g0
400069d4: 83 40 00 00 rd %y, %g1
400069d8: b2 26 80 01 sub %i2, %g1, %i1
400069dc: b3 36 60 01 srl %i1, 1, %i1
400069e0: 82 00 40 19 add %g1, %i1, %g1
/* Adjust the year and days in the year if in the leap year overflow. */
if ( leap_years > ( days % RTEMS_DAYS_PER_YEAR ) ) {
400069e4: b2 59 21 6d smul %g4, 0x16d, %i1
year_days = ( days - leap_years ) % RTEMS_DAYS_PER_YEAR;
400069e8: 83 30 60 08 srl %g1, 8, %g1
if ( leap_years > ( days % RTEMS_DAYS_PER_YEAR ) ) {
400069ec: ba 27 40 19 sub %i5, %i1, %i5
year_days = ( days - leap_years ) % RTEMS_DAYS_PER_YEAR;
400069f0: 82 58 61 6d smul %g1, 0x16d, %g1
if ( leap_years > ( days % RTEMS_DAYS_PER_YEAR ) ) {
400069f4: 80 a7 40 03 cmp %i5, %g3
400069f8: 1a 80 00 11 bcc 40006a3c <rtems_clock_get_tod+0x11c>
400069fc: 82 26 80 01 sub %i2, %g1, %g1
return (((year % 4) == 0) && ((year % 100) != 0)) || ((year % 400) == 0);
40006a00: 86 8e e0 03 andcc %i3, 3, %g3
40006a04: 32 80 00 57 bne,a 40006b60 <rtems_clock_get_tod+0x240>
40006a08: b0 5e 21 90 smul %i0, 0x190, %i0
40006a0c: 88 58 a0 64 smul %g2, 0x64, %g4
40006a10: 80 a6 c0 04 cmp %i3, %g4
40006a14: 32 80 00 0c bne,a 40006a44 <rtems_clock_get_tod+0x124>
40006a18: 82 00 60 01 inc %g1
40006a1c: b0 5e 21 90 smul %i0, 0x190, %i0
40006a20: 80 a6 c0 18 cmp %i3, %i0
40006a24: 22 80 00 08 be,a 40006a44 <rtems_clock_get_tod+0x124>
40006a28: 82 00 60 01 inc %g1
if ( _Leap_year( year ) ) {
year_days += 1;
}
}
time_buffer->year = year;
40006a2c: 10 80 00 0e b 40006a64 <rtems_clock_get_tod+0x144>
40006a30: f6 27 00 00 st %i3, [ %i4 ]
time_buffer->minute = time_buffer->minute / RTEMS_SECS_PER_MINUTE;
time_buffer->ticks = now.tv_usec /
rtems_configuration_get_microseconds_per_tick( );
return RTEMS_SUCCESSFUL;
}
40006a34: 81 c7 e0 08 ret
40006a38: 81 e8 00 00 restore
year = ( days / RTEMS_DAYS_PER_YEAR ) + RTEMS_YEAR_BASE;
40006a3c: b6 01 27 b2 add %g4, 0x7b2, %i3
40006a40: 86 0e e0 03 and %i3, 3, %g3
return (((year % 4) == 0) && ((year % 100) != 0)) || ((year % 400) == 0);
40006a44: 80 a0 e0 00 cmp %g3, 0
40006a48: 12 80 00 3a bne 40006b30 <rtems_clock_get_tod+0x210>
40006a4c: f6 27 00 00 st %i3, [ %i4 ]
40006a50: 81 80 20 00 wr %g0, %y
40006a54: 01 00 00 00 nop
40006a58: 01 00 00 00 nop
40006a5c: 01 00 00 00 nop
40006a60: 84 76 e0 64 udiv %i3, 0x64, %g2
40006a64: 84 58 a0 64 smul %g2, 0x64, %g2
40006a68: 80 a6 c0 02 cmp %i3, %g2
40006a6c: 02 80 00 32 be 40006b34 <rtems_clock_get_tod+0x214>
40006a70: 05 14 7a e1 sethi %hi(0x51eb8400), %g2
days_to_date = _TOD_Days_to_date[1];
40006a74: 3b 10 00 44 sethi %hi(0x40011000), %i5
40006a78: ba 17 63 1a or %i5, 0x31a, %i5 ! 4001131a <_TOD_Days_to_date+0x1a>
days_to_date += 2;
40006a7c: 84 07 60 04 add %i5, 4, %g2
uint32_t month = 0;
40006a80: 86 10 20 00 clr %g3
40006a84: ba 07 60 1a add %i5, 0x1a, %i5
if (*day < *days_to_date)
40006a88: c8 10 80 00 lduh [ %g2 ], %g4
40006a8c: 80 a1 00 01 cmp %g4, %g1
40006a90: 18 80 00 39 bgu 40006b74 <rtems_clock_get_tod+0x254>
40006a94: 86 00 e0 01 inc %g3
++days_to_date;
40006a98: 84 00 a0 02 add %g2, 2, %g2
while (month < 11) {
40006a9c: 80 a0 80 1d cmp %g2, %i5
40006aa0: 32 bf ff fb bne,a 40006a8c <rtems_clock_get_tod+0x16c>
40006aa4: c8 10 80 00 lduh [ %g2 ], %g4
40006aa8: 86 10 20 0c mov 0xc, %g3
time_buffer->day = year_days + 1;
40006aac: 82 00 60 01 inc %g1
time_buffer->ticks = now.tv_usec /
40006ab0: f4 07 bf f8 ld [ %fp + -8 ], %i2
time_buffer->day = year_days + 1;
40006ab4: 88 20 40 04 sub %g1, %g4, %g4
time_buffer->hour = day_secs / RTEMS_SECS_PER_HOUR;
40006ab8: 05 24 68 ac sethi %hi(0x91a2b000), %g2
time_buffer->ticks = now.tv_usec /
40006abc: 03 10 00 43 sethi %hi(0x40010c00), %g1
time_buffer->hour = day_secs / RTEMS_SECS_PER_HOUR;
40006ac0: 84 10 a3 c5 or %g2, 0x3c5, %g2
40006ac4: 80 52 40 02 umul %o1, %g2, %g0
40006ac8: 85 40 00 00 rd %y, %g2
40006acc: 85 30 a0 0b srl %g2, 0xb, %g2
time_buffer->ticks = now.tv_usec /
40006ad0: 81 80 20 00 wr %g0, %y
40006ad4: f6 00 60 4c ld [ %g1 + 0x4c ], %i3
40006ad8: 01 00 00 00 nop
40006adc: 01 00 00 00 nop
40006ae0: b6 76 80 1b udiv %i2, %i3, %i3
time_buffer->minute = day_secs % RTEMS_SECS_PER_HOUR;
40006ae4: ba 58 ae 10 smul %g2, 0xe10, %i5
time_buffer->hour = day_secs / RTEMS_SECS_PER_HOUR;
40006ae8: c4 27 20 0c st %g2, [ %i4 + 0xc ]
time_buffer->minute = day_secs % RTEMS_SECS_PER_HOUR;
40006aec: 92 22 40 1d sub %o1, %i5, %o1
time_buffer->month = _Year_day_as_month( year, &year_days ) + 1;
40006af0: c6 27 20 04 st %g3, [ %i4 + 4 ]
time_buffer->second = time_buffer->minute % RTEMS_SECS_PER_MINUTE;
40006af4: 03 22 22 22 sethi %hi(0x88888800), %g1
time_buffer->day = year_days + 1;
40006af8: c8 27 20 08 st %g4, [ %i4 + 8 ]
time_buffer->second = time_buffer->minute % RTEMS_SECS_PER_MINUTE;
40006afc: 82 10 60 89 or %g1, 0x89, %g1
time_buffer->ticks = now.tv_usec /
40006b00: f6 27 20 18 st %i3, [ %i4 + 0x18 ]
time_buffer->second = time_buffer->minute % RTEMS_SECS_PER_MINUTE;
40006b04: 80 52 40 01 umul %o1, %g1, %g0
40006b08: 83 40 00 00 rd %y, %g1
40006b0c: 83 30 60 05 srl %g1, 5, %g1
40006b10: 85 28 60 04 sll %g1, 4, %g2
time_buffer->minute = time_buffer->minute / RTEMS_SECS_PER_MINUTE;
40006b14: c2 27 20 10 st %g1, [ %i4 + 0x10 ]
time_buffer->second = time_buffer->minute % RTEMS_SECS_PER_MINUTE;
40006b18: 82 20 80 01 sub %g2, %g1, %g1
40006b1c: 83 28 60 02 sll %g1, 2, %g1
40006b20: 92 22 40 01 sub %o1, %g1, %o1
40006b24: d2 27 20 14 st %o1, [ %i4 + 0x14 ]
return RTEMS_SUCCESSFUL;
40006b28: 81 c7 e0 08 ret
40006b2c: 91 e8 20 00 restore %g0, 0, %o0
return (((year % 4) == 0) && ((year % 100) != 0)) || ((year % 400) == 0);
40006b30: 05 14 7a e1 sethi %hi(0x51eb8400), %g2
40006b34: 84 10 a1 1f or %g2, 0x11f, %g2 ! 51eb851f <RAM_END+0x11ab851f>
40006b38: 80 56 c0 02 umul %i3, %g2, %g0
40006b3c: 85 40 00 00 rd %y, %g2
40006b40: 85 30 a0 07 srl %g2, 7, %g2
40006b44: 84 58 a1 90 smul %g2, 0x190, %g2
40006b48: 80 a6 c0 02 cmp %i3, %g2
40006b4c: 22 bf ff cb be,a 40006a78 <rtems_clock_get_tod+0x158>
40006b50: 3b 10 00 44 sethi %hi(0x40011000), %i5
days_to_date = _TOD_Days_to_date[0];
40006b54: 3b 10 00 44 sethi %hi(0x40011000), %i5
40006b58: 10 bf ff c9 b 40006a7c <rtems_clock_get_tod+0x15c>
40006b5c: ba 17 63 00 or %i5, 0x300, %i5 ! 40011300 <_TOD_Days_to_date>
return (((year % 4) == 0) && ((year % 100) != 0)) || ((year % 400) == 0);
40006b60: 80 a6 c0 18 cmp %i3, %i0
40006b64: 12 80 00 08 bne 40006b84 <rtems_clock_get_tod+0x264>
<== ALWAYS TAKEN
40006b68: 3b 10 00 44 sethi %hi(0x40011000), %i5
year_days += 1;
40006b6c: 10 bf ff b6 b 40006a44 <rtems_clock_get_tod+0x124>
<== NOT EXECUTED
40006b70: 82 00 60 01 inc %g1
<== NOT EXECUTED
40006b74: 10 bf ff ce b 40006aac <rtems_clock_get_tod+0x18c>
40006b78: c8 10 bf fe lduh [ %g2 + -2 ], %g4
return RTEMS_INVALID_ADDRESS;
40006b7c: 81 c7 e0 08 ret
40006b80: 91 e8 20 09 restore %g0, 9, %o0
time_buffer->year = year;
40006b84: f6 27 00 00 st %i3, [ %i4 ]
days_to_date = _TOD_Days_to_date[0];
40006b88: 10 bf ff bd b 40006a7c <rtems_clock_get_tod+0x15c>
40006b8c: ba 17 63 00 or %i5, 0x300, %i5
40006b90 <rtems_clock_set>:
#include <rtems/config.h>
rtems_status_code rtems_clock_set(
const rtems_time_of_day *tod
)
{
40006b90: 9d e3 bf 88 save %sp, -120, %sp
40006b94: ba 10 00 18 mov %i0, %i5
if ( !tod )
40006b98: 80 a7 60 00 cmp %i5, 0
40006b9c: 02 80 00 1a be 40006c04 <rtems_clock_set+0x74>
40006ba0: b0 10 20 09 mov 9, %i0
return RTEMS_INVALID_ADDRESS;
if ( _TOD_Validate( tod ) ) {
40006ba4: 90 10 00 1d mov %i5, %o0
40006ba8: 40 00 00 46 call 40006cc0 <_TOD_Validate>
40006bac: b0 10 20 14 mov 0x14, %i0
40006bb0: 80 a2 20 00 cmp %o0, 0
40006bb4: 02 80 00 14 be 40006c04 <rtems_clock_set+0x74>
40006bb8: 01 00 00 00 nop
struct timespec tod_as_timespec;
ISR_lock_Context lock_context;
tod_as_timespec.tv_sec = _TOD_To_seconds( tod );
40006bbc: 40 00 00 14 call 40006c0c <_TOD_To_seconds>
40006bc0: 90 10 00 1d mov %i5, %o0
tod_as_timespec.tv_nsec = tod->ticks
* rtems_configuration_get_nanoseconds_per_tick();
40006bc4: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
40006bc8: 05 10 00 43 sethi %hi(0x40010c00), %g2
40006bcc: c4 00 a0 74 ld [ %g2 + 0x74 ], %g2 ! 40010c74 <_Watchdog_Nanoseconds_per_tick>
40006bd0: 82 58 40 02 smul %g1, %g2, %g1
tod_as_timespec.tv_sec = _TOD_To_seconds( tod );
40006bd4: c0 27 bf f0 clr [ %fp + -16 ]
40006bd8: d0 27 bf f4 st %o0, [ %fp + -12 ]
_TOD_Lock();
40006bdc: 40 00 02 74 call 400075ac <_TOD_Lock>
40006be0: c2 27 bf f8 st %g1, [ %fp + -8 ]
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40006be4: 91 d0 20 09 ta 9
<== NOT EXECUTED
_Timecounter_Acquire( lock_context );
40006be8: c2 27 bf ec st %g1, [ %fp + -20 ]
_TOD_Acquire( &lock_context );
_TOD_Set( &tod_as_timespec, &lock_context );
40006bec: 92 07 bf ec add %fp, -20, %o1
40006bf0: 90 07 bf f0 add %fp, -16, %o0
40006bf4: 40 00 02 78 call 400075d4 <_TOD_Set>
40006bf8: b0 10 20 00 clr %i0
_TOD_Unlock();
40006bfc: 40 00 02 71 call 400075c0 <_TOD_Unlock>
40006c00: 01 00 00 00 nop
return RTEMS_SUCCESSFUL;
}
return RTEMS_INVALID_CLOCK;
}
40006c04: 81 c7 e0 08 ret
40006c08: 81 e8 00 00 restore
400076bc <rtems_clock_tick>:
#include <rtems/rtems/clock.h>
#include <rtems/score/timecounter.h>
#include <rtems/score/threadimpl.h>
rtems_status_code rtems_clock_tick( void )
{
400076bc: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
400076c0: 91 d0 20 09 ta 9
<== NOT EXECUTED
ISR_lock_Context lock_context;
_Timecounter_Acquire( &lock_context );
400076c4: c2 27 bf fc st %g1, [ %fp + -4 ]
_Timecounter_Tick_simple(
400076c8: 03 10 00 49 sethi %hi(0x40012400), %g1
400076cc: d0 00 62 ec ld [ %g1 + 0x2ec ], %o0 ! 400126ec <Configuration+0x14>
400076d0: 94 07 bf fc add %fp, -4, %o2
400076d4: 40 00 0b d0 call 4000a614 <_Timecounter_Tick_simple>
400076d8: 92 10 20 00 clr %o1
400076dc: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
rtems_configuration_get_microseconds_per_tick(),
0,
&lock_context
);
if ( _Thread_Dispatch_is_enabled() ) {
400076e0: 80 a0 60 00 cmp %g1, 0
400076e4: 12 80 00 04 bne 400076f4 <rtems_clock_tick+0x38>
<== NEVER TAKEN
400076e8: 01 00 00 00 nop
_Thread_Dispatch();
400076ec: 40 00 12 e2 call 4000c274 <_Thread_Dispatch>
400076f0: 01 00 00 00 nop
}
return RTEMS_SUCCESSFUL;
}
400076f4: 81 c7 e0 08 ret
400076f8: 91 e8 20 00 restore %g0, 0, %o0
4000a264 <rtems_event_receive>:
rtems_event_set event_in,
rtems_option option_set,
rtems_interval ticks,
rtems_event_set *event_out
)
{
4000a264: 9d e3 bf 88 save %sp, -120, %sp
rtems_status_code sc;
if ( event_out != NULL ) {
4000a268: 80 a6 e0 00 cmp %i3, 0
4000a26c: 02 80 00 1c be 4000a2dc <rtems_event_receive+0x78>
4000a270: 01 00 00 00 nop
4000a274: 91 d0 20 09 ta 9
<== NOT EXECUTED
ISR_lock_Context *lock_context
)
{
Thread_Control *executing;
_ISR_lock_ISR_disable( lock_context );
4000a278: c2 27 bf fc st %g1, [ %fp + -4 ]
executing = _Thread_Executing;
4000a27c: d8 01 a0 20 ld [ %g6 + 0x20 ], %o4
executing = _Thread_Wait_acquire_default_for_executing( &lock_context );
api = executing->API_Extensions[ THREAD_API_RTEMS ];
event = &api->Event;
if ( !_Event_sets_Is_empty( event_in ) ) {
4000a280: 80 a6 20 00 cmp %i0, 0
4000a284: 12 80 00 09 bne 4000a2a8 <rtems_event_receive+0x44>
4000a288: da 03 21 58 ld [ %o4 + 0x158 ], %o5
THREAD_WAIT_CLASS_EVENT,
STATES_WAITING_FOR_EVENT,
&lock_context
);
} else {
*event_out = event->pending_events;
4000a28c: c2 03 40 00 ld [ %o5 ], %g1
<== NOT EXECUTED
4000a290: c2 26 c0 00 st %g1, [ %i3 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000a294: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000a298: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000a29c: 01 00 00 00 nop
_Thread_Wait_release_default( executing, &lock_context );
sc = RTEMS_SUCCESSFUL;
4000a2a0: 81 c7 e0 08 ret
4000a2a4: 91 e8 20 00 restore %g0, 0, %o0
sc = _Event_Seize(
4000a2a8: 82 07 bf fc add %fp, -4, %g1
4000a2ac: c2 23 a0 64 st %g1, [ %sp + 0x64 ]
4000a2b0: 82 10 20 04 mov 4, %g1
4000a2b4: c2 23 a0 60 st %g1, [ %sp + 0x60 ]
4000a2b8: 82 10 21 00 mov 0x100, %g1
4000a2bc: c2 23 a0 5c st %g1, [ %sp + 0x5c ]
4000a2c0: 96 10 00 1b mov %i3, %o3
4000a2c4: 94 10 00 1a mov %i2, %o2
4000a2c8: 92 10 00 19 mov %i1, %o1
4000a2cc: 40 00 00 06 call 4000a2e4 <_Event_Seize>
4000a2d0: 90 10 00 18 mov %i0, %o0
4000a2d4: 81 c7 e0 08 ret
4000a2d8: 91 e8 00 08 restore %g0, %o0, %o0
} else {
sc = RTEMS_INVALID_ADDRESS;
}
return sc;
}
4000a2dc: 81 c7 e0 08 ret
4000a2e0: 91 e8 20 09 restore %g0, 9, %o0
400078d4 <rtems_event_system_receive>:
rtems_event_set event_in,
rtems_option option_set,
rtems_interval ticks,
rtems_event_set *event_out
)
{
400078d4: 9d e3 bf 88 save %sp, -120, %sp
rtems_status_code sc;
if ( event_out != NULL ) {
400078d8: 80 a6 e0 00 cmp %i3, 0
400078dc: 02 80 00 1d be 40007950 <rtems_event_system_receive+0x7c>
400078e0: 01 00 00 00 nop
400078e4: 91 d0 20 09 ta 9
<== NOT EXECUTED
ISR_lock_Context *lock_context
)
{
Thread_Control *executing;
_ISR_lock_ISR_disable( lock_context );
400078e8: c2 27 bf fc st %g1, [ %fp + -4 ]
executing = _Thread_Executing;
400078ec: d8 01 a0 20 ld [ %g6 + 0x20 ], %o4
executing = _Thread_Wait_acquire_default_for_executing( &lock_context );
api = executing->API_Extensions[ THREAD_API_RTEMS ];
event = &api->System_event;
if ( !_Event_sets_Is_empty( event_in ) ) {
400078f0: 80 a6 20 00 cmp %i0, 0
400078f4: 12 80 00 09 bne 40007918 <rtems_event_system_receive+0x44>
400078f8: da 03 21 58 ld [ %o4 + 0x158 ], %o5
THREAD_WAIT_CLASS_SYSTEM_EVENT,
STATES_WAITING_FOR_SYSTEM_EVENT,
&lock_context
);
} else {
*event_out = event->pending_events;
400078fc: c2 03 60 04 ld [ %o5 + 4 ], %g1
<== NOT EXECUTED
40007900: c2 26 c0 00 st %g1, [ %i3 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007904: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007908: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000790c: 01 00 00 00 nop
_Thread_Wait_release_default( executing, &lock_context );
sc = RTEMS_SUCCESSFUL;
40007910: 81 c7 e0 08 ret
40007914: 91 e8 20 00 restore %g0, 0, %o0
sc = _Event_Seize(
40007918: 82 07 bf fc add %fp, -4, %g1
4000791c: c2 23 a0 64 st %g1, [ %sp + 0x64 ]
40007920: 82 10 20 08 mov 8, %g1
40007924: c2 23 a0 60 st %g1, [ %sp + 0x60 ]
40007928: 82 10 22 00 mov 0x200, %g1
4000792c: c2 23 a0 5c st %g1, [ %sp + 0x5c ]
40007930: 9a 03 60 04 add %o5, 4, %o5
40007934: 96 10 00 1b mov %i3, %o3
40007938: 94 10 00 1a mov %i2, %o2
4000793c: 92 10 00 19 mov %i1, %o1
40007940: 40 00 1f e4 call 4000f8d0 <_Event_Seize>
40007944: 90 10 00 18 mov %i0, %o0
40007948: 81 c7 e0 08 ret
4000794c: 91 e8 00 08 restore %g0, %o0, %o0
} else {
sc = RTEMS_INVALID_ADDRESS;
}
return sc;
}
40007950: 81 c7 e0 08 ret
40007954: 91 e8 20 09 restore %g0, 9, %o0
40007c3c <rtems_interrupt_disable>:
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007c3c: 91 d0 20 09 ta 9
<== NOT EXECUTED
rtems_interrupt_level previous_level;
_ISR_Local_disable( previous_level );
return previous_level;
}
40007c40: 81 c3 e0 08 retl
40007c44: 90 10 00 01 mov %g1, %o0
40007c48 <rtems_interrupt_enable>:
void rtems_interrupt_enable(
rtems_interrupt_level previous_level
)
{
40007c48: 82 10 00 08 mov %o0, %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007c4c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007c50: 01 00 00 00 nop
_ISR_Local_enable( previous_level );
}
40007c54: 81 c3 e0 08 retl
40007c58: 01 00 00 00 nop
40007c5c <rtems_interrupt_flash>:
void rtems_interrupt_flash(
rtems_interrupt_level previous_level
)
{
40007c5c: 82 10 00 08 mov %o0, %g1
<== NOT EXECUTED
40007c60: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007c64: 01 00 00 00 nop
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007c68: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_Local_flash( previous_level );
}
40007c6c: 81 c3 e0 08 retl
40007c70: 01 00 00 00 nop
4000947c <rtems_message_queue_get_number_pending>:
rtems_status_code rtems_message_queue_get_number_pending(
rtems_id id,
uint32_t *count
)
{
4000947c: 9d e3 bf 78 save %sp, -136, %sp
Message_queue_Control *the_message_queue;
Thread_queue_Context queue_context;
if ( count == NULL ) {
40009480: 80 a6 60 00 cmp %i1, 0
40009484: 02 80 00 10 be 400094c4 <rtems_message_queue_get_number_pending+0x48>
40009488: 82 10 20 09 mov 9, %g1
4000948c: 92 07 bf dc add %fp, -36, %o1
40009490: 15 10 00 65 sethi %hi(0x40019400), %o2
40009494: 90 10 00 18 mov %i0, %o0
40009498: 40 00 0c 30 call 4000c558 <_Objects_Get>
4000949c: 94 12 a0 c8 or %o2, 0xc8, %o2
return RTEMS_INVALID_ADDRESS;
}
the_message_queue = _Message_queue_Get( id, &queue_context );
if ( the_message_queue == NULL ) {
400094a0: 80 a2 20 00 cmp %o0, 0
400094a4: 02 80 00 0a be 400094cc <rtems_message_queue_get_number_pending+0x50>
400094a8: 82 10 20 04 mov 4, %g1
_CORE_message_queue_Acquire_critical(
&the_message_queue->message_queue,
&queue_context
);
*count = the_message_queue->message_queue.number_of_pending_messages;
400094ac: c2 02 20 24 ld [ %o0 + 0x24 ], %g1
<== NOT EXECUTED
400094b0: c2 26 40 00 st %g1, [ %i1 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400094b4: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400094b8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400094bc: 01 00 00 00 nop
_CORE_message_queue_Release(
&the_message_queue->message_queue,
&queue_context
);
return RTEMS_SUCCESSFUL;
400094c0: 82 10 20 00 clr %g1 ! 0 <PROM_START>
}
400094c4: 81 c7 e0 08 ret
400094c8: 91 e8 00 01 restore %g0, %g1, %o0
400094cc: 81 c7 e0 08 ret
400094d0: 91 e8 00 01 restore %g0, %g1, %o0
40007998 <rtems_object_get_api_class_name>:
const char *rtems_object_get_api_class_name(
int the_api,
int the_class
)
{
40007998: 9d e3 bf a0 save %sp, -96, %sp
const rtems_assoc_t *api_assoc;
const rtems_assoc_t *class_assoc;
if ( the_api == OBJECTS_INTERNAL_API )
4000799c: 80 a6 20 01 cmp %i0, 1
400079a0: 02 80 00 12 be 400079e8 <rtems_object_get_api_class_name+0x50>
400079a4: 80 a6 20 02 cmp %i0, 2
api_assoc = rtems_object_api_internal_assoc;
else if ( the_api == OBJECTS_CLASSIC_API )
400079a8: 02 80 00 06 be 400079c0 <rtems_object_get_api_class_name+0x28>
400079ac: 80 a6 20 03 cmp %i0, 3
api_assoc = rtems_object_api_classic_assoc;
#ifdef RTEMS_POSIX_API
else if ( the_api == OBJECTS_POSIX_API )
400079b0: 02 80 00 18 be 40007a10 <rtems_object_get_api_class_name+0x78>
<== NEVER TAKEN
400079b4: 31 10 00 4c sethi %hi(0x40013000), %i0
api_assoc = rtems_object_api_posix_assoc;
#endif
else
return "BAD API";
400079b8: 81 c7 e0 08 ret
400079bc: 91 ee 23 20 restore %i0, 0x320, %o0
api_assoc = rtems_object_api_classic_assoc;
400079c0: 11 10 00 4d sethi %hi(0x40013400), %o0
400079c4: 90 12 20 38 or %o0, 0x38, %o0 ! 40013438 <rtems_object_api_classic_assoc>
class_assoc = rtems_assoc_ptr_by_local( api_assoc, the_class );
400079c8: 40 00 1d d6 call 4000f120 <rtems_assoc_ptr_by_local>
400079cc: 92 10 00 19 mov %i1, %o1
if ( class_assoc )
400079d0: 80 a2 20 00 cmp %o0, 0
400079d4: 22 80 00 0d be,a 40007a08 <rtems_object_get_api_class_name+0x70>
400079d8: 31 10 00 4c sethi %hi(0x40013000), %i0
return class_assoc->name;
400079dc: f0 02 00 00 ld [ %o0 ], %i0
400079e0: 81 c7 e0 08 ret
400079e4: 81 e8 00 00 restore
api_assoc = rtems_object_api_internal_assoc;
400079e8: 11 10 00 4d sethi %hi(0x40013400), %o0
class_assoc = rtems_assoc_ptr_by_local( api_assoc, the_class );
400079ec: 92 10 00 19 mov %i1, %o1
400079f0: 40 00 1d cc call 4000f120 <rtems_assoc_ptr_by_local>
400079f4: 90 12 20 bc or %o0, 0xbc, %o0
if ( class_assoc )
400079f8: 80 a2 20 00 cmp %o0, 0
400079fc: 32 bf ff f9 bne,a 400079e0 <rtems_object_get_api_class_name+0x48>
<== ALWAYS TAKEN
40007a00: f0 02 00 00 ld [ %o0 ], %i0
return "BAD CLASS";
40007a04: 31 10 00 4c sethi %hi(0x40013000), %i0
<== NOT EXECUTED
}
40007a08: 81 c7 e0 08 ret
40007a0c: 91 ee 23 28 restore %i0, 0x328, %o0
api_assoc = rtems_object_api_posix_assoc;
40007a10: 11 10 00 4c sethi %hi(0x40013000), %o0
<== NOT EXECUTED
40007a14: 10 bf ff ed b 400079c8 <rtems_object_get_api_class_name+0x30>
<== NOT EXECUTED
40007a18: 90 12 23 d8 or %o0, 0x3d8, %o0 ! 400133d8 <rtems_object_api_posix_assoc>
<== NOT EXECUTED
40007a8c <rtems_object_get_class_information>:
rtems_status_code rtems_object_get_class_information(
int the_api,
int the_class,
rtems_object_api_class_information *info
)
{
40007a8c: 9d e3 bf a0 save %sp, -96, %sp
int i;
/*
* Validate parameters and look up information structure.
*/
if ( !info )
40007a90: 80 a6 a0 00 cmp %i2, 0
40007a94: 02 80 00 21 be 40007b18 <rtems_object_get_class_information+0x8c>
40007a98: 82 10 20 09 mov 9, %g1
return RTEMS_INVALID_ADDRESS;
obj_info = _Objects_Get_information( the_api, the_class );
40007a9c: b3 2e 60 10 sll %i1, 0x10, %i1
40007aa0: 90 10 00 18 mov %i0, %o0
40007aa4: 40 00 0a d1 call 4000a5e8 <_Objects_Get_information>
40007aa8: 93 36 60 10 srl %i1, 0x10, %o1
if ( !obj_info )
40007aac: 80 a2 20 00 cmp %o0, 0
40007ab0: 02 80 00 1c be 40007b20 <rtems_object_get_class_information+0x94>
40007ab4: 82 10 20 0a mov 0xa, %g1
* Return information about this object class to the user.
*/
info->minimum_id = obj_info->minimum_id;
info->maximum_id = obj_info->maximum_id;
info->auto_extend = obj_info->auto_extend;
info->maximum = obj_info->maximum;
40007ab8: c6 12 20 10 lduh [ %o0 + 0x10 ], %g3
info->minimum_id = obj_info->minimum_id;
40007abc: c8 02 20 08 ld [ %o0 + 8 ], %g4
info->maximum_id = obj_info->maximum_id;
40007ac0: c4 02 20 0c ld [ %o0 + 0xc ], %g2
info->auto_extend = obj_info->auto_extend;
40007ac4: c2 0a 20 12 ldub [ %o0 + 0x12 ], %g1
40007ac8: c2 2e a0 0c stb %g1, [ %i2 + 0xc ]
for ( unallocated=0, i=1 ; i <= info->maximum ; i++ )
40007acc: 80 a0 e0 00 cmp %g3, 0
info->minimum_id = obj_info->minimum_id;
40007ad0: c8 26 80 00 st %g4, [ %i2 ]
info->maximum_id = obj_info->maximum_id;
40007ad4: c4 26 a0 04 st %g2, [ %i2 + 4 ]
for ( unallocated=0, i=1 ; i <= info->maximum ; i++ )
40007ad8: 02 80 00 14 be 40007b28 <rtems_object_get_class_information+0x9c>
<== NEVER TAKEN
40007adc: c6 26 a0 08 st %g3, [ %i2 + 8 ]
if ( !obj_info->local_table[i] )
40007ae0: c2 02 20 1c ld [ %o0 + 0x1c ], %g1
40007ae4: 82 00 60 04 add %g1, 4, %g1
40007ae8: 87 28 e0 02 sll %g3, 2, %g3
for ( unallocated=0, i=1 ; i <= info->maximum ; i++ )
40007aec: 84 10 20 00 clr %g2
40007af0: 86 00 c0 01 add %g3, %g1, %g3
if ( !obj_info->local_table[i] )
40007af4: c8 00 40 00 ld [ %g1 ], %g4
unallocated++;
40007af8: 80 a0 00 04 cmp %g0, %g4
40007afc: 82 00 60 04 add %g1, 4, %g1
40007b00: 84 60 bf ff subx %g2, -1, %g2
for ( unallocated=0, i=1 ; i <= info->maximum ; i++ )
40007b04: 80 a0 40 03 cmp %g1, %g3
40007b08: 32 bf ff fc bne,a 40007af8 <rtems_object_get_class_information+0x6c>
40007b0c: c8 00 40 00 ld [ %g1 ], %g4
info->unallocated = unallocated;
40007b10: c4 26 a0 10 st %g2, [ %i2 + 0x10 ]
return RTEMS_SUCCESSFUL;
40007b14: 82 10 20 00 clr %g1
}
40007b18: 81 c7 e0 08 ret
40007b1c: 91 e8 00 01 restore %g0, %g1, %o0
40007b20: 81 c7 e0 08 ret
40007b24: 91 e8 00 01 restore %g0, %g1, %o0
for ( unallocated=0, i=1 ; i <= info->maximum ; i++ )
40007b28: 10 bf ff fa b 40007b10 <rtems_object_get_class_information+0x84>
<== NOT EXECUTED
40007b2c: 84 10 20 00 clr %g2
<== NOT EXECUTED
40006c14 <rtems_partition_create>:
uint32_t length,
uint32_t buffer_size,
rtems_attribute attribute_set,
rtems_id *id
)
{
40006c14: 9d e3 bf a0 save %sp, -96, %sp
Partition_Control *the_partition;
if ( !rtems_is_name_valid( name ) )
40006c18: 80 a6 20 00 cmp %i0, 0
40006c1c: 02 80 00 31 be 40006ce0 <rtems_partition_create+0xcc>
40006c20: 82 10 20 03 mov 3, %g1
return RTEMS_INVALID_NAME;
if ( !starting_address )
return RTEMS_INVALID_ADDRESS;
if ( !id )
40006c24: 80 a6 60 00 cmp %i1, 0
40006c28: 02 80 00 30 be 40006ce8 <rtems_partition_create+0xd4>
40006c2c: 80 a7 60 00 cmp %i5, 0
40006c30: 02 80 00 2e be 40006ce8 <rtems_partition_create+0xd4>
<== NEVER TAKEN
40006c34: 80 a0 00 1a cmp %g0, %i2
return RTEMS_INVALID_ADDRESS;
if ( length == 0 || buffer_size == 0 || length < buffer_size ||
40006c38: 84 60 3f ff subx %g0, -1, %g2
40006c3c: 80 a0 00 1b cmp %g0, %i3
40006c40: 82 60 3f ff subx %g0, -1, %g1
40006c44: 80 90 80 01 orcc %g2, %g1, %g0
40006c48: 12 80 00 26 bne 40006ce0 <rtems_partition_create+0xcc>
40006c4c: 82 10 20 08 mov 8, %g1
40006c50: 80 a6 80 1b cmp %i2, %i3
40006c54: 0a 80 00 23 bcs 40006ce0 <rtems_partition_create+0xcc>
40006c58: 80 8e e0 07 btst 7, %i3
40006c5c: 12 80 00 21 bne 40006ce0 <rtems_partition_create+0xcc>
40006c60: 80 8e 60 07 btst 7, %i1
!_Partition_Is_buffer_size_aligned( buffer_size ) )
return RTEMS_INVALID_SIZE;
if ( !_Addresses_Is_aligned( starting_address ) )
40006c64: 12 80 00 1f bne 40006ce0 <rtems_partition_create+0xcc>
40006c68: 82 10 20 09 mov 9, %g1
* This function allocates a partition control block from
* the inactive chain of free partition control blocks.
*/
RTEMS_INLINE_ROUTINE Partition_Control *_Partition_Allocate ( void )
{
return (Partition_Control *) _Objects_Allocate( &_Partition_Information );
40006c6c: 23 10 00 54 sethi %hi(0x40015000), %l1
40006c70: 40 00 09 a1 call 400092f4 <_Objects_Allocate>
40006c74: 90 14 63 50 or %l1, 0x350, %o0 ! 40015350 <_Partition_Information>
return RTEMS_MP_NOT_CONFIGURED;
#endif
the_partition = _Partition_Allocate();
if ( !the_partition ) {
40006c78: a0 92 20 00 orcc %o0, 0, %l0
40006c7c: 02 80 00 1e be 40006cf4 <rtems_partition_create+0xe0>
40006c80: 96 10 00 1b mov %i3, %o3
uint32_t length,
uint32_t buffer_size,
rtems_attribute attribute_set
)
{
the_partition->starting_address = starting_address;
40006c84: f2 24 20 10 st %i1, [ %l0 + 0x10 ]
the_partition->length = length;
40006c88: f4 24 20 14 st %i2, [ %l0 + 0x14 ]
the_partition->buffer_size = buffer_size;
the_partition->attribute_set = attribute_set;
the_partition->number_of_used_blocks = 0;
_Chain_Initialize(
40006c8c: 81 80 20 00 wr %g0, %y
40006c90: 01 00 00 00 nop
40006c94: 01 00 00 00 nop
40006c98: 01 00 00 00 nop
40006c9c: 94 76 80 1b udiv %i2, %i3, %o2
the_partition->buffer_size = buffer_size;
40006ca0: f6 24 20 18 st %i3, [ %l0 + 0x18 ]
_Chain_Initialize(
40006ca4: 92 10 00 19 mov %i1, %o1
the_partition->attribute_set = attribute_set;
40006ca8: f8 24 20 1c st %i4, [ %l0 + 0x1c ]
_Chain_Initialize(
40006cac: 90 04 20 24 add %l0, 0x24, %o0
the_partition->number_of_used_blocks = 0;
40006cb0: c0 24 20 20 clr [ %l0 + 0x20 ]
_Chain_Initialize(
40006cb4: 40 00 02 36 call 4000758c <_Chain_Initialize>
40006cb8: a2 14 63 50 or %l1, 0x350, %l1
information->local_table[ index ] = the_object;
40006cbc: c2 14 20 0a lduh [ %l0 + 0xa ], %g1
the_object->name = name;
40006cc0: f0 24 20 0c st %i0, [ %l0 + 0xc ]
information->local_table[ index ] = the_object;
40006cc4: 83 28 60 02 sll %g1, 2, %g1
40006cc8: c6 04 60 1c ld [ %l1 + 0x1c ], %g3
40006ccc: c4 04 20 08 ld [ %l0 + 8 ], %g2
40006cd0: e0 20 c0 01 st %l0, [ %g3 + %g1 ]
_RTEMS_Unlock_allocator();
40006cd4: 40 00 02 06 call 400074ec <_RTEMS_Unlock_allocator>
40006cd8: c4 27 40 00 st %g2, [ %i5 ]
0 /* Not used */
);
#endif
_Objects_Allocator_unlock();
return RTEMS_SUCCESSFUL;
40006cdc: 82 10 20 00 clr %g1
}
40006ce0: 81 c7 e0 08 ret
40006ce4: 91 e8 00 01 restore %g0, %g1, %o0
return RTEMS_INVALID_ADDRESS;
40006ce8: 82 10 20 09 mov 9, %g1
}
40006cec: 81 c7 e0 08 ret
40006cf0: 91 e8 00 01 restore %g0, %g1, %o0
40006cf4: 40 00 01 fe call 400074ec <_RTEMS_Unlock_allocator>
40006cf8: 01 00 00 00 nop
return RTEMS_TOO_MANY;
40006cfc: 10 bf ff f9 b 40006ce0 <rtems_partition_create+0xcc>
40006d00: 82 10 20 05 mov 5, %g1 ! 5 <_TLS_Alignment+0x4>
40006d04 <rtems_partition_delete>:
#include <rtems/rtems/attrimpl.h>
rtems_status_code rtems_partition_delete(
rtems_id id
)
{
40006d04: 9d e3 bf 98 save %sp, -104, %sp
_RTEMS_Lock_allocator();
40006d08: 40 00 01 f4 call 400074d8 <_RTEMS_Lock_allocator>
40006d0c: 39 10 00 54 sethi %hi(0x40015000), %i4
RTEMS_INLINE_ROUTINE Partition_Control *_Partition_Get(
Objects_Id id,
ISR_lock_Context *lock_context
)
{
return (Partition_Control *) _Objects_Get(
40006d10: 92 07 bf fc add %fp, -4, %o1
40006d14: 94 17 23 50 or %i4, 0x350, %o2
40006d18: 40 00 0a 97 call 40009774 <_Objects_Get>
40006d1c: 90 10 00 18 mov %i0, %o0
ISR_lock_Context lock_context;
_Objects_Allocator_lock();
the_partition = _Partition_Get( id, &lock_context );
if ( the_partition == NULL ) {
40006d20: ba 92 20 00 orcc %o0, 0, %i5
40006d24: 02 80 00 1a be 40006d8c <rtems_partition_delete+0x88>
40006d28: 01 00 00 00 nop
return RTEMS_INVALID_ID;
}
_Partition_Acquire_critical( the_partition, &lock_context );
if ( the_partition->number_of_used_blocks != 0 ) {
40006d2c: c2 07 60 20 ld [ %i5 + 0x20 ], %g1
40006d30: 80 a0 60 00 cmp %g1, 0
40006d34: 12 80 00 0f bne 40006d70 <rtems_partition_delete+0x6c>
40006d38: 92 10 00 1d mov %i5, %o1
_Partition_Release( the_partition, &lock_context );
_Objects_Allocator_unlock();
return RTEMS_RESOURCE_IN_USE;
}
_Objects_Close( &_Partition_Information, &the_partition->Object );
40006d3c: 40 00 09 73 call 40009308 <_Objects_Close>
40006d40: 90 17 23 50 or %i4, 0x350, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40006d44: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40006d48: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40006d4c: 01 00 00 00 nop
_Objects_Free( &_Partition_Information, &the_partition->Object );
40006d50: 92 10 00 1d mov %i5, %o1
40006d54: 90 17 23 50 or %i4, 0x350, %o0
40006d58: 40 00 0a 38 call 40009638 <_Objects_Free>
40006d5c: b0 10 20 00 clr %i0
_RTEMS_Unlock_allocator();
40006d60: 40 00 01 e3 call 400074ec <_RTEMS_Unlock_allocator>
40006d64: 01 00 00 00 nop
_Partition_Destroy( the_partition );
_Partition_Free( the_partition );
_Objects_Allocator_unlock();
return RTEMS_SUCCESSFUL;
}
40006d68: 81 c7 e0 08 ret
40006d6c: 81 e8 00 00 restore
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40006d70: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40006d74: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40006d78: 01 00 00 00 nop
40006d7c: 40 00 01 dc call 400074ec <_RTEMS_Unlock_allocator>
40006d80: b0 10 20 0c mov 0xc, %i0 ! c <_TLS_Alignment+0xb>
return RTEMS_RESOURCE_IN_USE;
40006d84: 81 c7 e0 08 ret
40006d88: 81 e8 00 00 restore
40006d8c: 40 00 01 d8 call 400074ec <_RTEMS_Unlock_allocator>
40006d90: b0 10 20 04 mov 4, %i0
return RTEMS_INVALID_ID;
40006d94: 81 c7 e0 08 ret
40006d98: 81 e8 00 00 restore
40006d9c <rtems_partition_get_buffer>:
rtems_status_code rtems_partition_get_buffer(
rtems_id id,
void **buffer
)
{
40006d9c: 9d e3 bf 98 save %sp, -104, %sp
Partition_Control *the_partition;
ISR_lock_Context lock_context;
void *the_buffer;
if ( buffer == NULL ) {
40006da0: 80 a6 60 00 cmp %i1, 0
40006da4: 02 80 00 19 be 40006e08 <rtems_partition_get_buffer+0x6c>
40006da8: 82 10 20 09 mov 9, %g1
return (Partition_Control *) _Objects_Get(
40006dac: 92 07 bf fc add %fp, -4, %o1
40006db0: 15 10 00 54 sethi %hi(0x40015000), %o2
40006db4: 90 10 00 18 mov %i0, %o0
40006db8: 40 00 0a 6f call 40009774 <_Objects_Get>
40006dbc: 94 12 a3 50 or %o2, 0x350, %o2
return RTEMS_INVALID_ADDRESS;
}
the_partition = _Partition_Get( id, &lock_context );
if ( the_partition == NULL ) {
40006dc0: 80 a2 20 00 cmp %o0, 0
40006dc4: 02 80 00 13 be 40006e10 <rtems_partition_get_buffer+0x74>
40006dc8: 82 02 20 28 add %o0, 0x28, %g1
return _Chain_Immutable_head( the_chain )->next;
40006dcc: c4 02 20 24 ld [ %o0 + 0x24 ], %g2
if ( !_Chain_Is_empty(the_chain))
40006dd0: 80 a0 80 01 cmp %g2, %g1
40006dd4: 02 80 00 12 be 40006e1c <rtems_partition_get_buffer+0x80>
40006dd8: 88 02 20 24 add %o0, 0x24, %g4
new_first = old_first->next;
40006ddc: c6 00 80 00 ld [ %g2 ], %g3
<== NOT EXECUTED
head->next = new_first;
40006de0: c6 22 20 24 st %g3, [ %o0 + 0x24 ]
<== NOT EXECUTED
if ( the_buffer == NULL ) {
_Partition_Release( the_partition, &lock_context );
return RTEMS_UNSATISFIED;
}
the_partition->number_of_used_blocks += 1;
40006de4: c2 02 20 20 ld [ %o0 + 0x20 ], %g1
<== NOT EXECUTED
new_first->previous = head;
40006de8: c8 20 e0 04 st %g4, [ %g3 + 4 ]
<== NOT EXECUTED
40006dec: 82 00 60 01 inc %g1
<== NOT EXECUTED
40006df0: c2 22 20 20 st %g1, [ %o0 + 0x20 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40006df4: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40006df8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40006dfc: 01 00 00 00 nop
_Partition_Release( the_partition, &lock_context );
*buffer = the_buffer;
40006e00: c4 26 40 00 st %g2, [ %i1 ]
return RTEMS_SUCCESSFUL;
40006e04: 82 10 20 00 clr %g1
}
40006e08: 81 c7 e0 08 ret
40006e0c: 91 e8 00 01 restore %g0, %g1, %o0
return RTEMS_INVALID_ID;
40006e10: 82 10 20 04 mov 4, %g1
}
40006e14: 81 c7 e0 08 ret
40006e18: 91 e8 00 01 restore %g0, %g1, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40006e1c: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40006e20: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40006e24: 01 00 00 00 nop
return RTEMS_UNSATISFIED;
40006e28: 10 bf ff f8 b 40006e08 <rtems_partition_get_buffer+0x6c>
40006e2c: 82 10 20 0d mov 0xd, %g1 ! d <_TLS_Alignment+0xc>
40006e9c <rtems_partition_return_buffer>:
rtems_status_code rtems_partition_return_buffer(
rtems_id id,
void *buffer
)
{
40006e9c: 9d e3 bf 98 save %sp, -104, %sp
40006ea0: 15 10 00 54 sethi %hi(0x40015000), %o2
40006ea4: 92 07 bf fc add %fp, -4, %o1
40006ea8: 94 12 a3 50 or %o2, 0x350, %o2
40006eac: 40 00 0a 32 call 40009774 <_Objects_Get>
40006eb0: 90 10 00 18 mov %i0, %o0
Partition_Control *the_partition;
ISR_lock_Context lock_context;
the_partition = _Partition_Get( id, &lock_context );
if ( the_partition == NULL ) {
40006eb4: 80 a2 20 00 cmp %o0, 0
40006eb8: 02 80 00 26 be 40006f50 <rtems_partition_return_buffer+0xb4>
40006ebc: 01 00 00 00 nop
starting = the_partition->starting_address;
40006ec0: c2 02 20 10 ld [ %o0 + 0x10 ], %g1
RTEMS_INLINE_ROUTINE void *_Addresses_Add_offset (
const void *base,
uintptr_t offset
)
{
return (void *)((uintptr_t)base + offset);
40006ec4: c4 02 20 14 ld [ %o0 + 0x14 ], %g2
40006ec8: 84 00 40 02 add %g1, %g2, %g2
_Addresses_Is_in_range( the_buffer, starting, ending ) &&
40006ecc: 80 a6 40 02 cmp %i1, %g2
40006ed0: 18 80 00 1b bgu 40006f3c <rtems_partition_return_buffer+0xa0>
40006ed4: 80 a6 40 01 cmp %i1, %g1
40006ed8: 0a 80 00 19 bcs 40006f3c <rtems_partition_return_buffer+0xa0>
<== NEVER TAKEN
40006edc: 82 26 40 01 sub %i1, %g1, %g1
return ((offset % the_partition->buffer_size) == 0);
40006ee0: c6 02 20 18 ld [ %o0 + 0x18 ], %g3
40006ee4: 81 80 20 00 wr %g0, %y
40006ee8: 01 00 00 00 nop
40006eec: 01 00 00 00 nop
40006ef0: 01 00 00 00 nop
40006ef4: 84 70 40 03 udiv %g1, %g3, %g2
40006ef8: 84 58 80 03 smul %g2, %g3, %g2
_Addresses_Is_in_range( the_buffer, starting, ending ) &&
40006efc: 80 a0 40 02 cmp %g1, %g2
40006f00: 12 80 00 0f bne 40006f3c <rtems_partition_return_buffer+0xa0>
40006f04: 82 02 20 28 add %o0, 0x28, %g1
old_last = tail->previous;
40006f08: c4 02 20 2c ld [ %o0 + 0x2c ], %g2
<== NOT EXECUTED
the_node->next = tail;
40006f0c: c2 26 40 00 st %g1, [ %i1 ]
<== NOT EXECUTED
tail->previous = the_node;
40006f10: f2 22 20 2c st %i1, [ %o0 + 0x2c ]
<== NOT EXECUTED
old_last->next = the_node;
40006f14: f2 20 80 00 st %i1, [ %g2 ]
<== NOT EXECUTED
_Partition_Release( the_partition, &lock_context );
return RTEMS_INVALID_ADDRESS;
}
_Partition_Free_buffer( the_partition, buffer );
the_partition->number_of_used_blocks -= 1;
40006f18: c2 02 20 20 ld [ %o0 + 0x20 ], %g1
<== NOT EXECUTED
the_node->previous = old_last;
40006f1c: c4 26 60 04 st %g2, [ %i1 + 4 ]
<== NOT EXECUTED
40006f20: 82 00 7f ff add %g1, -1, %g1
<== NOT EXECUTED
40006f24: c2 22 20 20 st %g1, [ %o0 + 0x20 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40006f28: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40006f2c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40006f30: 01 00 00 00 nop
_Partition_Release( the_partition, &lock_context );
return RTEMS_SUCCESSFUL;
}
40006f34: 81 c7 e0 08 ret
40006f38: 91 e8 20 00 restore %g0, 0, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40006f3c: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40006f40: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40006f44: 01 00 00 00 nop
return RTEMS_INVALID_ADDRESS;
40006f48: 81 c7 e0 08 ret
40006f4c: 91 e8 20 09 restore %g0, 9, %o0
return RTEMS_INVALID_ID;
40006f50: 81 c7 e0 08 ret
40006f54: 91 e8 20 04 restore %g0, 4, %o0
4000686c <rtems_port_delete>:
#include <rtems/rtems/dpmemimpl.h>
rtems_status_code rtems_port_delete(
rtems_id id
)
{
4000686c: 9d e3 bf 98 save %sp, -104, %sp
_RTEMS_Lock_allocator();
40006870: 40 00 01 e1 call 40006ff4 <_RTEMS_Lock_allocator>
40006874: 3b 10 00 4e sethi %hi(0x40013800), %i5
RTEMS_INLINE_ROUTINE Dual_ported_memory_Control *_Dual_ported_memory_Get(
Objects_Id id,
ISR_lock_Context *lock_context
)
{
return (Dual_ported_memory_Control *)
40006878: 92 07 bf fc add %fp, -4, %o1
4000687c: 94 17 61 f8 or %i5, 0x1f8, %o2
40006880: 40 00 0a 84 call 40009290 <_Objects_Get>
40006884: 90 10 00 18 mov %i0, %o0
ISR_lock_Context lock_context;
_Objects_Allocator_lock();
the_port = _Dual_ported_memory_Get( id, &lock_context );
if ( the_port == NULL ) {
40006888: b8 92 20 00 orcc %o0, 0, %i4
4000688c: 02 80 00 0f be 400068c8 <rtems_port_delete+0x5c>
40006890: 92 10 00 1c mov %i4, %o1
_Objects_Allocator_unlock();
return RTEMS_INVALID_ID;
}
_Objects_Close( &_Dual_ported_memory_Information, &the_port->Object );
40006894: 40 00 09 64 call 40008e24 <_Objects_Close>
40006898: 90 17 61 f8 or %i5, 0x1f8, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000689c: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400068a0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400068a4: 01 00 00 00 nop
_Objects_Free( &_Dual_ported_memory_Information, &the_port->Object );
400068a8: 92 10 00 1c mov %i4, %o1
400068ac: 90 17 61 f8 or %i5, 0x1f8, %o0
400068b0: 40 00 0a 29 call 40009154 <_Objects_Free>
400068b4: b0 10 20 00 clr %i0
_RTEMS_Unlock_allocator();
400068b8: 40 00 01 d4 call 40007008 <_RTEMS_Unlock_allocator>
400068bc: 01 00 00 00 nop
_ISR_lock_ISR_enable( &lock_context );
_Dual_ported_memory_Free( the_port );
_Objects_Allocator_unlock();
return RTEMS_SUCCESSFUL;
}
400068c0: 81 c7 e0 08 ret
400068c4: 81 e8 00 00 restore
400068c8: 40 00 01 d0 call 40007008 <_RTEMS_Unlock_allocator>
400068cc: b0 10 20 04 mov 4, %i0
return RTEMS_INVALID_ID;
400068d0: 81 c7 e0 08 ret
400068d4: 81 e8 00 00 restore
400068d8 <rtems_port_external_to_internal>:
rtems_status_code rtems_port_external_to_internal(
rtems_id id,
void *external,
void **internal
)
{
400068d8: 9d e3 bf 98 save %sp, -104, %sp
Dual_ported_memory_Control *the_port;
ISR_lock_Context lock_context;
uint32_t ending;
if ( internal == NULL ) {
400068dc: 80 a6 a0 00 cmp %i2, 0
400068e0: 02 80 00 17 be 4000693c <rtems_port_external_to_internal+0x64>
400068e4: 82 10 20 09 mov 9, %g1
return (Dual_ported_memory_Control *)
400068e8: 92 07 bf fc add %fp, -4, %o1
400068ec: 15 10 00 4e sethi %hi(0x40013800), %o2
400068f0: 90 10 00 18 mov %i0, %o0
400068f4: 40 00 0a 67 call 40009290 <_Objects_Get>
400068f8: 94 12 a1 f8 or %o2, 0x1f8, %o2
return RTEMS_INVALID_ADDRESS;
}
the_port = _Dual_ported_memory_Get( id, &lock_context );
if ( the_port == NULL ) {
400068fc: 80 a2 20 00 cmp %o0, 0
40006900: 02 80 00 11 be 40006944 <rtems_port_external_to_internal+0x6c>
40006904: 82 10 20 04 mov 4, %g1
RTEMS_INLINE_ROUTINE int32_t _Addresses_Subtract (
const void *left,
const void *right
)
{
return (int32_t) ((const char *) left - (const char *) right);
40006908: c2 02 20 14 ld [ %o0 + 0x14 ], %g1
return RTEMS_INVALID_ID;
}
ending = _Addresses_Subtract( external, the_port->external_base );
if ( ending > the_port->length ) {
4000690c: c4 02 20 18 ld [ %o0 + 0x18 ], %g2
40006910: 82 26 40 01 sub %i1, %g1, %g1
40006914: 80 a0 80 01 cmp %g2, %g1
40006918: 2a 80 00 05 bcs,a 4000692c <rtems_port_external_to_internal+0x54>
4000691c: f2 26 80 00 st %i1, [ %i2 ]
return (void *)((uintptr_t)base + offset);
40006920: c4 02 20 10 ld [ %o0 + 0x10 ], %g2
<== NOT EXECUTED
40006924: 82 00 80 01 add %g2, %g1, %g1
<== NOT EXECUTED
*internal = external;
} else {
*internal = _Addresses_Add_offset( the_port->internal_base, ending );
40006928: c2 26 80 00 st %g1, [ %i2 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000692c: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40006930: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40006934: 01 00 00 00 nop
}
_ISR_lock_ISR_enable( &lock_context );
return RTEMS_SUCCESSFUL;
40006938: 82 10 20 00 clr %g1 ! 0 <PROM_START>
}
4000693c: 81 c7 e0 08 ret
40006940: 91 e8 00 01 restore %g0, %g1, %o0
40006944: 81 c7 e0 08 ret
40006948: 91 e8 00 01 restore %g0, %g1, %o0
40006980 <rtems_port_internal_to_external>:
rtems_status_code rtems_port_internal_to_external(
rtems_id id,
void *internal,
void **external
)
{
40006980: 9d e3 bf 98 save %sp, -104, %sp
Dual_ported_memory_Control *the_port;
ISR_lock_Context lock_context;
uint32_t ending;
if ( external == NULL ) {
40006984: 80 a6 a0 00 cmp %i2, 0
40006988: 02 80 00 17 be 400069e4 <rtems_port_internal_to_external+0x64>
4000698c: 82 10 20 09 mov 9, %g1
40006990: 92 07 bf fc add %fp, -4, %o1
40006994: 15 10 00 4e sethi %hi(0x40013800), %o2
40006998: 90 10 00 18 mov %i0, %o0
4000699c: 40 00 0a 3d call 40009290 <_Objects_Get>
400069a0: 94 12 a1 f8 or %o2, 0x1f8, %o2
return RTEMS_INVALID_ADDRESS;
}
the_port = _Dual_ported_memory_Get( id, &lock_context );
if ( the_port == NULL ) {
400069a4: 80 a2 20 00 cmp %o0, 0
400069a8: 02 80 00 11 be 400069ec <rtems_port_internal_to_external+0x6c>
400069ac: 82 10 20 04 mov 4, %g1
return (int32_t) ((const char *) left - (const char *) right);
400069b0: c2 02 20 10 ld [ %o0 + 0x10 ], %g1
return RTEMS_INVALID_ID;
}
ending = _Addresses_Subtract( internal, the_port->internal_base );
if ( ending > the_port->length ) {
400069b4: c4 02 20 18 ld [ %o0 + 0x18 ], %g2
400069b8: 82 26 40 01 sub %i1, %g1, %g1
400069bc: 80 a0 80 01 cmp %g2, %g1
400069c0: 2a 80 00 05 bcs,a 400069d4 <rtems_port_internal_to_external+0x54>
400069c4: f2 26 80 00 st %i1, [ %i2 ]
return (void *)((uintptr_t)base + offset);
400069c8: c4 02 20 14 ld [ %o0 + 0x14 ], %g2
<== NOT EXECUTED
400069cc: 82 00 80 01 add %g2, %g1, %g1
<== NOT EXECUTED
*external = internal;
} else {
*external = _Addresses_Add_offset( the_port->external_base, ending );
400069d0: c2 26 80 00 st %g1, [ %i2 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400069d4: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400069d8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400069dc: 01 00 00 00 nop
}
_ISR_lock_ISR_enable( &lock_context );
return RTEMS_SUCCESSFUL;
400069e0: 82 10 20 00 clr %g1 ! 0 <PROM_START>
}
400069e4: 81 c7 e0 08 ret
400069e8: 91 e8 00 01 restore %g0, %g1, %o0
400069ec: 81 c7 e0 08 ret
400069f0: 91 e8 00 01 restore %g0, %g1, %o0
40006658 <rtems_rate_monotonic_cancel>:
rtems_status_code rtems_rate_monotonic_cancel(
rtems_id id
)
{
40006658: 9d e3 bf 98 save %sp, -104, %sp
RTEMS_INLINE_ROUTINE Rate_monotonic_Control *_Rate_monotonic_Get(
Objects_Id id,
ISR_lock_Context *lock_context
)
{
return (Rate_monotonic_Control *)
4000665c: 15 10 00 4d sethi %hi(0x40013400), %o2
40006660: 92 07 bf fc add %fp, -4, %o1
40006664: 94 12 a3 58 or %o2, 0x358, %o2
40006668: 40 00 0b 21 call 400092ec <_Objects_Get>
4000666c: 90 10 00 18 mov %i0, %o0
Rate_monotonic_Control *the_period;
ISR_lock_Context lock_context;
Thread_Control *executing;
the_period = _Rate_monotonic_Get( id, &lock_context );
if ( the_period == NULL ) {
40006670: 82 92 20 00 orcc %o0, 0, %g1
40006674: 02 80 00 10 be 400066b4 <rtems_rate_monotonic_cancel+0x5c>
40006678: 01 00 00 00 nop
return RTEMS_INVALID_ID;
}
executing = _Thread_Executing;
if ( executing != the_period->owner ) {
4000667c: d2 00 60 54 ld [ %g1 + 0x54 ], %o1
40006680: c2 01 a0 20 ld [ %g6 + 0x20 ], %g1
40006684: 80 a2 40 01 cmp %o1, %g1
40006688: 02 80 00 07 be 400066a4 <rtems_rate_monotonic_cancel+0x4c>
4000668c: 94 07 bf fc add %fp, -4, %o2
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40006690: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40006694: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40006698: 01 00 00 00 nop
_ISR_lock_ISR_enable( &lock_context );
return RTEMS_NOT_OWNER_OF_RESOURCE;
4000669c: 81 c7 e0 08 ret
400066a0: 91 e8 20 17 restore %g0, 0x17, %o0
}
_Rate_monotonic_Cancel( the_period, executing, &lock_context );
400066a4: 7f ff ff bd call 40006598 <_Rate_monotonic_Cancel>
400066a8: b0 10 20 00 clr %i0
return RTEMS_SUCCESSFUL;
400066ac: 81 c7 e0 08 ret
400066b0: 81 e8 00 00 restore
}
400066b4: 81 c7 e0 08 ret
400066b8: 91 e8 20 04 restore %g0, 4, %o0
40006d00 <rtems_rate_monotonic_get_statistics>:
rtems_status_code rtems_rate_monotonic_get_statistics(
rtems_id id,
rtems_rate_monotonic_period_statistics *dst
)
{
40006d00: 9d e3 bf 98 save %sp, -104, %sp
Rate_monotonic_Control *the_period;
ISR_lock_Context lock_context;
const Rate_monotonic_Statistics *src;
if ( dst == NULL ) {
40006d04: 80 a6 60 00 cmp %i1, 0
40006d08: 02 80 00 43 be 40006e14 <rtems_rate_monotonic_get_statistics+0x114>
<== ALWAYS TAKEN
40006d0c: 82 10 20 09 mov 9, %g1
return (Rate_monotonic_Control *)
40006d10: 92 07 bf fc add %fp, -4, %o1
<== NOT EXECUTED
40006d14: 15 10 00 51 sethi %hi(0x40014400), %o2
<== NOT EXECUTED
40006d18: 90 10 00 18 mov %i0, %o0
<== NOT EXECUTED
40006d1c: 40 00 0b 40 call 40009a1c <_Objects_Get>
<== NOT EXECUTED
40006d20: 94 12 a1 d8 or %o2, 0x1d8, %o2
<== NOT EXECUTED
return RTEMS_INVALID_ADDRESS;
}
the_period = _Rate_monotonic_Get( id, &lock_context );
if ( the_period == NULL ) {
40006d24: 80 a2 20 00 cmp %o0, 0
<== NOT EXECUTED
40006d28: 02 80 00 3d be 40006e1c <rtems_rate_monotonic_get_statistics+0x11c>
<== NOT EXECUTED
40006d2c: 82 10 20 04 mov 4, %g1
<== NOT EXECUTED
40006d30: c2 02 20 70 ld [ %o0 + 0x70 ], %g1
<== NOT EXECUTED
40006d34: c4 02 20 74 ld [ %o0 + 0x74 ], %g2
<== NOT EXECUTED
static __inline struct timespec
sbttots(sbintime_t _sbt)
{
struct timespec _ts;
_ts.tv_sec = _sbt >> 32;
40006d38: 87 38 60 1f sra %g1, 0x1f, %g3
<== NOT EXECUTED
_Rate_monotonic_Acquire_critical( the_period, &lock_context );
src = &the_period->Statistics;
dst->count = src->count;
dst->missed_count = src->missed_count;
40006d3c: f8 1a 20 68 ldd [ %o0 + 0x68 ], %i4
<== NOT EXECUTED
40006d40: c2 26 60 0c st %g1, [ %i1 + 0xc ]
<== NOT EXECUTED
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006d44: 03 0e e6 b2 sethi %hi(0x3b9ac800), %g1
<== NOT EXECUTED
_ts.tv_sec = _sbt >> 32;
40006d48: c6 26 60 08 st %g3, [ %i1 + 8 ]
<== NOT EXECUTED
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006d4c: 82 10 62 00 or %g1, 0x200, %g1
<== NOT EXECUTED
40006d50: 86 50 80 01 umul %g2, %g1, %g3
<== NOT EXECUTED
40006d54: 85 40 00 00 rd %y, %g2
<== NOT EXECUTED
40006d58: c4 26 60 10 st %g2, [ %i1 + 0x10 ]
<== NOT EXECUTED
40006d5c: c6 02 20 78 ld [ %o0 + 0x78 ], %g3
<== NOT EXECUTED
40006d60: c4 02 20 7c ld [ %o0 + 0x7c ], %g2
<== NOT EXECUTED
_ts.tv_sec = _sbt >> 32;
40006d64: 89 38 e0 1f sra %g3, 0x1f, %g4
<== NOT EXECUTED
40006d68: c6 26 60 1c st %g3, [ %i1 + 0x1c ]
<== NOT EXECUTED
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006d6c: 86 50 80 01 umul %g2, %g1, %g3
<== NOT EXECUTED
40006d70: 85 40 00 00 rd %y, %g2
<== NOT EXECUTED
_ts.tv_sec = _sbt >> 32;
40006d74: c8 26 60 18 st %g4, [ %i1 + 0x18 ]
<== NOT EXECUTED
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006d78: c4 26 60 20 st %g2, [ %i1 + 0x20 ]
<== NOT EXECUTED
40006d7c: c6 02 20 80 ld [ %o0 + 0x80 ], %g3
<== NOT EXECUTED
40006d80: c4 02 20 84 ld [ %o0 + 0x84 ], %g2
<== NOT EXECUTED
_ts.tv_sec = _sbt >> 32;
40006d84: 89 38 e0 1f sra %g3, 0x1f, %g4
<== NOT EXECUTED
40006d88: c6 26 60 2c st %g3, [ %i1 + 0x2c ]
<== NOT EXECUTED
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006d8c: 86 50 80 01 umul %g2, %g1, %g3
<== NOT EXECUTED
40006d90: 85 40 00 00 rd %y, %g2
<== NOT EXECUTED
_ts.tv_sec = _sbt >> 32;
40006d94: c8 26 60 28 st %g4, [ %i1 + 0x28 ]
<== NOT EXECUTED
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006d98: c4 26 60 30 st %g2, [ %i1 + 0x30 ]
<== NOT EXECUTED
40006d9c: c6 02 20 88 ld [ %o0 + 0x88 ], %g3
<== NOT EXECUTED
40006da0: c4 02 20 8c ld [ %o0 + 0x8c ], %g2
<== NOT EXECUTED
_ts.tv_sec = _sbt >> 32;
40006da4: 89 38 e0 1f sra %g3, 0x1f, %g4
<== NOT EXECUTED
40006da8: c6 26 60 3c st %g3, [ %i1 + 0x3c ]
<== NOT EXECUTED
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006dac: 86 50 80 01 umul %g2, %g1, %g3
<== NOT EXECUTED
40006db0: 85 40 00 00 rd %y, %g2
<== NOT EXECUTED
_ts.tv_sec = _sbt >> 32;
40006db4: c8 26 60 38 st %g4, [ %i1 + 0x38 ]
<== NOT EXECUTED
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006db8: c4 26 60 40 st %g2, [ %i1 + 0x40 ]
<== NOT EXECUTED
40006dbc: c6 02 20 90 ld [ %o0 + 0x90 ], %g3
<== NOT EXECUTED
40006dc0: c4 02 20 94 ld [ %o0 + 0x94 ], %g2
<== NOT EXECUTED
_ts.tv_sec = _sbt >> 32;
40006dc4: 89 38 e0 1f sra %g3, 0x1f, %g4
<== NOT EXECUTED
40006dc8: c6 26 60 4c st %g3, [ %i1 + 0x4c ]
<== NOT EXECUTED
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006dcc: 86 50 80 01 umul %g2, %g1, %g3
<== NOT EXECUTED
40006dd0: 85 40 00 00 rd %y, %g2
<== NOT EXECUTED
_ts.tv_sec = _sbt >> 32;
40006dd4: c8 26 60 48 st %g4, [ %i1 + 0x48 ]
<== NOT EXECUTED
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006dd8: c4 26 60 50 st %g2, [ %i1 + 0x50 ]
<== NOT EXECUTED
40006ddc: c8 02 20 98 ld [ %o0 + 0x98 ], %g4
<== NOT EXECUTED
40006de0: c4 02 20 9c ld [ %o0 + 0x9c ], %g2
<== NOT EXECUTED
dst->count = src->count;
40006de4: f8 26 40 00 st %i4, [ %i1 ]
<== NOT EXECUTED
_ts.tv_sec = _sbt >> 32;
40006de8: b9 39 20 1f sra %g4, 0x1f, %i4
<== NOT EXECUTED
dst->missed_count = src->missed_count;
40006dec: fa 26 60 04 st %i5, [ %i1 + 4 ]
<== NOT EXECUTED
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006df0: 86 50 80 01 umul %g2, %g1, %g3
<== NOT EXECUTED
40006df4: 85 40 00 00 rd %y, %g2
<== NOT EXECUTED
_ts.tv_sec = _sbt >> 32;
40006df8: c8 26 60 5c st %g4, [ %i1 + 0x5c ]
<== NOT EXECUTED
40006dfc: f8 26 60 58 st %i4, [ %i1 + 0x58 ]
<== NOT EXECUTED
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006e00: c4 26 60 60 st %g2, [ %i1 + 0x60 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40006e04: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40006e08: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40006e0c: 01 00 00 00 nop
<== NOT EXECUTED
_Timestamp_To_timespec( &src->min_wall_time, &dst->min_wall_time );
_Timestamp_To_timespec( &src->max_wall_time, &dst->max_wall_time );
_Timestamp_To_timespec( &src->total_wall_time, &dst->total_wall_time );
_Rate_monotonic_Release( the_period, &lock_context );
return RTEMS_SUCCESSFUL;
40006e10: 82 10 20 00 clr %g1 ! 0 <PROM_START>
<== NOT EXECUTED
}
40006e14: 81 c7 e0 08 ret
40006e18: 91 e8 00 01 restore %g0, %g1, %o0
40006e1c: 81 c7 e0 08 ret
<== NOT EXECUTED
40006e20: 91 e8 00 01 restore %g0, %g1, %o0
<== NOT EXECUTED
40006e24 <rtems_rate_monotonic_get_status>:
rtems_status_code rtems_rate_monotonic_get_status(
rtems_id id,
rtems_rate_monotonic_period_status *period_status
)
{
40006e24: 9d e3 bf 88 save %sp, -120, %sp
Rate_monotonic_Control *the_period;
ISR_lock_Context lock_context;
rtems_status_code status;
if ( period_status == NULL ) {
40006e28: 80 a6 60 00 cmp %i1, 0
40006e2c: 02 80 00 1c be 40006e9c <rtems_rate_monotonic_get_status+0x78>
40006e30: 84 10 20 09 mov 9, %g2
40006e34: 92 07 bf ec add %fp, -20, %o1
40006e38: 15 10 00 51 sethi %hi(0x40014400), %o2
40006e3c: 90 10 00 18 mov %i0, %o0
40006e40: 40 00 0a f7 call 40009a1c <_Objects_Get>
40006e44: 94 12 a1 d8 or %o2, 0x1d8, %o2
return RTEMS_INVALID_ADDRESS;
}
the_period = _Rate_monotonic_Get( id, &lock_context );
if ( the_period == NULL ) {
40006e48: 82 92 20 00 orcc %o0, 0, %g1
40006e4c: 02 80 00 30 be 40006f0c <rtems_rate_monotonic_get_status+0xe8>
40006e50: 84 10 20 04 mov 4, %g2
return RTEMS_INVALID_ID;
}
_Rate_monotonic_Acquire_critical( the_period, &lock_context );
period_status->owner = the_period->owner->Object.id;
40006e54: c4 00 60 54 ld [ %g1 + 0x54 ], %g2
40006e58: c6 00 a0 08 ld [ %g2 + 8 ], %g3
period_status->state = the_period->state;
40006e5c: c4 00 60 30 ld [ %g1 + 0x30 ], %g2
period_status->postponed_jobs_count = the_period->postponed_jobs;
40006e60: c2 00 60 a0 ld [ %g1 + 0xa0 ], %g1
40006e64: c2 26 60 28 st %g1, [ %i1 + 0x28 ]
if ( the_period->state == RATE_MONOTONIC_INACTIVE ) {
40006e68: 80 a0 a0 00 cmp %g2, 0
period_status->owner = the_period->owner->Object.id;
40006e6c: c6 26 40 00 st %g3, [ %i1 ]
if ( the_period->state == RATE_MONOTONIC_INACTIVE ) {
40006e70: 12 80 00 0d bne 40006ea4 <rtems_rate_monotonic_get_status+0x80>
40006e74: c4 26 60 04 st %g2, [ %i1 + 4 ]
/*
* If the period is inactive, there is no information.
*/
_Timespec_Set_to_zero( &period_status->since_last_period );
40006e78: c0 26 60 08 clr [ %i1 + 8 ]
<== NOT EXECUTED
40006e7c: c0 26 60 0c clr [ %i1 + 0xc ]
<== NOT EXECUTED
40006e80: c0 26 60 10 clr [ %i1 + 0x10 ]
<== NOT EXECUTED
_Timespec_Set_to_zero( &period_status->executed_since_last_period );
40006e84: c0 26 60 18 clr [ %i1 + 0x18 ]
<== NOT EXECUTED
40006e88: c0 26 60 1c clr [ %i1 + 0x1c ]
<== NOT EXECUTED
40006e8c: c0 26 60 20 clr [ %i1 + 0x20 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40006e90: c2 07 bf ec ld [ %fp + -20 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40006e94: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40006e98: 01 00 00 00 nop
}
}
_Rate_monotonic_Release( the_period, &lock_context );
return status;
}
40006e9c: 81 c7 e0 08 ret
40006ea0: 91 e8 00 02 restore %g0, %g2, %o0
valid_status = _Rate_monotonic_Get_status(
40006ea4: 94 07 bf f8 add %fp, -8, %o2
40006ea8: 40 00 00 44 call 40006fb8 <_Rate_monotonic_Get_status>
40006eac: 92 07 bf f0 add %fp, -16, %o1
if ( valid_status ) {
40006eb0: 80 a2 20 00 cmp %o0, 0
40006eb4: 02 bf ff f7 be 40006e90 <rtems_rate_monotonic_get_status+0x6c>
40006eb8: 84 10 20 0b mov 0xb, %g2
40006ebc: c4 07 bf f0 ld [ %fp + -16 ], %g2
40006ec0: c6 07 bf f8 ld [ %fp + -8 ], %g3
40006ec4: f4 07 bf f4 ld [ %fp + -12 ], %i2
40006ec8: f8 07 bf fc ld [ %fp + -4 ], %i4
_ts.tv_sec = _sbt >> 32;
40006ecc: b1 38 a0 1f sra %g2, 0x1f, %i0
40006ed0: 89 38 e0 1f sra %g3, 0x1f, %g4
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006ed4: 03 0e e6 b2 sethi %hi(0x3b9ac800), %g1
_ts.tv_sec = _sbt >> 32;
40006ed8: c4 26 60 0c st %g2, [ %i1 + 0xc ]
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006edc: 82 10 62 00 or %g1, 0x200, %g1
_ts.tv_sec = _sbt >> 32;
40006ee0: f0 26 60 08 st %i0, [ %i1 + 8 ]
_ts.tv_nsec = ((uint64_t)1000000000 * (uint32_t)_sbt) >> 32;
40006ee4: b6 56 80 01 umul %i2, %g1, %i3
40006ee8: b5 40 00 00 rd %y, %i2
40006eec: ba 57 00 01 umul %i4, %g1, %i5
40006ef0: b9 40 00 00 rd %y, %i4
status = RTEMS_SUCCESSFUL;
40006ef4: 84 10 20 00 clr %g2
40006ef8: f4 26 60 10 st %i2, [ %i1 + 0x10 ]
_ts.tv_sec = _sbt >> 32;
40006efc: c6 26 60 1c st %g3, [ %i1 + 0x1c ]
40006f00: c8 26 60 18 st %g4, [ %i1 + 0x18 ]
40006f04: 10 bf ff e3 b 40006e90 <rtems_rate_monotonic_get_status+0x6c>
40006f08: f8 26 60 20 st %i4, [ %i1 + 0x20 ]
}
40006f0c: 81 c7 e0 08 ret
40006f10: 91 e8 00 02 restore %g0, %g2, %o0
4000739c <rtems_rate_monotonic_period>:
rtems_status_code rtems_rate_monotonic_period(
rtems_id id,
rtems_interval length
)
{
4000739c: 9d e3 bf 98 save %sp, -104, %sp
return (Rate_monotonic_Control *)
400073a0: 15 10 00 7a sethi %hi(0x4001e800), %o2
400073a4: 92 07 bf fc add %fp, -4, %o1
400073a8: 94 12 a2 98 or %o2, 0x298, %o2
400073ac: 40 00 0b cc call 4000a2dc <_Objects_Get>
400073b0: 90 10 00 18 mov %i0, %o0
Thread_Control *executing;
rtems_status_code status;
rtems_rate_monotonic_period_states state;
the_period = _Rate_monotonic_Get( id, &lock_context );
if ( the_period == NULL ) {
400073b4: ba 92 20 00 orcc %o0, 0, %i5
400073b8: 02 80 00 50 be 400074f8 <rtems_rate_monotonic_period+0x15c>
400073bc: 01 00 00 00 nop
return RTEMS_INVALID_ID;
}
executing = _Thread_Executing;
if ( executing != the_period->owner ) {
400073c0: f8 07 60 54 ld [ %i5 + 0x54 ], %i4
400073c4: c2 01 a0 20 ld [ %g6 + 0x20 ], %g1
400073c8: 80 a7 00 01 cmp %i4, %g1
400073cc: 22 80 00 07 be,a 400073e8 <rtems_rate_monotonic_period+0x4c>
400073d0: 80 a6 60 00 cmp %i1, 0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400073d4: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400073d8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400073dc: 01 00 00 00 nop
_ISR_lock_ISR_enable( &lock_context );
return RTEMS_NOT_OWNER_OF_RESOURCE;
400073e0: 81 c7 e0 08 ret
400073e4: 91 e8 20 17 restore %g0, 0x17, %o0
_Rate_monotonic_Acquire_critical( the_period, &lock_context );
state = the_period->state;
if ( length == RTEMS_PERIOD_STATUS ) {
400073e8: 12 80 00 0e bne 40007420 <rtems_rate_monotonic_period+0x84>
400073ec: f6 07 60 30 ld [ %i5 + 0x30 ], %i3
switch ( state ) {
400073f0: 80 a6 e0 00 cmp %i3, 0
400073f4: 02 80 00 06 be 4000740c <rtems_rate_monotonic_period+0x70>
400073f8: b0 10 20 0b mov 0xb, %i0
return RTEMS_SUCCESSFUL;
400073fc: b6 1e e0 02 xor %i3, 2, %i3
<== NOT EXECUTED
40007400: 80 a0 00 1b cmp %g0, %i3
<== NOT EXECUTED
40007404: b0 40 3f ff addx %g0, -1, %i0
<== NOT EXECUTED
40007408: b0 0e 20 06 and %i0, 6, %i0
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000740c: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007410: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007414: 01 00 00 00 nop
40007418: 81 c7 e0 08 ret
4000741c: 81 e8 00 00 restore
status = _Rate_monotonic_Get_status_for_state( state );
_Rate_monotonic_Release( the_period, &lock_context );
} else {
switch ( state ) {
40007420: 80 a6 e0 00 cmp %i3, 0
40007424: 02 80 00 2b be 400074d0 <rtems_rate_monotonic_period+0x134>
40007428: 80 a6 e0 01 cmp %i3, 1
4000742c: 12 80 00 35 bne 40007500 <rtems_rate_monotonic_period+0x164>
40007430: 82 10 20 02 mov 2, %g1
case RATE_MONOTONIC_ACTIVE:
if( the_period->postponed_jobs > 0 ){
40007434: c2 07 60 a0 ld [ %i5 + 0xa0 ], %g1
40007438: 80 a0 60 00 cmp %g1, 0
4000743c: 12 80 00 3d bne 40007530 <rtems_rate_monotonic_period+0x194>
40007440: 82 10 20 02 mov 2, %g1
_Rate_monotonic_Update_statistics( the_period );
40007444: 7f ff ff 4b call 40007170 <_Rate_monotonic_Update_statistics>
40007448: 01 00 00 00 nop
the_period->next_length = length;
4000744c: f2 27 60 50 st %i1, [ %i5 + 0x50 ]
<== NOT EXECUTED
)
{
#if defined(RTEMS_SMP)
_Atomic_Store_uint( &the_thread->Wait.flags, flags, ATOMIC_ORDER_RELAXED );
#else
the_thread->Wait.flags = flags;
40007450: 84 10 28 01 mov 0x801, %g2
<== NOT EXECUTED
disable_level = cpu_self->thread_dispatch_disable_level;
40007454: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
executing->Wait.return_argument = the_period;
40007458: fa 27 20 40 st %i5, [ %i4 + 0x40 ]
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
4000745c: 82 00 60 01 inc %g1
<== NOT EXECUTED
40007460: c4 27 20 50 st %g2, [ %i4 + 0x50 ]
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40007464: b6 10 00 06 mov %g6, %i3
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40007468: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000746c: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007470: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007474: 01 00 00 00 nop
_Thread_Set_state( executing, STATES_WAITING_FOR_PERIOD );
40007478: 92 10 22 00 mov 0x200, %o1 ! 200 <SPARC_THREAD_CONTROL_FP_CONTEXT_OFFSET+0xb0>
4000747c: 40 00 18 76 call 4000d654 <_Thread_Set_state>
40007480: 90 10 00 1c mov %i4, %o0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007484: 91 d0 20 09 ta 9
<== NOT EXECUTED
desired_flags,
ATOMIC_ORDER_RELEASE,
ATOMIC_ORDER_RELAXED
);
#else
bool success = ( the_thread->Wait.flags == expected_flags );
40007488: c4 07 20 50 ld [ %i4 + 0x50 ], %g2
if ( success ) {
4000748c: 80 a0 a8 01 cmp %g2, 0x801
40007490: 12 80 00 03 bne 4000749c <rtems_rate_monotonic_period+0x100>
40007494: 86 10 28 02 mov 0x802, %g3
the_thread->Wait.flags = desired_flags;
40007498: c6 27 20 50 st %g3, [ %i4 + 0x50 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000749c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400074a0: 01 00 00 00 nop
if ( !success ) {
400074a4: 80 a0 a8 01 cmp %g2, 0x801
400074a8: 02 80 00 05 be 400074bc <rtems_rate_monotonic_period+0x120>
400074ac: 13 0c 00 57 sethi %hi(0x30015c00), %o1
_Thread_Clear_state( the_thread, STATES_BLOCKED );
400074b0: 90 10 00 1c mov %i4, %o0
400074b4: 40 00 11 42 call 4000b9bc <_Thread_Clear_state>
400074b8: 92 12 63 ff or %o1, 0x3ff, %o1
_Thread_Dispatch_direct( cpu_self );
400074bc: 90 10 00 1b mov %i3, %o0
400074c0: 40 00 11 e1 call 4000bc44 <_Thread_Dispatch_direct>
400074c4: b0 10 20 00 clr %i0
400074c8: 81 c7 e0 08 ret
400074cc: 81 e8 00 00 restore
the_period->state = RATE_MONOTONIC_ACTIVE;
400074d0: 82 10 20 01 mov 1, %g1
the_period->postponed_jobs = 0;
400074d4: c0 27 60 a0 clr [ %i5 + 0xa0 ]
_Rate_monotonic_Restart( the_period, executing, lock_context );
400074d8: 94 07 bf fc add %fp, -4, %o2
the_period->next_length = length;
400074dc: f2 27 60 50 st %i1, [ %i5 + 0x50 ]
_Rate_monotonic_Restart( the_period, executing, lock_context );
400074e0: 92 10 00 1c mov %i4, %o1
the_period->state = RATE_MONOTONIC_ACTIVE;
400074e4: c2 27 60 30 st %g1, [ %i5 + 0x30 ]
_Rate_monotonic_Restart( the_period, executing, lock_context );
400074e8: 7f ff ff 71 call 400072ac <_Rate_monotonic_Restart>
400074ec: b0 10 20 00 clr %i0
the_period,
length,
executing,
&lock_context
);
break;
400074f0: 81 c7 e0 08 ret
400074f4: 81 e8 00 00 restore
break;
}
}
return status;
}
400074f8: 81 c7 e0 08 ret
400074fc: 91 e8 20 04 restore %g0, 4, %o0
the_period->state = RATE_MONOTONIC_EXPIRED;
40007500: c2 27 60 30 st %g1, [ %i5 + 0x30 ]
_Rate_monotonic_Update_statistics( the_period );
40007504: 7f ff ff 1b call 40007170 <_Rate_monotonic_Update_statistics>
40007508: b0 10 20 06 mov 6, %i0
the_period->state = RATE_MONOTONIC_ACTIVE;
4000750c: 82 10 20 01 mov 1, %g1
the_period->next_length = length;
40007510: f2 27 60 50 st %i1, [ %i5 + 0x50 ]
_Rate_monotonic_Release_postponed_job(
40007514: 94 07 bf fc add %fp, -4, %o2
the_period->state = RATE_MONOTONIC_ACTIVE;
40007518: c2 27 60 30 st %g1, [ %i5 + 0x30 ]
_Rate_monotonic_Release_postponed_job(
4000751c: 92 10 00 1c mov %i4, %o1
40007520: 7f ff fe d9 call 40007084 <_Rate_monotonic_Release_postponed_job.isra.17.constprop.18>
40007524: 90 10 00 1d mov %i5, %o0
break;
40007528: 81 c7 e0 08 ret
4000752c: 81 e8 00 00 restore
the_period->state = RATE_MONOTONIC_EXPIRED;
40007530: c2 27 60 30 st %g1, [ %i5 + 0x30 ]
_Rate_monotonic_Update_statistics( the_period );
40007534: 7f ff ff 0f call 40007170 <_Rate_monotonic_Update_statistics>
40007538: b0 10 20 06 mov 6, %i0
the_period->state = RATE_MONOTONIC_ACTIVE;
4000753c: f6 27 60 30 st %i3, [ %i5 + 0x30 ]
_Rate_monotonic_Release_postponed_job(
40007540: 94 07 bf fc add %fp, -4, %o2
the_period->next_length = length;
40007544: f2 27 60 50 st %i1, [ %i5 + 0x50 ]
_Rate_monotonic_Release_postponed_job(
40007548: 92 10 00 1c mov %i4, %o1
4000754c: 7f ff fe ce call 40007084 <_Rate_monotonic_Release_postponed_job.isra.17.constprop.18>
40007550: 90 10 00 1d mov %i5, %o0
40007554: 81 c7 e0 08 ret
40007558: 81 e8 00 00 restore
400087d8 <rtems_region_get_segment>:
uintptr_t size,
rtems_option option_set,
rtems_interval timeout,
void **segment
)
{
400087d8: 9d e3 bf 78 save %sp, -136, %sp
rtems_status_code status;
Region_Control *the_region;
if ( segment == NULL ) {
400087dc: 80 a7 20 00 cmp %i4, 0
400087e0: 02 80 00 33 be 400088ac <rtems_region_get_segment+0xd4>
400087e4: 80 a6 60 00 cmp %i1, 0
return RTEMS_INVALID_ADDRESS;
}
*segment = NULL;
400087e8: c0 27 00 00 clr [ %i4 ]
if ( size == 0 ) {
400087ec: 02 80 00 1a be 40008854 <rtems_region_get_segment+0x7c>
400087f0: ba 10 20 08 mov 8, %i5
_RTEMS_Lock_allocator();
400087f4: 40 00 02 4e call 4000912c <_RTEMS_Lock_allocator>
400087f8: 01 00 00 00 nop
the_region = (Region_Control *)
400087fc: 90 10 00 18 mov %i0, %o0
40008800: 13 10 00 70 sethi %hi(0x4001c000), %o1
40008804: 40 00 0c 66 call 4000b99c <_Objects_Get_no_protection>
40008808: 92 12 60 c0 or %o1, 0xc0, %o1 ! 4001c0c0 <_Region_Information>
if ( the_region != NULL ) {
4000880c: b0 92 20 00 orcc %o0, 0, %i0
40008810: 02 80 00 2a be 400088b8 <rtems_region_get_segment+0xe0>
40008814: 01 00 00 00 nop
if ( the_region == NULL ) {
return RTEMS_INVALID_ID;
}
if ( size > the_region->maximum_segment_size ) {
40008818: c2 06 20 20 ld [ %i0 + 0x20 ], %g1
4000881c: 80 a0 40 19 cmp %g1, %i1
40008820: 0a 80 00 0b bcs 4000884c <rtems_region_get_segment+0x74>
40008824: 96 10 20 00 clr %o3
* @brief See _Heap_Allocate_aligned_with_boundary() with alignment and
* boundary equals zero.
*/
RTEMS_INLINE_ROUTINE void *_Heap_Allocate( Heap_Control *heap, uintptr_t size )
{
return _Heap_Allocate_aligned_with_boundary( heap, size, 0, 0 );
40008828: 94 10 20 00 clr %o2
4000882c: 92 10 00 19 mov %i1, %o1
40008830: 40 00 02 b5 call 40009304 <_Heap_Allocate_aligned_with_boundary>
40008834: 90 06 20 28 add %i0, 0x28, %o0
} else {
void *the_segment;
the_segment = _Region_Allocate_segment( the_region, size );
if ( the_segment != NULL ) {
40008838: 80 a2 20 00 cmp %o0, 0
4000883c: 02 80 00 08 be 4000885c <rtems_region_get_segment+0x84>
40008840: 80 8e a0 01 btst 1, %i2
*segment = the_segment;
40008844: d0 27 00 00 st %o0, [ %i4 ]
status = RTEMS_SUCCESSFUL;
40008848: ba 10 20 00 clr %i5
_RTEMS_Unlock_allocator();
4000884c: 40 00 02 3d call 40009140 <_RTEMS_Unlock_allocator>
40008850: 01 00 00 00 nop
}
}
_Region_Unlock( the_region );
return status;
}
40008854: 81 c7 e0 08 ret
40008858: 91 e8 00 1d restore %g0, %i5, %o0
} else if ( _Options_Is_no_wait( option_set ) ) {
4000885c: 12 bf ff fc bne 4000884c <rtems_region_get_segment+0x74>
40008860: ba 10 20 0d mov 0xd, %i5
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40008864: 91 d0 20 09 ta 9
<== NOT EXECUTED
Thread_queue_Control *the_thread_queue,
Thread_queue_Context *queue_context
)
{
(void) the_thread_queue;
_ISR_lock_ISR_disable( &queue_context->Lock_context.Lock_context );
40008868: c2 27 bf dc st %g1, [ %fp + -36 ]
executing = _Thread_Executing;
4000886c: fa 01 a0 20 ld [ %g6 + 0x20 ], %i5
executing->Wait.count = size;
40008870: f2 27 60 3c st %i1, [ %i5 + 0x3c ]
queue_context->thread_state = thread_state;
40008874: 03 00 00 40 sethi %hi(0x10000), %g1
executing->Wait.return_argument = segment;
40008878: f8 27 60 40 st %i4, [ %i5 + 0x40 ]
_Thread_queue_Enqueue(
4000887c: 94 10 00 1d mov %i5, %o2
40008880: c2 27 bf e0 st %g1, [ %fp + -32 ]
queue_context->enqueue_callout = enqueue_callout;
40008884: 03 10 00 21 sethi %hi(0x40008400), %g1
40008888: d2 06 20 1c ld [ %i0 + 0x1c ], %o1
4000888c: 82 10 63 b8 or %g1, 0x3b8, %g1
40008890: 96 07 bf dc add %fp, -36, %o3
queue_context->Timeout.ticks = ticks;
40008894: f6 27 bf e8 st %i3, [ %fp + -24 ]
40008898: 90 06 20 10 add %i0, 0x10, %o0
4000889c: 40 00 13 e9 call 4000d840 <_Thread_queue_Enqueue>
400088a0: c2 27 bf e4 st %g1, [ %fp + -28 ]
RTEMS_INLINE_ROUTINE rtems_status_code _Status_Get(
Status_Control status
)
{
return (rtems_status_code) STATUS_GET_CLASSIC( status );
400088a4: 10 bf ff ec b 40008854 <rtems_region_get_segment+0x7c>
400088a8: fa 0f 60 4f ldub [ %i5 + 0x4f ], %i5
return RTEMS_INVALID_ADDRESS;
400088ac: ba 10 20 09 mov 9, %i5
}
400088b0: 81 c7 e0 08 ret
400088b4: 91 e8 00 1d restore %g0, %i5, %o0
_RTEMS_Unlock_allocator();
400088b8: 40 00 02 22 call 40009140 <_RTEMS_Unlock_allocator>
400088bc: ba 10 20 04 mov 4, %i5
400088c0: 30 bf ff e5 b,a 40008854 <rtems_region_get_segment+0x7c>
400068f0 <rtems_region_resize_segment>:
rtems_id id,
void *segment,
uintptr_t size,
uintptr_t *old_size
)
{
400068f0: 9d e3 bf 98 save %sp, -104, %sp
uintptr_t osize;
rtems_status_code status;
Heap_Resize_status resize_status;
Region_Control *the_region;
if ( old_size == NULL ) {
400068f4: 80 a6 e0 00 cmp %i3, 0
400068f8: 02 80 00 1a be 40006960 <rtems_region_resize_segment+0x70>
400068fc: ba 10 20 09 mov 9, %i5
_RTEMS_Lock_allocator();
40006900: 40 00 01 9d call 40006f74 <_RTEMS_Lock_allocator>
40006904: 01 00 00 00 nop
the_region = (Region_Control *)
40006908: 90 10 00 18 mov %i0, %o0
4000690c: 13 10 00 51 sethi %hi(0x40014400), %o1
40006910: 40 00 0b 3c call 40009600 <_Objects_Get_no_protection>
40006914: 92 12 63 e0 or %o1, 0x3e0, %o1 ! 400147e0 <_Region_Information>
if ( the_region != NULL ) {
40006918: ba 92 20 00 orcc %o0, 0, %i5
4000691c: 02 80 00 18 be 4000697c <rtems_region_resize_segment+0x8c>
40006920: 98 07 bf f8 add %fp, -8, %o4
if ( the_region == NULL ) {
return RTEMS_INVALID_ID;
}
resize_status = _Heap_Resize_block(
40006924: 96 07 bf fc add %fp, -4, %o3
40006928: 94 10 00 1a mov %i2, %o2
4000692c: 92 10 00 19 mov %i1, %o1
40006930: 40 00 04 19 call 40007994 <_Heap_Resize_block>
40006934: 90 07 60 28 add %i5, 0x28, %o0
segment,
(uint32_t) size,
&osize,
&avail_size
);
*old_size = (uint32_t) osize;
40006938: c2 07 bf fc ld [ %fp + -4 ], %g1
switch ( resize_status ) {
4000693c: 80 a2 20 00 cmp %o0, 0
40006940: 02 80 00 0a be 40006968 <rtems_region_resize_segment+0x78>
40006944: c2 26 c0 00 st %g1, [ %i3 ]
40006948: 80 a2 20 01 cmp %o0, 1
4000694c: 02 80 00 03 be 40006958 <rtems_region_resize_segment+0x68>
<== NEVER TAKEN
40006950: ba 10 20 0d mov 0xd, %i5
case HEAP_RESIZE_UNSATISFIED:
status = RTEMS_UNSATISFIED;
break;
default:
status = RTEMS_INVALID_ADDRESS;
40006954: ba 10 20 09 mov 9, %i5
_RTEMS_Unlock_allocator();
40006958: 40 00 01 8c call 40006f88 <_RTEMS_Unlock_allocator>
4000695c: 01 00 00 00 nop
break;
}
_Region_Unlock( the_region );
return status;
}
40006960: 81 c7 e0 08 ret
40006964: 91 e8 00 1d restore %g0, %i5, %o0
_Region_Process_queue( the_region );
40006968: 90 10 00 1d mov %i5, %o0
4000696c: 40 00 1f 33 call 4000e638 <_Region_Process_queue>
40006970: ba 10 20 00 clr %i5
}
40006974: 81 c7 e0 08 ret
40006978: 91 e8 00 1d restore %g0, %i5, %o0
_RTEMS_Unlock_allocator();
4000697c: 40 00 01 83 call 40006f88 <_RTEMS_Unlock_allocator>
40006980: ba 10 20 04 mov 4, %i5
40006984: 30 bf ff f7 b,a 40006960 <rtems_region_resize_segment+0x70>
400083dc <rtems_scheduler_ident>:
size_t n = _Scheduler_Count;
size_t i;
sc = RTEMS_INVALID_NAME;
for ( i = 0 ; i < n && sc == RTEMS_INVALID_NAME ; ++i ) {
400083dc: 84 10 20 00 clr %g2
if ( id != NULL ) {
400083e0: 80 a2 60 00 cmp %o1, 0
400083e4: 02 80 00 17 be 40008440 <rtems_scheduler_ident+0x64>
400083e8: 82 10 20 03 mov 3, %g1
const Scheduler_Control *scheduler = &_Scheduler_Table[ i ];
if ( scheduler->name == name ) {
400083ec: 09 10 00 4e sethi %hi(0x40013800), %g4
*id = _Scheduler_Build_id( i );
400083f0: 1b 03 c0 40 sethi %hi(0xf010000), %o5
if ( scheduler->name == name ) {
400083f4: 88 11 22 18 or %g4, 0x218, %g4
*id = _Scheduler_Build_id( i );
400083f8: 9a 13 60 01 or %o5, 1, %o5
for ( i = 0 ; i < n && sc == RTEMS_INVALID_NAME ; ++i ) {
400083fc: 80 a0 a0 00 cmp %g2, 0
40008400: 12 80 00 0e bne 40008438 <rtems_scheduler_ident+0x5c>
40008404: 01 00 00 00 nop
40008408: 80 a0 60 03 cmp %g1, 3
4000840c: 12 80 00 0b bne 40008438 <rtems_scheduler_ident+0x5c>
<== NEVER TAKEN
40008410: 01 00 00 00 nop
if ( scheduler->name == name ) {
40008414: c6 01 20 48 ld [ %g4 + 0x48 ], %g3
40008418: 82 10 20 03 mov 3, %g1
4000841c: 80 a0 c0 08 cmp %g3, %o0
40008420: 12 bf ff f7 bne 400083fc <rtems_scheduler_ident+0x20>
40008424: 84 10 20 01 mov 1, %g2
*id = _Scheduler_Build_id( i );
40008428: da 22 40 00 st %o5, [ %o1 ]
for ( i = 0 ; i < n && sc == RTEMS_INVALID_NAME ; ++i ) {
4000842c: 80 a0 a0 00 cmp %g2, 0
40008430: 02 bf ff f6 be 40008408 <rtems_scheduler_ident+0x2c>
<== NEVER TAKEN
40008434: 82 10 20 00 clr %g1
} else {
sc = RTEMS_INVALID_ADDRESS;
}
return sc;
}
40008438: 81 c3 e0 08 retl
4000843c: 90 10 00 01 mov %g1, %o0
sc = RTEMS_INVALID_ADDRESS;
40008440: 82 10 20 09 mov 9, %g1
}
40008444: 81 c3 e0 08 retl
40008448: 90 10 00 01 mov %g1, %o0
40008364 <rtems_scheduler_ident_by_processor_set>:
rtems_status_code rtems_scheduler_ident_by_processor_set(
size_t cpusetsize,
const cpu_set_t *cpuset,
rtems_id *id
)
{
40008364: 9d e3 bf 98 save %sp, -104, %sp
Processor_mask set;
Processor_mask_Copy_status status;
uint32_t cpu_index;
const Scheduler_Control *scheduler;
if ( id == NULL ) {
40008368: 80 a6 a0 00 cmp %i2, 0
4000836c: 02 80 00 17 be 400083c8 <rtems_scheduler_ident_by_processor_set+0x64>
40008370: ba 10 20 09 mov 9, %i5
Processor_mask *dst,
size_t src_size,
const cpu_set_t *src
)
{
return _Processor_mask_Copy(
40008374: 96 10 00 18 mov %i0, %o3
40008378: 94 10 00 19 mov %i1, %o2
4000837c: 92 10 20 04 mov 4, %o1
40008380: 40 00 10 23 call 4000c40c <_Processor_mask_Copy>
40008384: 90 07 bf fc add %fp, -4, %o0
return RTEMS_INVALID_ADDRESS;
}
status = _Processor_mask_From_cpu_set_t( &set, cpusetsize, cpuset );
if ( status == PROCESSOR_MASK_COPY_INVALID_SIZE ) {
40008388: 80 a2 20 03 cmp %o0, 3
4000838c: 02 80 00 11 be 400083d0 <rtems_scheduler_ident_by_processor_set+0x6c>
40008390: d0 07 bf fc ld [ %fp + -4 ], %o0
BIT_AND2( CPU_MAXIMUM_PROCESSORS, a, b, c );
40008394: 03 10 00 4f sethi %hi(0x40013c00), %g1
40008398: c2 00 63 d8 ld [ %g1 + 0x3d8 ], %g1 ! 40013fd8 <_Processor_mask_The_one_and_only>
return (uint32_t) BIT_FLS( CPU_MAXIMUM_PROCESSORS, a );
4000839c: 90 8a 00 01 andcc %o0, %g1, %o0
400083a0: 02 80 00 0a be 400083c8 <rtems_scheduler_ident_by_processor_set+0x64>
400083a4: ba 10 20 03 mov 3, %i5
400083a8: 40 00 27 8e call 400121e0 <flsl>
400083ac: 01 00 00 00 nop
return RTEMS_INVALID_SIZE;
}
_Processor_mask_And( &set, &set, _SMP_Get_online_processors() );
cpu_index = _Processor_mask_Find_last_set( &set );
if ( cpu_index == 0 ) {
400083b0: 80 a2 20 00 cmp %o0, 0
400083b4: 02 80 00 05 be 400083c8 <rtems_scheduler_ident_by_processor_set+0x64>
<== NEVER TAKEN
400083b8: 03 03 c0 40 sethi %hi(0xf010000), %g1
}
#else
_Assert( scheduler != NULL );
#endif
*id = _Scheduler_Build_id( _Scheduler_Get_index( scheduler ) );
400083bc: 82 10 60 01 or %g1, 1, %g1 ! f010001 <RAM_SIZE+0xec10001>
400083c0: c2 26 80 00 st %g1, [ %i2 ]
return RTEMS_SUCCESSFUL;
400083c4: ba 10 20 00 clr %i5
}
400083c8: 81 c7 e0 08 ret
400083cc: 91 e8 00 1d restore %g0, %i5, %o0
return RTEMS_INVALID_SIZE;
400083d0: ba 10 20 08 mov 8, %i5
}
400083d4: 81 c7 e0 08 ret
400083d8: 91 e8 00 1d restore %g0, %i5, %o0
40008e00 <rtems_semaphore_create>:
uint32_t count,
rtems_attribute attribute_set,
rtems_task_priority priority_ceiling,
rtems_id *id
)
{
40008e00: 9d e3 bf 70 save %sp, -144, %sp
Semaphore_Variant variant;
const Scheduler_Control *scheduler;
bool valid;
Priority_Control priority;
if ( !rtems_is_name_valid( name ) )
40008e04: 80 a6 20 00 cmp %i0, 0
40008e08: 02 80 00 3b be 40008ef4 <rtems_semaphore_create+0xf4>
40008e0c: 82 10 20 03 mov 3, %g1
return RTEMS_INVALID_NAME;
if ( !id )
40008e10: 80 a7 20 00 cmp %i4, 0
40008e14: 02 80 00 74 be 40008fe4 <rtems_semaphore_create+0x1e4>
40008e18: 84 8e a1 f0 andcc %i2, 0x1f0, %g2
/* Attribute subset defining a mutex variant with a locking protocol */
mutex_with_protocol =
attribute_set & ( SEMAPHORE_KIND_MASK | RTEMS_GLOBAL | RTEMS_PRIORITY );
if ( maybe_global == RTEMS_COUNTING_SEMAPHORE ) {
40008e1c: 02 80 00 12 be 40008e64 <rtems_semaphore_create+0x64>
40008e20: 80 a6 60 01 cmp %i1, 1
variant = SEMAPHORE_VARIANT_COUNTING;
} else if ( count > 1 ) {
40008e24: 18 80 00 34 bgu 40008ef4 <rtems_semaphore_create+0xf4>
40008e28: 82 10 20 0a mov 0xa, %g1
/*
* The remaining variants are all binary semphores, thus reject an invalid
* count value.
*/
return RTEMS_INVALID_NUMBER;
} else if ( maybe_global == RTEMS_SIMPLE_BINARY_SEMAPHORE ) {
40008e2c: 80 a0 a0 20 cmp %g2, 0x20
40008e30: 02 80 00 33 be 40008efc <rtems_semaphore_create+0xfc>
40008e34: 80 a0 a0 10 cmp %g2, 0x10
variant = SEMAPHORE_VARIANT_SIMPLE_BINARY;
} else if ( maybe_global == RTEMS_BINARY_SEMAPHORE ) {
40008e38: 02 80 00 6e be 40008ff0 <rtems_semaphore_create+0x1f0>
40008e3c: 84 0e a1 f6 and %i2, 0x1f6, %g2
variant = SEMAPHORE_VARIANT_MUTEX_NO_PROTOCOL;
} else if (
40008e40: 80 a0 a0 54 cmp %g2, 0x54
40008e44: 02 80 00 71 be 40009008 <rtems_semaphore_create+0x208>
40008e48: 80 a0 a0 94 cmp %g2, 0x94
} else if (
mutex_with_protocol
== ( RTEMS_BINARY_SEMAPHORE | RTEMS_PRIORITY | RTEMS_PRIORITY_CEILING )
) {
variant = SEMAPHORE_VARIANT_MUTEX_PRIORITY_CEILING;
} else if (
40008e4c: 02 80 00 04 be 40008e5c <rtems_semaphore_create+0x5c>
40008e50: 80 a0 a1 10 cmp %g2, 0x110
40008e54: 12 80 00 28 bne 40008ef4 <rtems_semaphore_create+0xf4>
40008e58: 82 10 20 0b mov 0xb, %g1
40008e5c: 10 80 00 03 b 40008e68 <rtems_semaphore_create+0x68>
40008e60: a0 10 20 01 mov 1, %l0
variant = SEMAPHORE_VARIANT_COUNTING;
40008e64: a0 10 20 04 mov 4, %l0
* This function allocates a semaphore control block from
* the inactive chain of free semaphore control blocks.
*/
RTEMS_INLINE_ROUTINE Semaphore_Control *_Semaphore_Allocate( void )
{
return (Semaphore_Control *) _Objects_Allocate( &_Semaphore_Information );
40008e68: 23 10 00 61 sethi %hi(0x40018400), %l1
40008e6c: 40 00 0c 7b call 4000c058 <_Objects_Allocate>
40008e70: 90 14 62 f0 or %l1, 0x2f0, %o0 ! 400186f0 <_Semaphore_Information>
return RTEMS_NOT_DEFINED;
}
the_semaphore = _Semaphore_Allocate();
if ( !the_semaphore ) {
40008e74: ba 92 20 00 orcc %o0, 0, %i5
40008e78: 02 80 00 60 be 40008ff8 <rtems_semaphore_create+0x1f8>
40008e7c: 84 0c 20 07 and %l0, 7, %g2
}
#endif
executing = _Thread_Get_executing();
the_semaphore->variant = variant;
40008e80: c2 0f 60 38 ldub [ %i5 + 0x38 ], %g1
40008e84: e4 01 a0 20 ld [ %g6 + 0x20 ], %l2
40008e88: 82 08 60 1f and %g1, 0x1f, %g1
40008e8c: 87 28 a0 05 sll %g2, 5, %g3
40008e90: 82 10 40 03 or %g1, %g3, %g1
if ( _Attributes_Is_priority( attribute_set ) ) {
40008e94: 80 8e a0 04 btst 4, %i2
40008e98: 02 80 00 1b be 40008f04 <rtems_semaphore_create+0x104>
40008e9c: c2 2f 60 38 stb %g1, [ %i5 + 0x38 ]
the_semaphore->discipline = SEMAPHORE_DISCIPLINE_PRIORITY;
40008ea0: 82 08 7f ef and %g1, -17, %g1
} else {
the_semaphore->discipline = SEMAPHORE_DISCIPLINE_FIFO;
}
switch ( the_semaphore->variant ) {
40008ea4: 84 08 a0 ff and %g2, 0xff, %g2
40008ea8: 80 a0 a0 01 cmp %g2, 1
40008eac: 02 80 00 1b be 40008f18 <rtems_semaphore_create+0x118>
40008eb0: c2 2f 60 38 stb %g1, [ %i5 + 0x38 ]
40008eb4: 0a 80 00 45 bcs 40008fc8 <rtems_semaphore_create+0x1c8>
40008eb8: 80 a0 a0 02 cmp %g2, 2
40008ebc: 02 80 00 43 be 40008fc8 <rtems_semaphore_create+0x1c8>
40008ec0: 92 10 00 19 mov %i1, %o1
default:
_Assert(
the_semaphore->variant == SEMAPHORE_VARIANT_SIMPLE_BINARY
|| the_semaphore->variant == SEMAPHORE_VARIANT_COUNTING
);
_CORE_semaphore_Initialize(
40008ec4: 40 00 05 1b call 4000a330 <_CORE_semaphore_Initialize>
40008ec8: 90 07 60 10 add %i5, 0x10, %o0
information->local_table[ index ] = the_object;
40008ecc: c2 17 60 0a lduh [ %i5 + 0xa ], %g1
the_object->name = name;
40008ed0: f0 27 60 0c st %i0, [ %i5 + 0xc ]
information->local_table[ index ] = the_object;
40008ed4: a2 14 62 f0 or %l1, 0x2f0, %l1
40008ed8: c6 04 60 1c ld [ %l1 + 0x1c ], %g3
40008edc: c4 07 60 08 ld [ %i5 + 8 ], %g2
40008ee0: 83 28 60 02 sll %g1, 2, %g1
40008ee4: fa 20 c0 01 st %i5, [ %g3 + %g1 ]
_RTEMS_Unlock_allocator();
40008ee8: 40 00 04 be call 4000a1e0 <_RTEMS_Unlock_allocator>
40008eec: c4 27 00 00 st %g2, [ %i4 ]
name,
0 /* Not used */
);
#endif
_Objects_Allocator_unlock();
return RTEMS_SUCCESSFUL;
40008ef0: 82 10 20 00 clr %g1
}
40008ef4: 81 c7 e0 08 ret
40008ef8: 91 e8 00 01 restore %g0, %g1, %o0
variant = SEMAPHORE_VARIANT_SIMPLE_BINARY;
40008efc: 10 bf ff db b 40008e68 <rtems_semaphore_create+0x68>
40008f00: a0 10 20 03 mov 3, %l0
the_semaphore->discipline = SEMAPHORE_DISCIPLINE_FIFO;
40008f04: 82 10 60 10 or %g1, 0x10, %g1
switch ( the_semaphore->variant ) {
40008f08: 84 08 a0 ff and %g2, 0xff, %g2
40008f0c: 80 a0 a0 01 cmp %g2, 1
40008f10: 12 bf ff e9 bne 40008eb4 <rtems_semaphore_create+0xb4>
40008f14: c2 2f 60 38 stb %g1, [ %i5 + 0x38 ]
const Scheduler_Control *scheduler,
rtems_task_priority priority,
bool *valid
)
{
*valid = ( priority <= scheduler->maximum_priority );
40008f18: 11 10 00 4f sethi %hi(0x40013c00), %o0
40008f1c: 90 12 21 b0 or %o0, 0x1b0, %o0 ! 40013db0 <_Scheduler_Table>
RTEMS_INLINE_ROUTINE Priority_Control _Scheduler_Map_priority(
const Scheduler_Control *scheduler,
Priority_Control priority
)
{
return ( *scheduler->Operations.map_priority )( scheduler, priority );
40008f20: c2 02 20 1c ld [ %o0 + 0x1c ], %g1
40008f24: f4 02 20 40 ld [ %o0 + 0x40 ], %i2
40008f28: e0 02 20 44 ld [ %o0 + 0x44 ], %l0
40008f2c: 92 10 20 00 clr %o1
40008f30: 9f c0 40 00 call %g1
40008f34: 94 10 00 1b mov %i3, %o2
if ( valid ) {
40008f38: 80 a6 a0 00 cmp %i2, 0
40008f3c: a8 10 00 08 mov %o0, %l4
40008f40: 02 80 00 34 be 40009010 <rtems_semaphore_create+0x210>
<== ALWAYS TAKEN
40008f44: aa 10 00 09 mov %o1, %l5
RTEMS_INLINE_ROUTINE void _CORE_mutex_Initialize(
CORE_mutex_Control *the_mutex
)
{
_Thread_queue_Object_initialize( &the_mutex->Wait_queue );
40008f48: 40 00 16 d2 call 4000ea90 <_Thread_queue_Object_initialize>
40008f4c: 90 07 60 10 add %i5, 0x10, %o0
RTEMS_INLINE_ROUTINE void _CORE_recursive_mutex_Initialize(
CORE_recursive_mutex_Control *the_mutex
)
{
_CORE_mutex_Initialize( &the_mutex->Mutex );
the_mutex->nest_level = 0;
40008f50: c0 27 60 1c clr [ %i5 + 0x1c ]
if ( count == 0 ) {
40008f54: 80 a6 60 00 cmp %i1, 0
40008f58: 12 bf ff dd bne 40008ecc <rtems_semaphore_create+0xcc>
40008f5c: e8 3f 60 30 std %l4, [ %i5 + 0x30 ]
RTEMS_INLINE_ROUTINE void _Thread_queue_Context_clear_priority_updates(
Thread_queue_Context *queue_context
)
{
queue_context->Priority.update_count = 0;
40008f60: c0 27 bf f0 clr [ %fp + -16 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40008f64: 91 d0 20 09 ta 9
<== NOT EXECUTED
_ISR_lock_ISR_disable( &queue_context.Lock_context.Lock_context );
40008f68: c2 27 bf dc st %g1, [ %fp + -36 ]
_Thread_Wait_acquire_default_critical( owner, &lock_context );
scheduler_node = _Thread_Scheduler_get_home_node( owner );
if (
40008f6c: c2 04 a0 38 ld [ %l2 + 0x38 ], %g1
40008f70: c6 07 60 30 ld [ %i5 + 0x30 ], %g3
40008f74: c4 00 60 18 ld [ %g1 + 0x18 ], %g2
40008f78: 80 a0 c0 02 cmp %g3, %g2
40008f7c: 18 80 00 09 bgu 40008fa0 <rtems_semaphore_create+0x1a0>
<== NEVER TAKEN
40008f80: 01 00 00 00 nop
40008f84: 32 80 00 27 bne,a 40009020 <rtems_semaphore_create+0x220>
<== NEVER TAKEN
40008f88: e4 27 60 14 st %l2, [ %i5 + 0x14 ]
<== NOT EXECUTED
40008f8c: c4 07 60 34 ld [ %i5 + 0x34 ], %g2
40008f90: c2 00 60 1c ld [ %g1 + 0x1c ], %g1
40008f94: 80 a0 80 01 cmp %g2, %g1
40008f98: 28 80 00 22 bleu,a 40009020 <rtems_semaphore_create+0x220>
40008f9c: e4 27 60 14 st %l2, [ %i5 + 0x14 ]
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40008fa0: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40008fa4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40008fa8: 01 00 00 00 nop
*/
RTEMS_INLINE_ROUTINE void _Semaphore_Free (
Semaphore_Control *the_semaphore
)
{
_Objects_Free( &_Semaphore_Information, &the_semaphore->Object );
40008fac: 92 10 00 1d mov %i5, %o1
40008fb0: 40 00 0c fb call 4000c39c <_Objects_Free>
40008fb4: 90 14 62 f0 or %l1, 0x2f0, %o0
40008fb8: 40 00 04 8a call 4000a1e0 <_RTEMS_Unlock_allocator>
40008fbc: 01 00 00 00 nop
return _Status_Get( status );
40008fc0: 10 bf ff cd b 40008ef4 <rtems_semaphore_create+0xf4>
40008fc4: 82 10 20 13 mov 0x13, %g1 ! 13 <_TLS_Alignment+0x12>
_Thread_queue_Object_initialize( &the_mutex->Wait_queue );
40008fc8: 40 00 16 b2 call 4000ea90 <_Thread_queue_Object_initialize>
40008fcc: 90 07 60 10 add %i5, 0x10, %o0
if ( count == 0 ) {
40008fd0: 80 a6 60 00 cmp %i1, 0
40008fd4: 12 bf ff be bne 40008ecc <rtems_semaphore_create+0xcc>
40008fd8: c0 27 60 1c clr [ %i5 + 0x1c ]
the_mutex->Wait_queue.Queue.owner = owner;
40008fdc: 10 bf ff bc b 40008ecc <rtems_semaphore_create+0xcc>
40008fe0: e4 27 60 14 st %l2, [ %i5 + 0x14 ]
return RTEMS_INVALID_ADDRESS;
40008fe4: 82 10 20 09 mov 9, %g1
}
40008fe8: 81 c7 e0 08 ret
40008fec: 91 e8 00 01 restore %g0, %g1, %o0
variant = SEMAPHORE_VARIANT_MUTEX_NO_PROTOCOL;
40008ff0: 10 bf ff 9e b 40008e68 <rtems_semaphore_create+0x68>
40008ff4: a0 10 20 02 mov 2, %l0
40008ff8: 40 00 04 7a call 4000a1e0 <_RTEMS_Unlock_allocator>
40008ffc: 01 00 00 00 nop
return RTEMS_TOO_MANY;
40009000: 10 bf ff bd b 40008ef4 <rtems_semaphore_create+0xf4>
40009004: 82 10 20 05 mov 5, %g1 ! 5 <_TLS_Alignment+0x4>
variant = SEMAPHORE_VARIANT_MUTEX_INHERIT_PRIORITY;
40009008: 10 bf ff 98 b 40008e68 <rtems_semaphore_create+0x68>
4000900c: a0 10 20 00 clr %l0
if ( valid ) {
40009010: 80 a6 c0 10 cmp %i3, %l0
40009014: 08 bf ff cd bleu 40008f48 <rtems_semaphore_create+0x148>
40009018: 92 10 00 1d mov %i5, %o1
4000901c: 30 bf ff e5 b,a 40008fb0 <rtems_semaphore_create+0x1b0>
return STATUS_MUTEX_CEILING_VIOLATED;
}
_CORE_mutex_Set_owner( &the_mutex->Recursive.Mutex, owner );
_Thread_Resource_count_increment( owner );
_Thread_Priority_add(
40009020: 92 07 60 20 add %i5, 0x20, %o1
40009024: 94 07 bf dc add %fp, -36, %o2
40009028: 40 00 12 ba call 4000db10 <_Thread_Priority_add>
4000902c: 90 10 00 12 mov %l2, %o0
const ISR_lock_Context *lock_context
)
{
uint32_t disable_level;
disable_level = cpu_self->thread_dispatch_disable_level;
40009030: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
_Profiling_Thread_dispatch_disable_critical(
cpu_self,
disable_level,
lock_context
);
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40009034: 82 00 60 01 inc %g1
<== NOT EXECUTED
*/
RTEMS_INLINE_ROUTINE Per_CPU_Control *_Thread_Dispatch_disable_critical(
const ISR_lock_Context *lock_context
)
{
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40009038: b6 10 00 06 mov %g6, %i3
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
4000903c: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40009040: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009044: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009048: 01 00 00 00 nop
);
_Thread_Wait_release_default_critical( owner, &lock_context );
cpu_self = _Thread_queue_Dispatch_disable( queue_context );
_CORE_mutex_Release( &the_mutex->Recursive.Mutex, queue_context );
_Thread_Priority_update( queue_context );
4000904c: 40 00 12 c2 call 4000db54 <_Thread_Priority_update>
40009050: 90 07 bf dc add %fp, -36, %o0
*
* @param[in] cpu_self The current processor.
*/
RTEMS_INLINE_ROUTINE void _Thread_Dispatch_enable( Per_CPU_Control *cpu_self )
{
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
40009054: c2 06 e0 18 ld [ %i3 + 0x18 ], %g1
if ( disable_level == 1 ) {
40009058: 80 a0 60 01 cmp %g1, 1
4000905c: 02 80 00 05 be 40009070 <rtems_semaphore_create+0x270>
<== ALWAYS TAKEN
40009060: 82 00 7f ff add %g1, -1, %g1
}
_ISR_Local_enable( level );
} else {
_Assert( disable_level > 0 );
cpu_self->thread_dispatch_disable_level = disable_level - 1;
40009064: c2 26 e0 18 st %g1, [ %i3 + 0x18 ]
<== NOT EXECUTED
information->local_table[ index ] = the_object;
40009068: 10 bf ff 9a b 40008ed0 <rtems_semaphore_create+0xd0>
<== NOT EXECUTED
4000906c: c2 17 60 0a lduh [ %i5 + 0xa ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40009070: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
40009074: c4 0e e0 1c ldub [ %i3 + 0x1c ], %g2
40009078: 80 a0 a0 00 cmp %g2, 0
4000907c: 12 80 00 07 bne 40009098 <rtems_semaphore_create+0x298>
<== NEVER TAKEN
40009080: 92 10 00 01 mov %g1, %o1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = 0;
40009084: c0 26 e0 18 clr [ %i3 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009088: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000908c: 01 00 00 00 nop
40009090: 10 bf ff 90 b 40008ed0 <rtems_semaphore_create+0xd0>
40009094: c2 17 60 0a lduh [ %i5 + 0xa ], %g1
_Thread_Do_dispatch( cpu_self, level );
40009098: c2 27 bf d4 st %g1, [ %fp + -44 ]
<== NOT EXECUTED
4000909c: 40 00 13 35 call 4000dd70 <_Thread_Do_dispatch>
<== NOT EXECUTED
400090a0: 90 10 00 1b mov %i3, %o0
<== NOT EXECUTED
400090a4: 10 bf ff f9 b 40009088 <rtems_semaphore_create+0x288>
<== NOT EXECUTED
400090a8: c2 07 bf d4 ld [ %fp + -44 ], %g1
<== NOT EXECUTED
400090ac <rtems_semaphore_delete>:
#include <rtems/rtems/statusimpl.h>
rtems_status_code rtems_semaphore_delete(
rtems_id id
)
{
400090ac: 9d e3 bf 78 save %sp, -136, %sp
_RTEMS_Lock_allocator();
400090b0: 40 00 04 47 call 4000a1cc <_RTEMS_Lock_allocator>
400090b4: 39 10 00 61 sethi %hi(0x40018400), %i4
Objects_Id id,
Thread_queue_Context *queue_context
)
{
_Thread_queue_Context_initialize( queue_context );
return (Semaphore_Control *) _Objects_Get(
400090b8: 92 07 bf dc add %fp, -36, %o1
400090bc: 94 17 22 f0 or %i4, 0x2f0, %o2
400090c0: 40 00 0d 06 call 4000c4d8 <_Objects_Get>
400090c4: 90 10 00 18 mov %i0, %o0
Status_Control status;
_Objects_Allocator_lock();
the_semaphore = _Semaphore_Get( id, &queue_context );
if ( the_semaphore == NULL ) {
400090c8: ba 92 20 00 orcc %o0, 0, %i5
400090cc: 02 80 00 43 be 400091d8 <rtems_semaphore_delete+0x12c>
400090d0: 01 00 00 00 nop
_Thread_queue_Acquire_critical(
&the_semaphore->Core_control.Wait_queue,
&queue_context
);
switch ( the_semaphore->variant ) {
400090d4: c2 07 60 38 ld [ %i5 + 0x38 ], %g1
400090d8: 83 30 60 1d srl %g1, 0x1d, %g1
400090dc: 80 a0 60 02 cmp %g1, 2
400090e0: 18 80 00 06 bgu 400090f8 <rtems_semaphore_delete+0x4c>
400090e4: 90 17 22 f0 or %i4, 0x2f0, %o0
case SEMAPHORE_VARIANT_MUTEX_INHERIT_PRIORITY:
case SEMAPHORE_VARIANT_MUTEX_PRIORITY_CEILING:
case SEMAPHORE_VARIANT_MUTEX_NO_PROTOCOL:
if (
400090e8: c2 07 60 14 ld [ %i5 + 0x14 ], %g1
400090ec: 80 a0 60 00 cmp %g1, 0
400090f0: 12 80 00 26 bne 40009188 <rtems_semaphore_delete+0xdc>
400090f4: 01 00 00 00 nop
);
_Objects_Allocator_unlock();
return _Status_Get( status );
}
_Objects_Close( &_Semaphore_Information, &the_semaphore->Object );
400090f8: 40 00 0b dd call 4000c06c <_Objects_Close>
400090fc: 92 10 00 1d mov %i5, %o1
if ( the_semaphore->variant == SEMAPHORE_VARIANT_MUTEX_INHERIT_PRIORITY ) {
40009100: c2 0f 60 38 ldub [ %i5 + 0x38 ], %g1
40009104: 80 88 60 e0 btst 0xe0, %g1
40009108: 12 80 00 10 bne 40009148 <rtems_semaphore_delete+0x9c>
4000910c: 90 07 60 10 add %i5, 0x10, %o0
|| the_semaphore->variant == SEMAPHORE_VARIANT_MUTEX_PRIORITY_CEILING
|| the_semaphore->variant == SEMAPHORE_VARIANT_MUTEX_NO_PROTOCOL
|| the_semaphore->variant == SEMAPHORE_VARIANT_SIMPLE_BINARY
|| the_semaphore->variant == SEMAPHORE_VARIANT_COUNTING
);
_Thread_queue_Flush_critical(
40009110: 96 07 bf dc add %fp, -36, %o3
return &_Thread_queue_Operations_priority_inherit;
40009114: 13 10 00 55 sethi %hi(0x40015400), %o1
40009118: 15 10 00 3a sethi %hi(0x4000e800), %o2
4000911c: 92 12 61 5c or %o1, 0x15c, %o1
40009120: 40 00 15 ed call 4000e8d4 <_Thread_queue_Flush_critical>
40009124: 94 12 a0 c4 or %o2, 0xc4, %o2
_Objects_Free( &_Semaphore_Information, &the_semaphore->Object );
40009128: 92 10 00 1d mov %i5, %o1
4000912c: 90 17 22 f0 or %i4, 0x2f0, %o0
40009130: 40 00 0c 9b call 4000c39c <_Objects_Free>
40009134: b0 10 20 00 clr %i0
_RTEMS_Unlock_allocator();
40009138: 40 00 04 2a call 4000a1e0 <_RTEMS_Unlock_allocator>
4000913c: 01 00 00 00 nop
#endif
_Semaphore_Free( the_semaphore );
_Objects_Allocator_unlock();
return RTEMS_SUCCESSFUL;
}
40009140: 81 c7 e0 08 ret
40009144: 81 e8 00 00 restore
if ( the_semaphore->discipline == SEMAPHORE_DISCIPLINE_PRIORITY ) {
40009148: 80 88 60 10 btst 0x10, %g1
4000914c: 12 80 00 16 bne 400091a4 <rtems_semaphore_delete+0xf8>
40009150: 96 07 bf dc add %fp, -36, %o3
return &_Thread_queue_Operations_priority;
40009154: 13 10 00 55 sethi %hi(0x40015400), %o1
_Thread_queue_Flush_critical(
40009158: 15 10 00 3a sethi %hi(0x4000e800), %o2
4000915c: 92 12 61 70 or %o1, 0x170, %o1
40009160: 40 00 15 dd call 4000e8d4 <_Thread_queue_Flush_critical>
40009164: 94 12 a0 c4 or %o2, 0xc4, %o2
_Objects_Free( &_Semaphore_Information, &the_semaphore->Object );
40009168: 92 10 00 1d mov %i5, %o1
4000916c: 90 17 22 f0 or %i4, 0x2f0, %o0
40009170: 40 00 0c 8b call 4000c39c <_Objects_Free>
40009174: b0 10 20 00 clr %i0
40009178: 40 00 04 1a call 4000a1e0 <_RTEMS_Unlock_allocator>
4000917c: 01 00 00 00 nop
}
40009180: 81 c7 e0 08 ret
40009184: 81 e8 00 00 restore
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40009188: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000918c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009190: 01 00 00 00 nop
40009194: 40 00 04 13 call 4000a1e0 <_RTEMS_Unlock_allocator>
40009198: b0 10 20 0c mov 0xc, %i0 ! c <_TLS_Alignment+0xb>
return _Status_Get( status );
4000919c: 81 c7 e0 08 ret
400091a0: 81 e8 00 00 restore
return &_Thread_queue_Operations_FIFO;
400091a4: 13 10 00 55 sethi %hi(0x40015400), %o1
_Thread_queue_Flush_critical(
400091a8: 15 10 00 3a sethi %hi(0x4000e800), %o2
400091ac: 92 12 61 84 or %o1, 0x184, %o1
400091b0: 40 00 15 c9 call 4000e8d4 <_Thread_queue_Flush_critical>
400091b4: 94 12 a0 c4 or %o2, 0xc4, %o2
_Objects_Free( &_Semaphore_Information, &the_semaphore->Object );
400091b8: 92 10 00 1d mov %i5, %o1
400091bc: 90 17 22 f0 or %i4, 0x2f0, %o0
400091c0: 40 00 0c 77 call 4000c39c <_Objects_Free>
400091c4: b0 10 20 00 clr %i0
400091c8: 40 00 04 06 call 4000a1e0 <_RTEMS_Unlock_allocator>
400091cc: 01 00 00 00 nop
}
400091d0: 81 c7 e0 08 ret
400091d4: 81 e8 00 00 restore
400091d8: 40 00 04 02 call 4000a1e0 <_RTEMS_Unlock_allocator>
400091dc: b0 10 20 04 mov 4, %i0
return RTEMS_INVALID_ID;
400091e0: 81 c7 e0 08 ret
400091e4: 81 e8 00 00 restore
40009254 <rtems_semaphore_obtain>:
rtems_status_code rtems_semaphore_obtain(
rtems_id id,
rtems_option option_set,
rtems_interval timeout
)
{
40009254: 9d e3 bf 70 save %sp, -144, %sp
return (Semaphore_Control *) _Objects_Get(
40009258: 15 10 00 61 sethi %hi(0x40018400), %o2
4000925c: 92 07 bf dc add %fp, -36, %o1
40009260: 94 12 a2 f0 or %o2, 0x2f0, %o2
40009264: 40 00 0c 9d call 4000c4d8 <_Objects_Get>
40009268: 90 10 00 18 mov %i0, %o0
bool wait;
Status_Control status;
the_semaphore = _Semaphore_Get( id, &queue_context );
if ( the_semaphore == NULL ) {
4000926c: 80 a2 20 00 cmp %o0, 0
40009270: 02 80 00 6c be 40009420 <rtems_semaphore_obtain+0x1cc>
40009274: 96 38 00 19 xnor %g0, %i1, %o3
#else
return RTEMS_INVALID_ID;
#endif
}
executing = _Thread_Executing;
40009278: fa 01 a0 20 ld [ %g6 + 0x20 ], %i5
wait = !_Options_Is_no_wait( option_set );
if ( wait ) {
4000927c: b2 8e 60 01 andcc %i1, 1, %i1
40009280: 02 80 00 21 be 40009304 <rtems_semaphore_obtain+0xb0>
40009284: 96 0a e0 01 and %o3, 1, %o3
queue_context->enqueue_callout = _Thread_queue_Enqueue_do_nothing_extra;
40009288: 03 10 00 39 sethi %hi(0x4000e400), %g1
4000928c: 82 10 60 98 or %g1, 0x98, %g1 ! 4000e498 <_Thread_queue_Enqueue_do_nothing_extra>
40009290: c2 27 bf e4 st %g1, [ %fp + -28 ]
_Thread_queue_Context_set_enqueue_timeout_ticks( &queue_context, timeout );
} else {
_Thread_queue_Context_set_enqueue_do_nothing_extra( &queue_context );
}
switch ( the_semaphore->variant ) {
40009294: c2 02 20 38 ld [ %o0 + 0x38 ], %g1
40009298: 83 30 60 1d srl %g1, 0x1d, %g1
4000929c: 80 a0 60 01 cmp %g1, 1
400092a0: 02 80 00 22 be 40009328 <rtems_semaphore_obtain+0xd4>
400092a4: 84 02 20 10 add %o0, 0x10, %g2
400092a8: 0a 80 00 42 bcs 400093b0 <rtems_semaphore_obtain+0x15c>
400092ac: 80 a0 60 02 cmp %g1, 2
400092b0: 12 80 00 2d bne 40009364 <rtems_semaphore_obtain+0x110>
400092b4: c2 0a 20 38 ldub [ %o0 + 0x38 ], %g1
if ( the_semaphore->variant == SEMAPHORE_VARIANT_MUTEX_INHERIT_PRIORITY ) {
400092b8: 80 88 60 e0 btst 0xe0, %g1
400092bc: 12 80 00 4e bne 400093f4 <rtems_semaphore_obtain+0x1a0>
<== ALWAYS TAKEN
400092c0: 80 88 60 10 btst 0x10, %g1
return &_Thread_queue_Operations_priority_inherit;
400092c4: 13 10 00 55 sethi %hi(0x40015400), %o1
<== NOT EXECUTED
400092c8: 92 12 61 5c or %o1, 0x15c, %o1 ! 4001555c <_Thread_queue_Operations_priority_inherit>
<== NOT EXECUTED
400092cc: c2 02 20 14 ld [ %o0 + 0x14 ], %g1
if ( owner == NULL ) {
400092d0: 80 a0 60 00 cmp %g1, 0
400092d4: 02 80 00 4d be 40009408 <rtems_semaphore_obtain+0x1b4>
<== NEVER TAKEN
400092d8: 80 a7 40 01 cmp %i5, %g1
if ( owner == executing ) {
400092dc: 12 80 00 74 bne 400094ac <rtems_semaphore_obtain+0x258>
400092e0: 98 07 bf dc add %fp, -36, %o4
++the_mutex->nest_level;
400092e4: c2 02 20 1c ld [ %o0 + 0x1c ], %g1
<== NOT EXECUTED
400092e8: 82 00 60 01 inc %g1
<== NOT EXECUTED
{
_Assert( _ISR_Get_level() != 0 );
_CORE_semaphore_Acquire_critical( the_semaphore, queue_context );
if ( the_semaphore->count != 0 ) {
the_semaphore->count -= 1;
400092ec: c2 22 20 1c st %g1, [ %o0 + 0x1c ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400092f0: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400092f4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400092f8: 01 00 00 00 nop
400092fc: 81 c7 e0 08 ret
40009300: 91 e8 20 00 restore %g0, 0, %o0
queue_context->enqueue_callout = _Thread_queue_Add_timeout_ticks;
40009304: 03 10 00 3c sethi %hi(0x4000f000), %g1
queue_context->Timeout.ticks = ticks;
40009308: f4 27 bf e8 st %i2, [ %fp + -24 ]
queue_context->enqueue_callout = _Thread_queue_Add_timeout_ticks;
4000930c: 82 10 63 e4 or %g1, 0x3e4, %g1
40009310: c2 27 bf e4 st %g1, [ %fp + -28 ]
40009314: c2 02 20 38 ld [ %o0 + 0x38 ], %g1
40009318: 83 30 60 1d srl %g1, 0x1d, %g1
4000931c: 80 a0 60 01 cmp %g1, 1
40009320: 12 bf ff e2 bne 400092a8 <rtems_semaphore_obtain+0x54>
40009324: 84 02 20 10 add %o0, 0x10, %g2
40009328: c2 02 20 14 ld [ %o0 + 0x14 ], %g1
_CORE_mutex_Acquire_critical( &the_mutex->Recursive.Mutex, queue_context );
owner = _CORE_mutex_Get_owner( &the_mutex->Recursive.Mutex );
if ( owner == NULL ) {
4000932c: 80 a0 60 00 cmp %g1, 0
40009330: 02 80 00 4c be 40009460 <rtems_semaphore_obtain+0x20c>
40009334: 80 a7 40 01 cmp %i5, %g1
executing,
queue_context
);
}
if ( owner == executing ) {
40009338: 22 bf ff ec be,a 400092e8 <rtems_semaphore_obtain+0x94>
<== NEVER TAKEN
4000933c: c2 02 20 1c ld [ %o0 + 0x1c ], %g1
<== NOT EXECUTED
status = ( *nested )( &the_mutex->Recursive );
_CORE_mutex_Release( &the_mutex->Recursive.Mutex, queue_context );
return status;
}
return _CORE_mutex_Seize_slow(
40009340: 98 07 bf dc add %fp, -36, %o4
40009344: 94 10 00 1d mov %i5, %o2
40009348: 90 10 00 02 mov %g2, %o0
4000934c: 13 10 00 55 sethi %hi(0x40015400), %o1
40009350: 40 00 03 e0 call 4000a2d0 <_CORE_mutex_Seize_slow>
40009354: 92 12 61 70 or %o1, 0x170, %o1 ! 40015570 <_Thread_queue_Operations_priority>
40009358: b0 0a 60 ff and %o1, 0xff, %i0
4000935c: 81 c7 e0 08 ret
40009360: 81 e8 00 00 restore
if ( the_semaphore->variant == SEMAPHORE_VARIANT_MUTEX_INHERIT_PRIORITY ) {
40009364: 80 88 60 e0 btst 0xe0, %g1
40009368: 02 80 00 21 be 400093ec <rtems_semaphore_obtain+0x198>
<== NEVER TAKEN
4000936c: 13 10 00 55 sethi %hi(0x40015400), %o1
if ( the_semaphore->discipline == SEMAPHORE_DISCIPLINE_PRIORITY ) {
40009370: 80 88 60 10 btst 0x10, %g1
40009374: 12 80 00 37 bne 40009450 <rtems_semaphore_obtain+0x1fc>
40009378: 13 10 00 55 sethi %hi(0x40015400), %o1
return &_Thread_queue_Operations_priority;
4000937c: 13 10 00 55 sethi %hi(0x40015400), %o1
40009380: 92 12 61 70 or %o1, 0x170, %o1 ! 40015570 <_Thread_queue_Operations_priority>
if ( the_semaphore->count != 0 ) {
40009384: c2 02 20 1c ld [ %o0 + 0x1c ], %g1
40009388: 80 a0 60 00 cmp %g1, 0
4000938c: 12 80 00 27 bne 40009428 <rtems_semaphore_obtain+0x1d4>
40009390: 80 a6 60 00 cmp %i1, 0
_CORE_semaphore_Release( the_semaphore, queue_context );
return STATUS_SUCCESSFUL;
}
if ( !wait ) {
40009394: 02 80 00 27 be 40009430 <rtems_semaphore_obtain+0x1dc>
40009398: 82 10 20 02 mov 2, %g1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000939c: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400093a0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400093a4: 01 00 00 00 nop
400093a8: 81 c7 e0 08 ret
400093ac: 91 e8 20 0d restore %g0, 0xd, %o0
400093b0: c2 02 20 14 ld [ %o0 + 0x14 ], %g1
if ( owner == NULL ) {
400093b4: 80 a0 60 00 cmp %g1, 0
400093b8: 02 80 00 14 be 40009408 <rtems_semaphore_obtain+0x1b4>
400093bc: 80 a7 40 01 cmp %i5, %g1
if ( owner == executing ) {
400093c0: 22 bf ff ca be,a 400092e8 <rtems_semaphore_obtain+0x94>
400093c4: c2 02 20 1c ld [ %o0 + 0x1c ], %g1
return _CORE_mutex_Seize_slow(
400093c8: 98 07 bf dc add %fp, -36, %o4
400093cc: 94 10 00 1d mov %i5, %o2
400093d0: 90 10 00 02 mov %g2, %o0
400093d4: 13 10 00 55 sethi %hi(0x40015400), %o1
400093d8: 40 00 03 be call 4000a2d0 <_CORE_mutex_Seize_slow>
400093dc: 92 12 61 5c or %o1, 0x15c, %o1 ! 4001555c <_Thread_queue_Operations_priority_inherit>
400093e0: b0 0a 60 ff and %o1, 0xff, %i0
400093e4: 81 c7 e0 08 ret
400093e8: 81 e8 00 00 restore
return &_Thread_queue_Operations_priority_inherit;
400093ec: 10 bf ff e6 b 40009384 <rtems_semaphore_obtain+0x130>
<== NOT EXECUTED
400093f0: 92 12 61 5c or %o1, 0x15c, %o1
<== NOT EXECUTED
if ( the_semaphore->discipline == SEMAPHORE_DISCIPLINE_PRIORITY ) {
400093f4: 32 80 00 19 bne,a 40009458 <rtems_semaphore_obtain+0x204>
400093f8: 13 10 00 55 sethi %hi(0x40015400), %o1
return &_Thread_queue_Operations_priority;
400093fc: 13 10 00 55 sethi %hi(0x40015400), %o1
40009400: 10 bf ff b3 b 400092cc <rtems_semaphore_obtain+0x78>
40009404: 92 12 61 70 or %o1, 0x170, %o1 ! 40015570 <_Thread_queue_Operations_priority>
the_mutex->Wait_queue.Queue.owner = owner;
40009408: fa 22 20 14 st %i5, [ %o0 + 0x14 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000940c: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009410: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009414: 01 00 00 00 nop
40009418: 81 c7 e0 08 ret
4000941c: 91 e8 20 00 restore %g0, 0, %o0
);
break;
}
return _Status_Get( status );
}
40009420: 81 c7 e0 08 ret
40009424: 91 e8 20 04 restore %g0, 4, %o0
the_semaphore->count -= 1;
40009428: 10 bf ff b1 b 400092ec <rtems_semaphore_obtain+0x98>
4000942c: 82 00 7f ff add %g1, -1, %g1
_Thread_queue_Context_set_thread_state(
queue_context,
STATES_WAITING_FOR_SEMAPHORE
);
_Thread_queue_Enqueue(
40009430: 96 07 bf dc add %fp, -36, %o3
queue_context->thread_state = thread_state;
40009434: c2 27 bf e0 st %g1, [ %fp + -32 ]
40009438: 94 10 00 1d mov %i5, %o2
4000943c: 40 00 14 21 call 4000e4c0 <_Thread_queue_Enqueue>
40009440: 90 10 00 02 mov %g2, %o0
40009444: f0 0f 60 4f ldub [ %i5 + 0x4f ], %i0
return _Status_Get( status );
40009448: 81 c7 e0 08 ret
4000944c: 81 e8 00 00 restore
return &_Thread_queue_Operations_FIFO;
40009450: 10 bf ff cd b 40009384 <rtems_semaphore_obtain+0x130>
40009454: 92 12 61 84 or %o1, 0x184, %o1
40009458: 10 bf ff 9d b 400092cc <rtems_semaphore_obtain+0x78>
4000945c: 92 12 61 84 or %o1, 0x184, %o1
if (
40009460: c2 07 60 38 ld [ %i5 + 0x38 ], %g1
queue_context->Priority.update_count = 0;
40009464: c0 27 bf f0 clr [ %fp + -16 ]
40009468: c6 02 20 30 ld [ %o0 + 0x30 ], %g3
4000946c: c4 00 60 18 ld [ %g1 + 0x18 ], %g2
40009470: 80 a0 c0 02 cmp %g3, %g2
40009474: 18 80 00 09 bgu 40009498 <rtems_semaphore_obtain+0x244>
<== NEVER TAKEN
40009478: 01 00 00 00 nop
4000947c: 32 80 00 12 bne,a 400094c4 <rtems_semaphore_obtain+0x270>
<== NEVER TAKEN
40009480: fa 22 20 14 st %i5, [ %o0 + 0x14 ]
<== NOT EXECUTED
40009484: c4 02 20 34 ld [ %o0 + 0x34 ], %g2
40009488: c2 00 60 1c ld [ %g1 + 0x1c ], %g1
4000948c: 80 a0 80 01 cmp %g2, %g1
40009490: 28 80 00 0d bleu,a 400094c4 <rtems_semaphore_obtain+0x270>
40009494: fa 22 20 14 st %i5, [ %o0 + 0x14 ]
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40009498: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000949c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400094a0: 01 00 00 00 nop
400094a4: 81 c7 e0 08 ret
400094a8: 91 e8 20 13 restore %g0, 0x13, %o0
return _CORE_mutex_Seize_slow(
400094ac: 94 10 00 1d mov %i5, %o2
400094b0: 40 00 03 88 call 4000a2d0 <_CORE_mutex_Seize_slow>
400094b4: 90 10 00 02 mov %g2, %o0
400094b8: b0 0a 60 ff and %o1, 0xff, %i0
400094bc: 81 c7 e0 08 ret
400094c0: 81 e8 00 00 restore
_Thread_Priority_add(
400094c4: 92 02 20 20 add %o0, 0x20, %o1
400094c8: 94 07 bf dc add %fp, -36, %o2
400094cc: 40 00 11 91 call 4000db10 <_Thread_Priority_add>
400094d0: 90 10 00 1d mov %i5, %o0
disable_level = cpu_self->thread_dispatch_disable_level;
400094d4: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400094d8: 82 00 60 01 inc %g1
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
400094dc: ba 10 00 06 mov %g6, %i5
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400094e0: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400094e4: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400094e8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400094ec: 01 00 00 00 nop
_Thread_Priority_update( queue_context );
400094f0: 40 00 11 99 call 4000db54 <_Thread_Priority_update>
400094f4: 90 07 bf dc add %fp, -36, %o0
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
400094f8: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
if ( disable_level == 1 ) {
400094fc: 80 a0 60 01 cmp %g1, 1
40009500: 02 80 00 06 be 40009518 <rtems_semaphore_obtain+0x2c4>
<== ALWAYS TAKEN
40009504: 82 00 7f ff add %g1, -1, %g1
cpu_self->thread_dispatch_disable_level = disable_level - 1;
40009508: b0 10 20 00 clr %i0
<== NOT EXECUTED
4000950c: c2 27 60 18 st %g1, [ %i5 + 0x18 ]
<== NOT EXECUTED
40009510: 81 c7 e0 08 ret
<== NOT EXECUTED
40009514: 81 e8 00 00 restore
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40009518: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
4000951c: c4 0f 60 1c ldub [ %i5 + 0x1c ], %g2
40009520: 80 a0 a0 00 cmp %g2, 0
40009524: 12 80 00 07 bne 40009540 <rtems_semaphore_obtain+0x2ec>
<== NEVER TAKEN
40009528: 92 10 00 01 mov %g1, %o1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = 0;
4000952c: c0 27 60 18 clr [ %i5 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009530: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009534: 01 00 00 00 nop
40009538: 81 c7 e0 08 ret
4000953c: 91 e8 20 00 restore %g0, 0, %o0
_Thread_Do_dispatch( cpu_self, level );
40009540: c2 27 bf d4 st %g1, [ %fp + -44 ]
<== NOT EXECUTED
40009544: 40 00 12 0b call 4000dd70 <_Thread_Do_dispatch>
<== NOT EXECUTED
40009548: 90 10 00 1d mov %i5, %o0
<== NOT EXECUTED
4000954c: 10 bf ff f9 b 40009530 <rtems_semaphore_obtain+0x2dc>
<== NOT EXECUTED
40009550: c2 07 bf d4 ld [ %fp + -44 ], %g1
<== NOT EXECUTED
40009554 <rtems_semaphore_release>:
#include <rtems/rtems/semimpl.h>
#include <rtems/rtems/statusimpl.h>
rtems_status_code rtems_semaphore_release( rtems_id id )
{
40009554: 9d e3 bf 70 save %sp, -144, %sp
return (Semaphore_Control *) _Objects_Get(
40009558: 15 10 00 61 sethi %hi(0x40018400), %o2
4000955c: 92 07 bf dc add %fp, -36, %o1
40009560: 94 12 a2 f0 or %o2, 0x2f0, %o2
40009564: 40 00 0b dd call 4000c4d8 <_Objects_Get>
40009568: 90 10 00 18 mov %i0, %o0
Thread_Control *executing;
Status_Control status;
the_semaphore = _Semaphore_Get( id, &queue_context );
if ( the_semaphore == NULL ) {
4000956c: ba 92 20 00 orcc %o0, 0, %i5
40009570: 02 80 00 52 be 400096b8 <rtems_semaphore_release+0x164>
40009574: 01 00 00 00 nop
_Thread_queue_Context_set_MP_callout(
&queue_context,
_Semaphore_Core_mutex_mp_support
);
switch ( the_semaphore->variant ) {
40009578: c2 07 60 38 ld [ %i5 + 0x38 ], %g1
4000957c: 83 30 60 1d srl %g1, 0x1d, %g1
executing = _Thread_Executing;
40009580: d0 01 a0 20 ld [ %g6 + 0x20 ], %o0
switch ( the_semaphore->variant ) {
40009584: 80 a0 60 01 cmp %g1, 1
40009588: 02 80 00 24 be 40009618 <rtems_semaphore_release+0xc4>
4000958c: b8 07 60 10 add %i5, 0x10, %i4
40009590: 0a 80 00 36 bcs 40009668 <rtems_semaphore_release+0x114>
40009594: 80 a0 60 02 cmp %g1, 2
40009598: 02 80 00 16 be 400095f0 <rtems_semaphore_release+0x9c>
4000959c: 80 a0 60 03 cmp %g1, 3
400095a0: 12 80 00 0b bne 400095cc <rtems_semaphore_release+0x78>
400095a4: c2 0f 60 38 ldub [ %i5 + 0x38 ], %g1
if ( the_semaphore->variant == SEMAPHORE_VARIANT_MUTEX_INHERIT_PRIORITY ) {
400095a8: 80 88 60 e0 btst 0xe0, %g1
400095ac: 02 80 00 76 be 40009784 <rtems_semaphore_release+0x230>
<== NEVER TAKEN
400095b0: 37 10 00 55 sethi %hi(0x40015400), %i3
if ( the_semaphore->discipline == SEMAPHORE_DISCIPLINE_PRIORITY ) {
400095b4: 80 88 60 10 btst 0x10, %g1
400095b8: 32 80 00 8a bne,a 400097e0 <rtems_semaphore_release+0x28c>
400095bc: 37 10 00 55 sethi %hi(0x40015400), %i3
return &_Thread_queue_Operations_priority;
400095c0: 37 10 00 55 sethi %hi(0x40015400), %i3
400095c4: 10 80 00 71 b 40009788 <rtems_semaphore_release+0x234>
400095c8: b6 16 e1 70 or %i3, 0x170, %i3 ! 40015570 <_Thread_queue_Operations_priority>
if ( the_semaphore->variant == SEMAPHORE_VARIANT_MUTEX_INHERIT_PRIORITY ) {
400095cc: 80 88 60 e0 btst 0xe0, %g1
400095d0: 02 80 00 4f be 4000970c <rtems_semaphore_release+0x1b8>
<== NEVER TAKEN
400095d4: 37 10 00 55 sethi %hi(0x40015400), %i3
if ( the_semaphore->discipline == SEMAPHORE_DISCIPLINE_PRIORITY ) {
400095d8: 80 88 60 10 btst 0x10, %g1
400095dc: 32 80 00 83 bne,a 400097e8 <rtems_semaphore_release+0x294>
400095e0: 37 10 00 55 sethi %hi(0x40015400), %i3
return &_Thread_queue_Operations_priority;
400095e4: 37 10 00 55 sethi %hi(0x40015400), %i3
400095e8: 10 80 00 4a b 40009710 <rtems_semaphore_release+0x1bc>
400095ec: b6 16 e1 70 or %i3, 0x170, %i3 ! 40015570 <_Thread_queue_Operations_priority>
if ( the_semaphore->variant == SEMAPHORE_VARIANT_MUTEX_INHERIT_PRIORITY ) {
400095f0: c2 0f 60 38 ldub [ %i5 + 0x38 ], %g1
400095f4: 80 88 60 e0 btst 0xe0, %g1
400095f8: 02 80 00 32 be 400096c0 <rtems_semaphore_release+0x16c>
<== NEVER TAKEN
400095fc: 19 10 00 55 sethi %hi(0x40015400), %o4
if ( the_semaphore->discipline == SEMAPHORE_DISCIPLINE_PRIORITY ) {
40009600: 80 88 60 10 btst 0x10, %g1
40009604: 32 80 00 75 bne,a 400097d8 <rtems_semaphore_release+0x284>
40009608: 19 10 00 55 sethi %hi(0x40015400), %o4
return &_Thread_queue_Operations_priority;
4000960c: 19 10 00 55 sethi %hi(0x40015400), %o4
40009610: 10 80 00 2d b 400096c4 <rtems_semaphore_release+0x170>
40009614: 98 13 21 70 or %o4, 0x170, %o4 ! 40015570 <_Thread_queue_Operations_priority>
Per_CPU_Control *cpu_self;
Thread_Control *new_owner;
_CORE_mutex_Acquire_critical( &the_mutex->Recursive.Mutex, queue_context );
if ( !_CORE_mutex_Is_owner( &the_mutex->Recursive.Mutex, executing ) ) {
40009618: c2 07 60 14 ld [ %i5 + 0x14 ], %g1
4000961c: 80 a2 00 01 cmp %o0, %g1
40009620: 12 80 00 0d bne 40009654 <rtems_semaphore_release+0x100>
40009624: 01 00 00 00 nop
_CORE_mutex_Release( &the_mutex->Recursive.Mutex, queue_context );
return STATUS_NOT_OWNER;
}
nest_level = the_mutex->Recursive.nest_level;
40009628: f0 07 60 1c ld [ %i5 + 0x1c ], %i0
if ( nest_level > 0 ) {
4000962c: 80 a6 20 00 cmp %i0, 0
40009630: 22 80 00 70 be,a 400097f0 <rtems_semaphore_release+0x29c>
<== ALWAYS TAKEN
40009634: c0 27 bf f0 clr [ %fp + -16 ]
the_mutex->nest_level = nest_level - 1;
40009638: b0 06 3f ff add %i0, -1, %i0
<== NOT EXECUTED
4000963c: f0 27 60 1c st %i0, [ %i5 + 0x1c ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40009640: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009644: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009648: 01 00 00 00 nop
4000964c: 81 c7 e0 08 ret
40009650: 91 e8 20 00 restore %g0, 0, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40009654: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009658: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000965c: 01 00 00 00 nop
40009660: 81 c7 e0 08 ret
40009664: 91 e8 20 17 restore %g0, 0x17, %o0
if ( !_CORE_mutex_Is_owner( &the_mutex->Mutex, executing ) ) {
40009668: c2 07 60 14 ld [ %i5 + 0x14 ], %g1
4000966c: 80 a2 00 01 cmp %o0, %g1
40009670: 12 bf ff f9 bne 40009654 <rtems_semaphore_release+0x100>
40009674: 01 00 00 00 nop
nest_level = the_mutex->nest_level;
40009678: f0 07 60 1c ld [ %i5 + 0x1c ], %i0
if ( nest_level > 0 ) {
4000967c: 80 a6 20 00 cmp %i0, 0
40009680: 32 bf ff ef bne,a 4000963c <rtems_semaphore_release+0xe8>
40009684: b0 06 3f ff add %i0, -1, %i0
the_mutex->Wait_queue.Queue.owner = owner;
40009688: c0 27 60 14 clr [ %i5 + 0x14 ]
heads = the_mutex->Mutex.Wait_queue.Queue.heads;
4000968c: d2 07 60 10 ld [ %i5 + 0x10 ], %o1
if ( heads == NULL ) {
40009690: 80 a2 60 00 cmp %o1, 0
40009694: 02 80 00 30 be 40009754 <rtems_semaphore_release+0x200>
40009698: 94 10 00 08 mov %o0, %o2
_Thread_queue_Surrender(
4000969c: 96 07 bf dc add %fp, -36, %o3
400096a0: 19 10 00 55 sethi %hi(0x40015400), %o4
400096a4: 90 10 00 1c mov %i4, %o0
400096a8: 40 00 14 3d call 4000e79c <_Thread_queue_Surrender>
400096ac: 98 13 21 5c or %o4, 0x15c, %o4
400096b0: 81 c7 e0 08 ret
400096b4: 81 e8 00 00 restore
);
break;
}
return _Status_Get( status );
}
400096b8: 81 c7 e0 08 ret
400096bc: 91 e8 20 04 restore %g0, 4, %o0
return &_Thread_queue_Operations_priority_inherit;
400096c0: 98 13 21 5c or %o4, 0x15c, %o4
<== NOT EXECUTED
if ( !_CORE_mutex_Is_owner( &the_mutex->Mutex, executing ) ) {
400096c4: c2 07 60 14 ld [ %i5 + 0x14 ], %g1
400096c8: 80 a2 00 01 cmp %o0, %g1
400096cc: 12 bf ff e2 bne 40009654 <rtems_semaphore_release+0x100>
<== NEVER TAKEN
400096d0: 01 00 00 00 nop
nest_level = the_mutex->nest_level;
400096d4: f0 07 60 1c ld [ %i5 + 0x1c ], %i0
if ( nest_level > 0 ) {
400096d8: 80 a6 20 00 cmp %i0, 0
400096dc: 32 bf ff d8 bne,a 4000963c <rtems_semaphore_release+0xe8>
<== NEVER TAKEN
400096e0: b0 06 3f ff add %i0, -1, %i0
<== NOT EXECUTED
the_mutex->Wait_queue.Queue.owner = owner;
400096e4: c0 27 60 14 clr [ %i5 + 0x14 ]
heads = the_mutex->Mutex.Wait_queue.Queue.heads;
400096e8: d2 07 60 10 ld [ %i5 + 0x10 ], %o1
if ( heads == NULL ) {
400096ec: 80 a2 60 00 cmp %o1, 0
400096f0: 02 80 00 19 be 40009754 <rtems_semaphore_release+0x200>
400096f4: 94 10 00 08 mov %o0, %o2
_Thread_queue_Surrender(
400096f8: 96 07 bf dc add %fp, -36, %o3
400096fc: 40 00 14 28 call 4000e79c <_Thread_queue_Surrender>
40009700: 90 10 00 1c mov %i4, %o0
40009704: 81 c7 e0 08 ret
40009708: 81 e8 00 00 restore
4000970c: b6 16 e1 5c or %i3, 0x15c, %i3
<== NOT EXECUTED
40009710: d0 07 60 10 ld [ %i5 + 0x10 ], %o0
const Thread_queue_Operations *operations
)
{
Thread_queue_Heads *heads = the_thread_queue->Queue.heads;
if ( heads != NULL ) {
40009714: 80 a2 20 00 cmp %o0, 0
40009718: 22 80 00 09 be,a 4000973c <rtems_semaphore_release+0x1e8>
4000971c: c2 07 60 1c ld [ %i5 + 0x1c ], %g1
return ( *operations->first )( heads );
40009720: c2 06 e0 10 ld [ %i3 + 0x10 ], %g1
40009724: 9f c0 40 00 call %g1
40009728: 01 00 00 00 nop
if ( the_thread != NULL ) {
4000972c: 80 a2 20 00 cmp %o0, 0
40009730: 12 80 00 0e bne 40009768 <rtems_semaphore_release+0x214>
<== ALWAYS TAKEN
40009734: 94 10 00 08 mov %o0, %o2
if ( the_semaphore->count < maximum_count )
40009738: c2 07 60 1c ld [ %i5 + 0x1c ], %g1
<== NOT EXECUTED
4000973c: 80 a0 7f ff cmp %g1, -1
40009740: 02 80 00 05 be 40009754 <rtems_semaphore_release+0x200>
40009744: b0 10 20 0d mov 0xd, %i0
the_semaphore->count += 1;
40009748: 82 00 60 01 inc %g1
<== NOT EXECUTED
4000974c: c2 27 60 1c st %g1, [ %i5 + 0x1c ]
<== NOT EXECUTED
40009750: b0 10 20 00 clr %i0
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40009754: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009758: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000975c: 01 00 00 00 nop
return _Status_Get( status );
40009760: 81 c7 e0 08 ret
40009764: 81 e8 00 00 restore
_Thread_queue_Extract_critical(
40009768: b0 10 20 00 clr %i0
4000976c: 96 07 bf dc add %fp, -36, %o3
40009770: 92 10 00 1b mov %i3, %o1
40009774: 40 00 13 c9 call 4000e698 <_Thread_queue_Extract_critical>
40009778: 90 10 00 1c mov %i4, %o0
4000977c: 81 c7 e0 08 ret
40009780: 81 e8 00 00 restore
40009784: b6 16 e1 5c or %i3, 0x15c, %i3
<== NOT EXECUTED
40009788: d0 07 60 10 ld [ %i5 + 0x10 ], %o0
if ( heads != NULL ) {
4000978c: 80 a2 20 00 cmp %o0, 0
40009790: 22 80 00 09 be,a 400097b4 <rtems_semaphore_release+0x260>
40009794: c2 07 60 1c ld [ %i5 + 0x1c ], %g1
return ( *operations->first )( heads );
40009798: c2 06 e0 10 ld [ %i3 + 0x10 ], %g1
4000979c: 9f c0 40 00 call %g1
400097a0: 01 00 00 00 nop
if ( the_thread != NULL ) {
400097a4: 80 a2 20 00 cmp %o0, 0
400097a8: 12 bf ff f0 bne 40009768 <rtems_semaphore_release+0x214>
<== ALWAYS TAKEN
400097ac: 94 10 00 08 mov %o0, %o2
if ( the_semaphore->count < maximum_count )
400097b0: c2 07 60 1c ld [ %i5 + 0x1c ], %g1
<== NOT EXECUTED
400097b4: 80 a0 60 00 cmp %g1, 0
400097b8: 12 80 00 03 bne 400097c4 <rtems_semaphore_release+0x270>
400097bc: 82 10 20 01 mov 1, %g1
the_semaphore->count += 1;
400097c0: c2 27 60 1c st %g1, [ %i5 + 0x1c ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400097c4: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400097c8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400097cc: 01 00 00 00 nop
400097d0: 81 c7 e0 08 ret
400097d4: 91 e8 20 00 restore %g0, 0, %o0
return &_Thread_queue_Operations_FIFO;
400097d8: 10 bf ff bb b 400096c4 <rtems_semaphore_release+0x170>
400097dc: 98 13 21 84 or %o4, 0x184, %o4
400097e0: 10 bf ff ea b 40009788 <rtems_semaphore_release+0x234>
400097e4: b6 16 e1 84 or %i3, 0x184, %i3
400097e8: 10 bf ff ca b 40009710 <rtems_semaphore_release+0x1bc>
400097ec: b6 16 e1 84 or %i3, 0x184, %i3
_Thread_Resource_count_decrement( executing );
_Thread_queue_Context_clear_priority_updates( queue_context );
_Thread_Wait_acquire_default_critical( executing, &lock_context );
_Thread_Priority_remove(
400097f0: a0 07 60 20 add %i5, 0x20, %l0
400097f4: 94 07 bf dc add %fp, -36, %o2
400097f8: 40 00 10 cb call 4000db24 <_Thread_Priority_remove>
400097fc: 92 10 00 10 mov %l0, %o1
40009800: d0 07 60 10 ld [ %i5 + 0x10 ], %o0
if ( heads != NULL ) {
40009804: 80 a2 20 00 cmp %o0, 0
40009808: 02 80 00 1f be 40009884 <rtems_semaphore_release+0x330>
4000980c: 35 10 00 55 sethi %hi(0x40015400), %i2
return ( *operations->first )( heads );
40009810: b4 16 a1 70 or %i2, 0x170, %i2 ! 40015570 <_Thread_queue_Operations_priority>
40009814: c2 06 a0 10 ld [ %i2 + 0x10 ], %g1
40009818: 9f c0 40 00 call %g1
4000981c: 01 00 00 00 nop
disable_level = cpu_self->thread_dispatch_disable_level;
40009820: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
the_mutex->Wait_queue.Queue.owner = owner;
40009824: d0 27 60 14 st %o0, [ %i5 + 0x14 ]
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40009828: 82 00 60 01 inc %g1
4000982c: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
40009830: b2 10 00 08 mov %o0, %i1
cpu_self = _Thread_Dispatch_disable_critical(
&queue_context->Lock_context.Lock_context
);
if ( new_owner != NULL ) {
40009834: 80 a2 20 00 cmp %o0, 0
40009838: 02 80 00 18 be 40009898 <rtems_semaphore_release+0x344>
<== NEVER TAKEN
4000983c: b6 10 00 06 mov %g6, %i3
#if defined(RTEMS_MULTIPROCESSING)
if ( _Objects_Is_local_id( new_owner->Object.id ) )
#endif
{
_Thread_Resource_count_increment( new_owner );
_Thread_Priority_add(
40009840: 94 07 bf dc add %fp, -36, %o2
40009844: 40 00 10 b3 call 4000db10 <_Thread_Priority_add>
40009848: 92 10 00 10 mov %l0, %o1
&the_mutex->Priority_ceiling,
queue_context
);
}
_Thread_queue_Extract_critical(
4000984c: 96 07 bf dc add %fp, -36, %o3
40009850: 94 10 00 19 mov %i1, %o2
40009854: 92 10 00 1a mov %i2, %o1
40009858: 40 00 13 90 call 4000e698 <_Thread_queue_Extract_critical>
4000985c: 90 10 00 1c mov %i4, %o0
);
} else {
_CORE_mutex_Release( &the_mutex->Recursive.Mutex, queue_context );
}
_Thread_Priority_update( queue_context );
40009860: 40 00 10 bd call 4000db54 <_Thread_Priority_update>
40009864: 90 07 bf dc add %fp, -36, %o0
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
40009868: c2 06 e0 18 ld [ %i3 + 0x18 ], %g1
if ( disable_level == 1 ) {
4000986c: 80 a0 60 01 cmp %g1, 1
40009870: 02 80 00 0e be 400098a8 <rtems_semaphore_release+0x354>
<== ALWAYS TAKEN
40009874: 82 00 7f ff add %g1, -1, %g1
cpu_self->thread_dispatch_disable_level = disable_level - 1;
40009878: c2 26 e0 18 st %g1, [ %i3 + 0x18 ]
<== NOT EXECUTED
4000987c: 81 c7 e0 08 ret
<== NOT EXECUTED
40009880: 81 e8 00 00 restore
<== NOT EXECUTED
disable_level = cpu_self->thread_dispatch_disable_level;
40009884: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
the_mutex->Wait_queue.Queue.owner = owner;
40009888: c0 27 60 14 clr [ %i5 + 0x14 ]
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
4000988c: 82 00 60 01 inc %g1
<== NOT EXECUTED
40009890: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40009894: b6 10 00 06 mov %g6, %i3
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40009898: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000989c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400098a0: 01 00 00 00 nop
400098a4: 30 bf ff ef b,a 40009860 <rtems_semaphore_release+0x30c>
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400098a8: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
400098ac: c4 0e e0 1c ldub [ %i3 + 0x1c ], %g2
400098b0: 80 a0 a0 00 cmp %g2, 0
400098b4: 12 80 00 07 bne 400098d0 <rtems_semaphore_release+0x37c>
<== NEVER TAKEN
400098b8: 92 10 00 01 mov %g1, %o1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = 0;
400098bc: c0 26 e0 18 clr [ %i3 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400098c0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400098c4: 01 00 00 00 nop
400098c8: 81 c7 e0 08 ret
400098cc: 81 e8 00 00 restore
_Thread_Do_dispatch( cpu_self, level );
400098d0: c2 27 bf d4 st %g1, [ %fp + -44 ]
<== NOT EXECUTED
400098d4: 40 00 11 27 call 4000dd70 <_Thread_Do_dispatch>
<== NOT EXECUTED
400098d8: 90 10 00 1b mov %i3, %o0
<== NOT EXECUTED
400098dc: 10 bf ff f9 b 400098c0 <rtems_semaphore_release+0x36c>
<== NOT EXECUTED
400098e0: c2 07 bf d4 ld [ %fp + -44 ], %g1
<== NOT EXECUTED
40007494 <rtems_semaphore_set_priority>:
rtems_id semaphore_id,
rtems_id scheduler_id,
rtems_task_priority new_priority,
rtems_task_priority *old_priority
)
{
40007494: 9d e3 bf 70 save %sp, -144, %sp
const Scheduler_Control *scheduler;
Semaphore_Control *the_semaphore;
Thread_queue_Context queue_context;
if ( old_priority == NULL ) {
40007498: 80 a6 e0 00 cmp %i3, 0
4000749c: 02 80 00 40 be 4000759c <rtems_semaphore_set_priority+0x108>
400074a0: 03 03 c0 40 sethi %hi(0xf010000), %g1
{
uint32_t index;
index = _Scheduler_Get_index_by_id( id );
if ( index >= _Scheduler_Count ) {
400074a4: 82 10 60 01 or %g1, 1, %g1 ! f010001 <RAM_SIZE+0xec10001>
400074a8: 80 a6 40 01 cmp %i1, %g1
400074ac: 02 80 00 04 be 400074bc <rtems_semaphore_set_priority+0x28>
400074b0: 92 07 bf dc add %fp, -36, %o1
return RTEMS_INVALID_ADDRESS;
}
scheduler = _Scheduler_Get_by_id( scheduler_id );
if ( scheduler == NULL ) {
return RTEMS_INVALID_ID;
400074b4: 81 c7 e0 08 ret
400074b8: 91 e8 20 04 restore %g0, 4, %o0
return (Semaphore_Control *) _Objects_Get(
400074bc: 15 10 00 52 sethi %hi(0x40014800), %o2
400074c0: 90 10 00 18 mov %i0, %o0
400074c4: 40 00 0b 4f call 4000a200 <_Objects_Get>
400074c8: 94 12 a2 d8 or %o2, 0x2d8, %o2
}
the_semaphore = _Semaphore_Get( semaphore_id, &queue_context );
if ( the_semaphore == NULL ) {
400074cc: b8 92 20 00 orcc %o0, 0, %i4
400074d0: 02 bf ff f9 be 400074b4 <rtems_semaphore_set_priority+0x20>
400074d4: 3b 10 00 46 sethi %hi(0x40011800), %i5
400074d8: ba 17 60 30 or %i5, 0x30, %i5 ! 40011830 <_Scheduler_Table>
return ( *scheduler->Operations.map_priority )( scheduler, priority );
400074dc: c2 07 60 1c ld [ %i5 + 0x1c ], %g1
400074e0: f2 07 60 40 ld [ %i5 + 0x40 ], %i1
400074e4: f0 07 60 44 ld [ %i5 + 0x44 ], %i0
400074e8: 92 10 20 00 clr %o1
400074ec: 94 10 00 1a mov %i2, %o2
400074f0: 9f c0 40 00 call %g1
400074f4: 90 10 00 1d mov %i5, %o0
if ( new_priority != RTEMS_CURRENT_PRIORITY && !valid ) {
400074f8: 80 a6 60 00 cmp %i1, 0
400074fc: 02 80 00 37 be 400075d8 <rtems_semaphore_set_priority+0x144>
<== ALWAYS TAKEN
40007500: 82 10 20 01 mov 1, %g1
40007504: 82 10 20 00 clr %g1
<== NOT EXECUTED
40007508: 80 88 60 ff btst 0xff, %g1
4000750c: 02 80 00 04 be 4000751c <rtems_semaphore_set_priority+0x88>
40007510: 80 a6 a0 00 cmp %i2, 0
40007514: 12 80 00 3b bne 40007600 <rtems_semaphore_set_priority+0x16c>
<== ALWAYS TAKEN
40007518: 01 00 00 00 nop
queue_context->Priority.update_count = 0;
4000751c: c0 27 bf f0 clr [ %fp + -16 ]
switch ( the_semaphore->variant ) {
40007520: c2 07 20 38 ld [ %i4 + 0x38 ], %g1
40007524: 83 30 60 1d srl %g1, 0x1d, %g1
40007528: 80 a0 60 01 cmp %g1, 1
4000752c: 12 80 00 1e bne 400075a4 <rtems_semaphore_set_priority+0x110>
40007530: a0 10 20 00 clr %l0
40007534: e0 1f 20 30 ldd [ %i4 + 0x30 ], %l0
if ( sc == RTEMS_SUCCESSFUL && new_priority != RTEMS_CURRENT_PRIORITY ) {
40007538: 80 a6 a0 00 cmp %i2, 0
4000753c: 12 80 00 36 bne 40007614 <rtems_semaphore_set_priority+0x180>
40007540: b0 10 20 00 clr %i0
disable_level = cpu_self->thread_dispatch_disable_level;
40007544: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40007548: 82 00 60 01 inc %g1
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
4000754c: b8 10 00 06 mov %g6, %i4
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40007550: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007554: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007558: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000755c: 01 00 00 00 nop
_Thread_Priority_update( queue_context );
40007560: 40 00 10 c3 call 4000b86c <_Thread_Priority_update>
40007564: 90 07 bf dc add %fp, -36, %o0
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
40007568: c2 07 20 18 ld [ %i4 + 0x18 ], %g1
if ( disable_level == 1 ) {
4000756c: 80 a0 60 01 cmp %g1, 1
40007570: 02 80 00 10 be 400075b0 <rtems_semaphore_set_priority+0x11c>
<== ALWAYS TAKEN
40007574: 82 00 7f ff add %g1, -1, %g1
cpu_self->thread_dispatch_disable_level = disable_level - 1;
40007578: c2 27 20 18 st %g1, [ %i4 + 0x18 ]
<== NOT EXECUTED
return ( *scheduler->Operations.unmap_priority )( scheduler, priority );
4000757c: 92 10 00 10 mov %l0, %o1
<== NOT EXECUTED
40007580: c2 07 60 20 ld [ %i5 + 0x20 ], %g1
40007584: 94 10 00 11 mov %l1, %o2
40007588: 9f c0 40 00 call %g1
4000758c: 90 10 00 1d mov %i5, %o0
RTEMS_INLINE_ROUTINE rtems_task_priority _RTEMS_Priority_From_core(
const Scheduler_Control *scheduler,
Priority_Control priority
)
{
return (rtems_task_priority)
40007590: d2 26 c0 00 st %o1, [ %i3 ]
40007594: 81 c7 e0 08 ret
40007598: 81 e8 00 00 restore
scheduler,
new_priority,
old_priority,
&queue_context
);
}
4000759c: 81 c7 e0 08 ret
400075a0: 91 e8 20 09 restore %g0, 9, %o0
old_priority = 0;
400075a4: a2 10 20 00 clr %l1
sc = RTEMS_NOT_DEFINED;
400075a8: 10 bf ff e7 b 40007544 <rtems_semaphore_set_priority+0xb0>
400075ac: b0 10 20 0b mov 0xb, %i0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400075b0: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
400075b4: c4 0f 20 1c ldub [ %i4 + 0x1c ], %g2
400075b8: 80 a0 a0 00 cmp %g2, 0
400075bc: 32 80 00 0c bne,a 400075ec <rtems_semaphore_set_priority+0x158>
<== NEVER TAKEN
400075c0: 92 10 00 01 mov %g1, %o1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = 0;
400075c4: c0 27 20 18 clr [ %i4 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400075c8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400075cc: 01 00 00 00 nop
400075d0: 10 bf ff ec b 40007580 <rtems_semaphore_set_priority+0xec>
400075d4: 92 10 00 10 mov %l0, %o1
if ( new_priority != RTEMS_CURRENT_PRIORITY && !valid ) {
400075d8: 80 a6 80 18 cmp %i2, %i0
400075dc: 18 bf ff cc bgu 4000750c <rtems_semaphore_set_priority+0x78>
400075e0: 80 88 60 ff btst 0xff, %g1
400075e4: 10 bf ff c9 b 40007508 <rtems_semaphore_set_priority+0x74>
400075e8: 82 10 20 00 clr %g1
_Thread_Do_dispatch( cpu_self, level );
400075ec: c2 27 bf d4 st %g1, [ %fp + -44 ]
<== NOT EXECUTED
400075f0: 40 00 10 fb call 4000b9dc <_Thread_Do_dispatch>
<== NOT EXECUTED
400075f4: 90 10 00 1c mov %i4, %o0
<== NOT EXECUTED
400075f8: 10 bf ff f4 b 400075c8 <rtems_semaphore_set_priority+0x134>
<== NOT EXECUTED
400075fc: c2 07 bf d4 ld [ %fp + -44 ], %g1
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007600: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007604: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007608: 01 00 00 00 nop
return RTEMS_INVALID_PRIORITY;
4000760c: 81 c7 e0 08 ret
40007610: 91 e8 20 13 restore %g0, 0x13, %o0
40007614: c4 07 20 14 ld [ %i4 + 0x14 ], %g2
if ( owner != NULL ) {
40007618: 80 a0 a0 00 cmp %g2, 0
4000761c: 22 bf ff ca be,a 40007544 <rtems_semaphore_set_priority+0xb0>
<== ALWAYS TAKEN
40007620: d0 3f 20 30 std %o0, [ %i4 + 0x30 ]
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007624: 91 d0 20 09 ta 9
<== NOT EXECUTED
RTEMS_INLINE_ROUTINE void _Thread_Wait_acquire(
Thread_Control *the_thread,
Thread_queue_Context *queue_context
)
{
_ISR_lock_ISR_disable( &queue_context->Lock_context.Lock_context );
40007628: c2 27 bf dc st %g1, [ %fp + -36 ]
<== NOT EXECUTED
RTEMS_INLINE_ROUTINE void _Priority_Node_set_priority(
Priority_Node *node,
Priority_Control priority
)
{
node->priority = priority;
4000762c: d0 3f 20 30 std %o0, [ %i4 + 0x30 ]
<== NOT EXECUTED
_Thread_Priority_changed(
40007630: 96 07 bf dc add %fp, -36, %o3
<== NOT EXECUTED
40007634: 94 10 20 00 clr %o2
<== NOT EXECUTED
40007638: 92 07 20 20 add %i4, 0x20, %o1
<== NOT EXECUTED
4000763c: 40 00 10 85 call 4000b850 <_Thread_Priority_changed>
<== NOT EXECUTED
40007640: 90 10 00 02 mov %g2, %o0
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007644: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007648: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000764c: 01 00 00 00 nop
<== NOT EXECUTED
40007650: 30 bf ff bd b,a 40007544 <rtems_semaphore_set_priority+0xb0>
<== NOT EXECUTED
40007108 <rtems_signal_catch>:
rtems_status_code rtems_signal_catch(
rtems_asr_entry asr_handler,
rtems_mode mode_set
)
{
40007108: 9d e3 bf 98 save %sp, -104, %sp
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000710c: 91 d0 20 09 ta 9
<== NOT EXECUTED
RTEMS_API_Control *api;
ASR_Information *asr;
ISR_lock_Context lock_context;
executing = _Thread_State_acquire_for_executing( &lock_context );
api = executing->API_Extensions[ THREAD_API_RTEMS ];
40007110: c4 01 a0 20 ld [ %g6 + 0x20 ], %g2
asr = &api->Signal;
if ( !_ASR_Is_null_handler( asr_handler ) ) {
40007114: 80 a6 20 00 cmp %i0, 0
40007118: 02 80 00 08 be 40007138 <rtems_signal_catch+0x30>
4000711c: d0 00 a1 58 ld [ %g2 + 0x158 ], %o0
asr->mode_set = mode_set;
40007120: f2 22 20 10 st %i1, [ %o0 + 0x10 ]
<== NOT EXECUTED
asr->handler = asr_handler;
40007124: f0 22 20 0c st %i0, [ %o0 + 0xc ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007128: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000712c: 01 00 00 00 nop
_ASR_Initialize( asr );
}
_Thread_State_release( executing, &lock_context );
return RTEMS_SUCCESSFUL;
}
40007130: 81 c7 e0 08 ret
40007134: 91 e8 20 00 restore %g0, 0, %o0
40007138: c2 27 bf fc st %g1, [ %fp + -4 ]
memset(asr, 0, sizeof(*asr));
4000713c: 94 10 20 18 mov 0x18, %o2
40007140: 92 10 20 00 clr %o1
40007144: 40 00 22 cd call 4000fc78 <memset>
40007148: 90 02 20 08 add %o0, 8, %o0
4000714c: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
40007150: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007154: 01 00 00 00 nop
40007158: 81 c7 e0 08 ret
4000715c: 91 e8 20 00 restore %g0, 0, %o0
40007160 <rtems_signal_send>:
rtems_status_code rtems_signal_send(
rtems_id id,
rtems_signal_set signal_set
)
{
40007160: 9d e3 bf 90 save %sp, -112, %sp
Thread_Control *the_thread;
ISR_lock_Context lock_context;
RTEMS_API_Control *api;
ASR_Information *asr;
if ( signal_set == 0 ) {
40007164: 80 a6 60 00 cmp %i1, 0
40007168: 02 80 00 30 be 40007228 <rtems_signal_send+0xc8>
4000716c: 82 10 20 0a mov 0xa, %g1
return RTEMS_INVALID_NUMBER;
}
the_thread = _Thread_Get( id, &lock_context );
40007170: 92 07 bf fc add %fp, -4, %o1
40007174: 40 00 10 b2 call 4000b43c <_Thread_Get>
40007178: 90 10 00 18 mov %i0, %o0
if ( the_thread == NULL ) {
4000717c: 80 a2 20 00 cmp %o0, 0
40007180: 02 80 00 2a be 40007228 <rtems_signal_send+0xc8>
40007184: 82 10 20 04 mov 4, %g1
#else
return RTEMS_INVALID_ID;
#endif
}
api = the_thread->API_Extensions[ THREAD_API_RTEMS ];
40007188: c2 02 21 58 ld [ %o0 + 0x158 ], %g1
asr = &api->Signal;
_Thread_State_acquire_critical( the_thread, &lock_context );
if ( _ASR_Is_null_handler( asr->handler ) ) {
4000718c: c4 00 60 0c ld [ %g1 + 0xc ], %g2
40007190: 80 a0 a0 00 cmp %g2, 0
40007194: 02 80 00 2f be 40007250 <rtems_signal_send+0xf0>
40007198: 01 00 00 00 nop
_Thread_State_release( the_thread, &lock_context );
return RTEMS_NOT_DEFINED;
}
if ( asr->is_enabled ) {
4000719c: c4 08 60 08 ldub [ %g1 + 8 ], %g2
400071a0: 80 a0 a0 00 cmp %g2, 0
400071a4: 22 80 00 23 be,a 40007230 <rtems_signal_send+0xd0>
400071a8: c4 00 60 18 ld [ %g1 + 0x18 ], %g2
*signal_set |= signals;
400071ac: c4 00 60 14 ld [ %g1 + 0x14 ], %g2
400071b0: b2 10 80 19 or %g2, %i1, %i1
_Assert( _Thread_State_is_owner( the_thread ) );
cpu_of_thread = _Thread_Get_CPU( the_thread );
action->handler = handler;
400071b4: 05 10 00 1c sethi %hi(0x40007000), %g2
400071b8: f2 20 60 14 st %i1, [ %g1 + 0x14 ]
400071bc: 84 10 a0 8c or %g2, 0x8c, %g2
400071c0: c4 20 60 28 st %g2, [ %g1 + 0x28 ]
} else {
_Atomic_Fetch_or_ulong( &cpu_target->message, 0, ATOMIC_ORDER_RELEASE );
_CPU_SMP_Send_interrupt( _Per_CPU_Get_index( cpu_target ) );
}
#else
cpu_self->dispatch_necessary = true;
400071c4: 86 10 20 01 mov 1, %g3
400071c8: c6 29 a0 1c stb %g3, [ %g6 + 0x1c ]
RTEMS_INLINE_ROUTINE void _Chain_Append_if_is_off_chain_unprotected(
Chain_Control *the_chain,
Chain_Node *the_node
)
{
if ( _Chain_Is_node_off_chain( the_node ) ) {
400071cc: c6 00 60 20 ld [ %g1 + 0x20 ], %g3
400071d0: 80 a0 e0 00 cmp %g3, 0
400071d4: 12 80 00 09 bne 400071f8 <rtems_signal_send+0x98>
400071d8: 84 10 00 06 mov %g6, %g2
old_last = tail->previous;
400071dc: c6 02 20 e8 ld [ %o0 + 0xe8 ], %g3
<== NOT EXECUTED
return &the_chain->Tail.Node;
400071e0: 88 02 20 e4 add %o0, 0xe4, %g4
<== NOT EXECUTED
the_node->next = tail;
400071e4: c8 20 60 20 st %g4, [ %g1 + 0x20 ]
<== NOT EXECUTED
_Thread_Dispatch_request( _Per_CPU_Get(), cpu_of_thread );
_Chain_Append_if_is_off_chain_unprotected(
400071e8: 88 00 60 20 add %g1, 0x20, %g4
<== NOT EXECUTED
tail->previous = the_node;
400071ec: c8 22 20 e8 st %g4, [ %o0 + 0xe8 ]
<== NOT EXECUTED
old_last->next = the_node;
400071f0: c8 20 c0 00 st %g4, [ %g3 ]
<== NOT EXECUTED
the_node->previous = old_last;
400071f4: c6 20 60 24 st %g3, [ %g1 + 0x24 ]
<== NOT EXECUTED
disable_level = cpu_self->thread_dispatch_disable_level;
400071f8: c2 00 a0 18 ld [ %g2 + 0x18 ], %g1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400071fc: 82 00 60 01 inc %g1
<== NOT EXECUTED
40007200: c2 20 a0 18 st %g1, [ %g2 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007204: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007208: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000720c: 01 00 00 00 nop
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
40007210: c2 00 a0 18 ld [ %g2 + 0x18 ], %g1
if ( disable_level == 1 ) {
40007214: 80 a0 60 01 cmp %g1, 1
40007218: 02 80 00 13 be 40007264 <rtems_signal_send+0x104>
4000721c: 86 00 7f ff add %g1, -1, %g3
cpu_self->thread_dispatch_disable_level = disable_level - 1;
40007220: c6 20 a0 18 st %g3, [ %g2 + 0x18 ]
} else {
_ASR_Post_signals( signal_set, &asr->signals_pending );
_Thread_State_release( the_thread, &lock_context );
}
return RTEMS_SUCCESSFUL;
40007224: 82 10 20 00 clr %g1
}
40007228: 81 c7 e0 08 ret
4000722c: 91 e8 00 01 restore %g0, %g1, %o0
40007230: b2 10 80 19 or %g2, %i1, %i1
<== NOT EXECUTED
40007234: f2 20 60 18 st %i1, [ %g1 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007238: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000723c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007240: 01 00 00 00 nop
return RTEMS_SUCCESSFUL;
40007244: 82 10 20 00 clr %g1 ! 0 <PROM_START>
}
40007248: 81 c7 e0 08 ret
4000724c: 91 e8 00 01 restore %g0, %g1, %o0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007250: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007254: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007258: 01 00 00 00 nop
return RTEMS_NOT_DEFINED;
4000725c: 10 bf ff f3 b 40007228 <rtems_signal_send+0xc8>
40007260: 82 10 20 0b mov 0xb, %g1 ! b <_TLS_Alignment+0xa>
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007264: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
40007268: c6 08 a0 1c ldub [ %g2 + 0x1c ], %g3
4000726c: 80 a0 e0 00 cmp %g3, 0
40007270: 12 80 00 07 bne 4000728c <rtems_signal_send+0x12c>
<== ALWAYS TAKEN
40007274: 92 10 00 01 mov %g1, %o1
cpu_self->thread_dispatch_disable_level = 0;
40007278: c0 20 a0 18 clr [ %g2 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000727c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007280: 01 00 00 00 nop
return RTEMS_SUCCESSFUL;
40007284: 10 bf ff e9 b 40007228 <rtems_signal_send+0xc8>
40007288: 82 10 20 00 clr %g1 ! 0 <PROM_START>
_Thread_Do_dispatch( cpu_self, level );
4000728c: c2 27 bf f4 st %g1, [ %fp + -12 ]
40007290: 40 00 10 0c call 4000b2c0 <_Thread_Do_dispatch>
40007294: 90 10 00 02 mov %g2, %o0
40007298: 10 bf ff f9 b 4000727c <rtems_signal_send+0x11c>
4000729c: c2 07 bf f4 ld [ %fp + -12 ], %g1
4000e718 <rtems_status_code_to_errno>:
[RTEMS_IO_ERROR] = EIO,
[RTEMS_PROXY_BLOCKING] = EIO
};
int rtems_status_code_to_errno(rtems_status_code sc)
{
4000e718: 9d e3 bf a0 save %sp, -96, %sp
<== NOT EXECUTED
4000e71c: 82 10 00 18 mov %i0, %g1
<== NOT EXECUTED
if (sc == RTEMS_SUCCESSFUL) {
4000e720: 80 a0 60 00 cmp %g1, 0
<== NOT EXECUTED
4000e724: 02 80 00 0c be 4000e754 <rtems_status_code_to_errno+0x3c>
<== NOT EXECUTED
4000e728: b0 10 20 00 clr %i0
<== NOT EXECUTED
return 0;
} else {
int eno = EINVAL;
if ((unsigned) sc <= RTEMS_STATUS_CODES_LAST) {
4000e72c: 80 a0 60 1c cmp %g1, 0x1c
<== NOT EXECUTED
4000e730: 18 80 00 06 bgu 4000e748 <rtems_status_code_to_errno+0x30>
<== NOT EXECUTED
4000e734: ba 10 20 16 mov 0x16, %i5
<== NOT EXECUTED
eno = status_code_to_errno [sc];
4000e738: 83 28 60 02 sll %g1, 2, %g1
<== NOT EXECUTED
4000e73c: 05 10 00 46 sethi %hi(0x40011800), %g2
<== NOT EXECUTED
4000e740: 84 10 a1 e8 or %g2, 0x1e8, %g2 ! 400119e8 <status_code_to_errno>
<== NOT EXECUTED
4000e744: fa 00 80 01 ld [ %g2 + %g1 ], %i5
<== NOT EXECUTED
}
errno = eno;
4000e748: 40 00 03 64 call 4000f4d8 <__errno>
<== NOT EXECUTED
4000e74c: b0 10 3f ff mov -1, %i0
<== NOT EXECUTED
4000e750: fa 22 00 00 st %i5, [ %o0 ]
<== NOT EXECUTED
return -1;
}
}
4000e754: 81 c7 e0 08 ret
<== NOT EXECUTED
4000e758: 81 e8 00 00 restore
<== NOT EXECUTED
40006edc <rtems_task_create>:
size_t stack_size,
rtems_mode initial_modes,
rtems_attribute attribute_set,
rtems_id *id
)
{
40006edc: 9d e3 bf 70 save %sp, -144, %sp
Priority_Control priority;
RTEMS_API_Control *api;
ASR_Information *asr;
if ( !id )
40006ee0: 80 a7 60 00 cmp %i5, 0
40006ee4: 02 80 00 50 be 40007024 <rtems_task_create+0x148>
40006ee8: 80 a6 20 00 cmp %i0, 0
return RTEMS_INVALID_ADDRESS;
if ( !rtems_is_name_valid( name ) )
40006eec: 02 80 00 3e be 40006fe4 <rtems_task_create+0x108>
40006ef0: 82 10 20 03 mov 3, %g1
*/
RTEMS_INLINE_ROUTINE bool _Attributes_Is_system_task(
rtems_attribute attribute_set
)
{
return ( attribute_set & RTEMS_SYSTEM_TASK ) ? true : false;
40006ef4: 83 37 20 0f srl %i4, 0xf, %g1
40006ef8: 82 08 60 01 and %g1, 1, %g1
/*
* Validate the RTEMS API priority and convert it to the core priority range.
*/
if ( !_Attributes_Is_system_task( the_attribute_set ) ) {
if ( initial_priority == PRIORITY_MINIMUM ) {
40006efc: 80 90 40 19 orcc %g1, %i1, %g0
40006f00: 02 80 00 3e be 40006ff8 <rtems_task_create+0x11c>
40006f04: 92 10 20 00 clr %o1
const Scheduler_Control *scheduler,
rtems_task_priority priority,
bool *valid
)
{
*valid = ( priority <= scheduler->maximum_priority );
40006f08: 21 10 00 43 sethi %hi(0x40010c00), %l0
40006f0c: 90 14 21 20 or %l0, 0x120, %o0 ! 40010d20 <_Scheduler_Table>
RTEMS_INLINE_ROUTINE Priority_Control _Scheduler_Map_priority(
const Scheduler_Control *scheduler,
Priority_Control priority
)
{
return ( *scheduler->Operations.map_priority )( scheduler, priority );
40006f10: c2 02 20 1c ld [ %o0 + 0x1c ], %g1
40006f14: e2 02 20 40 ld [ %o0 + 0x40 ], %l1
40006f18: e8 02 20 44 ld [ %o0 + 0x44 ], %l4
40006f1c: 9f c0 40 00 call %g1
40006f20: 94 10 00 19 mov %i1, %o2
}
scheduler = _Thread_Scheduler_get_home( _Thread_Get_executing() );
priority = _RTEMS_Priority_To_core( scheduler, initial_priority, &valid );
if ( !valid ) {
40006f24: 80 a4 60 00 cmp %l1, 0
40006f28: a4 10 00 08 mov %o0, %l2
40006f2c: 02 80 00 30 be 40006fec <rtems_task_create+0x110>
<== ALWAYS TAKEN
40006f30: a6 10 00 09 mov %o1, %l3
_RTEMS_Lock_allocator();
40006f34: 40 00 01 5d call 400074a8 <_RTEMS_Lock_allocator>
40006f38: 23 10 00 52 sethi %hi(0x40014800), %l1
_Thread_Kill_zombies();
40006f3c: 40 00 14 f1 call 4000c300 <_Thread_Kill_zombies>
40006f40: 01 00 00 00 nop
return (Thread_Control *)
40006f44: 40 00 09 2c call 400093f4 <_Objects_Allocate_unprotected>
40006f48: 90 14 60 18 or %l1, 0x18, %o0
* this results in a lack of control over when memory is allocated
* and can be freed in the event of an error.
*/
the_thread = _RTEMS_tasks_Allocate();
if ( !the_thread ) {
40006f4c: b2 92 20 00 orcc %o0, 0, %i1
40006f50: 02 80 00 38 be 40007030 <rtems_task_create+0x154>
40006f54: 85 36 e0 09 srl %i3, 9, %g2
/*
* Initialize the core thread for this task.
*/
status = _Thread_Initialize(
40006f58: e4 3f bf f0 std %l2, [ %fp + -16 ]
*/
RTEMS_INLINE_ROUTINE bool _Modes_Is_timeslice (
Modes_Control mode_set
)
{
return (mode_set & RTEMS_TIMESLICE_MASK) == RTEMS_TIMESLICE;
40006f5c: 84 08 a0 01 and %g2, 1, %g2
40006f60: 82 07 bf fc add %fp, -4, %g1
40006f64: c4 23 a0 68 st %g2, [ %sp + 0x68 ]
40006f68: 9a 0f 20 01 and %i4, 1, %o5
40006f6c: c4 07 bf f0 ld [ %fp + -16 ], %g2
40006f70: c2 23 a0 74 st %g1, [ %sp + 0x74 ]
*/
RTEMS_INLINE_ROUTINE ISR_Level _Modes_Get_interrupt_level (
Modes_Control mode_set
)
{
return ( mode_set & RTEMS_INTERRUPT_MASK );
40006f74: 82 0e e0 0f and %i3, 0xf, %g1
40006f78: c4 23 a0 5c st %g2, [ %sp + 0x5c ]
40006f7c: 98 10 00 1a mov %i2, %o4
40006f80: c4 07 bf f4 ld [ %fp + -12 ], %g2
40006f84: c2 23 a0 70 st %g1, [ %sp + 0x70 ]
return (mode_set & RTEMS_PREEMPT_MASK) == RTEMS_PREEMPT;
40006f88: 83 36 e0 08 srl %i3, 8, %g1
40006f8c: c0 23 a0 6c clr [ %sp + 0x6c ]
40006f90: 82 18 60 01 xor %g1, 1, %g1
40006f94: c4 23 a0 60 st %g2, [ %sp + 0x60 ]
40006f98: 82 08 60 01 and %g1, 1, %g1
40006f9c: c2 23 a0 64 st %g1, [ %sp + 0x64 ]
40006fa0: 96 10 20 00 clr %o3
40006fa4: f0 27 bf fc st %i0, [ %fp + -4 ]
40006fa8: 94 14 21 20 or %l0, 0x120, %o2
40006fac: 92 10 00 19 mov %i1, %o1
40006fb0: 40 00 0f d5 call 4000af04 <_Thread_Initialize>
40006fb4: 90 14 60 18 or %l1, 0x18, %o0
NULL, /* no budget algorithm callout */
_Modes_Get_interrupt_level(initial_modes),
(Objects_Name) name
);
if ( !status ) {
40006fb8: 80 a2 20 00 cmp %o0, 0
40006fbc: 02 80 00 12 be 40007004 <rtems_task_create+0x128>
40006fc0: b7 36 e0 0a srl %i3, 0xa, %i3
}
api = the_thread->API_Extensions[ THREAD_API_RTEMS ];
asr = &api->Signal;
asr->is_enabled = _Modes_Is_asr_disabled(initial_modes) ? false : true;
40006fc4: c4 06 61 58 ld [ %i1 + 0x158 ], %g2
*id = the_thread->Object.id;
40006fc8: c2 06 60 08 ld [ %i1 + 8 ], %g1
asr->is_enabled = _Modes_Is_asr_disabled(initial_modes) ? false : true;
40006fcc: b6 1e e0 01 xor %i3, 1, %i3
40006fd0: b6 0e e0 01 and %i3, 1, %i3
40006fd4: f6 28 a0 08 stb %i3, [ %g2 + 8 ]
_RTEMS_Unlock_allocator();
40006fd8: 40 00 01 39 call 400074bc <_RTEMS_Unlock_allocator>
40006fdc: c2 27 40 00 st %g1, [ %i5 ]
}
#endif
_Objects_Allocator_unlock();
return RTEMS_SUCCESSFUL;
40006fe0: 82 10 20 00 clr %g1
}
40006fe4: 81 c7 e0 08 ret
40006fe8: 91 e8 00 01 restore %g0, %g1, %o0
if ( !valid ) {
40006fec: 80 a6 40 14 cmp %i1, %l4
40006ff0: 08 bf ff d1 bleu 40006f34 <rtems_task_create+0x58>
40006ff4: 01 00 00 00 nop
return RTEMS_INVALID_PRIORITY;
40006ff8: 82 10 20 13 mov 0x13, %g1 ! 13 <_TLS_Alignment+0x12>
}
40006ffc: 81 c7 e0 08 ret
40007000: 91 e8 00 01 restore %g0, %g1, %o0
_Objects_Free(
40007004: 40 00 0a 28 call 400098a4 <_Objects_Get_information_id>
40007008: d0 06 60 08 ld [ %i1 + 8 ], %o0
4000700c: 40 00 09 fa call 400097f4 <_Objects_Free>
40007010: 92 10 00 19 mov %i1, %o1
40007014: 40 00 01 2a call 400074bc <_RTEMS_Unlock_allocator>
40007018: 01 00 00 00 nop
return RTEMS_UNSATISFIED;
4000701c: 10 bf ff f2 b 40006fe4 <rtems_task_create+0x108>
40007020: 82 10 20 0d mov 0xd, %g1 ! d <_TLS_Alignment+0xc>
return RTEMS_INVALID_ADDRESS;
40007024: 82 10 20 09 mov 9, %g1
}
40007028: 81 c7 e0 08 ret
4000702c: 91 e8 00 01 restore %g0, %g1, %o0
40007030: 40 00 01 23 call 400074bc <_RTEMS_Unlock_allocator>
40007034: 01 00 00 00 nop
return RTEMS_TOO_MANY;
40007038: 10 bf ff eb b 40006fe4 <rtems_task_create+0x108>
4000703c: 82 10 20 05 mov 5, %g1 ! 5 <_TLS_Alignment+0x4>
40007040 <rtems_task_delete>:
#include <rtems/score/threadimpl.h>
rtems_status_code rtems_task_delete(
rtems_id id
)
{
40007040: 9d e3 bf 70 save %sp, -144, %sp
Thread_Control *the_thread;
Thread_Close_context context;
Thread_Control *executing;
_Thread_queue_Context_initialize( &context.Base );
the_thread = _Thread_Get( id, &context.Base.Lock_context.Lock_context );
40007044: 90 10 00 18 mov %i0, %o0
40007048: 40 00 0f 72 call 4000ae10 <_Thread_Get>
4000704c: 92 07 bf d8 add %fp, -40, %o1
if ( the_thread == NULL ) {
40007050: 82 92 20 00 orcc %o0, 0, %g1
40007054: 02 80 00 26 be 400070ec <rtems_task_delete+0xac>
40007058: 01 00 00 00 nop
#endif
return RTEMS_INVALID_ID;
}
executing = _Thread_Executing;
4000705c: d2 01 a0 20 ld [ %g6 + 0x20 ], %o1
if ( the_thread == executing ) {
40007060: 80 a0 40 09 cmp %g1, %o1
40007064: 02 80 00 07 be 40007080 <rtems_task_delete+0x40>
40007068: ba 10 00 06 mov %g6, %i5
THREAD_LIFE_TERMINATING | THREAD_LIFE_DETACHED,
NULL
);
_Thread_Dispatch_enable( cpu_self );
} else {
_Thread_Close( the_thread, executing, &context );
4000706c: 94 07 bf d8 add %fp, -40, %o2
40007070: 40 00 15 5a call 4000c5d8 <_Thread_Close>
40007074: b0 10 20 00 clr %i0
40007078: 81 c7 e0 08 ret
4000707c: 81 e8 00 00 restore
const ISR_lock_Context *lock_context
)
{
uint32_t disable_level;
disable_level = cpu_self->thread_dispatch_disable_level;
40007080: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
_Profiling_Thread_dispatch_disable_critical(
cpu_self,
disable_level,
lock_context
);
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40007084: 82 00 60 01 inc %g1
<== NOT EXECUTED
40007088: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000708c: c2 07 bf d8 ld [ %fp + -40 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007090: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007094: 01 00 00 00 nop
_Thread_Exit(
40007098: 94 10 20 00 clr %o2 ! 0 <PROM_START>
4000709c: 40 00 15 5e call 4000c614 <_Thread_Exit>
400070a0: 92 10 20 14 mov 0x14, %o1
*
* @param[in] cpu_self The current processor.
*/
RTEMS_INLINE_ROUTINE void _Thread_Dispatch_enable( Per_CPU_Control *cpu_self )
{
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
400070a4: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
if ( disable_level == 1 ) {
400070a8: 80 a0 60 01 cmp %g1, 1
400070ac: 02 80 00 06 be 400070c4 <rtems_task_delete+0x84>
<== ALWAYS TAKEN
400070b0: 82 00 7f ff add %g1, -1, %g1
}
return RTEMS_SUCCESSFUL;
400070b4: b0 10 20 00 clr %i0
<== NOT EXECUTED
}
_ISR_Local_enable( level );
} else {
_Assert( disable_level > 0 );
cpu_self->thread_dispatch_disable_level = disable_level - 1;
400070b8: c2 27 60 18 st %g1, [ %i5 + 0x18 ]
<== NOT EXECUTED
400070bc: 81 c7 e0 08 ret
<== NOT EXECUTED
400070c0: 81 e8 00 00 restore
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400070c4: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
400070c8: c4 0f 60 1c ldub [ %i5 + 0x1c ], %g2
400070cc: 80 a0 a0 00 cmp %g2, 0
400070d0: 12 80 00 09 bne 400070f4 <rtems_task_delete+0xb4>
<== ALWAYS TAKEN
400070d4: 92 10 00 01 mov %g1, %o1
cpu_self->thread_dispatch_disable_level = 0;
400070d8: c0 27 60 18 clr [ %i5 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400070dc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400070e0: 01 00 00 00 nop
<== NOT EXECUTED
400070e4: 81 c7 e0 08 ret
<== NOT EXECUTED
400070e8: 91 e8 20 00 restore %g0, 0, %o0
<== NOT EXECUTED
}
400070ec: 81 c7 e0 08 ret
400070f0: 91 e8 20 04 restore %g0, 4, %o0
_Thread_Do_dispatch( cpu_self, level );
400070f4: c2 27 bf d4 st %g1, [ %fp + -44 ]
400070f8: 40 00 0e e7 call 4000ac94 <_Thread_Do_dispatch>
400070fc: 90 10 00 1d mov %i5, %o0
40007100: 10 bf ff f7 b 400070dc <rtems_task_delete+0x9c>
<== NOT EXECUTED
40007104: c2 07 bf d4 ld [ %fp + -44 ], %g1
<== NOT EXECUTED
40009194 <rtems_task_get_affinity>:
rtems_status_code rtems_task_get_affinity(
rtems_id id,
size_t cpusetsize,
cpu_set_t *cpuset
)
{
40009194: 9d e3 bf 90 save %sp, -112, %sp
Thread_Control *the_thread;
ISR_lock_Context lock_context;
Per_CPU_Control *cpu_self;
bool ok;
if ( cpuset == NULL ) {
40009198: 80 a6 a0 00 cmp %i2, 0
4000919c: 02 80 00 1c be 4000920c <rtems_task_get_affinity+0x78>
400091a0: 82 10 20 09 mov 9, %g1
return RTEMS_INVALID_ADDRESS;
}
the_thread = _Thread_Get( id, &lock_context );
400091a4: 92 07 bf fc add %fp, -4, %o1
400091a8: 40 00 12 94 call 4000dbf8 <_Thread_Get>
400091ac: 90 10 00 18 mov %i0, %o0
if ( the_thread == NULL ) {
400091b0: 80 a2 20 00 cmp %o0, 0
400091b4: 02 80 00 16 be 4000920c <rtems_task_get_affinity+0x78>
400091b8: 82 10 20 04 mov 4, %g1
disable_level = cpu_self->thread_dispatch_disable_level;
400091bc: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400091c0: 82 00 60 01 inc %g1
400091c4: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
400091c8: ba 10 00 06 mov %g6, %i5
}
cpu_self = _Thread_Dispatch_disable_critical( &lock_context );
_Thread_State_acquire_critical( the_thread, &lock_context );
ok = _Scheduler_Get_affinity(
400091cc: 94 10 00 1a mov %i2, %o2
400091d0: 40 00 0e ff call 4000cdcc <_Scheduler_Get_affinity>
400091d4: 92 10 00 19 mov %i1, %o1
400091d8: b8 10 00 08 mov %o0, %i4
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400091dc: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400091e0: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400091e4: 01 00 00 00 nop
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
400091e8: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
if ( disable_level == 1 ) {
400091ec: 80 a0 60 01 cmp %g1, 1
400091f0: 02 80 00 09 be 40009214 <rtems_task_get_affinity+0x80>
<== ALWAYS TAKEN
400091f4: 82 00 7f ff add %g1, -1, %g1
cpu_self->thread_dispatch_disable_level = disable_level - 1;
400091f8: c2 27 60 18 st %g1, [ %i5 + 0x18 ]
<== NOT EXECUTED
cpuset
);
_Thread_State_release( the_thread, &lock_context );
_Thread_Dispatch_enable( cpu_self );
return ok ? RTEMS_SUCCESSFUL : RTEMS_INVALID_NUMBER;
400091fc: 80 a0 00 1c cmp %g0, %i4
<== NOT EXECUTED
40009200: 82 60 20 00 subx %g0, 0, %g1
40009204: 82 08 7f f6 and %g1, -10, %g1
40009208: 82 00 60 0a add %g1, 0xa, %g1
}
4000920c: 81 c7 e0 08 ret
40009210: 91 e8 00 01 restore %g0, %g1, %o0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40009214: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
40009218: c4 0f 60 1c ldub [ %i5 + 0x1c ], %g2
4000921c: 80 a0 a0 00 cmp %g2, 0
40009220: 32 80 00 07 bne,a 4000923c <rtems_task_get_affinity+0xa8>
<== NEVER TAKEN
40009224: 92 10 00 01 mov %g1, %o1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = 0;
40009228: c0 27 60 18 clr [ %i5 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000922c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009230: 01 00 00 00 nop
return ok ? RTEMS_SUCCESSFUL : RTEMS_INVALID_NUMBER;
40009234: 10 bf ff f3 b 40009200 <rtems_task_get_affinity+0x6c>
40009238: 80 a0 00 1c cmp %g0, %i4
_Thread_Do_dispatch( cpu_self, level );
4000923c: c2 27 bf f4 st %g1, [ %fp + -12 ]
<== NOT EXECUTED
40009240: 40 00 12 0f call 4000da7c <_Thread_Do_dispatch>
<== NOT EXECUTED
40009244: 90 10 00 1d mov %i5, %o0
<== NOT EXECUTED
40009248: 10 bf ff f9 b 4000922c <rtems_task_get_affinity+0x98>
<== NOT EXECUTED
4000924c: c2 07 bf f4 ld [ %fp + -12 ], %g1
<== NOT EXECUTED
40009250 <rtems_task_get_priority>:
rtems_status_code rtems_task_get_priority(
rtems_id task_id,
rtems_id scheduler_id,
rtems_task_priority *priority
)
{
40009250: 9d e3 bf 78 save %sp, -136, %sp
Thread_queue_Context queue_context;
const Scheduler_Control *scheduler;
const Scheduler_Node *scheduler_node;
Priority_Control core_priority;
if ( priority == NULL ) {
40009254: 80 a6 a0 00 cmp %i2, 0
40009258: 02 80 00 1c be 400092c8 <rtems_task_get_priority+0x78>
4000925c: 03 03 c0 40 sethi %hi(0xf010000), %g1
if ( index >= _Scheduler_Count ) {
40009260: 82 10 60 01 or %g1, 1, %g1 ! f010001 <RAM_SIZE+0xec10001>
40009264: 80 a6 40 01 cmp %i1, %g1
40009268: 02 80 00 04 be 40009278 <rtems_task_get_priority+0x28>
4000926c: 92 07 bf dc add %fp, -36, %o1
return RTEMS_INVALID_ADDRESS;
}
scheduler = _Scheduler_Get_by_id( scheduler_id );
if ( scheduler == NULL ) {
return RTEMS_INVALID_ID;
40009270: 81 c7 e0 08 ret
40009274: 91 e8 20 04 restore %g0, 4, %o0
}
_Thread_queue_Context_initialize( &queue_context );
the_thread = _Thread_Get( task_id,
40009278: 40 00 12 60 call 4000dbf8 <_Thread_Get>
4000927c: 90 10 00 18 mov %i0, %o0
&queue_context.Lock_context.Lock_context
);
if ( the_thread == NULL ) {
40009280: 80 a2 20 00 cmp %o0, 0
40009284: 02 bf ff fb be 40009270 <rtems_task_get_priority+0x20>
40009288: 01 00 00 00 nop
4000928c: c2 02 20 38 ld [ %o0 + 0x38 ], %g1
<== NOT EXECUTED
40009290: c4 18 60 18 ldd [ %g1 + 0x18 ], %g2
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40009294: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009298: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000929c: 01 00 00 00 nop
return ( *scheduler->Operations.unmap_priority )( scheduler, priority );
400092a0: 11 10 00 4e sethi %hi(0x40013800), %o0
400092a4: 90 12 22 18 or %o0, 0x218, %o0 ! 40013a18 <_Scheduler_Table>
400092a8: c2 02 20 20 ld [ %o0 + 0x20 ], %g1
400092ac: 92 10 00 02 mov %g2, %o1
400092b0: 94 10 00 03 mov %g3, %o2
400092b4: 9f c0 40 00 call %g1
400092b8: b0 10 20 00 clr %i0
RTEMS_INLINE_ROUTINE rtems_task_priority _RTEMS_Priority_From_core(
const Scheduler_Control *scheduler,
Priority_Control priority
)
{
return (rtems_task_priority)
400092bc: d2 26 80 00 st %o1, [ %i2 ]
core_priority = _Priority_Get_priority( &scheduler_node->Wait.Priority );
_Thread_Wait_release( the_thread, &queue_context );
*priority = _RTEMS_Priority_From_core( scheduler, core_priority );
return RTEMS_SUCCESSFUL;
400092c0: 81 c7 e0 08 ret
400092c4: 81 e8 00 00 restore
}
400092c8: 81 c7 e0 08 ret
400092cc: 91 e8 20 09 restore %g0, 9, %o0
40007944 <rtems_task_get_scheduler>:
rtems_status_code rtems_task_get_scheduler(
rtems_id task_id,
rtems_id *scheduler_id
)
{
40007944: 9d e3 bf 98 save %sp, -104, %sp
Thread_Control *the_thread;
ISR_lock_Context lock_context;
const Scheduler_Control *scheduler;
if ( scheduler_id == NULL ) {
40007948: 80 a6 60 00 cmp %i1, 0
4000794c: 02 80 00 0e be 40007984 <rtems_task_get_scheduler+0x40>
40007950: 82 10 20 09 mov 9, %g1
return RTEMS_INVALID_ADDRESS;
}
the_thread = _Thread_Get( task_id, &lock_context );
40007954: 92 07 bf fc add %fp, -4, %o1
40007958: 40 00 10 80 call 4000bb58 <_Thread_Get>
4000795c: 90 10 00 18 mov %i0, %o0
if ( the_thread == NULL ) {
40007960: 80 a2 20 00 cmp %o0, 0
40007964: 02 80 00 0a be 4000798c <rtems_task_get_scheduler+0x48>
40007968: 03 03 c0 40 sethi %hi(0xf010000), %g1
}
_Thread_State_acquire_critical( the_thread, &lock_context );
scheduler = _Thread_Scheduler_get_home( the_thread );
*scheduler_id = _Scheduler_Build_id( _Scheduler_Get_index( scheduler ) );
4000796c: 82 10 60 01 or %g1, 1, %g1 ! f010001 <RAM_SIZE+0xec10001>
<== NOT EXECUTED
40007970: c2 26 40 00 st %g1, [ %i1 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007974: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007978: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000797c: 01 00 00 00 nop
_Thread_State_release( the_thread, &lock_context );
return RTEMS_SUCCESSFUL;
40007980: 82 10 20 00 clr %g1 ! 0 <PROM_START>
}
40007984: 81 c7 e0 08 ret
40007988: 91 e8 00 01 restore %g0, %g1, %o0
return RTEMS_INVALID_ID;
4000798c: 82 10 20 04 mov 4, %g1
}
40007990: 81 c7 e0 08 ret
40007994: 91 e8 00 01 restore %g0, %g1, %o0
40006a78 <rtems_task_is_suspended>:
#include <rtems/rtems/tasks.h>
#include <rtems/score/threadimpl.h>
rtems_status_code rtems_task_is_suspended( rtems_id id )
{
40006a78: 9d e3 bf 98 save %sp, -104, %sp
Thread_Control *the_thread;
ISR_lock_Context lock_context;
States_Control current_state;
the_thread = _Thread_Get( id, &lock_context );
40006a7c: 92 07 bf fc add %fp, -4, %o1
40006a80: 40 00 0e f9 call 4000a664 <_Thread_Get>
40006a84: 90 10 00 18 mov %i0, %o0
if ( the_thread == NULL ) {
40006a88: 80 a2 20 00 cmp %o0, 0
40006a8c: 02 80 00 0b be 40006ab8 <rtems_task_is_suspended+0x40>
40006a90: 01 00 00 00 nop
#endif
return RTEMS_INVALID_ID;
}
current_state = the_thread->current_state;
40006a94: f0 02 20 1c ld [ %o0 + 0x1c ], %i0
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40006a98: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40006a9c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40006aa0: 01 00 00 00 nop
_ISR_lock_ISR_enable( &lock_context);
return _States_Is_suspended( current_state ) ?
RTEMS_ALREADY_SUSPENDED : RTEMS_SUCCESSFUL;
40006aa4: b1 2e 20 10 sll %i0, 0x10, %i0
40006aa8: b1 3e 20 1f sra %i0, 0x1f, %i0
40006aac: b0 0e 20 0f and %i0, 0xf, %i0
40006ab0: 81 c7 e0 08 ret
40006ab4: 81 e8 00 00 restore
}
40006ab8: 81 c7 e0 08 ret
40006abc: 91 e8 20 04 restore %g0, 4, %o0
40007c78 <rtems_task_mode>:
rtems_status_code rtems_task_mode(
rtems_mode mode_set,
rtems_mode mask,
rtems_mode *previous_mode_set
)
{
40007c78: 9d e3 bf 98 save %sp, -104, %sp
ASR_Information *asr;
bool preempt_enabled;
bool needs_asr_dispatching;
rtems_mode old_mode;
if ( !previous_mode_set )
40007c7c: 80 a6 a0 00 cmp %i2, 0
40007c80: 02 80 00 77 be 40007e5c <rtems_task_mode+0x1e4>
40007c84: 01 00 00 00 nop
40007c88: f8 01 a0 20 ld [ %g6 + 0x20 ], %i4
executing = _Thread_Get_executing();
api = executing->API_Extensions[ THREAD_API_RTEMS ];
asr = &api->Signal;
old_mode = (executing->is_preemptible) ? RTEMS_PREEMPT : RTEMS_NO_PREEMPT;
40007c8c: c2 0f 20 89 ldub [ %i4 + 0x89 ], %g1
40007c90: 80 a0 00 01 cmp %g0, %g1
if ( executing->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_NONE )
40007c94: c2 07 20 90 ld [ %i4 + 0x90 ], %g1
old_mode = (executing->is_preemptible) ? RTEMS_PREEMPT : RTEMS_NO_PREEMPT;
40007c98: 90 60 3f ff subx %g0, -1, %o0
api = executing->API_Extensions[ THREAD_API_RTEMS ];
40007c9c: e0 07 21 58 ld [ %i4 + 0x158 ], %l0
if ( executing->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_NONE )
40007ca0: 80 a0 60 00 cmp %g1, 0
40007ca4: 12 80 00 5d bne 40007e18 <rtems_task_mode+0x1a0>
40007ca8: b7 2a 20 08 sll %o0, 8, %i3
old_mode |= RTEMS_NO_TIMESLICE;
else
old_mode |= RTEMS_TIMESLICE;
old_mode |= (asr->is_enabled) ? RTEMS_ASR : RTEMS_NO_ASR;
40007cac: c2 0c 20 08 ldub [ %l0 + 8 ], %g1
40007cb0: 80 a0 00 01 cmp %g0, %g1
old_mode |= _ISR_Get_level();
40007cb4: 7f ff ef 61 call 40003a38 <_CPU_ISR_Get_level>
40007cb8: ba 60 3f ff subx %g0, -1, %i5
old_mode |= (asr->is_enabled) ? RTEMS_ASR : RTEMS_NO_ASR;
40007cbc: bb 2f 60 0a sll %i5, 0xa, %i5
old_mode |= _ISR_Get_level();
40007cc0: 90 17 40 08 or %i5, %o0, %o0
40007cc4: 90 12 00 1b or %o0, %i3, %o0
*previous_mode_set = old_mode;
40007cc8: d0 26 80 00 st %o0, [ %i2 ]
/*
* These are generic thread scheduling characteristics.
*/
preempt_enabled = false;
if ( mask & RTEMS_PREEMPT_MASK ) {
40007ccc: 80 8e 61 00 btst 0x100, %i1
40007cd0: 02 80 00 09 be 40007cf4 <rtems_task_mode+0x7c>
40007cd4: 84 10 20 00 clr %g2
bool is_preempt_enabled = _Modes_Is_preempt( mode_set );
preempt_enabled = !executing->is_preemptible && is_preempt_enabled;
40007cd8: c2 0f 20 89 ldub [ %i4 + 0x89 ], %g1
40007cdc: 85 36 20 08 srl %i0, 8, %g2
40007ce0: 82 18 60 01 xor %g1, 1, %g1
40007ce4: 84 18 a0 01 xor %g2, 1, %g2
40007ce8: 84 08 a0 01 and %g2, 1, %g2
executing->is_preemptible = is_preempt_enabled;
40007cec: c4 2f 20 89 stb %g2, [ %i4 + 0x89 ]
preempt_enabled = !executing->is_preemptible && is_preempt_enabled;
40007cf0: 84 08 80 01 and %g2, %g1, %g2
}
if ( mask & RTEMS_TIMESLICE_MASK ) {
40007cf4: 80 8e 62 00 btst 0x200, %i1
40007cf8: 02 80 00 0a be 40007d20 <rtems_task_mode+0xa8>
40007cfc: 80 8e 60 0f btst 0xf, %i1
if ( _Modes_Is_timeslice(mode_set) ) {
40007d00: 80 8e 22 00 btst 0x200, %i0
40007d04: 02 80 00 53 be 40007e50 <rtems_task_mode+0x1d8>
40007d08: 80 8e 60 0f btst 0xf, %i1
executing->budget_algorithm = THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE;
executing->cpu_time_budget =
rtems_configuration_get_ticks_per_timeslice();
40007d0c: 03 10 00 48 sethi %hi(0x40012000), %g1
executing->cpu_time_budget =
40007d10: c2 00 60 28 ld [ %g1 + 0x28 ], %g1 ! 40012028 <Configuration+0x18>
40007d14: c2 27 20 8c st %g1, [ %i4 + 0x8c ]
executing->budget_algorithm = THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE;
40007d18: 82 10 20 01 mov 1, %g1
40007d1c: c2 27 20 90 st %g1, [ %i4 + 0x90 ]
}
/*
* Set the new interrupt level
*/
if ( mask & RTEMS_INTERRUPT_MASK ) {
40007d20: 02 80 00 07 be 40007d3c <rtems_task_mode+0xc4>
40007d24: 80 8e 64 00 btst 0x400, %i1
*/
RTEMS_INLINE_ROUTINE void _Modes_Set_interrupt_level (
Modes_Control mode_set
)
{
_ISR_Set_level( _Modes_Get_interrupt_level( mode_set ) );
40007d28: 83 2e 20 08 sll %i0, 8, %g1
<== NOT EXECUTED
40007d2c: 82 08 6f 00 and %g1, 0xf00, %g1
<== NOT EXECUTED
40007d30: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007d34: 01 00 00 00 nop
/*
* This is specific to the RTEMS API
*/
needs_asr_dispatching = false;
if ( mask & RTEMS_ASR_MASK ) {
40007d38: 80 8e 64 00 btst 0x400, %i1
40007d3c: 02 80 00 22 be 40007dc4 <rtems_task_mode+0x14c>
40007d40: 80 88 a0 ff btst 0xff, %g2
bool is_asr_enabled = !_Modes_Is_asr_disabled( mode_set );
40007d44: b1 36 20 0a srl %i0, 0xa, %i0
<== NOT EXECUTED
40007d48: b0 1e 20 01 xor %i0, 1, %i0
<== NOT EXECUTED
40007d4c: b0 0e 20 01 and %i0, 1, %i0
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007d50: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
40007d54: 88 10 00 01 mov %g1, %g4
_Thread_State_acquire( executing, &lock_context );
if ( is_asr_enabled != asr->is_enabled ) {
40007d58: c6 0c 20 08 ldub [ %l0 + 8 ], %g3
40007d5c: 80 a6 00 03 cmp %i0, %g3
40007d60: 02 80 00 15 be 40007db4 <rtems_task_mode+0x13c>
40007d64: 01 00 00 00 nop
RTEMS_INLINE_ROUTINE rtems_signal_set _ASR_Swap_signals( ASR_Information *asr )
{
rtems_signal_set new_signals_posted;
new_signals_posted = asr->signals_pending;
40007d68: c6 04 20 18 ld [ %l0 + 0x18 ], %g3
asr->signals_pending = asr->signals_posted;
40007d6c: fa 04 20 14 ld [ %l0 + 0x14 ], %i5
asr->is_enabled = is_asr_enabled;
40007d70: f0 2c 20 08 stb %i0, [ %l0 + 8 ]
if ( _ASR_Swap_signals( asr ) != 0 ) {
40007d74: 80 a0 e0 00 cmp %g3, 0
40007d78: fa 24 20 18 st %i5, [ %l0 + 0x18 ]
40007d7c: 02 80 00 0e be 40007db4 <rtems_task_mode+0x13c>
40007d80: c6 24 20 14 st %g3, [ %l0 + 0x14 ]
action->handler = handler;
40007d84: 05 10 00 3e sethi %hi(0x4000f800), %g2
40007d88: 84 10 a3 a8 or %g2, 0x3a8, %g2 ! 4000fba8 <_Signal_Action_handler>
40007d8c: c4 24 20 28 st %g2, [ %l0 + 0x28 ]
} else {
_Atomic_Fetch_or_ulong( &cpu_target->message, 0, ATOMIC_ORDER_RELEASE );
_CPU_SMP_Send_interrupt( _Per_CPU_Get_index( cpu_target ) );
}
#else
cpu_self->dispatch_necessary = true;
40007d90: 86 10 20 01 mov 1, %g3
40007d94: c6 29 a0 1c stb %g3, [ %g6 + 0x1c ]
RTEMS_INLINE_ROUTINE void _Chain_Append_if_is_off_chain_unprotected(
Chain_Control *the_chain,
Chain_Node *the_node
)
{
if ( _Chain_Is_node_off_chain( the_node ) ) {
40007d98: c4 04 20 20 ld [ %l0 + 0x20 ], %g2
40007d9c: 80 a0 a0 00 cmp %g2, 0
40007da0: 22 80 00 33 be,a 40007e6c <rtems_task_mode+0x1f4>
<== ALWAYS TAKEN
40007da4: c4 07 20 e8 ld [ %i4 + 0xe8 ], %g2
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007da8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007dac: 01 00 00 00 nop
<== NOT EXECUTED
40007db0: 30 80 00 07 b,a 40007dcc <rtems_task_mode+0x154>
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007db4: 82 10 00 04 mov %g4, %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007db8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007dbc: 01 00 00 00 nop
}
_Thread_State_release( executing, &lock_context );
}
if ( preempt_enabled || needs_asr_dispatching ) {
40007dc0: 80 88 a0 ff btst 0xff, %g2
40007dc4: 02 80 00 28 be 40007e64 <rtems_task_mode+0x1ec>
40007dc8: 01 00 00 00 nop
disable_level = cpu_self->thread_dispatch_disable_level;
40007dcc: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40007dd0: 82 00 60 01 inc %g1
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40007dd4: ba 10 00 06 mov %g6, %i5
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40007dd8: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007ddc: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
40007de0: c2 27 bf fc st %g1, [ %fp + -4 ]
( *scheduler->Operations.schedule )( scheduler, the_thread );
40007de4: 11 10 00 48 sethi %hi(0x40012000), %o0
40007de8: 90 12 20 f8 or %o0, 0xf8, %o0 ! 400120f8 <_Scheduler_Table>
40007dec: c4 02 20 08 ld [ %o0 + 8 ], %g2
40007df0: 9f c0 80 00 call %g2
40007df4: 92 10 00 1c mov %i4, %o1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007df8: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007dfc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007e00: 01 00 00 00 nop
_Scheduler_Schedule( executing );
_Thread_State_release( executing, &lock_context );
_Thread_Dispatch_direct( cpu_self );
}
return RTEMS_SUCCESSFUL;
40007e04: b0 10 20 00 clr %i0 ! 0 <PROM_START>
_Thread_Dispatch_direct( cpu_self );
40007e08: 40 00 10 6d call 4000bfbc <_Thread_Dispatch_direct>
40007e0c: 90 10 00 1d mov %i5, %o0
40007e10: 81 c7 e0 08 ret
40007e14: 81 e8 00 00 restore
old_mode |= (asr->is_enabled) ? RTEMS_ASR : RTEMS_NO_ASR;
40007e18: c2 0c 20 08 ldub [ %l0 + 8 ], %g1
40007e1c: 80 a0 00 01 cmp %g0, %g1
old_mode |= RTEMS_TIMESLICE;
40007e20: b6 16 e2 00 or %i3, 0x200, %i3
old_mode |= _ISR_Get_level();
40007e24: 7f ff ef 05 call 40003a38 <_CPU_ISR_Get_level>
40007e28: ba 60 3f ff subx %g0, -1, %i5
old_mode |= (asr->is_enabled) ? RTEMS_ASR : RTEMS_NO_ASR;
40007e2c: bb 2f 60 0a sll %i5, 0xa, %i5
old_mode |= _ISR_Get_level();
40007e30: 90 17 40 08 or %i5, %o0, %o0
40007e34: 90 12 00 1b or %o0, %i3, %o0
*previous_mode_set = old_mode;
40007e38: d0 26 80 00 st %o0, [ %i2 ]
if ( mask & RTEMS_PREEMPT_MASK ) {
40007e3c: 80 8e 61 00 btst 0x100, %i1
40007e40: 02 bf ff ad be 40007cf4 <rtems_task_mode+0x7c>
40007e44: 84 10 20 00 clr %g2
preempt_enabled = !executing->is_preemptible && is_preempt_enabled;
40007e48: 10 bf ff a5 b 40007cdc <rtems_task_mode+0x64>
40007e4c: c2 0f 20 89 ldub [ %i4 + 0x89 ], %g1
if ( mask & RTEMS_INTERRUPT_MASK ) {
40007e50: 02 bf ff ba be 40007d38 <rtems_task_mode+0xc0>
40007e54: c0 27 20 90 clr [ %i4 + 0x90 ]
40007e58: 30 bf ff b4 b,a 40007d28 <rtems_task_mode+0xb0>
return RTEMS_INVALID_ADDRESS;
40007e5c: 81 c7 e0 08 ret
40007e60: 91 e8 20 09 restore %g0, 9, %o0
}
40007e64: 81 c7 e0 08 ret
40007e68: 91 e8 20 00 restore %g0, 0, %o0
return &the_chain->Tail.Node;
40007e6c: 86 07 20 e4 add %i4, 0xe4, %g3
<== NOT EXECUTED
the_node->next = tail;
40007e70: c6 24 20 20 st %g3, [ %l0 + 0x20 ]
<== NOT EXECUTED
_Chain_Append_if_is_off_chain_unprotected(
40007e74: 86 04 20 20 add %l0, 0x20, %g3
<== NOT EXECUTED
tail->previous = the_node;
40007e78: c6 27 20 e8 st %g3, [ %i4 + 0xe8 ]
<== NOT EXECUTED
old_last->next = the_node;
40007e7c: c6 20 80 00 st %g3, [ %g2 ]
<== NOT EXECUTED
the_node->previous = old_last;
40007e80: c4 24 20 24 st %g2, [ %l0 + 0x24 ]
<== NOT EXECUTED
40007e84: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007e88: 01 00 00 00 nop
40007e8c: 30 bf ff d0 b,a 40007dcc <rtems_task_mode+0x154>
40006ee8 <rtems_task_restart>:
rtems_status_code rtems_task_restart(
rtems_id id,
uint32_t argument
)
{
40006ee8: 9d e3 bf 90 save %sp, -112, %sp
Thread_Control *the_thread;
ISR_lock_Context lock_context;
Thread_Entry_information entry;
bool ok;
the_thread = _Thread_Get( id, &lock_context );
40006eec: 90 10 00 18 mov %i0, %o0
40006ef0: 40 00 0f d1 call 4000ae34 <_Thread_Get>
40006ef4: 92 07 bf f0 add %fp, -16, %o1
if ( the_thread == NULL ) {
40006ef8: 82 92 20 00 orcc %o0, 0, %g1
40006efc: 02 80 00 12 be 40006f44 <rtems_task_restart+0x5c>
40006f00: 94 07 bf f0 add %fp, -16, %o2
#endif
return RTEMS_INVALID_ID;
}
entry = the_thread->Start.Entry;
40006f04: c4 00 60 a4 ld [ %g1 + 0xa4 ], %g2
40006f08: c6 00 60 a0 ld [ %g1 + 0xa0 ], %g3
40006f0c: c4 27 bf f8 st %g2, [ %fp + -8 ]
40006f10: c6 27 bf f4 st %g3, [ %fp + -12 ]
entry.Kinds.Numeric.argument = argument;
40006f14: f2 27 bf fc st %i1, [ %fp + -4 ]
if ( the_thread == _Thread_Executing ) {
40006f18: c4 01 a0 20 ld [ %g6 + 0x20 ], %g2
40006f1c: 80 a0 80 01 cmp %g2, %g1
40006f20: 02 80 00 0b be 40006f4c <rtems_task_restart+0x64>
40006f24: 92 07 bf f4 add %fp, -12, %o1
_Thread_Restart_self( the_thread, &entry, &lock_context );
RTEMS_UNREACHABLE();
}
ok = _Thread_Restart_other( the_thread, &entry, &lock_context );
40006f28: 40 00 15 d4 call 4000c678 <_Thread_Restart_other>
40006f2c: 01 00 00 00 nop
return ok ? RTEMS_SUCCESSFUL : RTEMS_INCORRECT_STATE;
40006f30: 80 a0 00 08 cmp %g0, %o0
40006f34: b0 60 20 00 subx %g0, 0, %i0
40006f38: b0 0e 3f f2 and %i0, -14, %i0
40006f3c: 81 c7 e0 08 ret
40006f40: 91 ee 20 0e restore %i0, 0xe, %o0
}
40006f44: 81 c7 e0 08 ret
40006f48: 91 e8 20 04 restore %g0, 4, %o0
_Thread_Restart_self( the_thread, &entry, &lock_context );
40006f4c: 40 00 16 2d call 4000c800 <_Thread_Restart_self>
40006f50: 01 00 00 00 nop
40006f54: 01 00 00 00 nop
<== NOT EXECUTED
40007e90 <rtems_task_resume>:
#include <rtems/score/threadimpl.h>
rtems_status_code rtems_task_resume(
rtems_id id
)
{
40007e90: 9d e3 bf 90 save %sp, -112, %sp
Thread_Control *the_thread;
ISR_lock_Context lock_context;
Per_CPU_Control *cpu_self;
States_Control previous_state;
the_thread = _Thread_Get( id, &lock_context );
40007e94: 90 10 00 18 mov %i0, %o0
40007e98: 92 07 bf fc add %fp, -4, %o1
40007e9c: 40 00 10 5f call 4000c018 <_Thread_Get>
40007ea0: b0 10 20 04 mov 4, %i0
if ( the_thread == NULL ) {
40007ea4: 80 a2 20 00 cmp %o0, 0
40007ea8: 02 80 00 15 be 40007efc <rtems_task_resume+0x6c>
40007eac: 01 00 00 00 nop
disable_level = cpu_self->thread_dispatch_disable_level;
40007eb0: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40007eb4: 82 00 60 01 inc %g1
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40007eb8: ba 10 00 06 mov %g6, %i5
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40007ebc: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007ec0: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007ec4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007ec8: 01 00 00 00 nop
}
cpu_self = _Thread_Dispatch_disable_critical( &lock_context );
_ISR_lock_ISR_enable( &lock_context );
previous_state = _Thread_Clear_state( the_thread, STATES_SUSPENDED );
40007ecc: 40 00 0f 9a call 4000bd34 <_Thread_Clear_state>
40007ed0: 13 00 00 20 sethi %hi(0x8000), %o1
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
40007ed4: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
if ( disable_level == 1 ) {
40007ed8: 80 a0 60 01 cmp %g1, 1
40007edc: 02 80 00 0a be 40007f04 <rtems_task_resume+0x74>
40007ee0: b0 10 00 08 mov %o0, %i0
cpu_self->thread_dispatch_disable_level = disable_level - 1;
40007ee4: 82 00 7f ff add %g1, -1, %g1
40007ee8: c2 27 60 18 st %g1, [ %i5 + 0x18 ]
_Thread_Dispatch_enable( cpu_self );
return _States_Is_suspended( previous_state ) ?
RTEMS_SUCCESSFUL : RTEMS_INCORRECT_STATE;
40007eec: b1 2e 20 10 sll %i0, 0x10, %i0
40007ef0: b1 3e 20 1f sra %i0, 0x1f, %i0
40007ef4: b0 0e 3f f2 and %i0, -14, %i0
40007ef8: b0 06 20 0e add %i0, 0xe, %i0
}
40007efc: 81 c7 e0 08 ret
40007f00: 81 e8 00 00 restore
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007f04: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
40007f08: c4 0f 60 1c ldub [ %i5 + 0x1c ], %g2
40007f0c: 80 a0 a0 00 cmp %g2, 0
40007f10: 32 80 00 07 bne,a 40007f2c <rtems_task_resume+0x9c>
40007f14: 92 10 00 01 mov %g1, %o1
cpu_self->thread_dispatch_disable_level = 0;
40007f18: c0 27 60 18 clr [ %i5 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007f1c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007f20: 01 00 00 00 nop
RTEMS_SUCCESSFUL : RTEMS_INCORRECT_STATE;
40007f24: 10 bf ff f3 b 40007ef0 <rtems_task_resume+0x60>
40007f28: b1 2e 20 10 sll %i0, 0x10, %i0
_Thread_Do_dispatch( cpu_self, level );
40007f2c: c2 27 bf f4 st %g1, [ %fp + -12 ]
40007f30: 40 00 0f db call 4000be9c <_Thread_Do_dispatch>
40007f34: 90 10 00 1d mov %i5, %o0
40007f38: 10 bf ff f9 b 40007f1c <rtems_task_resume+0x8c>
<== NOT EXECUTED
40007f3c: c2 07 bf f4 ld [ %fp + -12 ], %g1
<== NOT EXECUTED
40009504 <rtems_task_set_affinity>:
rtems_status_code rtems_task_set_affinity(
rtems_id id,
size_t cpusetsize,
const cpu_set_t *cpuset
)
{
40009504: 9d e3 bf 90 save %sp, -112, %sp
Thread_Control *the_thread;
ISR_lock_Context lock_context;
Per_CPU_Control *cpu_self;
bool ok;
if ( cpuset == NULL ) {
40009508: 80 a6 a0 00 cmp %i2, 0
4000950c: 02 80 00 1c be 4000957c <rtems_task_set_affinity+0x78>
40009510: 82 10 20 09 mov 9, %g1
return RTEMS_INVALID_ADDRESS;
}
the_thread = _Thread_Get( id, &lock_context );
40009514: 92 07 bf fc add %fp, -4, %o1
40009518: 40 00 11 b8 call 4000dbf8 <_Thread_Get>
4000951c: 90 10 00 18 mov %i0, %o0
if ( the_thread == NULL ) {
40009520: 80 a2 20 00 cmp %o0, 0
40009524: 02 80 00 16 be 4000957c <rtems_task_set_affinity+0x78>
40009528: 82 10 20 04 mov 4, %g1
disable_level = cpu_self->thread_dispatch_disable_level;
4000952c: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40009530: 82 00 60 01 inc %g1
40009534: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40009538: ba 10 00 06 mov %g6, %i5
}
cpu_self = _Thread_Dispatch_disable_critical( &lock_context );
_Thread_State_acquire_critical( the_thread, &lock_context );
ok = _Scheduler_Set_affinity(
4000953c: 94 10 00 1a mov %i2, %o2
40009540: 40 00 0f d7 call 4000d49c <_Scheduler_Set_affinity>
40009544: 92 10 00 19 mov %i1, %o1
40009548: b8 10 00 08 mov %o0, %i4
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000954c: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009550: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009554: 01 00 00 00 nop
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
40009558: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
if ( disable_level == 1 ) {
4000955c: 80 a0 60 01 cmp %g1, 1
40009560: 02 80 00 09 be 40009584 <rtems_task_set_affinity+0x80>
<== ALWAYS TAKEN
40009564: 82 00 7f ff add %g1, -1, %g1
cpu_self->thread_dispatch_disable_level = disable_level - 1;
40009568: c2 27 60 18 st %g1, [ %i5 + 0x18 ]
<== NOT EXECUTED
cpuset
);
_Thread_State_release( the_thread, &lock_context );
_Thread_Dispatch_enable( cpu_self );
return ok ? RTEMS_SUCCESSFUL : RTEMS_INVALID_NUMBER;
4000956c: 80 a0 00 1c cmp %g0, %i4
<== NOT EXECUTED
40009570: 82 60 20 00 subx %g0, 0, %g1
40009574: 82 08 7f f6 and %g1, -10, %g1
40009578: 82 00 60 0a add %g1, 0xa, %g1
}
4000957c: 81 c7 e0 08 ret
40009580: 91 e8 00 01 restore %g0, %g1, %o0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40009584: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
40009588: c4 0f 60 1c ldub [ %i5 + 0x1c ], %g2
4000958c: 80 a0 a0 00 cmp %g2, 0
40009590: 32 80 00 07 bne,a 400095ac <rtems_task_set_affinity+0xa8>
<== NEVER TAKEN
40009594: 92 10 00 01 mov %g1, %o1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = 0;
40009598: c0 27 60 18 clr [ %i5 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000959c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400095a0: 01 00 00 00 nop
return ok ? RTEMS_SUCCESSFUL : RTEMS_INVALID_NUMBER;
400095a4: 10 bf ff f3 b 40009570 <rtems_task_set_affinity+0x6c>
400095a8: 80 a0 00 1c cmp %g0, %i4
_Thread_Do_dispatch( cpu_self, level );
400095ac: c2 27 bf f4 st %g1, [ %fp + -12 ]
<== NOT EXECUTED
400095b0: 40 00 11 33 call 4000da7c <_Thread_Do_dispatch>
<== NOT EXECUTED
400095b4: 90 10 00 1d mov %i5, %o0
<== NOT EXECUTED
400095b8: 10 bf ff f9 b 4000959c <rtems_task_set_affinity+0x98>
<== NOT EXECUTED
400095bc: c2 07 bf f4 ld [ %fp + -12 ], %g1
<== NOT EXECUTED
40007814 <rtems_task_set_priority>:
rtems_status_code rtems_task_set_priority(
rtems_id id,
rtems_task_priority new_priority,
rtems_task_priority *old_priority_p
)
{
40007814: 9d e3 bf 70 save %sp, -144, %sp
Thread_queue_Context queue_context;
const Scheduler_Control *scheduler;
Priority_Control old_priority;
rtems_status_code status;
if ( old_priority_p == NULL ) {
40007818: 80 a6 a0 00 cmp %i2, 0
4000781c: 02 80 00 18 be 4000787c <rtems_task_set_priority+0x68>
40007820: b8 10 20 09 mov 9, %i4
RTEMS_INLINE_ROUTINE void _Thread_queue_Context_clear_priority_updates(
Thread_queue_Context *queue_context
)
{
queue_context->Priority.update_count = 0;
40007824: c0 27 bf f0 clr [ %fp + -16 ]
return RTEMS_INVALID_ADDRESS;
}
_Thread_queue_Context_initialize( &queue_context );
_Thread_queue_Context_clear_priority_updates( &queue_context );
the_thread = _Thread_Get( id, &queue_context.Lock_context.Lock_context );
40007828: 90 10 00 18 mov %i0, %o0
4000782c: 40 00 10 22 call 4000b8b4 <_Thread_Get>
40007830: 92 07 bf dc add %fp, -36, %o1
if ( the_thread == NULL ) {
40007834: b8 92 20 00 orcc %o0, 0, %i4
40007838: 02 80 00 3e be 40007930 <rtems_task_set_priority+0x11c>
4000783c: 80 a6 60 00 cmp %i1, 0
40007840: c2 07 20 38 ld [ %i4 + 0x38 ], %g1
_Thread_Wait_acquire_critical( the_thread, &queue_context );
scheduler = _Thread_Scheduler_get_home( the_thread );
old_priority = _Thread_Get_priority( the_thread );
if ( new_priority != RTEMS_CURRENT_PRIORITY ) {
40007844: 12 80 00 10 bne 40007884 <rtems_task_set_priority+0x70>
40007848: e0 18 60 18 ldd [ %g1 + 0x18 ], %l0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000784c: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007850: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007854: 01 00 00 00 nop
40007858: 3b 10 00 44 sethi %hi(0x40011000), %i5
new_priority,
&queue_context
);
} else {
_Thread_Wait_release( the_thread, &queue_context );
status = RTEMS_SUCCESSFUL;
4000785c: b8 10 20 00 clr %i4
40007860: ba 17 63 70 or %i5, 0x370, %i5
RTEMS_INLINE_ROUTINE Priority_Control _Scheduler_Unmap_priority(
const Scheduler_Control *scheduler,
Priority_Control priority
)
{
return ( *scheduler->Operations.unmap_priority )( scheduler, priority );
40007864: c2 07 60 20 ld [ %i5 + 0x20 ], %g1
40007868: 92 10 00 10 mov %l0, %o1
4000786c: 94 10 00 11 mov %l1, %o2
40007870: 9f c0 40 00 call %g1
40007874: 90 10 00 1d mov %i5, %o0
RTEMS_INLINE_ROUTINE rtems_task_priority _RTEMS_Priority_From_core(
const Scheduler_Control *scheduler,
Priority_Control priority
)
{
return (rtems_task_priority)
40007878: d2 26 80 00 st %o1, [ %i2 ]
}
*old_priority_p = _RTEMS_Priority_From_core( scheduler, old_priority );
return status;
}
4000787c: 81 c7 e0 08 ret
40007880: 91 e8 00 1c restore %g0, %i4, %o0
*valid = ( priority <= scheduler->maximum_priority );
40007884: 3b 10 00 44 sethi %hi(0x40011000), %i5
40007888: ba 17 63 70 or %i5, 0x370, %i5 ! 40011370 <_Scheduler_Table>
return ( *scheduler->Operations.map_priority )( scheduler, priority );
4000788c: c2 07 60 1c ld [ %i5 + 0x1c ], %g1
40007890: f6 07 60 40 ld [ %i5 + 0x40 ], %i3
40007894: f0 07 60 44 ld [ %i5 + 0x44 ], %i0
40007898: 92 10 20 00 clr %o1
4000789c: 94 10 00 19 mov %i1, %o2
400078a0: 9f c0 40 00 call %g1
400078a4: 90 10 00 1d mov %i5, %o0
if ( !valid ) {
400078a8: 80 a6 e0 00 cmp %i3, 0
400078ac: 32 80 00 06 bne,a 400078c4 <rtems_task_set_priority+0xb0>
<== NEVER TAKEN
400078b0: d0 3f 20 30 std %o0, [ %i4 + 0x30 ]
<== NOT EXECUTED
400078b4: 80 a6 40 18 cmp %i1, %i0
400078b8: 18 80 00 19 bgu 4000791c <rtems_task_set_priority+0x108>
400078bc: 01 00 00 00 nop
RTEMS_INLINE_ROUTINE void _Priority_Node_set_priority(
Priority_Node *node,
Priority_Control priority
)
{
node->priority = priority;
400078c0: d0 3f 20 30 std %o0, [ %i4 + 0x30 ]
bool prepend_it,
Thread_queue_Context *queue_context
)
{
_Priority_Node_set_priority( priority_node, new_priority );
_Thread_Priority_changed(
400078c4: 96 07 bf dc add %fp, -36, %o3
400078c8: 94 10 20 00 clr %o2
400078cc: 92 07 20 20 add %i4, 0x20, %o1
400078d0: 40 00 0f 37 call 4000b5ac <_Thread_Priority_changed>
400078d4: 90 10 00 1c mov %i4, %o0
disable_level = cpu_self->thread_dispatch_disable_level;
400078d8: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400078dc: 82 00 60 01 inc %g1
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
400078e0: b6 10 00 06 mov %g6, %i3
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400078e4: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400078e8: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400078ec: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400078f0: 01 00 00 00 nop
_Thread_Priority_update( queue_context );
400078f4: 40 00 0f 35 call 4000b5c8 <_Thread_Priority_update>
400078f8: 90 07 bf dc add %fp, -36, %o0
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
400078fc: c2 06 e0 18 ld [ %i3 + 0x18 ], %g1
if ( disable_level == 1 ) {
40007900: 80 a0 60 01 cmp %g1, 1
40007904: 02 80 00 0e be 4000793c <rtems_task_set_priority+0x128>
40007908: 82 00 7f ff add %g1, -1, %g1
return RTEMS_SUCCESSFUL;
4000790c: b8 10 20 00 clr %i4
cpu_self->thread_dispatch_disable_level = disable_level - 1;
40007910: c2 26 e0 18 st %g1, [ %i3 + 0x18 ]
return ( *scheduler->Operations.unmap_priority )( scheduler, priority );
40007914: 10 bf ff d5 b 40007868 <rtems_task_set_priority+0x54>
40007918: c2 07 60 20 ld [ %i5 + 0x20 ], %g1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000791c: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007920: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007924: 01 00 00 00 nop
return RTEMS_INVALID_PRIORITY;
40007928: 10 bf ff cf b 40007864 <rtems_task_set_priority+0x50>
4000792c: b8 10 20 13 mov 0x13, %i4 ! 13 <_TLS_Alignment+0x12>
return RTEMS_INVALID_ID;
40007930: b8 10 20 04 mov 4, %i4
}
40007934: 81 c7 e0 08 ret
40007938: 91 e8 00 1c restore %g0, %i4, %o0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
4000793c: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
40007940: c4 0e e0 1c ldub [ %i3 + 0x1c ], %g2
40007944: 80 a0 a0 00 cmp %g2, 0
40007948: 12 80 00 07 bne 40007964 <rtems_task_set_priority+0x150>
4000794c: 92 10 00 01 mov %g1, %o1
cpu_self->thread_dispatch_disable_level = 0;
40007950: c0 26 e0 18 clr [ %i3 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007954: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007958: 01 00 00 00 nop
return RTEMS_SUCCESSFUL;
4000795c: 10 bf ff c2 b 40007864 <rtems_task_set_priority+0x50>
40007960: b8 10 20 00 clr %i4 ! 0 <PROM_START>
_Thread_Do_dispatch( cpu_self, level );
40007964: c2 27 bf d4 st %g1, [ %fp + -44 ]
40007968: 40 00 0f 74 call 4000b738 <_Thread_Do_dispatch>
4000796c: 90 10 00 1b mov %i3, %o0
40007970: 10 bf ff f9 b 40007954 <rtems_task_set_priority+0x140>
40007974: c2 07 bf d4 ld [ %fp + -44 ], %g1
40009724 <rtems_task_set_scheduler>:
rtems_status_code rtems_task_set_scheduler(
rtems_id task_id,
rtems_id scheduler_id,
rtems_task_priority priority
)
{
40009724: 9d e3 bf 70 save %sp, -144, %sp
if ( index >= _Scheduler_Count ) {
40009728: 03 03 c0 40 sethi %hi(0xf010000), %g1
4000972c: 82 10 60 01 or %g1, 1, %g1 ! f010001 <RAM_SIZE+0xec10001>
40009730: 80 a6 40 01 cmp %i1, %g1
40009734: 12 80 00 2f bne 400097f0 <rtems_task_set_scheduler+0xcc>
40009738: 92 10 20 00 clr %o1
4000973c: 3b 10 00 4e sethi %hi(0x40013800), %i5
40009740: ba 17 62 18 or %i5, 0x218, %i5 ! 40013a18 <_Scheduler_Table>
return ( *scheduler->Operations.map_priority )( scheduler, priority );
40009744: c2 07 60 1c ld [ %i5 + 0x1c ], %g1
40009748: f8 07 60 40 ld [ %i5 + 0x40 ], %i4
4000974c: e2 07 60 44 ld [ %i5 + 0x44 ], %l1
40009750: 94 10 00 1a mov %i2, %o2
40009754: 9f c0 40 00 call %g1
40009758: 90 10 00 1d mov %i5, %o0
if ( scheduler == NULL ) {
return RTEMS_INVALID_ID;
}
core_priority = _RTEMS_Priority_To_core( scheduler, priority, &valid );
if ( !valid ) {
4000975c: 80 a7 20 00 cmp %i4, 0
40009760: b2 10 00 08 mov %o0, %i1
40009764: 02 80 00 1a be 400097cc <rtems_task_set_scheduler+0xa8>
<== ALWAYS TAKEN
40009768: a0 10 00 09 mov %o1, %l0
return RTEMS_INVALID_PRIORITY;
}
_Thread_queue_Context_initialize( &queue_context );
the_thread = _Thread_Get( task_id, &queue_context.Lock_context.Lock_context );
4000976c: 92 07 bf dc add %fp, -36, %o1
<== NOT EXECUTED
40009770: 40 00 11 22 call 4000dbf8 <_Thread_Get>
<== NOT EXECUTED
40009774: 90 10 00 18 mov %i0, %o0
<== NOT EXECUTED
if ( the_thread == NULL ) {
40009778: b8 92 20 00 orcc %o0, 0, %i4
<== NOT EXECUTED
4000977c: 22 80 00 1e be,a 400097f4 <rtems_task_set_scheduler+0xd0>
<== NOT EXECUTED
40009780: b6 10 20 04 mov 4, %i3
<== NOT EXECUTED
disable_level = cpu_self->thread_dispatch_disable_level;
40009784: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40009788: 82 00 60 01 inc %g1
4000978c: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40009790: b4 10 00 06 mov %g6, %i2
ISR_lock_Context lock_context;
const Scheduler_Control *old_scheduler;
#endif
if ( the_thread->Wait.queue != NULL ) {
40009794: c2 07 20 54 ld [ %i4 + 0x54 ], %g1
40009798: 80 a0 60 00 cmp %g1, 0
4000979c: 02 80 00 22 be 40009824 <rtems_task_set_scheduler+0x100>
400097a0: b6 10 20 0c mov 0xc, %i3
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400097a4: c2 07 bf dc ld [ %fp + -36 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400097a8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400097ac: 01 00 00 00 nop
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
400097b0: c2 06 a0 18 ld [ %i2 + 0x18 ], %g1
if ( disable_level == 1 ) {
400097b4: 80 a0 60 01 cmp %g1, 1
400097b8: 02 80 00 11 be 400097fc <rtems_task_set_scheduler+0xd8>
<== ALWAYS TAKEN
400097bc: 82 00 7f ff add %g1, -1, %g1
cpu_self->thread_dispatch_disable_level = disable_level - 1;
400097c0: c2 26 a0 18 st %g1, [ %i2 + 0x18 ]
<== NOT EXECUTED
_Thread_State_release_critical( the_thread, &state_context );
_Thread_Wait_release( the_thread, &queue_context );
_Thread_Dispatch_enable( cpu_self );
return _Status_Get( status );
}
400097c4: 81 c7 e0 08 ret
400097c8: 91 e8 00 1b restore %g0, %i3, %o0
if ( !valid ) {
400097cc: 80 a6 80 11 cmp %i2, %l1
400097d0: 18 bf ff fd bgu 400097c4 <rtems_task_set_scheduler+0xa0>
400097d4: b6 10 20 13 mov 0x13, %i3
the_thread = _Thread_Get( task_id, &queue_context.Lock_context.Lock_context );
400097d8: 92 07 bf dc add %fp, -36, %o1
400097dc: 40 00 11 07 call 4000dbf8 <_Thread_Get>
400097e0: 90 10 00 18 mov %i0, %o0
if ( the_thread == NULL ) {
400097e4: b8 92 20 00 orcc %o0, 0, %i4
400097e8: 12 bf ff e7 bne 40009784 <rtems_task_set_scheduler+0x60>
400097ec: 01 00 00 00 nop
return RTEMS_INVALID_ID;
400097f0: b6 10 20 04 mov 4, %i3 ! 4 <_TLS_Alignment+0x3>
}
400097f4: 81 c7 e0 08 ret
400097f8: 91 e8 00 1b restore %g0, %i3, %o0
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400097fc: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
40009800: c4 0e a0 1c ldub [ %i2 + 0x1c ], %g2
40009804: 80 a0 a0 00 cmp %g2, 0
40009808: 12 80 00 25 bne 4000989c <rtems_task_set_scheduler+0x178>
<== NEVER TAKEN
4000980c: 92 10 00 01 mov %g1, %o1
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = 0;
40009810: c0 26 a0 18 clr [ %i2 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009814: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009818: 01 00 00 00 nop
4000981c: 81 c7 e0 08 ret
40009820: 91 e8 00 1b restore %g0, %i3, %o0
40009824: f0 07 20 38 ld [ %i4 + 0x38 ], %i0
RTEMS_INLINE_ROUTINE void _Priority_Plain_extract(
Priority_Aggregation *aggregation,
Priority_Node *node
)
{
_RBTree_Extract( &aggregation->Contributors, &node->Node.RBTree );
40009828: b6 06 20 20 add %i0, 0x20, %i3
4000982c: a2 07 20 20 add %i4, 0x20, %l1
40009830: 90 10 00 1b mov %i3, %o0
40009834: 40 00 0b 26 call 4000c4cc <_RBTree_Extract>
40009838: 92 10 00 11 mov %l1, %o1
return RB_EMPTY( the_rbtree );
4000983c: c2 06 20 20 ld [ %i0 + 0x20 ], %g1
_Priority_Plain_extract(
&old_scheduler_node->Wait.Priority,
&the_thread->Real_priority
);
if ( !_Priority_Is_empty( &old_scheduler_node->Wait.Priority ) ) {
40009840: 80 a0 60 00 cmp %g1, 0
40009844: 12 80 00 1b bne 400098b0 <rtems_task_set_scheduler+0x18c>
<== NEVER TAKEN
40009848: 92 10 00 1c mov %i4, %o1
_Thread_Scheduler_process_requests( the_thread );
#else
new_scheduler_node = old_scheduler_node;
#endif
the_thread->Start.initial_priority = priority;
4000984c: f2 27 20 c0 st %i1, [ %i4 + 0xc0 ]
unsigned int seq;
seq = _SMP_sequence_lock_Write_begin( &node->Priority.Lock );
#endif
new_priority |= ( prepend_it ? 0 : SCHEDULER_PRIORITY_APPEND_FLAG );
40009850: 82 14 20 01 or %l0, 1, %g1
40009854: e0 27 20 c4 st %l0, [ %i4 + 0xc4 ]
node->priority = priority;
40009858: f2 27 20 30 st %i1, [ %i4 + 0x30 ]
( *scheduler->Operations.update_priority )(
4000985c: 90 10 00 1d mov %i5, %o0
40009860: e0 27 20 34 st %l0, [ %i4 + 0x34 ]
40009864: b6 10 20 00 clr %i3
node->priority = priority;
40009868: f2 26 20 18 st %i1, [ %i0 + 0x18 ]
4000986c: e0 26 20 1c st %l0, [ %i0 + 0x1c ]
RB_ROOT( the_rbtree ) = the_node;
40009870: e2 26 20 20 st %l1, [ %i0 + 0x20 ]
RB_PARENT( the_node, Node ) = NULL;
40009874: c0 27 20 28 clr [ %i4 + 0x28 ]
RB_LEFT( the_node, Node ) = NULL;
40009878: c0 27 20 20 clr [ %i4 + 0x20 ]
RB_RIGHT( the_node, Node ) = NULL;
4000987c: c0 27 20 24 clr [ %i4 + 0x24 ]
RB_COLOR( the_node, Node ) = RB_BLACK;
40009880: c0 27 20 2c clr [ %i4 + 0x2c ]
40009884: c2 26 20 34 st %g1, [ %i0 + 0x34 ]
40009888: f2 26 20 30 st %i1, [ %i0 + 0x30 ]
4000988c: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
40009890: 9f c0 40 00 call %g1
40009894: d4 07 20 38 ld [ %i4 + 0x38 ], %o2
40009898: 30 bf ff c3 b,a 400097a4 <rtems_task_set_scheduler+0x80>
_Thread_Do_dispatch( cpu_self, level );
4000989c: c2 27 bf d4 st %g1, [ %fp + -44 ]
<== NOT EXECUTED
400098a0: 40 00 10 77 call 4000da7c <_Thread_Do_dispatch>
<== NOT EXECUTED
400098a4: 90 10 00 1a mov %i2, %o0
<== NOT EXECUTED
400098a8: 10 bf ff db b 40009814 <rtems_task_set_scheduler+0xf0>
<== NOT EXECUTED
400098ac: c2 07 bf d4 ld [ %fp + -44 ], %g1
<== NOT EXECUTED
_Priority_Plain_insert(
400098b0: c8 07 20 30 ld [ %i4 + 0x30 ], %g4
<== NOT EXECUTED
400098b4: fa 07 20 34 ld [ %i4 + 0x34 ], %i5
<== NOT EXECUTED
if ( ( *less )( key, parent ) ) {
400098b8: c4 00 60 10 ld [ %g1 + 0x10 ], %g2
<== NOT EXECUTED
400098bc: 80 a0 80 04 cmp %g2, %g4
<== NOT EXECUTED
400098c0: 18 80 00 09 bgu 400098e4 <rtems_task_set_scheduler+0x1c0>
<== NOT EXECUTED
400098c4: 86 10 00 01 mov %g1, %g3
<== NOT EXECUTED
400098c8: 12 80 00 07 bne 400098e4 <rtems_task_set_scheduler+0x1c0>
<== NOT EXECUTED
400098cc: 86 00 60 04 add %g1, 4, %g3
<== NOT EXECUTED
400098d0: c4 00 60 14 ld [ %g1 + 0x14 ], %g2
<== NOT EXECUTED
400098d4: 80 a0 80 1d cmp %g2, %i5
<== NOT EXECUTED
400098d8: 18 80 00 03 bgu 400098e4 <rtems_task_set_scheduler+0x1c0>
<== NOT EXECUTED
400098dc: 86 10 00 01 mov %g1, %g3
<== NOT EXECUTED
return &RB_RIGHT( the_node, Node );
400098e0: 86 00 60 04 add %g1, 4, %g3
<== NOT EXECUTED
400098e4: c4 00 c0 00 ld [ %g3 ], %g2
<== NOT EXECUTED
while ( *link != NULL ) {
400098e8: 80 a0 a0 00 cmp %g2, 0
<== NOT EXECUTED
400098ec: 22 80 00 04 be,a 400098fc <rtems_task_set_scheduler+0x1d8>
<== NOT EXECUTED
400098f0: c2 27 20 28 st %g1, [ %i4 + 0x28 ]
<== NOT EXECUTED
400098f4: 10 bf ff f1 b 400098b8 <rtems_task_set_scheduler+0x194>
<== NOT EXECUTED
400098f8: 82 10 00 02 mov %g2, %g1
<== NOT EXECUTED
RB_SET( child, parent, Node );
400098fc: 82 10 20 01 mov 1, %g1
<== NOT EXECUTED
40009900: c0 27 20 24 clr [ %i4 + 0x24 ]
<== NOT EXECUTED
_RBTree_Insert_color( the_rbtree, the_node );
40009904: 90 10 00 1b mov %i3, %o0
<== NOT EXECUTED
RB_SET( child, parent, Node );
40009908: c0 27 20 20 clr [ %i4 + 0x20 ]
<== NOT EXECUTED
_RBTree_Insert_color( the_rbtree, the_node );
4000990c: 92 10 00 11 mov %l1, %o1
<== NOT EXECUTED
RB_SET( child, parent, Node );
40009910: c2 27 20 2c st %g1, [ %i4 + 0x2c ]
<== NOT EXECUTED
_RBTree_Insert_color( the_rbtree, the_node );
40009914: b6 10 20 0c mov 0xc, %i3
<== NOT EXECUTED
40009918: 40 00 0c 4f call 4000ca54 <_RBTree_Insert_color>
<== NOT EXECUTED
4000991c: e2 20 c0 00 st %l1, [ %g3 ]
<== NOT EXECUTED
40009920: 30 bf ff a1 b,a 400097a4 <rtems_task_set_scheduler+0x80>
<== NOT EXECUTED
40007a14 <rtems_task_suspend>:
#include <rtems/score/threadimpl.h>
rtems_status_code rtems_task_suspend(
rtems_id id
)
{
40007a14: 9d e3 bf 90 save %sp, -112, %sp
Thread_Control *the_thread;
ISR_lock_Context lock_context;
Per_CPU_Control *cpu_self;
States_Control previous_state;
the_thread = _Thread_Get( id, &lock_context );
40007a18: 90 10 00 18 mov %i0, %o0
40007a1c: 92 07 bf fc add %fp, -4, %o1
40007a20: 40 00 0f a5 call 4000b8b4 <_Thread_Get>
40007a24: b0 10 20 04 mov 4, %i0
if ( the_thread == NULL ) {
40007a28: 80 a2 20 00 cmp %o0, 0
40007a2c: 02 80 00 14 be 40007a7c <rtems_task_suspend+0x68>
40007a30: 01 00 00 00 nop
disable_level = cpu_self->thread_dispatch_disable_level;
40007a34: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40007a38: 82 00 60 01 inc %g1
<== NOT EXECUTED
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40007a3c: ba 10 00 06 mov %g6, %i5
<== NOT EXECUTED
cpu_self->thread_dispatch_disable_level = disable_level + 1;
40007a40: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007a44: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007a48: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007a4c: 01 00 00 00 nop
}
cpu_self = _Thread_Dispatch_disable_critical( &lock_context );
_ISR_lock_ISR_enable( &lock_context );
previous_state = _Thread_Set_state( the_thread, STATES_SUSPENDED );
40007a50: 40 00 15 ea call 4000d1f8 <_Thread_Set_state>
40007a54: 13 00 00 20 sethi %hi(0x8000), %o1
uint32_t disable_level = cpu_self->thread_dispatch_disable_level;
40007a58: c2 07 60 18 ld [ %i5 + 0x18 ], %g1
if ( disable_level == 1 ) {
40007a5c: 80 a0 60 01 cmp %g1, 1
40007a60: 02 80 00 09 be 40007a84 <rtems_task_suspend+0x70>
<== ALWAYS TAKEN
40007a64: b0 10 00 08 mov %o0, %i0
cpu_self->thread_dispatch_disable_level = disable_level - 1;
40007a68: 82 00 7f ff add %g1, -1, %g1
<== NOT EXECUTED
40007a6c: c2 27 60 18 st %g1, [ %i5 + 0x18 ]
<== NOT EXECUTED
_Thread_Dispatch_enable( cpu_self );
return _States_Is_suspended( previous_state ) ?
RTEMS_ALREADY_SUSPENDED : RTEMS_SUCCESSFUL;
40007a70: b1 2e 20 10 sll %i0, 0x10, %i0
<== NOT EXECUTED
40007a74: b1 3e 20 1f sra %i0, 0x1f, %i0
40007a78: b0 0e 20 0f and %i0, 0xf, %i0
}
40007a7c: 81 c7 e0 08 ret
40007a80: 81 e8 00 00 restore
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007a84: 91 d0 20 09 ta 9
<== NOT EXECUTED
if (
40007a88: c4 0f 60 1c ldub [ %i5 + 0x1c ], %g2
40007a8c: 80 a0 a0 00 cmp %g2, 0
40007a90: 32 80 00 07 bne,a 40007aac <rtems_task_suspend+0x98>
40007a94: 92 10 00 01 mov %g1, %o1
cpu_self->thread_dispatch_disable_level = 0;
40007a98: c0 27 60 18 clr [ %i5 + 0x18 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007a9c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40007aa0: 01 00 00 00 nop
RTEMS_ALREADY_SUSPENDED : RTEMS_SUCCESSFUL;
40007aa4: 10 bf ff f4 b 40007a74 <rtems_task_suspend+0x60>
40007aa8: b1 2e 20 10 sll %i0, 0x10, %i0
_Thread_Do_dispatch( cpu_self, level );
40007aac: c2 27 bf f4 st %g1, [ %fp + -12 ]
40007ab0: 40 00 0f 22 call 4000b738 <_Thread_Do_dispatch>
40007ab4: 90 10 00 1d mov %i5, %o0
40007ab8: 10 bf ff f9 b 40007a9c <rtems_task_suspend+0x88>
40007abc: c2 07 bf f4 ld [ %fp + -12 ], %g1
40007264 <rtems_task_wake_after>:
#include <rtems/score/watchdogimpl.h>
rtems_status_code rtems_task_wake_after(
rtems_interval ticks
)
{
40007264: 9d e3 bf 98 save %sp, -104, %sp
disable_level = cpu_self->thread_dispatch_disable_level;
40007268: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
cpu_self->thread_dispatch_disable_level = disable_level + 1;
4000726c: 82 00 60 01 inc %g1
40007270: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
40007274: ba 10 00 06 mov %g6, %i5
Per_CPU_Control *cpu_self;
cpu_self = _Thread_Dispatch_disable();
executing = _Per_CPU_Get_executing( cpu_self );
if ( ticks == 0 ) {
40007278: 80 a6 20 00 cmp %i0, 0
4000727c: 02 80 00 1d be 400072f0 <rtems_task_wake_after+0x8c>
40007280: f8 01 a0 20 ld [ %g6 + 0x20 ], %i4
_Thread_Yield( executing );
} else {
_Thread_Set_state( executing, STATES_WAITING_FOR_TIME );
40007284: 92 10 21 00 mov 0x100, %o1
40007288: 40 00 15 33 call 4000c754 <_Thread_Set_state>
4000728c: 90 10 00 1c mov %i4, %o0
)
{
#if defined(RTEMS_SMP)
_Atomic_Store_uint( &the_thread->Wait.flags, flags, ATOMIC_ORDER_RELAXED );
#else
the_thread->Wait.flags = flags;
40007290: 82 10 20 02 mov 2, %g1
<== NOT EXECUTED
40007294: c2 27 20 50 st %g1, [ %i4 + 0x50 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
40007298: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
4000729c: c2 27 bf fc st %g1, [ %fp + -4 ]
_ISR_lock_ISR_disable_and_acquire( &the_thread->Timer.Lock, &lock_context );
the_thread->Timer.header =
&cpu->Watchdog.Header[ PER_CPU_WATCHDOG_TICKS ];
the_thread->Timer.Watchdog.routine = _Thread_Timeout;
400072a0: 05 10 00 32 sethi %hi(0x4000c800), %g2
header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_TICKS ];
_Watchdog_Set_CPU( the_watchdog, cpu );
_Watchdog_Per_CPU_acquire_critical( cpu, &lock_context );
expire = ticks + cpu->Watchdog.ticks;
400072a4: d4 1f 60 30 ldd [ %i5 + 0x30 ], %o2
&cpu->Watchdog.Header[ PER_CPU_WATCHDOG_TICKS ];
400072a8: 90 07 60 38 add %i5, 0x38, %o0
the_thread->Timer.Watchdog.routine = _Thread_Timeout;
400072ac: 84 10 a1 c0 or %g2, 0x1c0, %g2
the_thread->Timer.header =
400072b0: d0 27 20 60 st %o0, [ %i4 + 0x60 ]
_Watchdog_Insert(header, the_watchdog, expire);
400072b4: 86 82 c0 18 addcc %o3, %i0, %g3
the_thread->Timer.Watchdog.routine = _Thread_Timeout;
400072b8: c4 27 20 78 st %g2, [ %i4 + 0x78 ]
400072bc: 84 42 a0 00 addx %o2, 0, %g2
400072c0: 92 07 20 68 add %i4, 0x68, %o1
400072c4: 94 10 00 02 mov %g2, %o2
400072c8: 40 00 16 c3 call 4000cdd4 <_Watchdog_Insert>
400072cc: 96 10 00 03 mov %g3, %o3
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400072d0: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400072d4: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400072d8: 01 00 00 00 nop
_Thread_Wait_flags_set( executing, THREAD_WAIT_STATE_BLOCKED );
_Thread_Add_timeout_ticks( executing, cpu_self, ticks );
}
_Thread_Dispatch_direct( cpu_self );
return RTEMS_SUCCESSFUL;
}
400072dc: b0 10 20 00 clr %i0 ! 0 <PROM_START>
_Thread_Dispatch_direct( cpu_self );
400072e0: 40 00 0e b5 call 4000adb4 <_Thread_Dispatch_direct>
400072e4: 90 10 00 1d mov %i5, %o0
}
400072e8: 81 c7 e0 08 ret
400072ec: 81 e8 00 00 restore
_Thread_Yield( executing );
400072f0: 40 00 15 bb call 4000c9dc <_Thread_Yield>
400072f4: 90 10 00 1c mov %i4, %o0
}
400072f8: b0 10 20 00 clr %i0
_Thread_Dispatch_direct( cpu_self );
400072fc: 40 00 0e ae call 4000adb4 <_Thread_Dispatch_direct>
40007300: 90 10 00 1d mov %i5, %o0
}
40007304: 81 c7 e0 08 ret
40007308: 81 e8 00 00 restore
40007778 <rtems_task_wake_when>:
#include <rtems/score/watchdogimpl.h>
rtems_status_code rtems_task_wake_when(
rtems_time_of_day *time_buffer
)
{
40007778: 9d e3 bf 98 save %sp, -104, %sp
*
* @return TRUE is the time is set. FALSE otherwise.
*/
RTEMS_INLINE_ROUTINE bool _TOD_Is_set( void )
{
return _TOD.is_set;
4000777c: 03 10 00 53 sethi %hi(0x40014c00), %g1
uint32_t seconds;
Thread_Control *executing;
Per_CPU_Control *cpu_self;
if ( !_TOD_Is_set() )
40007780: c4 08 62 21 ldub [ %g1 + 0x221 ], %g2 ! 40014e21 <_TOD>
40007784: 80 a0 a0 00 cmp %g2, 0
40007788: 02 80 00 2d be 4000783c <rtems_task_wake_when+0xc4>
4000778c: 82 10 20 0b mov 0xb, %g1
return RTEMS_NOT_DEFINED;
if ( !time_buffer )
40007790: 80 a6 20 00 cmp %i0, 0
40007794: 02 80 00 2a be 4000783c <rtems_task_wake_when+0xc4>
40007798: 82 10 20 09 mov 9, %g1
return RTEMS_INVALID_ADDRESS;
time_buffer->ticks = 0;
4000779c: c0 26 20 18 clr [ %i0 + 0x18 ]
if ( !_TOD_Validate( time_buffer ) )
400077a0: 7f ff fe 63 call 4000712c <_TOD_Validate>
400077a4: 90 10 00 18 mov %i0, %o0
400077a8: 80 a2 20 00 cmp %o0, 0
400077ac: 02 80 00 27 be 40007848 <rtems_task_wake_when+0xd0>
400077b0: 82 10 20 14 mov 0x14, %g1
return RTEMS_INVALID_CLOCK;
seconds = _TOD_To_seconds( time_buffer );
400077b4: 7f ff fe 31 call 40007078 <_TOD_To_seconds>
400077b8: 90 10 00 18 mov %i0, %o0
return (uint32_t) _Timecounter_Time_second;
400077bc: 03 10 00 4d sethi %hi(0x40013400), %g1
400077c0: c4 18 62 c0 ldd [ %g1 + 0x2c0 ], %g2 ! 400136c0 <_Timecounter_Time_second>
if ( seconds <= _TOD_Seconds_since_epoch() )
400077c4: 80 a2 00 03 cmp %o0, %g3
400077c8: 08 80 00 1f bleu 40007844 <rtems_task_wake_when+0xcc>
400077cc: b6 10 00 08 mov %o0, %i3
disable_level = cpu_self->thread_dispatch_disable_level;
400077d0: c2 01 a0 18 ld [ %g6 + 0x18 ], %g1
cpu_self->thread_dispatch_disable_level = disable_level + 1;
400077d4: 82 00 60 01 inc %g1
400077d8: c2 21 a0 18 st %g1, [ %g6 + 0x18 ]
return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
400077dc: ba 10 00 06 mov %g6, %i5
return cpu->executing;
400077e0: f8 01 a0 20 ld [ %g6 + 0x20 ], %i4
return RTEMS_INVALID_CLOCK;
cpu_self = _Thread_Dispatch_disable();
executing = _Per_CPU_Get_executing( cpu_self );
_Thread_Set_state( executing, STATES_WAITING_FOR_TIME );
400077e4: 92 10 21 00 mov 0x100, %o1
400077e8: 40 00 15 2c call 4000cc98 <_Thread_Set_state>
400077ec: 90 10 00 1c mov %i4, %o0
the_thread->Wait.flags = flags;
400077f0: 82 10 20 02 mov 2, %g1
<== NOT EXECUTED
400077f4: c2 27 20 50 st %g1, [ %i4 + 0x50 ]
<== NOT EXECUTED
__asm__ volatile ( "ta %1\n\t" : "=r" (psr) : "i" (SPARC_SWTRAP_IRQDIS));
400077f8: 91 d0 20 09 ta 9
<== NOT EXECUTED
return psr;
400077fc: c2 27 bf fc st %g1, [ %fp + -4 ]
_ISR_lock_ISR_disable_and_acquire( &the_thread->Timer.Lock, &lock_context );
header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_REALTIME ];
the_thread->Timer.header = header;
the_thread->Timer.Watchdog.routine = routine;
40007800: 05 10 00 33 sethi %hi(0x4000cc00), %g2
header = &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_REALTIME ];
40007804: 90 07 60 40 add %i5, 0x40, %o0
the_thread->Timer.Watchdog.routine = routine;
40007808: 84 10 a3 04 or %g2, 0x304, %g2
the_thread->Timer.header = header;
4000780c: d0 27 20 60 st %o0, [ %i4 + 0x60 ]
ISR_lock_Context lock_context;
_Watchdog_Set_CPU( the_watchdog, cpu );
_Watchdog_Per_CPU_acquire_critical( cpu, &lock_context );
_Watchdog_Insert( header, the_watchdog, expire );
40007810: 95 36 e0 02 srl %i3, 2, %o2
the_thread->Timer.Watchdog.routine = routine;
40007814: c4 27 20 78 st %g2, [ %i4 + 0x78 ]
40007818: 97 2e e0 1e sll %i3, 0x1e, %o3
4000781c: 40 00 16 bf call 4000d318 <_Watchdog_Insert>
40007820: 92 07 20 68 add %i4, 0x68, %o1
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40007824: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40007828: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000782c: 01 00 00 00 nop
executing,
cpu_self,
_Thread_Timeout,
_Watchdog_Ticks_from_seconds( seconds )
);
_Thread_Dispatch_direct( cpu_self );
40007830: 40 00 0e b2 call 4000b2f8 <_Thread_Dispatch_direct>
40007834: 90 10 00 1d mov %i5, %o0
return RTEMS_SUCCESSFUL;
40007838: 82 10 20 00 clr %g1
}
4000783c: 81 c7 e0 08 ret
40007840: 91 e8 00 01 restore %g0, %g1, %o0
return RTEMS_INVALID_CLOCK;
40007844: 82 10 20 14 mov 0x14, %g1
}
40007848: 81 c7 e0 08 ret
4000784c: 91 e8 00 01 restore %g0, %g1, %o0
4000aa94 <rtems_timer_cancel>:
#include <rtems/rtems/timerimpl.h>
rtems_status_code rtems_timer_cancel(
rtems_id id
)
{
4000aa94: 9d e3 bf 98 save %sp, -104, %sp
RTEMS_INLINE_ROUTINE Timer_Control *_Timer_Get(
Objects_Id id,
ISR_lock_Context *lock_context
)
{
return (Timer_Control *) _Objects_Get(
4000aa98: 15 10 00 64 sethi %hi(0x40019000), %o2
4000aa9c: 90 10 00 18 mov %i0, %o0
4000aaa0: 92 07 bf fc add %fp, -4, %o1
4000aaa4: 94 12 a3 c8 or %o2, 0x3c8, %o2
4000aaa8: 40 00 0a 67 call 4000d444 <_Objects_Get>
4000aaac: b0 10 20 04 mov 4, %i0
Timer_Control *the_timer;
ISR_lock_Context lock_context;
the_timer = _Timer_Get( id, &lock_context );
if ( the_timer != NULL ) {
4000aab0: 80 a2 20 00 cmp %o0, 0
4000aab4: 02 80 00 09 be 4000aad8 <rtems_timer_cancel+0x44>
4000aab8: 92 10 00 08 mov %o0, %o1
Per_CPU_Control *cpu;
cpu = _Timer_Acquire_critical( the_timer, &lock_context );
_Timer_Cancel( cpu, the_timer );
4000aabc: 11 10 00 64 sethi %hi(0x40019000), %o0
4000aac0: 40 00 00 12 call 4000ab08 <_Timer_Cancel>
4000aac4: 90 12 22 c0 or %o0, 0x2c0, %o0 ! 400192c0 <_Per_CPU_Information>
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000aac8: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000aacc: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000aad0: 01 00 00 00 nop
_Timer_Release( cpu, &lock_context );
return RTEMS_SUCCESSFUL;
4000aad4: b0 10 20 00 clr %i0 ! 0 <PROM_START>
}
return RTEMS_INVALID_ID;
}
4000aad8: 81 c7 e0 08 ret
4000aadc: 81 e8 00 00 restore
40008284 <rtems_timer_delete>:
#include <rtems/rtems/timerimpl.h>
rtems_status_code rtems_timer_delete(
rtems_id id
)
{
40008284: 9d e3 bf 98 save %sp, -104, %sp
_RTEMS_Lock_allocator();
40008288: 40 00 00 d4 call 400085d8 <_RTEMS_Lock_allocator>
4000828c: 39 10 00 5a sethi %hi(0x40016800), %i4
return (Timer_Control *) _Objects_Get(
40008290: 92 07 bf fc add %fp, -4, %o1
40008294: 94 17 20 48 or %i4, 0x48, %o2
40008298: 40 00 09 f9 call 4000aa7c <_Objects_Get>
4000829c: 90 10 00 18 mov %i0, %o0
ISR_lock_Context lock_context;
_Objects_Allocator_lock();
the_timer = _Timer_Get( id, &lock_context );
if ( the_timer != NULL ) {
400082a0: ba 92 20 00 orcc %o0, 0, %i5
400082a4: 02 80 00 13 be 400082f0 <rtems_timer_delete+0x6c>
400082a8: 90 17 20 48 or %i4, 0x48, %o0
Per_CPU_Control *cpu;
_Objects_Close( &_Timer_Information, &the_timer->Object );
400082ac: 40 00 08 d9 call 4000a610 <_Objects_Close>
400082b0: 92 10 00 1d mov %i5, %o1
cpu = _Timer_Acquire_critical( the_timer, &lock_context );
_Timer_Cancel( cpu, the_timer );
400082b4: 92 10 00 1d mov %i5, %o1
400082b8: 11 10 00 59 sethi %hi(0x40016400), %o0
400082bc: 7f ff ff 7d call 400080b0 <_Timer_Cancel>
400082c0: 90 12 23 40 or %o0, 0x340, %o0 ! 40016740 <_Per_CPU_Information>
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
400082c4: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
400082c8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
400082cc: 01 00 00 00 nop
_Objects_Free( &_Timer_Information, &the_timer->Object );
400082d0: 92 10 00 1d mov %i5, %o1
400082d4: 90 17 20 48 or %i4, 0x48, %o0
400082d8: 40 00 09 9a call 4000a940 <_Objects_Free>
400082dc: b0 10 20 00 clr %i0
_RTEMS_Unlock_allocator();
400082e0: 40 00 00 c3 call 400085ec <_RTEMS_Unlock_allocator>
400082e4: 01 00 00 00 nop
_Timer_Release( cpu, &lock_context );
_Timer_Free( the_timer );
_Objects_Allocator_unlock();
return RTEMS_SUCCESSFUL;
400082e8: 81 c7 e0 08 ret
400082ec: 81 e8 00 00 restore
400082f0: 40 00 00 bf call 400085ec <_RTEMS_Unlock_allocator>
400082f4: b0 10 20 04 mov 4, %i0
}
_Objects_Allocator_unlock();
return RTEMS_INVALID_ID;
}
400082f8: 81 c7 e0 08 ret
400082fc: 81 e8 00 00 restore
40009f18 <rtems_timer_get_information>:
rtems_status_code rtems_timer_get_information(
rtems_id id,
rtems_timer_information *the_info
)
{
40009f18: 9d e3 bf 98 save %sp, -104, %sp
Timer_Control *the_timer;
ISR_lock_Context lock_context;
if ( !the_info )
40009f1c: 80 a6 60 00 cmp %i1, 0
40009f20: 02 80 00 16 be 40009f78 <rtems_timer_get_information+0x60>
40009f24: 82 10 20 09 mov 9, %g1
return (Timer_Control *) _Objects_Get(
40009f28: 92 07 bf fc add %fp, -4, %o1
40009f2c: 15 10 00 61 sethi %hi(0x40018400), %o2
40009f30: 90 10 00 18 mov %i0, %o0
40009f34: 40 00 0a 58 call 4000c894 <_Objects_Get>
40009f38: 94 12 a2 88 or %o2, 0x288, %o2
return RTEMS_INVALID_ADDRESS;
the_timer = _Timer_Get( id, &lock_context );
if ( the_timer != NULL ) {
40009f3c: 80 a2 20 00 cmp %o0, 0
40009f40: 02 80 00 10 be 40009f80 <rtems_timer_get_information+0x68>
40009f44: 82 10 20 04 mov 4, %g1
Per_CPU_Control *cpu;
cpu = _Timer_Acquire_critical( the_timer, &lock_context );
the_info->the_class = the_timer->the_class;
40009f48: c8 02 20 30 ld [ %o0 + 0x30 ], %g4
<== NOT EXECUTED
the_info->initial = the_timer->initial;
40009f4c: c6 02 20 3c ld [ %o0 + 0x3c ], %g3
<== NOT EXECUTED
the_info->start_time = the_timer->start_time;
40009f50: c4 02 20 40 ld [ %o0 + 0x40 ], %g2
<== NOT EXECUTED
the_info->stop_time = the_timer->stop_time;
40009f54: c2 02 20 44 ld [ %o0 + 0x44 ], %g1
<== NOT EXECUTED
40009f58: c2 26 60 0c st %g1, [ %i1 + 0xc ]
<== NOT EXECUTED
the_info->the_class = the_timer->the_class;
40009f5c: c8 26 40 00 st %g4, [ %i1 ]
<== NOT EXECUTED
the_info->initial = the_timer->initial;
40009f60: c6 26 60 04 st %g3, [ %i1 + 4 ]
<== NOT EXECUTED
the_info->start_time = the_timer->start_time;
40009f64: c4 26 60 08 st %g2, [ %i1 + 8 ]
<== NOT EXECUTED
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
40009f68: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
40009f6c: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
40009f70: 01 00 00 00 nop
_Timer_Release( cpu, &lock_context );
return RTEMS_SUCCESSFUL;
40009f74: 82 10 20 00 clr %g1 ! 0 <PROM_START>
}
return RTEMS_INVALID_ID;
}
40009f78: 81 c7 e0 08 ret
40009f7c: 91 e8 00 01 restore %g0, %g1, %o0
40009f80: 81 c7 e0 08 ret
40009f84: 91 e8 00 01 restore %g0, %g1, %o0
4000ad7c <rtems_timer_reset>:
#include <rtems/rtems/timerimpl.h>
rtems_status_code rtems_timer_reset(
rtems_id id
)
{
4000ad7c: 9d e3 bf 98 save %sp, -104, %sp
return (Timer_Control *) _Objects_Get(
4000ad80: 15 10 00 64 sethi %hi(0x40019000), %o2
4000ad84: 92 07 bf fc add %fp, -4, %o1
4000ad88: 94 12 a3 c8 or %o2, 0x3c8, %o2
4000ad8c: 40 00 09 ae call 4000d444 <_Objects_Get>
4000ad90: 90 10 00 18 mov %i0, %o0
Timer_Control *the_timer;
ISR_lock_Context lock_context;
the_timer = _Timer_Get( id, &lock_context );
if ( the_timer != NULL ) {
4000ad94: ba 92 20 00 orcc %o0, 0, %i5
4000ad98: 02 80 00 20 be 4000ae18 <rtems_timer_reset+0x9c>
4000ad9c: 01 00 00 00 nop
return ( the_class & mask ) == TIMER_CLASS_BIT_NOT_DORMANT;
4000ada0: c2 07 60 30 ld [ %i5 + 0x30 ], %g1
4000ada4: 82 08 60 05 and %g1, 5, %g1
Per_CPU_Control *cpu;
rtems_status_code status;
cpu = _Timer_Acquire_critical( the_timer, &lock_context );
if ( _Timer_Is_interval_class( the_timer->the_class ) ) {
4000ada8: 80 a0 60 04 cmp %g1, 4
4000adac: 02 80 00 07 be 4000adc8 <rtems_timer_reset+0x4c>
4000adb0: b0 10 20 0b mov 0xb, %i0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000adb4: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000adb8: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000adbc: 01 00 00 00 nop
} else {
status = RTEMS_NOT_DEFINED;
}
_Timer_Release( cpu, &lock_context );
return status;
4000adc0: 81 c7 e0 08 ret
4000adc4: 81 e8 00 00 restore
_Timer_Cancel( cpu, the_timer );
4000adc8: 92 10 00 1d mov %i5, %o1
4000adcc: 39 10 00 64 sethi %hi(0x40019000), %i4
4000add0: 7f ff ff 4e call 4000ab08 <_Timer_Cancel>
4000add4: 90 17 22 c0 or %i4, 0x2c0, %o0 ! 400192c0 <_Per_CPU_Information>
cpu->Watchdog.ticks + the_timer->initial
4000add8: d4 07 60 3c ld [ %i5 + 0x3c ], %o2
4000addc: 90 17 22 c0 or %i4, 0x2c0, %o0
_Watchdog_Insert(
4000ade0: c4 1a 20 30 ldd [ %o0 + 0x30 ], %g2
4000ade4: 9a 80 c0 0a addcc %g3, %o2, %o5
4000ade8: 98 40 a0 00 addx %g2, 0, %o4
4000adec: 96 10 00 0d mov %o5, %o3
4000adf0: 94 10 00 0c mov %o4, %o2
4000adf4: 92 07 60 10 add %i5, 0x10, %o1
4000adf8: 90 02 20 38 add %o0, 0x38, %o0
4000adfc: 40 00 16 e0 call 4001097c <_Watchdog_Insert>
4000ae00: b0 10 20 00 clr %i0
register uint32_t _psr __asm__("g1") = psr; /* input to trap handler */
4000ae04: c2 07 bf fc ld [ %fp + -4 ], %g1
<== NOT EXECUTED
__asm__ volatile ( "ta %0\nnop\n" :: "i" (SPARC_SWTRAP_IRQEN), "r" (_psr));
4000ae08: 91 d0 20 0a ta 0xa
<== NOT EXECUTED
4000ae0c: 01 00 00 00 nop
return status;
4000ae10: 81 c7 e0 08 ret
4000ae14: 81 e8 00 00 restore
}
return RTEMS_INVALID_ID;
}
4000ae18: 81 c7 e0 08 ret
4000ae1c: 91 e8 20 04 restore %g0, 4, %o0