30014c64 <_CORE_message_queue_Broadcast>:
{
Thread_Control *the_thread;
uint32_t number_broadcasted;
Thread_Wait_information *waitp;
if ( size > the_message_queue->maximum_message_size ) {
30014c64: e590304c ldr r3, [r0, #76] ; 0x4c
Objects_Id id __attribute__((unused)),
CORE_message_queue_API_mp_support_callout api_message_queue_mp_support __attribute__((unused)),
#endif
uint32_t *count
)
{
30014c68: e92d45f0 push {r4, r5, r6, r7, r8, sl, lr}
Thread_Control *the_thread;
uint32_t number_broadcasted;
Thread_Wait_information *waitp;
if ( size > the_message_queue->maximum_message_size ) {
30014c6c: e1520003 cmp r2, r3
Objects_Id id __attribute__((unused)),
CORE_message_queue_API_mp_support_callout api_message_queue_mp_support __attribute__((unused)),
#endif
uint32_t *count
)
{
30014c70: e1a06000 mov r6, r0 30014c74: e1a0a001 mov sl, r1 30014c78: e1a07002 mov r7, r2 30014c7c: e59d8020 ldr r8, [sp, #32]
Thread_Control *the_thread;
uint32_t number_broadcasted;
Thread_Wait_information *waitp;
if ( size > the_message_queue->maximum_message_size ) {
30014c80: 8a000013 bhi 30014cd4 <_CORE_message_queue_Broadcast+0x70>
* NOTE: This check is critical because threads can block on
* send and receive and this ensures that we are broadcasting
* the message to threads waiting to receive -- not to send.
*/
if ( the_message_queue->number_of_pending_messages != 0 ) {
30014c84: e5905048 ldr r5, [r0, #72] ; 0x48 30014c88: e3550000 cmp r5, #0
*count = 0;
30014c8c: 13a00000 movne r0, #0 30014c90: 15880000 strne r0, [r8]
* NOTE: This check is critical because threads can block on
* send and receive and this ensures that we are broadcasting
* the message to threads waiting to receive -- not to send.
*/
if ( the_message_queue->number_of_pending_messages != 0 ) {
30014c94: 0a000007 beq 30014cb8 <_CORE_message_queue_Broadcast+0x54>
30014c98: e8bd85f0 pop {r4, r5, r6, r7, r8, sl, pc}
const void *source,
void *destination,
size_t size
)
{
memcpy(destination, source, size);
30014c9c: e594002c ldr r0, [r4, #44] ; 0x2c 30014ca0: e1a0100a mov r1, sl 30014ca4: e1a02007 mov r2, r7 30014ca8: eb001e3f bl 3001c5ac <memcpy>
buffer,
waitp->return_argument_second.mutable_object,
size
);
*(size_t *) the_thread->Wait.return_argument = size;
30014cac: e5943028 ldr r3, [r4, #40] ; 0x28
*/
number_broadcasted = 0;
while ((the_thread =
_Thread_queue_Dequeue(&the_message_queue->Wait_queue))) {
waitp = &the_thread->Wait;
number_broadcasted += 1;
30014cb0: e2855001 add r5, r5, #1
buffer,
waitp->return_argument_second.mutable_object,
size
);
*(size_t *) the_thread->Wait.return_argument = size;
30014cb4: e5837000 str r7, [r3]
/* * There must be no pending messages if there is a thread waiting to * receive a message. */ number_broadcasted = 0; while ((the_thread =
30014cb8: e1a00006 mov r0, r6 30014cbc: eb000a41 bl 300175c8 <_Thread_queue_Dequeue> 30014cc0: e2504000 subs r4, r0, #0
30014cc4: 1afffff4 bne 30014c9c <_CORE_message_queue_Broadcast+0x38>
if ( !_Objects_Is_local_id( the_thread->Object.id ) )
(*api_message_queue_mp_support) ( the_thread, id );
#endif
}
*count = number_broadcasted;
30014cc8: e5885000 str r5, [r8]
return CORE_MESSAGE_QUEUE_STATUS_SUCCESSFUL;
30014ccc: e1a00004 mov r0, r4
30014cd0: e8bd85f0 pop {r4, r5, r6, r7, r8, sl, pc}
Thread_Control *the_thread;
uint32_t number_broadcasted;
Thread_Wait_information *waitp;
if ( size > the_message_queue->maximum_message_size ) {
return CORE_MESSAGE_QUEUE_STATUS_INVALID_SIZE;
30014cd4: e3a00001 mov r0, #1 <== NOT EXECUTED
#endif
}
*count = number_broadcasted;
return CORE_MESSAGE_QUEUE_STATUS_SUCCESSFUL;
}
30014cd8: e8bd85f0 pop {r4, r5, r6, r7, r8, sl, pc} <== NOT EXECUTED
30009fcc <_CORE_mutex_Seize_interrupt_trylock>:
#if defined(__RTEMS_DO_NOT_INLINE_CORE_MUTEX_SEIZE__)
int _CORE_mutex_Seize_interrupt_trylock(
CORE_mutex_Control *the_mutex,
ISR_Level *level_p
)
{
30009fcc: e1a03000 mov r3, r0
{
Thread_Control *executing;
/* disabled when you get here */
executing = _Thread_Executing;
30009fd0: e59f2124 ldr r2, [pc, #292] ; 3000a0fc <_CORE_mutex_Seize_interrupt_trylock+0x130>
executing->Wait.return_code = CORE_MUTEX_STATUS_SUCCESSFUL;
if ( !_CORE_mutex_Is_locked( the_mutex ) ) {
30009fd4: e593c050 ldr ip, [r3, #80] ; 0x50
Thread_Control *executing;
/* disabled when you get here */
executing = _Thread_Executing;
executing->Wait.return_code = CORE_MUTEX_STATUS_SUCCESSFUL;
30009fd8: e3a00000 mov r0, #0
{
Thread_Control *executing;
/* disabled when you get here */
executing = _Thread_Executing;
30009fdc: e5922004 ldr r2, [r2, #4]
executing->Wait.return_code = CORE_MUTEX_STATUS_SUCCESSFUL;
if ( !_CORE_mutex_Is_locked( the_mutex ) ) {
30009fe0: e15c0000 cmp ip, r0
30009fe4: e92d4010 push {r4, lr}
Thread_Control *executing;
/* disabled when you get here */
executing = _Thread_Executing;
executing->Wait.return_code = CORE_MUTEX_STATUS_SUCCESSFUL;
30009fe8: e5820034 str r0, [r2, #52] ; 0x34
if ( !_CORE_mutex_Is_locked( the_mutex ) ) {
30009fec: 0a00002c beq 3000a0a4 <_CORE_mutex_Seize_interrupt_trylock+0xd8>
the_mutex->lock = CORE_MUTEX_LOCKED;
30009ff0: e5830050 str r0, [r3, #80] ; 0x50
the_mutex->holder = executing;
the_mutex->holder_id = executing->Object.id;
30009ff4: e5920008 ldr r0, [r2, #8]
executing = _Thread_Executing;
executing->Wait.return_code = CORE_MUTEX_STATUS_SUCCESSFUL;
if ( !_CORE_mutex_Is_locked( the_mutex ) ) {
the_mutex->lock = CORE_MUTEX_LOCKED;
the_mutex->holder = executing;
30009ff8: e583205c str r2, [r3, #92] ; 0x5c
the_mutex->holder_id = executing->Object.id;
30009ffc: e5830060 str r0, [r3, #96] ; 0x60
the_mutex->nest_count = 1;
3000a000: e3a00001 mov r0, #1 3000a004: e5830054 str r0, [r3, #84] ; 0x54
return _CORE_mutex_Seize_interrupt_trylock_body( the_mutex, level_p ); }
3000a008: e5930048 ldr r0, [r3, #72] ; 0x48
if ( _CORE_mutex_Is_inherit_priority( &the_mutex->Attributes ) ||
3000a00c: e3500002 cmp r0, #2
3000a010: 0a000001 beq 3000a01c <_CORE_mutex_Seize_interrupt_trylock+0x50>
3000a014: e3500003 cmp r0, #3
3000a018: 1a000004 bne 3000a030 <_CORE_mutex_Seize_interrupt_trylock+0x64>
_Chain_Prepend_unprotected( &executing->lock_mutex,
&the_mutex->queue.lock_queue );
the_mutex->queue.priority_before = executing->current_priority;
#endif
executing->resource_count++;
3000a01c: e592c01c ldr ip, [r2, #28]
}
if ( !_CORE_mutex_Is_priority_ceiling( &the_mutex->Attributes ) ) {
3000a020: e3500003 cmp r0, #3
_Chain_Prepend_unprotected( &executing->lock_mutex,
&the_mutex->queue.lock_queue );
the_mutex->queue.priority_before = executing->current_priority;
#endif
executing->resource_count++;
3000a024: e28c4001 add r4, ip, #1 3000a028: e582401c str r4, [r2, #28]
}
if ( !_CORE_mutex_Is_priority_ceiling( &the_mutex->Attributes ) ) {
3000a02c: 0a000000 beq 3000a034 <_CORE_mutex_Seize_interrupt_trylock+0x68>
_ISR_Enable( *level_p );
3000a030: ea00002b b 3000a0e4 <_CORE_mutex_Seize_interrupt_trylock+0x118>
*/
{
Priority_Control ceiling;
Priority_Control current;
ceiling = the_mutex->Attributes.priority_ceiling;
3000a034: e593004c ldr r0, [r3, #76] ; 0x4c
current = executing->current_priority;
3000a038: e5924014 ldr r4, [r2, #20]
if ( current == ceiling ) {
3000a03c: e1540000 cmp r4, r0
3000a040: 1a000000 bne 3000a048 <_CORE_mutex_Seize_interrupt_trylock+0x7c>
_ISR_Enable( *level_p );
3000a044: ea000026 b 3000a0e4 <_CORE_mutex_Seize_interrupt_trylock+0x118>
return 0;
}
if ( current > ceiling ) {
3000a048: 9a00000b bls 3000a07c <_CORE_mutex_Seize_interrupt_trylock+0xb0>
rtems_fatal_error_occurred( 99 );
}
}
#endif
_Thread_Dispatch_disable_level += 1;
3000a04c: e59f20ac ldr r2, [pc, #172] ; 3000a100 <_CORE_mutex_Seize_interrupt_trylock+0x134> 3000a050: e5920000 ldr r0, [r2] 3000a054: e2800001 add r0, r0, #1 3000a058: e5820000 str r0, [r2] 3000a05c: e5912000 ldr r2, [r1] 3000a060: e129f002 msr CPSR_fc, r2
_Thread_Disable_dispatch();
_ISR_Enable( *level_p );
_Thread_Change_priority(
3000a064: e3a02000 mov r2, #0 3000a068: e593005c ldr r0, [r3, #92] ; 0x5c 3000a06c: e593104c ldr r1, [r3, #76] ; 0x4c 3000a070: ebfff334 bl 30006d48 <_Thread_Change_priority>
the_mutex->holder,
the_mutex->Attributes.priority_ceiling,
false
);
_Thread_Enable_dispatch();
3000a074: ebfff458 bl 300071dc <_Thread_Enable_dispatch> 3000a078: ea00001b b 3000a0ec <_CORE_mutex_Seize_interrupt_trylock+0x120>
return 0;
}
/* if ( current < ceiling ) */ {
executing->Wait.return_code = CORE_MUTEX_STATUS_CEILING_VIOLATED;
3000a07c: e3a00006 mov r0, #6 3000a080: e5820034 str r0, [r2, #52] ; 0x34
the_mutex->lock = CORE_MUTEX_UNLOCKED;
3000a084: e3a00001 mov r0, #1 3000a088: e5830050 str r0, [r3, #80] ; 0x50
the_mutex->nest_count = 0; /* undo locking above */
3000a08c: e3a00000 mov r0, #0 3000a090: e5830054 str r0, [r3, #84] ; 0x54
executing->resource_count--; /* undo locking above */
3000a094: e582c01c str ip, [r2, #28]
3000a098: e5913000 ldr r3, [r1]
3000a09c: e129f003 msr CPSR_fc, r3
3000a0a0: e8bd8010 pop {r4, pc}
/*
* At this point, we know the mutex was not available. If this thread
* is the thread that has locked the mutex, let's see if we are allowed
* to nest access.
*/
if ( _Thread_Is_executing( the_mutex->holder ) ) {
3000a0a4: e593005c ldr r0, [r3, #92] ; 0x5c 3000a0a8: e1500002 cmp r0, r2
/*
* The mutex is not available and the caller must deal with the possibility
* of blocking.
*/
return 1;
3000a0ac: 13a00001 movne r0, #1
/*
* At this point, we know the mutex was not available. If this thread
* is the thread that has locked the mutex, let's see if we are allowed
* to nest access.
*/
if ( _Thread_Is_executing( the_mutex->holder ) ) {
3000a0b0: 18bd8010 popne {r4, pc}
switch ( the_mutex->Attributes.lock_nesting_behavior ) {
3000a0b4: e5932040 ldr r2, [r3, #64] ; 0x40 3000a0b8: e3520000 cmp r2, #0
3000a0bc: 0a000002 beq 3000a0cc <_CORE_mutex_Seize_interrupt_trylock+0x100>
3000a0c0: e3520001 cmp r2, #1
3000a0c4: 1a00000a bne 3000a0f4 <_CORE_mutex_Seize_interrupt_trylock+0x128>
3000a0c8: ea000003 b 3000a0dc <_CORE_mutex_Seize_interrupt_trylock+0x110><== NOT EXECUTED
case CORE_MUTEX_NESTING_ACQUIRES:
the_mutex->nest_count++;
3000a0cc: e5932054 ldr r2, [r3, #84] ; 0x54 3000a0d0: e2822001 add r2, r2, #1 3000a0d4: e5832054 str r2, [r3, #84] ; 0x54
_ISR_Enable( *level_p );
3000a0d8: ea000001 b 3000a0e4 <_CORE_mutex_Seize_interrupt_trylock+0x118>
return 0;
case CORE_MUTEX_NESTING_IS_ERROR:
executing->Wait.return_code = CORE_MUTEX_STATUS_NESTING_NOT_ALLOWED;
3000a0dc: e3a03002 mov r3, #2 <== NOT EXECUTED 3000a0e0: e5803034 str r3, [r0, #52] ; 0x34 <== NOT EXECUTED
3000a0e4: e5913000 ldr r3, [r1] 3000a0e8: e129f003 msr CPSR_fc, r3
_ISR_Enable( *level_p );
return 0;
3000a0ec: e3a00000 mov r0, #0
3000a0f0: e8bd8010 pop {r4, pc}
/*
* The mutex is not available and the caller must deal with the possibility
* of blocking.
*/
return 1;
3000a0f4: e3a00001 mov r0, #1
3000a0f8: e8bd8010 pop {r4, pc}
30006dbc <_Heap_Walk>:
bool _Heap_Walk(
Heap_Control *heap,
int source,
bool dump
)
{
30006dbc: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr}
uintptr_t const page_size = heap->page_size; uintptr_t const min_block_size = heap->min_block_size;
30006dc0: e5903014 ldr r3, [r0, #20]
bool _Heap_Walk(
Heap_Control *heap,
int source,
bool dump
)
{
30006dc4: e24dd030 sub sp, sp, #48 ; 0x30
uintptr_t const page_size = heap->page_size; uintptr_t const min_block_size = heap->min_block_size;
30006dc8: e58d3024 str r3, [sp, #36] ; 0x24
Heap_Block *const first_block = heap->first_block; Heap_Block *const last_block = heap->last_block;
30006dcc: e5903024 ldr r3, [r0, #36] ; 0x24
Heap_Block *block = first_block;
Heap_Walk_printer printer = dump ?
_Heap_Walk_print : _Heap_Walk_print_nothing;
30006dd0: e59f4500 ldr r4, [pc, #1280] ; 300072d8 <_Heap_Walk+0x51c>
)
{
uintptr_t const page_size = heap->page_size;
uintptr_t const min_block_size = heap->min_block_size;
Heap_Block *const first_block = heap->first_block;
Heap_Block *const last_block = heap->last_block;
30006dd4: e58d3028 str r3, [sp, #40] ; 0x28
Heap_Block *block = first_block;
Heap_Walk_printer printer = dump ?
_Heap_Walk_print : _Heap_Walk_print_nothing;
30006dd8: e59f34fc ldr r3, [pc, #1276] ; 300072dc <_Heap_Walk+0x520> 30006ddc: e31200ff tst r2, #255 ; 0xff 30006de0: 11a04003 movne r4, r3
if ( !_System_state_Is_up( _System_state_Get() ) ) {
30006de4: e59f34f4 ldr r3, [pc, #1268] ; 300072e0 <_Heap_Walk+0x524>
bool dump
)
{
uintptr_t const page_size = heap->page_size;
uintptr_t const min_block_size = heap->min_block_size;
Heap_Block *const first_block = heap->first_block;
30006de8: e590c020 ldr ip, [r0, #32]
Heap_Block *const last_block = heap->last_block;
Heap_Block *block = first_block;
Heap_Walk_printer printer = dump ?
_Heap_Walk_print : _Heap_Walk_print_nothing;
if ( !_System_state_Is_up( _System_state_Get() ) ) {
30006dec: e5933000 ldr r3, [r3]
bool _Heap_Walk(
Heap_Control *heap,
int source,
bool dump
)
{
30006df0: e1a06000 mov r6, r0
Heap_Block *const last_block = heap->last_block;
Heap_Block *block = first_block;
Heap_Walk_printer printer = dump ?
_Heap_Walk_print : _Heap_Walk_print_nothing;
if ( !_System_state_Is_up( _System_state_Get() ) ) {
30006df4: e3530003 cmp r3, #3
bool _Heap_Walk(
Heap_Control *heap,
int source,
bool dump
)
{
30006df8: e1a05001 mov r5, r1
uintptr_t const page_size = heap->page_size;
30006dfc: e5909010 ldr r9, [r0, #16]
uintptr_t const min_block_size = heap->min_block_size; Heap_Block *const first_block = heap->first_block;
30006e00: e58dc020 str ip, [sp, #32]
Heap_Block *const last_block = heap->last_block;
Heap_Block *block = first_block;
Heap_Walk_printer printer = dump ?
_Heap_Walk_print : _Heap_Walk_print_nothing;
if ( !_System_state_Is_up( _System_state_Get() ) ) {
30006e04: 1a000127 bne 300072a8 <_Heap_Walk+0x4ec>
Heap_Block *const first_free_block = _Heap_Free_list_first( heap );
Heap_Block *const last_free_block = _Heap_Free_list_last( heap );
Heap_Block *const first_block = heap->first_block;
Heap_Block *const last_block = heap->last_block;
(*printer)(
30006e08: e59dc024 ldr ip, [sp, #36] ; 0x24 30006e0c: e59d2020 ldr r2, [sp, #32] 30006e10: e58dc000 str ip, [sp] 30006e14: e5903018 ldr r3, [r0, #24] 30006e18: e58d3004 str r3, [sp, #4] 30006e1c: e590301c ldr r3, [r0, #28] 30006e20: e58d200c str r2, [sp, #12] 30006e24: e58d3008 str r3, [sp, #8] 30006e28: e59d3028 ldr r3, [sp, #40] ; 0x28 30006e2c: e59f24b0 ldr r2, [pc, #1200] ; 300072e4 <_Heap_Walk+0x528> 30006e30: e58d3010 str r3, [sp, #16] 30006e34: e5903008 ldr r3, [r0, #8] 30006e38: e58d3014 str r3, [sp, #20] 30006e3c: e590300c ldr r3, [r0, #12] 30006e40: e1a00001 mov r0, r1 30006e44: e58d3018 str r3, [sp, #24] 30006e48: e3a01000 mov r1, #0 30006e4c: e1a03009 mov r3, r9 30006e50: e1a0e00f mov lr, pc 30006e54: e12fff14 bx r4
heap->area_begin, heap->area_end,
first_block, last_block,
first_free_block, last_free_block
);
if ( page_size == 0 ) {
30006e58: e3590000 cmp r9, #0
30006e5c: 1a000006 bne 30006e7c <_Heap_Walk+0xc0>
(*printer)( source, true, "page size is zero\n" );
30006e60: e1a00005 mov r0, r5 30006e64: e3a01001 mov r1, #1 30006e68: e59f2478 ldr r2, [pc, #1144] ; 300072e8 <_Heap_Walk+0x52c> 30006e6c: e1a0e00f mov lr, pc 30006e70: e12fff14 bx r4
if ( !_System_state_Is_up( _System_state_Get() ) ) {
return true;
}
if ( !_Heap_Walk_check_control( source, printer, heap ) ) {
return false;
30006e74: e1a08009 mov r8, r9 30006e78: ea00010b b 300072ac <_Heap_Walk+0x4f0>
(*printer)( source, true, "page size is zero\n" );
return false;
}
if ( !_Addresses_Is_aligned( (void *) page_size ) ) {
30006e7c: e2198007 ands r8, r9, #7
(*printer)(
30006e80: 11a00005 movne r0, r5 30006e84: 13a01001 movne r1, #1 30006e88: 159f245c ldrne r2, [pc, #1116] ; 300072ec <_Heap_Walk+0x530> 30006e8c: 11a03009 movne r3, r9
30006e90: 1a00010c bne 300072c8 <_Heap_Walk+0x50c>
RTEMS_INLINE_ROUTINE bool _Heap_Is_aligned(
uintptr_t value,
uintptr_t alignment
)
{
return (value % alignment) == 0;
30006e94: e59d0024 ldr r0, [sp, #36] ; 0x24 30006e98: e1a01009 mov r1, r9 30006e9c: ebffe73e bl 30000b9c <__umodsi3>
);
return false;
}
if ( !_Heap_Is_aligned( min_block_size, page_size ) ) {
30006ea0: e250b000 subs fp, r0, #0
30006ea4: 0a000006 beq 30006ec4 <_Heap_Walk+0x108>
(*printer)(
30006ea8: e1a00005 mov r0, r5 30006eac: e3a01001 mov r1, #1 30006eb0: e59f2438 ldr r2, [pc, #1080] ; 300072f0 <_Heap_Walk+0x534> 30006eb4: e59d3024 ldr r3, [sp, #36] ; 0x24 30006eb8: e1a0e00f mov lr, pc 30006ebc: e12fff14 bx r4 30006ec0: ea0000f9 b 300072ac <_Heap_Walk+0x4f0> 30006ec4: e59dc020 ldr ip, [sp, #32] 30006ec8: e1a01009 mov r1, r9 30006ecc: e28c0008 add r0, ip, #8 30006ed0: ebffe731 bl 30000b9c <__umodsi3>
);
return false;
}
if (
30006ed4: e250a000 subs sl, r0, #0
!_Heap_Is_aligned( _Heap_Alloc_area_of_block( first_block ), page_size )
) {
(*printer)(
30006ed8: 11a00005 movne r0, r5 30006edc: 13a01001 movne r1, #1 30006ee0: 159f240c ldrne r2, [pc, #1036] ; 300072f4 <_Heap_Walk+0x538> 30006ee4: 159d3020 ldrne r3, [sp, #32]
30006ee8: 1a0000cc bne 30007220 <_Heap_Walk+0x464>
block->size_and_flag = size | flag;
}
RTEMS_INLINE_ROUTINE bool _Heap_Is_prev_used( const Heap_Block *block )
{
return block->size_and_flag & HEAP_PREV_BLOCK_USED;
30006eec: e59d2020 ldr r2, [sp, #32] 30006ef0: e5928004 ldr r8, [r2, #4]
);
return false;
}
if ( !_Heap_Is_prev_used( first_block ) ) {
30006ef4: e2188001 ands r8, r8, #1
(*printer)(
30006ef8: 01a00005 moveq r0, r5 30006efc: 03a01001 moveq r1, #1 30006f00: 059f23f0 ldreq r2, [pc, #1008] ; 300072f8 <_Heap_Walk+0x53c>
30006f04: 0a000009 beq 30006f30 <_Heap_Walk+0x174>
- HEAP_BLOCK_HEADER_SIZE);
}
RTEMS_INLINE_ROUTINE uintptr_t _Heap_Block_size( const Heap_Block *block )
{
return block->size_and_flag & ~HEAP_PREV_BLOCK_USED;
30006f08: e59d3028 ldr r3, [sp, #40] ; 0x28 30006f0c: e5937004 ldr r7, [r3, #4] 30006f10: e3c77001 bic r7, r7, #1
RTEMS_INLINE_ROUTINE Heap_Block *_Heap_Block_at(
const Heap_Block *block,
uintptr_t offset
)
{
return (Heap_Block *) ((uintptr_t) block + offset);
30006f14: e0837007 add r7, r3, r7
block->size_and_flag = size | flag;
}
RTEMS_INLINE_ROUTINE bool _Heap_Is_prev_used( const Heap_Block *block )
{
return block->size_and_flag & HEAP_PREV_BLOCK_USED;
30006f18: e5978004 ldr r8, [r7, #4]
);
return false;
}
if ( _Heap_Is_free( last_block ) ) {
30006f1c: e2188001 ands r8, r8, #1
30006f20: 1a000005 bne 30006f3c <_Heap_Walk+0x180>
(*printer)(
30006f24: e59f23d0 ldr r2, [pc, #976] ; 300072fc <_Heap_Walk+0x540> 30006f28: e1a00005 mov r0, r5 30006f2c: e3a01001 mov r1, #1 30006f30: e1a0e00f mov lr, pc 30006f34: e12fff14 bx r4 30006f38: ea0000db b 300072ac <_Heap_Walk+0x4f0>
);
return false;
}
if (
30006f3c: e59dc020 ldr ip, [sp, #32] 30006f40: e157000c cmp r7, ip
30006f44: 0a000006 beq 30006f64 <_Heap_Walk+0x1a8>
_Heap_Block_at( last_block, _Heap_Block_size( last_block ) ) != first_block
) {
(*printer)(
30006f48: e1a00005 mov r0, r5 <== NOT EXECUTED 30006f4c: e3a01001 mov r1, #1 <== NOT EXECUTED 30006f50: e59f23a8 ldr r2, [pc, #936] ; 30007300 <_Heap_Walk+0x544> <== NOT EXECUTED 30006f54: e1a0e00f mov lr, pc <== NOT EXECUTED 30006f58: e12fff14 bx r4 <== NOT EXECUTED
if ( !_System_state_Is_up( _System_state_Get() ) ) {
return true;
}
if ( !_Heap_Walk_check_control( source, printer, heap ) ) {
return false;
30006f5c: e1a0800a mov r8, sl <== NOT EXECUTED 30006f60: ea0000d1 b 300072ac <_Heap_Walk+0x4f0> <== NOT EXECUTED
int source,
Heap_Walk_printer printer,
Heap_Control *heap
)
{
uintptr_t const page_size = heap->page_size;
30006f64: e596b010 ldr fp, [r6, #16]
block = next_block;
} while ( block != first_block );
return true;
}
30006f68: e5968008 ldr r8, [r6, #8]
Heap_Walk_printer printer,
Heap_Control *heap
)
{
uintptr_t const page_size = heap->page_size;
const Heap_Block *const free_list_tail = _Heap_Free_list_tail( heap );
30006f6c: e1a0a006 mov sl, r6 30006f70: ea000034 b 30007048 <_Heap_Walk+0x28c>
const Heap_Control *heap,
const Heap_Block *block
)
{
return (uintptr_t) block >= (uintptr_t) heap->first_block
&& (uintptr_t) block <= (uintptr_t) heap->last_block;
30006f74: e5963020 ldr r3, [r6, #32] 30006f78: e1530008 cmp r3, r8 30006f7c: 83a0c000 movhi ip, #0
30006f80: 8a000003 bhi 30006f94 <_Heap_Walk+0x1d8>
30006f84: e596c024 ldr ip, [r6, #36] ; 0x24 30006f88: e15c0008 cmp ip, r8 30006f8c: 33a0c000 movcc ip, #0 30006f90: 23a0c001 movcs ip, #1
const Heap_Block *const first_free_block = _Heap_Free_list_first( heap );
const Heap_Block *prev_block = free_list_tail;
const Heap_Block *free_block = first_free_block;
while ( free_block != free_list_tail ) {
if ( !_Heap_Is_block_in_heap( heap, free_block ) ) {
30006f94: e21cc0ff ands ip, ip, #255 ; 0xff
(*printer)(
30006f98: 01a00005 moveq r0, r5 30006f9c: 03a01001 moveq r1, #1 30006fa0: 059f235c ldreq r2, [pc, #860] ; 30007304 <_Heap_Walk+0x548>
30006fa4: 0a000012 beq 30006ff4 <_Heap_Walk+0x238>
RTEMS_INLINE_ROUTINE bool _Heap_Is_aligned(
uintptr_t value,
uintptr_t alignment
)
{
return (value % alignment) == 0;
30006fa8: e2880008 add r0, r8, #8 30006fac: e1a0100b mov r1, fp 30006fb0: ebffe6f9 bl 30000b9c <__umodsi3>
);
return false;
}
if (
30006fb4: e250c000 subs ip, r0, #0
!_Heap_Is_aligned( _Heap_Alloc_area_of_block( free_block ), page_size )
) {
(*printer)(
30006fb8: 11a00005 movne r0, r5 30006fbc: 13a01001 movne r1, #1 30006fc0: 159f2340 ldrne r2, [pc, #832] ; 30007308 <_Heap_Walk+0x54c> 30006fc4: 11a03008 movne r3, r8
30006fc8: 1a0000be bne 300072c8 <_Heap_Walk+0x50c>
- HEAP_BLOCK_HEADER_SIZE);
}
RTEMS_INLINE_ROUTINE uintptr_t _Heap_Block_size( const Heap_Block *block )
{
return block->size_and_flag & ~HEAP_PREV_BLOCK_USED;
30006fcc: e5983004 ldr r3, [r8, #4] 30006fd0: e3c33001 bic r3, r3, #1
block = next_block;
} while ( block != first_block );
return true;
}
30006fd4: e0883003 add r3, r8, r3
block->size_and_flag = size | flag;
}
RTEMS_INLINE_ROUTINE bool _Heap_Is_prev_used( const Heap_Block *block )
{
return block->size_and_flag & HEAP_PREV_BLOCK_USED;
30006fd8: e5933004 ldr r3, [r3, #4]
);
return false;
}
if ( _Heap_Is_used( free_block ) ) {
30006fdc: e2133001 ands r3, r3, #1 30006fe0: e58d302c str r3, [sp, #44] ; 0x2c
30006fe4: 0a000009 beq 30007010 <_Heap_Walk+0x254>
(*printer)(
30006fe8: e59f231c ldr r2, [pc, #796] ; 3000730c <_Heap_Walk+0x550> 30006fec: e1a00005 mov r0, r5 30006ff0: e3a01001 mov r1, #1 30006ff4: e1a03008 mov r3, r8 30006ff8: e58dc01c str ip, [sp, #28] 30006ffc: e1a0e00f mov lr, pc 30007000: e12fff14 bx r4
if ( !_System_state_Is_up( _System_state_Get() ) ) {
return true;
}
if ( !_Heap_Walk_check_control( source, printer, heap ) ) {
return false;
30007004: e59dc01c ldr ip, [sp, #28] 30007008: e1a0800c mov r8, ip 3000700c: ea0000a6 b 300072ac <_Heap_Walk+0x4f0>
);
return false;
}
if ( free_block->prev != prev_block ) {
30007010: e598300c ldr r3, [r8, #12] 30007014: e153000a cmp r3, sl
30007018: 0a000008 beq 30007040 <_Heap_Walk+0x284>
(*printer)(
3000701c: e58d3000 str r3, [sp] 30007020: e1a00005 mov r0, r5 30007024: e1a03008 mov r3, r8 30007028: e3a01001 mov r1, #1 3000702c: e59f22dc ldr r2, [pc, #732] ; 30007310 <_Heap_Walk+0x554> 30007030: e1a0e00f mov lr, pc 30007034: e12fff14 bx r4
if ( !_System_state_Is_up( _System_state_Get() ) ) {
return true;
}
if ( !_Heap_Walk_check_control( source, printer, heap ) ) {
return false;
30007038: e59d802c ldr r8, [sp, #44] ; 0x2c 3000703c: ea00009a b 300072ac <_Heap_Walk+0x4f0>
return false;
}
prev_block = free_block;
free_block = free_block->next;
30007040: e1a0a008 mov sl, r8 30007044: e5988008 ldr r8, [r8, #8]
const Heap_Block *const free_list_tail = _Heap_Free_list_tail( heap );
const Heap_Block *const first_free_block = _Heap_Free_list_first( heap );
const Heap_Block *prev_block = free_list_tail;
const Heap_Block *free_block = first_free_block;
while ( free_block != free_list_tail ) {
30007048: e1580006 cmp r8, r6
3000704c: 1affffc8 bne 30006f74 <_Heap_Walk+0x1b8>
30007050: ea000000 b 30007058 <_Heap_Walk+0x29c>
block->prev_size
);
}
block = next_block;
} while ( block != first_block );
30007054: e1a07008 mov r7, r8
return true;
}
30007058: e5973004 ldr r3, [r7, #4]
const Heap_Control *heap,
const Heap_Block *block
)
{
return (uintptr_t) block >= (uintptr_t) heap->first_block
&& (uintptr_t) block <= (uintptr_t) heap->last_block;
3000705c: e5962020 ldr r2, [r6, #32]
- HEAP_BLOCK_HEADER_SIZE);
}
RTEMS_INLINE_ROUTINE uintptr_t _Heap_Block_size( const Heap_Block *block )
{
return block->size_and_flag & ~HEAP_PREV_BLOCK_USED;
30007060: e3c3a001 bic sl, r3, #1
RTEMS_INLINE_ROUTINE Heap_Block *_Heap_Block_at(
const Heap_Block *block,
uintptr_t offset
)
{
return (Heap_Block *) ((uintptr_t) block + offset);
30007064: e087800a add r8, r7, sl
const Heap_Control *heap,
const Heap_Block *block
)
{
return (uintptr_t) block >= (uintptr_t) heap->first_block
&& (uintptr_t) block <= (uintptr_t) heap->last_block;
30007068: e1520008 cmp r2, r8 3000706c: 83a0b000 movhi fp, #0
30007070: 8a000003 bhi 30007084 <_Heap_Walk+0x2c8>
30007074: e596b024 ldr fp, [r6, #36] ; 0x24 30007078: e15b0008 cmp fp, r8 3000707c: 33a0b000 movcc fp, #0 30007080: 23a0b001 movcs fp, #1
bool const prev_used = _Heap_Is_prev_used( block );
Heap_Block *const next_block = _Heap_Block_at( block, block_size );
uintptr_t const next_block_begin = (uintptr_t) next_block;
bool const is_not_last_block = block != last_block;
if ( !_Heap_Is_block_in_heap( heap, next_block ) ) {
30007084: e21bb0ff ands fp, fp, #255 ; 0xff
30007088: 1a000007 bne 300070ac <_Heap_Walk+0x2f0>
(*printer)(
3000708c: e58d8000 str r8, [sp] 30007090: e1a00005 mov r0, r5 30007094: e3a01001 mov r1, #1 30007098: e59f2274 ldr r2, [pc, #628] ; 30007314 <_Heap_Walk+0x558> 3000709c: e1a03007 mov r3, r7 300070a0: e1a0e00f mov lr, pc 300070a4: e12fff14 bx r4 300070a8: ea00005e b 30007228 <_Heap_Walk+0x46c>
uintptr_t const block_begin = (uintptr_t) block;
uintptr_t const block_size = _Heap_Block_size( block );
bool const prev_used = _Heap_Is_prev_used( block );
Heap_Block *const next_block = _Heap_Block_at( block, block_size );
uintptr_t const next_block_begin = (uintptr_t) next_block;
bool const is_not_last_block = block != last_block;
300070ac: e59d2028 ldr r2, [sp, #40] ; 0x28
RTEMS_INLINE_ROUTINE bool _Heap_Is_aligned(
uintptr_t value,
uintptr_t alignment
)
{
return (value % alignment) == 0;
300070b0: e1a0000a mov r0, sl 300070b4: e1a01009 mov r1, r9 300070b8: e057b002 subs fp, r7, r2 300070bc: 13a0b001 movne fp, #1 300070c0: e58d301c str r3, [sp, #28] 300070c4: ebffe6b4 bl 30000b9c <__umodsi3>
);
return false;
}
if ( !_Heap_Is_aligned( block_size, page_size ) && is_not_last_block ) {
300070c8: e3500000 cmp r0, #0 300070cc: e59d301c ldr r3, [sp, #28]
300070d0: 0a000005 beq 300070ec <_Heap_Walk+0x330>
300070d4: e35b0000 cmp fp, #0
(*printer)(
300070d8: 158da000 strne sl, [sp] 300070dc: 11a00005 movne r0, r5 300070e0: 13a01001 movne r1, #1 300070e4: 159f222c ldrne r2, [pc, #556] ; 30007318 <_Heap_Walk+0x55c>
300070e8: 1a000014 bne 30007140 <_Heap_Walk+0x384>
);
return false;
}
if ( block_size < min_block_size && is_not_last_block ) {
300070ec: e59dc024 ldr ip, [sp, #36] ; 0x24 300070f0: e15a000c cmp sl, ip
300070f4: 2a000009 bcs 30007120 <_Heap_Walk+0x364>
300070f8: e35b0000 cmp fp, #0
300070fc: 0a000007 beq 30007120 <_Heap_Walk+0x364>
(*printer)(
30007100: e88d1400 stm sp, {sl, ip}
30007104: e1a00005 mov r0, r5
30007108: e3a01001 mov r1, #1
3000710c: e59f2208 ldr r2, [pc, #520] ; 3000731c <_Heap_Walk+0x560>
30007110: e1a03007 mov r3, r7
30007114: e1a0e00f mov lr, pc
30007118: e12fff14 bx r4
3000711c: ea00006b b 300072d0 <_Heap_Walk+0x514>
);
return false;
}
if ( next_block_begin <= block_begin && is_not_last_block ) {
30007120: e1580007 cmp r8, r7
30007124: 8a000009 bhi 30007150 <_Heap_Walk+0x394>
30007128: e35b0000 cmp fp, #0
3000712c: 0a000007 beq 30007150 <_Heap_Walk+0x394>
(*printer)(
30007130: e59f21e8 ldr r2, [pc, #488] ; 30007320 <_Heap_Walk+0x564> 30007134: e58d8000 str r8, [sp] 30007138: e1a00005 mov r0, r5 3000713c: e3a01001 mov r1, #1 30007140: e1a03007 mov r3, r7 30007144: e1a0e00f mov lr, pc 30007148: e12fff14 bx r4 3000714c: ea00005f b 300072d0 <_Heap_Walk+0x514>
block->size_and_flag = size | flag;
}
RTEMS_INLINE_ROUTINE bool _Heap_Is_prev_used( const Heap_Block *block )
{
return block->size_and_flag & HEAP_PREV_BLOCK_USED;
30007150: e203b001 and fp, r3, #1 30007154: e5983004 ldr r3, [r8, #4]
);
return false;
}
if ( !_Heap_Is_prev_used( next_block ) ) {
30007158: e3130001 tst r3, #1
3000715c: 1a00003b bne 30007250 <_Heap_Walk+0x494>
false,
"block 0x%08x: size %u, prev 0x%08x%s, next 0x%08x%s\n",
block,
block_size,
block->prev,
block->prev == first_free_block ?
30007160: e597200c ldr r2, [r7, #12]
Heap_Block *const last_free_block = _Heap_Free_list_last( heap );
bool const prev_used = _Heap_Is_prev_used( block );
uintptr_t const block_size = _Heap_Block_size( block );
Heap_Block *const next_block = _Heap_Block_at( block, block_size );
(*printer)(
30007164: e5963008 ldr r3, [r6, #8]
block = next_block;
} while ( block != first_block );
return true;
}
30007168: e596100c ldr r1, [r6, #12]
Heap_Block *const last_free_block = _Heap_Free_list_last( heap );
bool const prev_used = _Heap_Is_prev_used( block );
uintptr_t const block_size = _Heap_Block_size( block );
Heap_Block *const next_block = _Heap_Block_at( block, block_size );
(*printer)(
3000716c: e1520003 cmp r2, r3 30007170: 059f01ac ldreq r0, [pc, #428] ; 30007324 <_Heap_Walk+0x568>
30007174: 0a000003 beq 30007188 <_Heap_Walk+0x3cc>
block,
block_size,
block->prev,
block->prev == first_free_block ?
" (= first free)"
: (block->prev == free_list_head ? " (= head)" : ""),
30007178: e59f31a8 ldr r3, [pc, #424] ; 30007328 <_Heap_Walk+0x56c> 3000717c: e1520006 cmp r2, r6 30007180: e59f01a4 ldr r0, [pc, #420] ; 3000732c <_Heap_Walk+0x570> 30007184: 01a00003 moveq r0, r3
block->next,
block->next == last_free_block ?
30007188: e5973008 ldr r3, [r7, #8]
Heap_Block *const last_free_block = _Heap_Free_list_last( heap );
bool const prev_used = _Heap_Is_prev_used( block );
uintptr_t const block_size = _Heap_Block_size( block );
Heap_Block *const next_block = _Heap_Block_at( block, block_size );
(*printer)(
3000718c: e1530001 cmp r3, r1 30007190: 059f1198 ldreq r1, [pc, #408] ; 30007330 <_Heap_Walk+0x574>
30007194: 0a000003 beq 300071a8 <_Heap_Walk+0x3ec>
" (= first free)"
: (block->prev == free_list_head ? " (= head)" : ""),
block->next,
block->next == last_free_block ?
" (= last free)"
: (block->next == free_list_tail ? " (= tail)" : "")
30007198: e59fc194 ldr ip, [pc, #404] ; 30007334 <_Heap_Walk+0x578> 3000719c: e1530006 cmp r3, r6 300071a0: e59f1184 ldr r1, [pc, #388] ; 3000732c <_Heap_Walk+0x570> 300071a4: 01a0100c moveq r1, ip
Heap_Block *const last_free_block = _Heap_Free_list_last( heap );
bool const prev_used = _Heap_Is_prev_used( block );
uintptr_t const block_size = _Heap_Block_size( block );
Heap_Block *const next_block = _Heap_Block_at( block, block_size );
(*printer)(
300071a8: e58d2004 str r2, [sp, #4] 300071ac: e58d0008 str r0, [sp, #8] 300071b0: e58d300c str r3, [sp, #12] 300071b4: e58d1010 str r1, [sp, #16] 300071b8: e1a03007 mov r3, r7 300071bc: e58da000 str sl, [sp] 300071c0: e1a00005 mov r0, r5 300071c4: e3a01000 mov r1, #0 300071c8: e59f2168 ldr r2, [pc, #360] ; 30007338 <_Heap_Walk+0x57c> 300071cc: e1a0e00f mov lr, pc 300071d0: e12fff14 bx r4
block->next == last_free_block ?
" (= last free)"
: (block->next == free_list_tail ? " (= tail)" : "")
);
if ( block_size != next_block->prev_size ) {
300071d4: e5983000 ldr r3, [r8] 300071d8: e15a0003 cmp sl, r3
300071dc: 0a000009 beq 30007208 <_Heap_Walk+0x44c>
(*printer)(
300071e0: e58d3004 str r3, [sp, #4] 300071e4: e58da000 str sl, [sp] 300071e8: e58d8008 str r8, [sp, #8] 300071ec: e1a00005 mov r0, r5 300071f0: e3a01001 mov r1, #1 300071f4: e59f2140 ldr r2, [pc, #320] ; 3000733c <_Heap_Walk+0x580> 300071f8: e1a03007 mov r3, r7 300071fc: e1a0e00f mov lr, pc 30007200: e12fff14 bx r4 30007204: ea000031 b 300072d0 <_Heap_Walk+0x514>
);
return false;
}
if ( !prev_used ) {
30007208: e35b0000 cmp fp, #0
3000720c: 1a000007 bne 30007230 <_Heap_Walk+0x474>
(*printer)(
30007210: e59f2128 ldr r2, [pc, #296] ; 30007340 <_Heap_Walk+0x584> 30007214: e1a00005 mov r0, r5 30007218: e3a01001 mov r1, #1 3000721c: e1a03007 mov r3, r7 30007220: e1a0e00f mov lr, pc 30007224: e12fff14 bx r4
return false;
}
if ( !_Heap_Is_prev_used( next_block ) ) {
if ( !_Heap_Walk_check_free_block( source, printer, heap, block ) ) {
return false;
30007228: e1a0800b mov r8, fp 3000722c: ea00001e b 300072ac <_Heap_Walk+0x4f0>
block = next_block;
} while ( block != first_block );
return true;
}
30007230: e5963008 ldr r3, [r6, #8] 30007234: ea000002 b 30007244 <_Heap_Walk+0x488>
{
const Heap_Block *const free_list_tail = _Heap_Free_list_tail( heap );
const Heap_Block *free_block = _Heap_Free_list_first( heap );
while ( free_block != free_list_tail ) {
if ( free_block == block ) {
30007238: e1530007 cmp r3, r7
3000723c: 0a000016 beq 3000729c <_Heap_Walk+0x4e0>
return true;
}
free_block = free_block->next;
30007240: e5933008 ldr r3, [r3, #8]
)
{
const Heap_Block *const free_list_tail = _Heap_Free_list_tail( heap );
const Heap_Block *free_block = _Heap_Free_list_first( heap );
while ( free_block != free_list_tail ) {
30007244: e1530006 cmp r3, r6
30007248: 1afffffa bne 30007238 <_Heap_Walk+0x47c>
3000724c: ea000019 b 300072b8 <_Heap_Walk+0x4fc>
if ( !_Heap_Is_prev_used( next_block ) ) {
if ( !_Heap_Walk_check_free_block( source, printer, heap, block ) ) {
return false;
}
} else if (prev_used) {
30007250: e35b0000 cmp fp, #0
30007254: 0a000007 beq 30007278 <_Heap_Walk+0x4bc>
(*printer)(
30007258: e58da000 str sl, [sp] 3000725c: e1a00005 mov r0, r5 30007260: e3a01000 mov r1, #0 30007264: e59f20d8 ldr r2, [pc, #216] ; 30007344 <_Heap_Walk+0x588> 30007268: e1a03007 mov r3, r7 3000726c: e1a0e00f mov lr, pc 30007270: e12fff14 bx r4 30007274: ea000008 b 3000729c <_Heap_Walk+0x4e0>
"block 0x%08x: size %u\n",
block,
block_size
);
} else {
(*printer)(
30007278: e58da000 str sl, [sp] 3000727c: e5973000 ldr r3, [r7] 30007280: e1a00005 mov r0, r5 30007284: e58d3004 str r3, [sp, #4] 30007288: e1a0100b mov r1, fp 3000728c: e59f20b4 ldr r2, [pc, #180] ; 30007348 <_Heap_Walk+0x58c> 30007290: e1a03007 mov r3, r7 30007294: e1a0e00f mov lr, pc 30007298: e12fff14 bx r4
block->prev_size
);
}
block = next_block;
} while ( block != first_block );
3000729c: e59d2020 ldr r2, [sp, #32] 300072a0: e1580002 cmp r8, r2
300072a4: 1affff6a bne 30007054 <_Heap_Walk+0x298>
Heap_Block *block = first_block;
Heap_Walk_printer printer = dump ?
_Heap_Walk_print : _Heap_Walk_print_nothing;
if ( !_System_state_Is_up( _System_state_Get() ) ) {
return true;
300072a8: e3a08001 mov r8, #1
block = next_block;
} while ( block != first_block );
return true;
}
300072ac: e1a00008 mov r0, r8
300072b0: e28dd030 add sp, sp, #48 ; 0x30
300072b4: e8bd8ff0 pop {r4, r5, r6, r7, r8, r9, sl, fp, pc}
return false;
}
if ( !_Heap_Walk_is_in_free_list( heap, block ) ) {
(*printer)(
300072b8: e59f208c ldr r2, [pc, #140] ; 3000734c <_Heap_Walk+0x590> 300072bc: e1a00005 mov r0, r5 300072c0: e3a01001 mov r1, #1 300072c4: e1a03007 mov r3, r7 300072c8: e1a0e00f mov lr, pc 300072cc: e12fff14 bx r4
return false;
}
if ( !_Heap_Is_prev_used( next_block ) ) {
if ( !_Heap_Walk_check_free_block( source, printer, heap, block ) ) {
return false;
300072d0: e3a08000 mov r8, #0 300072d4: eafffff4 b 300072ac <_Heap_Walk+0x4f0>
300061dc <_Internal_error_Occurred>:
bool is_internal,
Internal_errors_t the_error
)
{
_Internal_errors_What_happened.the_source = the_source;
300061dc: e59f3038 ldr r3, [pc, #56] ; 3000621c <_Internal_error_Occurred+0x40>
void _Internal_error_Occurred(
Internal_errors_Source the_source,
bool is_internal,
Internal_errors_t the_error
)
{
300061e0: e20110ff and r1, r1, #255 ; 0xff
300061e4: e52de004 push {lr} ; (str lr, [sp, #-4]!)
_Internal_errors_What_happened.the_source = the_source;
300061e8: e5830000 str r0, [r3]
_Internal_errors_What_happened.is_internal = is_internal;
300061ec: e5c31004 strb r1, [r3, #4]
_Internal_errors_What_happened.the_error = the_error;
300061f0: e5832008 str r2, [r3, #8]
void _Internal_error_Occurred(
Internal_errors_Source the_source,
bool is_internal,
Internal_errors_t the_error
)
{
300061f4: e1a04002 mov r4, r2
_Internal_errors_What_happened.the_source = the_source;
_Internal_errors_What_happened.is_internal = is_internal;
_Internal_errors_What_happened.the_error = the_error;
_User_extensions_Fatal( the_source, is_internal, the_error );
300061f8: eb000711 bl 30007e44 <_User_extensions_Fatal>
RTEMS_INLINE_ROUTINE void _System_state_Set (
System_state_Codes state
)
{
_System_state_Current = state;
300061fc: e59f301c ldr r3, [pc, #28] ; 30006220 <_Internal_error_Occurred+0x44><== NOT EXECUTED 30006200: e3a02005 mov r2, #5 <== NOT EXECUTED 30006204: e5832000 str r2, [r3] <== NOT EXECUTED
static inline uint32_t arm_interrupt_disable( void )
{
uint32_t arm_switch_reg;
uint32_t level;
asm volatile (
30006208: e10f2000 mrs r2, CPSR <== NOT EXECUTED 3000620c: e3823080 orr r3, r2, #128 ; 0x80 <== NOT EXECUTED 30006210: e129f003 msr CPSR_fc, r3 <== NOT EXECUTED
_System_state_Set( SYSTEM_STATE_FAILED );
_CPU_Fatal_halt( the_error );
30006214: e1a00004 mov r0, r4 <== NOT EXECUTED 30006218: eafffffe b 30006218 <_Internal_error_Occurred+0x3c> <== NOT EXECUTED
300076f8 <_Thread_queue_Enqueue_priority>:
RTEMS_INLINE_ROUTINE void _Chain_Initialize_empty(
Chain_Control *the_chain
)
{
Chain_Node *head = _Chain_Head( the_chain );
Chain_Node *tail = _Chain_Tail( the_chain );
300076f8: e281303c add r3, r1, #60 ; 0x3c
Priority_Control priority;
States_Control block_state;
_Chain_Initialize_empty( &the_thread->Wait.Block2n );
priority = the_thread->current_priority;
300076fc: e591c014 ldr ip, [r1, #20]
head->next = tail;
30007700: e5813038 str r3, [r1, #56] ; 0x38
head->previous = NULL;
30007704: e3a03000 mov r3, #0 30007708: e581303c str r3, [r1, #60] ; 0x3c
header_index = _Thread_queue_Header_number( priority );
header = &the_thread_queue->Queues.Priority[ header_index ];
block_state = the_thread_queue->state;
if ( _Thread_queue_Is_reverse_search( priority ) )
3000770c: e31c0020 tst ip, #32
*/
RTEMS_INLINE_ROUTINE void _Chain_Initialize_empty(
Chain_Control *the_chain
)
{
Chain_Node *head = _Chain_Head( the_chain );
30007710: e2813038 add r3, r1, #56 ; 0x38
Thread_blocking_operation_States _Thread_queue_Enqueue_priority (
Thread_queue_Control *the_thread_queue,
Thread_Control *the_thread,
ISR_Level *level_p
)
{
30007714: e92d47f0 push {r4, r5, r6, r7, r8, r9, sl, lr}
Chain_Node *tail = _Chain_Tail( the_chain );
head->next = tail;
head->previous = NULL;
tail->previous = head;
30007718: e5813040 str r3, [r1, #64] ; 0x40
_Chain_Initialize_empty( &the_thread->Wait.Block2n );
priority = the_thread->current_priority;
header_index = _Thread_queue_Header_number( priority );
header = &the_thread_queue->Queues.Priority[ header_index ];
block_state = the_thread_queue->state;
3000771c: e5908038 ldr r8, [r0, #56] ; 0x38
RTEMS_INLINE_ROUTINE uint32_t _Thread_queue_Header_number (
Priority_Control the_priority
)
{
return (the_priority / TASK_QUEUE_DATA_PRIORITIES_PER_HEADER);
30007720: e1a0332c lsr r3, ip, #6
if ( _Thread_queue_Is_reverse_search( priority ) )
30007724: 1a000027 bne 300077c8 <_Thread_queue_Enqueue_priority+0xd0>
*
* WARNING! Returning with interrupts disabled!
*/
*level_p = level;
return the_thread_queue->sync_state;
}
30007728: e3a0700c mov r7, #12 3000772c: e0030397 mul r3, r7, r3 30007730: e080a003 add sl, r0, r3
RTEMS_INLINE_ROUTINE bool _Chain_Is_tail(
Chain_Control *the_chain,
const Chain_Node *the_node
)
{
return (the_node == _Chain_Tail(the_chain));
30007734: e2833004 add r3, r3, #4 30007738: e0807003 add r7, r0, r3
static inline uint32_t arm_interrupt_disable( void )
{
uint32_t arm_switch_reg;
uint32_t level;
asm volatile (
3000773c: e10f4000 mrs r4, CPSR 30007740: e3843080 orr r3, r4, #128 ; 0x80 30007744: e129f003 msr CPSR_fc, r3 30007748: e1a05004 mov r5, r4
if ( _Thread_queue_Is_reverse_search( priority ) )
goto restart_reverse_search;
restart_forward_search:
search_priority = PRIORITY_MINIMUM - 1;
3000774c: e3e06000 mvn r6, #0
_ISR_Disable( level ); search_thread = (Thread_Control *) _Chain_First( header );
30007750: e59a3000 ldr r3, [sl]
while ( !_Chain_Is_tail( header, (Chain_Node *)search_thread ) ) {
30007754: ea00000b b 30007788 <_Thread_queue_Enqueue_priority+0x90>
search_priority = search_thread->current_priority;
30007758: e5936014 ldr r6, [r3, #20]
if ( priority <= search_priority )
3000775c: e15c0006 cmp ip, r6
30007760: 9a00000a bls 30007790 <_Thread_queue_Enqueue_priority+0x98>
static inline void arm_interrupt_flash( uint32_t level )
{
uint32_t arm_switch_reg;
asm volatile (
30007764: e10f9000 mrs r9, CPSR 30007768: e129f004 msr CPSR_fc, r4 3000776c: e129f009 msr CPSR_fc, r9
RTEMS_INLINE_ROUTINE bool _States_Are_set (
States_Control the_states,
States_Control mask
)
{
return ( (the_states & mask) != STATES_READY);
30007770: e5939010 ldr r9, [r3, #16]
search_priority = search_thread->current_priority;
if ( priority <= search_priority )
break;
#endif
_ISR_Flash( level );
if ( !_States_Are_set( search_thread->current_state, block_state) ) {
30007774: e1180009 tst r8, r9
30007778: 1a000001 bne 30007784 <_Thread_queue_Enqueue_priority+0x8c>
static inline void arm_interrupt_enable( uint32_t level )
{
ARM_SWITCH_REGISTERS;
asm volatile (
3000777c: e129f004 msr CPSR_fc, r4 30007780: eaffffed b 3000773c <_Thread_queue_Enqueue_priority+0x44>
_ISR_Enable( level );
goto restart_forward_search;
}
search_thread =
(Thread_Control *)search_thread->Object.Node.next;
30007784: e5933000 ldr r3, [r3]
restart_forward_search:
search_priority = PRIORITY_MINIMUM - 1;
_ISR_Disable( level );
search_thread = (Thread_Control *) _Chain_First( header );
while ( !_Chain_Is_tail( header, (Chain_Node *)search_thread ) ) {
30007788: e1530007 cmp r3, r7
3000778c: 1afffff1 bne 30007758 <_Thread_queue_Enqueue_priority+0x60>
}
search_thread =
(Thread_Control *)search_thread->Object.Node.next;
}
if ( the_thread_queue->sync_state !=
30007790: e5907030 ldr r7, [r0, #48] ; 0x30 30007794: e3570001 cmp r7, #1
30007798: 1a00003b bne 3000788c <_Thread_queue_Enqueue_priority+0x194>
THREAD_BLOCKING_OPERATION_NOTHING_HAPPENED )
goto synchronize;
the_thread_queue->sync_state = THREAD_BLOCKING_OPERATION_SYNCHRONIZED;
3000779c: e3a02000 mov r2, #0
if ( priority == search_priority )
300077a0: e15c0006 cmp ip, r6
if ( the_thread_queue->sync_state !=
THREAD_BLOCKING_OPERATION_NOTHING_HAPPENED )
goto synchronize;
the_thread_queue->sync_state = THREAD_BLOCKING_OPERATION_SYNCHRONIZED;
300077a4: e5802030 str r2, [r0, #48] ; 0x30
if ( priority == search_priority )
300077a8: 0a00002d beq 30007864 <_Thread_queue_Enqueue_priority+0x16c>
goto equal_priority;
search_node = (Chain_Node *) search_thread;
previous_node = search_node->previous;
300077ac: e5932004 ldr r2, [r3, #4]
the_node = (Chain_Node *) the_thread;
the_node->next = search_node;
300077b0: e5813000 str r3, [r1]
the_node->previous = previous_node;
300077b4: e5812004 str r2, [r1, #4]
previous_node->next = the_node;
300077b8: e5821000 str r1, [r2]
search_node->previous = the_node;
300077bc: e5831004 str r1, [r3, #4]
the_thread->Wait.queue = the_thread_queue;
300077c0: e5810044 str r0, [r1, #68] ; 0x44
_ISR_Enable( level );
300077c4: ea000024 b 3000785c <_Thread_queue_Enqueue_priority+0x164>
* * WARNING! Returning with interrupts disabled! */ *level_p = level; return the_thread_queue->sync_state; }
300077c8: e3a0700c mov r7, #12 300077cc: e0270793 mla r7, r3, r7, r0
the_thread->Wait.queue = the_thread_queue;
_ISR_Enable( level );
return THREAD_BLOCKING_OPERATION_NOTHING_HAPPENED;
restart_reverse_search:
search_priority = PRIORITY_MAXIMUM + 1;
300077d0: e59fa0c0 ldr sl, [pc, #192] ; 30007898 <_Thread_queue_Enqueue_priority+0x1a0> 300077d4: e5da6000 ldrb r6, [sl] 300077d8: e2866001 add r6, r6, #1
static inline uint32_t arm_interrupt_disable( void )
{
uint32_t arm_switch_reg;
uint32_t level;
asm volatile (
300077dc: e10f4000 mrs r4, CPSR 300077e0: e3843080 orr r3, r4, #128 ; 0x80 300077e4: e129f003 msr CPSR_fc, r3 300077e8: e1a05004 mov r5, r4
_ISR_Disable( level );
search_thread = (Thread_Control *) _Chain_Last( header );
300077ec: e5973008 ldr r3, [r7, #8]
while ( !_Chain_Is_head( header, (Chain_Node *)search_thread ) ) {
300077f0: ea00000b b 30007824 <_Thread_queue_Enqueue_priority+0x12c>
search_priority = search_thread->current_priority;
300077f4: e5936014 ldr r6, [r3, #20]
if ( priority >= search_priority )
300077f8: e15c0006 cmp ip, r6
300077fc: 2a00000a bcs 3000782c <_Thread_queue_Enqueue_priority+0x134>
static inline void arm_interrupt_flash( uint32_t level )
{
uint32_t arm_switch_reg;
asm volatile (
30007800: e10f9000 mrs r9, CPSR 30007804: e129f004 msr CPSR_fc, r4 30007808: e129f009 msr CPSR_fc, r9 3000780c: e5939010 ldr r9, [r3, #16]
search_priority = search_thread->current_priority;
if ( priority >= search_priority )
break;
#endif
_ISR_Flash( level );
if ( !_States_Are_set( search_thread->current_state, block_state) ) {
30007810: e1180009 tst r8, r9
30007814: 1a000001 bne 30007820 <_Thread_queue_Enqueue_priority+0x128>
static inline void arm_interrupt_enable( uint32_t level )
{
ARM_SWITCH_REGISTERS;
asm volatile (
30007818: e129f004 msr CPSR_fc, r4 <== NOT EXECUTED 3000781c: eaffffec b 300077d4 <_Thread_queue_Enqueue_priority+0xdc> <== NOT EXECUTED
_ISR_Enable( level );
goto restart_reverse_search;
}
search_thread = (Thread_Control *)
search_thread->Object.Node.previous;
30007820: e5933004 ldr r3, [r3, #4]
restart_reverse_search:
search_priority = PRIORITY_MAXIMUM + 1;
_ISR_Disable( level );
search_thread = (Thread_Control *) _Chain_Last( header );
while ( !_Chain_Is_head( header, (Chain_Node *)search_thread ) ) {
30007824: e1530007 cmp r3, r7
30007828: 1afffff1 bne 300077f4 <_Thread_queue_Enqueue_priority+0xfc>
}
search_thread = (Thread_Control *)
search_thread->Object.Node.previous;
}
if ( the_thread_queue->sync_state !=
3000782c: e5907030 ldr r7, [r0, #48] ; 0x30 30007830: e3570001 cmp r7, #1
30007834: 1a000014 bne 3000788c <_Thread_queue_Enqueue_priority+0x194>
THREAD_BLOCKING_OPERATION_NOTHING_HAPPENED )
goto synchronize;
the_thread_queue->sync_state = THREAD_BLOCKING_OPERATION_SYNCHRONIZED;
30007838: e3a02000 mov r2, #0
if ( priority == search_priority )
3000783c: e15c0006 cmp ip, r6
if ( the_thread_queue->sync_state !=
THREAD_BLOCKING_OPERATION_NOTHING_HAPPENED )
goto synchronize;
the_thread_queue->sync_state = THREAD_BLOCKING_OPERATION_SYNCHRONIZED;
30007840: e5802030 str r2, [r0, #48] ; 0x30
if ( priority == search_priority )
30007844: 0a000006 beq 30007864 <_Thread_queue_Enqueue_priority+0x16c>
goto equal_priority;
search_node = (Chain_Node *) search_thread;
next_node = search_node->next;
30007848: e5932000 ldr r2, [r3]
the_node = (Chain_Node *) the_thread;
the_node->next = next_node;
the_node->previous = search_node;
3000784c: e881000c stm r1, {r2, r3}
search_node->next = the_node; next_node->previous = the_node;
30007850: e5821004 str r1, [r2, #4]
next_node = search_node->next;
the_node = (Chain_Node *) the_thread;
the_node->next = next_node;
the_node->previous = search_node;
search_node->next = the_node;
30007854: e5831000 str r1, [r3]
next_node->previous = the_node; the_thread->Wait.queue = the_thread_queue;
30007858: e5810044 str r0, [r1, #68] ; 0x44 3000785c: e129f004 msr CPSR_fc, r4 30007860: ea000007 b 30007884 <_Thread_queue_Enqueue_priority+0x18c>
_ISR_Enable( level );
return THREAD_BLOCKING_OPERATION_NOTHING_HAPPENED;
equal_priority: /* add at end of priority group */
search_node = _Chain_Tail( &search_thread->Wait.Block2n );
previous_node = search_node->previous;
30007864: e5932040 ldr r2, [r3, #64] ; 0x40
the_thread->Wait.queue = the_thread_queue;
_ISR_Enable( level );
return THREAD_BLOCKING_OPERATION_NOTHING_HAPPENED;
equal_priority: /* add at end of priority group */
search_node = _Chain_Tail( &search_thread->Wait.Block2n );
30007868: e283c03c add ip, r3, #60 ; 0x3c
previous_node = search_node->previous;
the_node = (Chain_Node *) the_thread;
the_node->next = search_node;
3000786c: e581c000 str ip, [r1]
the_node->previous = previous_node;
30007870: e5812004 str r2, [r1, #4]
previous_node->next = the_node;
30007874: e5821000 str r1, [r2]
search_node->previous = the_node;
30007878: e5831040 str r1, [r3, #64] ; 0x40
the_thread->Wait.queue = the_thread_queue;
3000787c: e5810044 str r0, [r1, #68] ; 0x44 30007880: e129f005 msr CPSR_fc, r5
_ISR_Enable( level ); return THREAD_BLOCKING_OPERATION_NOTHING_HAPPENED;
30007884: e3a00001 mov r0, #1
30007888: e8bd87f0 pop {r4, r5, r6, r7, r8, r9, sl, pc}
* For example, the blocking thread could have been given * the mutex by an ISR or timed out. * * WARNING! Returning with interrupts disabled! */ *level_p = level;
3000788c: e5825000 str r5, [r2]
return the_thread_queue->sync_state;
30007890: e5900030 ldr r0, [r0, #48] ; 0x30
}
30007894: e8bd87f0 pop {r4, r5, r6, r7, r8, r9, sl, pc}
30009860 <_Timespec_Greater_than>:
bool _Timespec_Greater_than(
const struct timespec *lhs,
const struct timespec *rhs
)
{
if ( lhs->tv_sec > rhs->tv_sec )
30009860: e5902000 ldr r2, [r0] 30009864: e5913000 ldr r3, [r1] 30009868: e1520003 cmp r2, r3
return true;
3000986c: c3a00001 movgt r0, #1
bool _Timespec_Greater_than(
const struct timespec *lhs,
const struct timespec *rhs
)
{
if ( lhs->tv_sec > rhs->tv_sec )
30009870: c12fff1e bxgt lr
return true;
if ( lhs->tv_sec < rhs->tv_sec )
30009874: ba000005 blt 30009890 <_Timespec_Greater_than+0x30>
#include <rtems/system.h>
#include <rtems/score/timespec.h>
#include <rtems/score/tod.h>
bool _Timespec_Greater_than(
30009878: e5900004 ldr r0, [r0, #4] 3000987c: e5913004 ldr r3, [r1, #4] 30009880: e1500003 cmp r0, r3 30009884: d3a00000 movle r0, #0 30009888: c3a00001 movgt r0, #1 3000988c: e12fff1e bx lr
{
if ( lhs->tv_sec > rhs->tv_sec )
return true;
if ( lhs->tv_sec < rhs->tv_sec )
return false;
30009890: e3a00000 mov r0, #0
/* ASSERT: lhs->tv_sec == rhs->tv_sec */
if ( lhs->tv_nsec > rhs->tv_nsec )
return true;
return false;
}
30009894: e12fff1e bx lr
30007e44 <_User_extensions_Fatal>:
void _User_extensions_Fatal (
Internal_errors_Source the_source,
bool is_internal,
Internal_errors_t the_error
)
{
30007e44: e92d41f0 push {r4, r5, r6, r7, r8, lr}
the_extension = (User_extensions_Control *) the_node;
if ( the_extension->Callouts.fatal != NULL )
(*the_extension->Callouts.fatal)( the_source, is_internal, the_error );
}
}
30007e48: e59f503c ldr r5, [pc, #60] ; 30007e8c <_User_extensions_Fatal+0x48>
void _User_extensions_Fatal (
Internal_errors_Source the_source,
bool is_internal,
Internal_errors_t the_error
)
{
30007e4c: e1a08000 mov r8, r0 30007e50: e1a07002 mov r7, r2 30007e54: e20160ff and r6, r1, #255 ; 0xff
the_extension = (User_extensions_Control *) the_node;
if ( the_extension->Callouts.fatal != NULL )
(*the_extension->Callouts.fatal)( the_source, is_internal, the_error );
}
}
30007e58: e5954008 ldr r4, [r5, #8]
)
{
Chain_Node *the_node;
User_extensions_Control *the_extension;
for ( the_node = _Chain_Last( &_User_extensions_List );
30007e5c: ea000007 b 30007e80 <_User_extensions_Fatal+0x3c>
!_Chain_Is_head( &_User_extensions_List, the_node ) ;
the_node = the_node->previous ) {
the_extension = (User_extensions_Control *) the_node;
if ( the_extension->Callouts.fatal != NULL )
30007e60: e5943030 ldr r3, [r4, #48] ; 0x30 30007e64: e3530000 cmp r3, #0
(*the_extension->Callouts.fatal)( the_source, is_internal, the_error );
30007e68: 11a00008 movne r0, r8 30007e6c: 11a01006 movne r1, r6 30007e70: 11a02007 movne r2, r7 30007e74: 11a0e00f movne lr, pc 30007e78: 112fff13 bxne r3
Chain_Node *the_node;
User_extensions_Control *the_extension;
for ( the_node = _Chain_Last( &_User_extensions_List );
!_Chain_Is_head( &_User_extensions_List, the_node ) ;
the_node = the_node->previous ) {
30007e7c: e5944004 ldr r4, [r4, #4]
)
{
Chain_Node *the_node;
User_extensions_Control *the_extension;
for ( the_node = _Chain_Last( &_User_extensions_List );
30007e80: e1540005 cmp r4, r5
30007e84: 1afffff5 bne 30007e60 <_User_extensions_Fatal+0x1c>
the_extension = (User_extensions_Control *) the_node;
if ( the_extension->Callouts.fatal != NULL )
(*the_extension->Callouts.fatal)( the_source, is_internal, the_error );
}
}
30007e88: e8bd81f0 pop {r4, r5, r6, r7, r8, pc} <== NOT EXECUTED
3000b9ac <rtems_task_mode>:
rtems_status_code rtems_task_mode(
rtems_mode mode_set,
rtems_mode mask,
rtems_mode *previous_mode_set
)
{
3000b9ac: e92d47f0 push {r4, r5, r6, r7, r8, r9, sl, lr}
ASR_Information *asr;
bool is_asr_enabled = false;
bool needs_asr_dispatching = false;
rtems_mode old_mode;
if ( !previous_mode_set )
3000b9b0: e252a000 subs sl, r2, #0
rtems_status_code rtems_task_mode(
rtems_mode mode_set,
rtems_mode mask,
rtems_mode *previous_mode_set
)
{
3000b9b4: e1a04000 mov r4, r0 3000b9b8: e1a05001 mov r5, r1
bool is_asr_enabled = false;
bool needs_asr_dispatching = false;
rtems_mode old_mode;
if ( !previous_mode_set )
return RTEMS_INVALID_ADDRESS;
3000b9bc: 03a00009 moveq r0, #9
ASR_Information *asr;
bool is_asr_enabled = false;
bool needs_asr_dispatching = false;
rtems_mode old_mode;
if ( !previous_mode_set )
3000b9c0: 08bd87f0 popeq {r4, r5, r6, r7, r8, r9, sl, pc}
return RTEMS_INVALID_ADDRESS;
executing = _Thread_Executing;
3000b9c4: e59f313c ldr r3, [pc, #316] ; 3000bb08 <rtems_task_mode+0x15c> 3000b9c8: e5937004 ldr r7, [r3, #4]
api = executing->API_Extensions[ THREAD_API_RTEMS ];
asr = &api->Signal;
old_mode = (executing->is_preemptible) ? RTEMS_PREEMPT : RTEMS_NO_PREEMPT;
3000b9cc: e5d78074 ldrb r8, [r7, #116] ; 0x74
if ( !previous_mode_set )
return RTEMS_INVALID_ADDRESS;
executing = _Thread_Executing;
api = executing->API_Extensions[ THREAD_API_RTEMS ];
3000b9d0: e59760f4 ldr r6, [r7, #244] ; 0xf4
asr = &api->Signal;
old_mode = (executing->is_preemptible) ? RTEMS_PREEMPT : RTEMS_NO_PREEMPT;
if ( executing->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_NONE )
3000b9d4: e597307c ldr r3, [r7, #124] ; 0x7c
executing = _Thread_Executing;
api = executing->API_Extensions[ THREAD_API_RTEMS ];
asr = &api->Signal;
old_mode = (executing->is_preemptible) ? RTEMS_PREEMPT : RTEMS_NO_PREEMPT;
3000b9d8: e3580000 cmp r8, #0
if ( executing->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_NONE )
old_mode |= RTEMS_NO_TIMESLICE;
else
old_mode |= RTEMS_TIMESLICE;
old_mode |= (asr->is_enabled) ? RTEMS_ASR : RTEMS_NO_ASR;
3000b9dc: e5d69008 ldrb r9, [r6, #8]
executing = _Thread_Executing;
api = executing->API_Extensions[ THREAD_API_RTEMS ];
asr = &api->Signal;
old_mode = (executing->is_preemptible) ? RTEMS_PREEMPT : RTEMS_NO_PREEMPT;
3000b9e0: 03a08c01 moveq r8, #256 ; 0x100 3000b9e4: 13a08000 movne r8, #0
if ( executing->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_NONE )
3000b9e8: e3530000 cmp r3, #0
old_mode |= RTEMS_NO_TIMESLICE;
else
old_mode |= RTEMS_TIMESLICE;
3000b9ec: 13888c02 orrne r8, r8, #512 ; 0x200
old_mode |= (asr->is_enabled) ? RTEMS_ASR : RTEMS_NO_ASR;
3000b9f0: e3590000 cmp r9, #0 3000b9f4: 03a09b01 moveq r9, #1024 ; 0x400 3000b9f8: 13a09000 movne r9, #0
old_mode |= _ISR_Get_level();
3000b9fc: ebfff31e bl 3000867c <_CPU_ISR_Get_level>
if ( executing->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_NONE )
old_mode |= RTEMS_NO_TIMESLICE;
else
old_mode |= RTEMS_TIMESLICE;
old_mode |= (asr->is_enabled) ? RTEMS_ASR : RTEMS_NO_ASR;
3000ba00: e1899000 orr r9, r9, r0
old_mode |= _ISR_Get_level();
3000ba04: e1898008 orr r8, r9, r8
*previous_mode_set = old_mode;
/*
* These are generic thread scheduling characteristics.
*/
if ( mask & RTEMS_PREEMPT_MASK )
3000ba08: e3150c01 tst r5, #256 ; 0x100
old_mode |= RTEMS_TIMESLICE;
old_mode |= (asr->is_enabled) ? RTEMS_ASR : RTEMS_NO_ASR;
old_mode |= _ISR_Get_level();
*previous_mode_set = old_mode;
3000ba0c: e58a8000 str r8, [sl]
/*
* These are generic thread scheduling characteristics.
*/
if ( mask & RTEMS_PREEMPT_MASK )
3000ba10: 0a000003 beq 3000ba24 <rtems_task_mode+0x78>
executing->is_preemptible = _Modes_Is_preempt(mode_set) ? true : false;
3000ba14: e3140c01 tst r4, #256 ; 0x100 3000ba18: 13a03000 movne r3, #0 3000ba1c: 03a03001 moveq r3, #1 3000ba20: e5c73074 strb r3, [r7, #116] ; 0x74
if ( mask & RTEMS_TIMESLICE_MASK ) {
3000ba24: e3150c02 tst r5, #512 ; 0x200
3000ba28: 0a000006 beq 3000ba48 <rtems_task_mode+0x9c>
if ( _Modes_Is_timeslice(mode_set) ) {
3000ba2c: e2143c02 ands r3, r4, #512 ; 0x200
executing->budget_algorithm = THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE;
3000ba30: 13a03001 movne r3, #1 3000ba34: 1587307c strne r3, [r7, #124] ; 0x7c
executing->cpu_time_budget = _Thread_Ticks_per_timeslice;
3000ba38: 159f30cc ldrne r3, [pc, #204] ; 3000bb0c <rtems_task_mode+0x160>
} else
executing->budget_algorithm = THREAD_CPU_BUDGET_ALGORITHM_NONE;
3000ba3c: 0587307c streq r3, [r7, #124] ; 0x7c
executing->is_preemptible = _Modes_Is_preempt(mode_set) ? true : false;
if ( mask & RTEMS_TIMESLICE_MASK ) {
if ( _Modes_Is_timeslice(mode_set) ) {
executing->budget_algorithm = THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE;
executing->cpu_time_budget = _Thread_Ticks_per_timeslice;
3000ba40: 15933000 ldrne r3, [r3] 3000ba44: 15873078 strne r3, [r7, #120] ; 0x78
}
/*
* Set the new interrupt level
*/
if ( mask & RTEMS_INTERRUPT_MASK )
3000ba48: e3150080 tst r5, #128 ; 0x80
3000ba4c: 0a000001 beq 3000ba58 <rtems_task_mode+0xac>
*/
RTEMS_INLINE_ROUTINE void _Modes_Set_interrupt_level (
Modes_Control mode_set
)
{
_ISR_Set_level( _Modes_Get_interrupt_level( mode_set ) );
3000ba50: e2040080 and r0, r4, #128 ; 0x80 3000ba54: ebfff303 bl 30008668 <_CPU_ISR_Set_level>
* This is specific to the RTEMS API
*/
is_asr_enabled = false;
needs_asr_dispatching = false;
if ( mask & RTEMS_ASR_MASK ) {
3000ba58: e2150b01 ands r0, r5, #1024 ; 0x400
3000ba5c: 0a000013 beq 3000bab0 <rtems_task_mode+0x104>
* Output:
* *previous_mode_set - previous mode set
* always return RTEMS_SUCCESSFUL;
*/
rtems_status_code rtems_task_mode(
3000ba60: e3140b01 tst r4, #1024 ; 0x400
is_asr_enabled = false;
needs_asr_dispatching = false;
if ( mask & RTEMS_ASR_MASK ) {
is_asr_enabled = _Modes_Is_asr_disabled( mode_set ) ? false : true;
if ( is_asr_enabled != asr->is_enabled ) {
3000ba64: e5d62008 ldrb r2, [r6, #8]
* Output:
* *previous_mode_set - previous mode set
* always return RTEMS_SUCCESSFUL;
*/
rtems_status_code rtems_task_mode(
3000ba68: 13a03000 movne r3, #0 3000ba6c: 03a03001 moveq r3, #1
is_asr_enabled = false;
needs_asr_dispatching = false;
if ( mask & RTEMS_ASR_MASK ) {
is_asr_enabled = _Modes_Is_asr_disabled( mode_set ) ? false : true;
if ( is_asr_enabled != asr->is_enabled ) {
3000ba70: e1520003 cmp r2, r3
/*
* This is specific to the RTEMS API
*/
is_asr_enabled = false;
needs_asr_dispatching = false;
3000ba74: 03a00000 moveq r0, #0
if ( mask & RTEMS_ASR_MASK ) {
is_asr_enabled = _Modes_Is_asr_disabled( mode_set ) ? false : true;
if ( is_asr_enabled != asr->is_enabled ) {
3000ba78: 0a00000c beq 3000bab0 <rtems_task_mode+0x104>
asr->is_enabled = is_asr_enabled;
3000ba7c: e5c63008 strb r3, [r6, #8]
static inline uint32_t arm_interrupt_disable( void )
{
uint32_t arm_switch_reg;
uint32_t level;
asm volatile (
3000ba80: e10f3000 mrs r3, CPSR 3000ba84: e3832080 orr r2, r3, #128 ; 0x80 3000ba88: e129f002 msr CPSR_fc, r2
{
rtems_signal_set _signals;
ISR_Level _level;
_ISR_Disable( _level );
_signals = information->signals_pending;
3000ba8c: e5962018 ldr r2, [r6, #24]
information->signals_pending = information->signals_posted;
3000ba90: e5961014 ldr r1, [r6, #20]
information->signals_posted = _signals;
3000ba94: e5862014 str r2, [r6, #20]
rtems_signal_set _signals;
ISR_Level _level;
_ISR_Disable( _level );
_signals = information->signals_pending;
information->signals_pending = information->signals_posted;
3000ba98: e5861018 str r1, [r6, #24]
static inline void arm_interrupt_enable( uint32_t level )
{
ARM_SWITCH_REGISTERS;
asm volatile (
3000ba9c: e129f003 msr CPSR_fc, r3
_ASR_Swap_signals( asr );
if ( _ASR_Are_signals_pending( asr ) ) {
3000baa0: e5960014 ldr r0, [r6, #20]
/*
* This is specific to the RTEMS API
*/
is_asr_enabled = false;
needs_asr_dispatching = false;
3000baa4: e3500000 cmp r0, #0 3000baa8: 13a00001 movne r0, #1 3000baac: 03a00000 moveq r0, #0
needs_asr_dispatching = true;
}
}
}
if ( _System_state_Is_up( _System_state_Get() ) ) {
3000bab0: e59f3058 ldr r3, [pc, #88] ; 3000bb10 <rtems_task_mode+0x164> 3000bab4: e5933000 ldr r3, [r3] 3000bab8: e3530003 cmp r3, #3
3000babc: 1a00000f bne 3000bb00 <rtems_task_mode+0x154>
bool are_signals_pending
)
{
Thread_Control *executing;
executing = _Thread_Executing;
3000bac0: e59f2040 ldr r2, [pc, #64] ; 3000bb08 <rtems_task_mode+0x15c>
if ( are_signals_pending ||
3000bac4: e3500000 cmp r0, #0
bool are_signals_pending
)
{
Thread_Control *executing;
executing = _Thread_Executing;
3000bac8: e5923004 ldr r3, [r2, #4]
if ( are_signals_pending ||
3000bacc: 1a000005 bne 3000bae8 <rtems_task_mode+0x13c>
3000bad0: e5922008 ldr r2, [r2, #8]
3000bad4: e1530002 cmp r3, r2
3000bad8: 08bd87f0 popeq {r4, r5, r6, r7, r8, r9, sl, pc}
(!_Thread_Is_heir( executing ) && executing->is_preemptible) ) {
3000badc: e5d33074 ldrb r3, [r3, #116] ; 0x74
3000bae0: e3530000 cmp r3, #0
3000bae4: 08bd87f0 popeq {r4, r5, r6, r7, r8, r9, sl, pc}
_Thread_Dispatch_necessary = true;
3000bae8: e59f3018 ldr r3, [pc, #24] ; 3000bb08 <rtems_task_mode+0x15c> 3000baec: e3a02001 mov r2, #1 3000baf0: e5c32010 strb r2, [r3, #16]
if (_Thread_Evaluate_is_dispatch_needed( needs_asr_dispatching ) )
_Thread_Dispatch();
3000baf4: ebffed74 bl 300070cc <_Thread_Dispatch>
}
return RTEMS_SUCCESSFUL;
3000baf8: e3a00000 mov r0, #0
3000bafc: e8bd87f0 pop {r4, r5, r6, r7, r8, r9, sl, pc}
3000bb00: e3a00000 mov r0, #0 <== NOT EXECUTED
}
3000bb04: e8bd87f0 pop {r4, r5, r6, r7, r8, r9, sl, pc} <== NOT EXECUTED