=============================================================================== 00014af0 <_CORE_message_queue_Broadcast>: { Thread_Control *the_thread; uint32_t number_broadcasted; Thread_Wait_information *waitp; if ( size > the_message_queue->maximum_message_size ) { 14af0: e590304c ldr r3, [r0, #76] ; 0x4c Objects_Id id __attribute__((unused)), CORE_message_queue_API_mp_support_callout api_message_queue_mp_support __attribute__((unused)), #endif uint32_t *count ) { 14af4: e92d45f0 push {r4, r5, r6, r7, r8, sl, lr} Thread_Control *the_thread; uint32_t number_broadcasted; Thread_Wait_information *waitp; if ( size > the_message_queue->maximum_message_size ) { 14af8: e1520003 cmp r2, r3 Objects_Id id __attribute__((unused)), CORE_message_queue_API_mp_support_callout api_message_queue_mp_support __attribute__((unused)), #endif uint32_t *count ) { 14afc: e1a06000 mov r6, r0 14b00: e1a0a001 mov sl, r1 14b04: e1a07002 mov r7, r2 14b08: e59d8020 ldr r8, [sp, #32] Thread_Control *the_thread; uint32_t number_broadcasted; Thread_Wait_information *waitp; if ( size > the_message_queue->maximum_message_size ) { 14b0c: 8a000013 bhi 14b60 <_CORE_message_queue_Broadcast+0x70> * NOTE: This check is critical because threads can block on * send and receive and this ensures that we are broadcasting * the message to threads waiting to receive -- not to send. */ if ( the_message_queue->number_of_pending_messages != 0 ) { 14b10: e5905048 ldr r5, [r0, #72] ; 0x48 14b14: e3550000 cmp r5, #0 *count = 0; 14b18: 13a00000 movne r0, #0 14b1c: 15880000 strne r0, [r8] * NOTE: This check is critical because threads can block on * send and receive and this ensures that we are broadcasting * the message to threads waiting to receive -- not to send. */ if ( the_message_queue->number_of_pending_messages != 0 ) { 14b20: 0a000007 beq 14b44 <_CORE_message_queue_Broadcast+0x54> 14b24: e8bd85f0 pop {r4, r5, r6, r7, r8, sl, pc} const void *source, void *destination, size_t size ) { memcpy(destination, source, size); 14b28: e594002c ldr r0, [r4, #44] ; 0x2c 14b2c: e1a0100a mov r1, sl 14b30: e1a02007 mov r2, r7 14b34: eb001e4a bl 1c464 buffer, waitp->return_argument_second.mutable_object, size ); *(size_t *) the_thread->Wait.return_argument = size; 14b38: e5943028 ldr r3, [r4, #40] ; 0x28 14b3c: e5837000 str r7, [r3] */ number_broadcasted = 0; while ((the_thread = _Thread_queue_Dequeue(&the_message_queue->Wait_queue))) { waitp = &the_thread->Wait; number_broadcasted += 1; 14b40: e2855001 add r5, r5, #1 /* * There must be no pending messages if there is a thread waiting to * receive a message. */ number_broadcasted = 0; while ((the_thread = 14b44: e1a00006 mov r0, r6 14b48: eb00099b bl 171bc <_Thread_queue_Dequeue> 14b4c: e2504000 subs r4, r0, #0 14b50: 1afffff4 bne 14b28 <_CORE_message_queue_Broadcast+0x38> if ( !_Objects_Is_local_id( the_thread->Object.id ) ) (*api_message_queue_mp_support) ( the_thread, id ); #endif } *count = number_broadcasted; 14b54: e5885000 str r5, [r8] return CORE_MESSAGE_QUEUE_STATUS_SUCCESSFUL; 14b58: e1a00004 mov r0, r4 14b5c: e8bd85f0 pop {r4, r5, r6, r7, r8, sl, pc} Thread_Control *the_thread; uint32_t number_broadcasted; Thread_Wait_information *waitp; if ( size > the_message_queue->maximum_message_size ) { return CORE_MESSAGE_QUEUE_STATUS_INVALID_SIZE; 14b60: e3a00001 mov r0, #1 <== NOT EXECUTED #endif } *count = number_broadcasted; return CORE_MESSAGE_QUEUE_STATUS_SUCCESSFUL; } 14b64: e8bd85f0 pop {r4, r5, r6, r7, r8, sl, pc} <== NOT EXECUTED =============================================================================== 00009d78 <_CORE_mutex_Seize_interrupt_trylock>: #if defined(__RTEMS_DO_NOT_INLINE_CORE_MUTEX_SEIZE__) int _CORE_mutex_Seize_interrupt_trylock( CORE_mutex_Control *the_mutex, ISR_Level *level_p ) { 9d78: e1a03000 mov r3, r0 { Thread_Control *executing; /* disabled when you get here */ executing = _Thread_Executing; 9d7c: e59f2124 ldr r2, [pc, #292] ; 9ea8 <_CORE_mutex_Seize_interrupt_trylock+0x130> executing->Wait.return_code = CORE_MUTEX_STATUS_SUCCESSFUL; if ( !_CORE_mutex_Is_locked( the_mutex ) ) { 9d80: e593c050 ldr ip, [r3, #80] ; 0x50 Thread_Control *executing; /* disabled when you get here */ executing = _Thread_Executing; executing->Wait.return_code = CORE_MUTEX_STATUS_SUCCESSFUL; 9d84: e3a00000 mov r0, #0 { Thread_Control *executing; /* disabled when you get here */ executing = _Thread_Executing; 9d88: e5922004 ldr r2, [r2, #4] executing->Wait.return_code = CORE_MUTEX_STATUS_SUCCESSFUL; if ( !_CORE_mutex_Is_locked( the_mutex ) ) { 9d8c: e15c0000 cmp ip, r0 9d90: e92d4010 push {r4, lr} Thread_Control *executing; /* disabled when you get here */ executing = _Thread_Executing; executing->Wait.return_code = CORE_MUTEX_STATUS_SUCCESSFUL; 9d94: e5820034 str r0, [r2, #52] ; 0x34 if ( !_CORE_mutex_Is_locked( the_mutex ) ) { 9d98: 0a00002c beq 9e50 <_CORE_mutex_Seize_interrupt_trylock+0xd8> the_mutex->lock = CORE_MUTEX_LOCKED; 9d9c: e5830050 str r0, [r3, #80] ; 0x50 the_mutex->holder = executing; the_mutex->holder_id = executing->Object.id; 9da0: e5920008 ldr r0, [r2, #8] 9da4: e5830060 str r0, [r3, #96] ; 0x60 the_mutex->nest_count = 1; 9da8: e3a00001 mov r0, #1 9dac: e5830054 str r0, [r3, #84] ; 0x54 return _CORE_mutex_Seize_interrupt_trylock_body( the_mutex, level_p ); } 9db0: e5930048 ldr r0, [r3, #72] ; 0x48 if ( _CORE_mutex_Is_inherit_priority( &the_mutex->Attributes ) || 9db4: e3500002 cmp r0, #2 executing = _Thread_Executing; executing->Wait.return_code = CORE_MUTEX_STATUS_SUCCESSFUL; if ( !_CORE_mutex_Is_locked( the_mutex ) ) { the_mutex->lock = CORE_MUTEX_LOCKED; the_mutex->holder = executing; 9db8: e583205c str r2, [r3, #92] ; 0x5c the_mutex->holder_id = executing->Object.id; the_mutex->nest_count = 1; if ( _CORE_mutex_Is_inherit_priority( &the_mutex->Attributes ) || 9dbc: 0a000001 beq 9dc8 <_CORE_mutex_Seize_interrupt_trylock+0x50> 9dc0: e3500003 cmp r0, #3 9dc4: 1a000004 bne 9ddc <_CORE_mutex_Seize_interrupt_trylock+0x64> _Chain_Prepend_unprotected( &executing->lock_mutex, &the_mutex->queue.lock_queue ); the_mutex->queue.priority_before = executing->current_priority; #endif executing->resource_count++; 9dc8: e592c01c ldr ip, [r2, #28] } if ( !_CORE_mutex_Is_priority_ceiling( &the_mutex->Attributes ) ) { 9dcc: e3500003 cmp r0, #3 _Chain_Prepend_unprotected( &executing->lock_mutex, &the_mutex->queue.lock_queue ); the_mutex->queue.priority_before = executing->current_priority; #endif executing->resource_count++; 9dd0: e28c4001 add r4, ip, #1 9dd4: e582401c str r4, [r2, #28] } if ( !_CORE_mutex_Is_priority_ceiling( &the_mutex->Attributes ) ) { 9dd8: 0a000000 beq 9de0 <_CORE_mutex_Seize_interrupt_trylock+0x68> _ISR_Enable( *level_p ); 9ddc: ea00002b b 9e90 <_CORE_mutex_Seize_interrupt_trylock+0x118> */ { Priority_Control ceiling; Priority_Control current; ceiling = the_mutex->Attributes.priority_ceiling; 9de0: e593004c ldr r0, [r3, #76] ; 0x4c current = executing->current_priority; 9de4: e5924014 ldr r4, [r2, #20] if ( current == ceiling ) { 9de8: e1540000 cmp r4, r0 9dec: 1a000000 bne 9df4 <_CORE_mutex_Seize_interrupt_trylock+0x7c> _ISR_Enable( *level_p ); 9df0: ea000026 b 9e90 <_CORE_mutex_Seize_interrupt_trylock+0x118> return 0; } if ( current > ceiling ) { 9df4: 9a00000b bls 9e28 <_CORE_mutex_Seize_interrupt_trylock+0xb0> rtems_fatal_error_occurred( 99 ); } } #endif _Thread_Dispatch_disable_level += 1; 9df8: e59f20ac ldr r2, [pc, #172] ; 9eac <_CORE_mutex_Seize_interrupt_trylock+0x134> 9dfc: e5920000 ldr r0, [r2] 9e00: e2800001 add r0, r0, #1 9e04: e5820000 str r0, [r2] 9e08: e5912000 ldr r2, [r1] 9e0c: e129f002 msr CPSR_fc, r2 _Thread_Disable_dispatch(); _ISR_Enable( *level_p ); _Thread_Change_priority( 9e10: e3a02000 mov r2, #0 9e14: e593005c ldr r0, [r3, #92] ; 0x5c 9e18: e593104c ldr r1, [r3, #76] ; 0x4c 9e1c: ebfff29e bl 689c <_Thread_Change_priority> the_mutex->holder, the_mutex->Attributes.priority_ceiling, false ); _Thread_Enable_dispatch(); 9e20: ebfff3e4 bl 6db8 <_Thread_Enable_dispatch> 9e24: ea00001b b 9e98 <_CORE_mutex_Seize_interrupt_trylock+0x120> return 0; } /* if ( current < ceiling ) */ { executing->Wait.return_code = CORE_MUTEX_STATUS_CEILING_VIOLATED; 9e28: e3a00006 mov r0, #6 9e2c: e5820034 str r0, [r2, #52] ; 0x34 the_mutex->lock = CORE_MUTEX_UNLOCKED; 9e30: e3a00001 mov r0, #1 9e34: e5830050 str r0, [r3, #80] ; 0x50 the_mutex->nest_count = 0; /* undo locking above */ 9e38: e3a00000 mov r0, #0 9e3c: e5830054 str r0, [r3, #84] ; 0x54 executing->resource_count--; /* undo locking above */ 9e40: e582c01c str ip, [r2, #28] 9e44: e5913000 ldr r3, [r1] 9e48: e129f003 msr CPSR_fc, r3 9e4c: e8bd8010 pop {r4, pc} /* * At this point, we know the mutex was not available. If this thread * is the thread that has locked the mutex, let's see if we are allowed * to nest access. */ if ( _Thread_Is_executing( the_mutex->holder ) ) { 9e50: e593005c ldr r0, [r3, #92] ; 0x5c 9e54: e1500002 cmp r0, r2 /* * The mutex is not available and the caller must deal with the possibility * of blocking. */ return 1; 9e58: 13a00001 movne r0, #1 /* * At this point, we know the mutex was not available. If this thread * is the thread that has locked the mutex, let's see if we are allowed * to nest access. */ if ( _Thread_Is_executing( the_mutex->holder ) ) { 9e5c: 18bd8010 popne {r4, pc} switch ( the_mutex->Attributes.lock_nesting_behavior ) { 9e60: e5932040 ldr r2, [r3, #64] ; 0x40 9e64: e3520000 cmp r2, #0 9e68: 0a000002 beq 9e78 <_CORE_mutex_Seize_interrupt_trylock+0x100> 9e6c: e3520001 cmp r2, #1 9e70: 1a00000a bne 9ea0 <_CORE_mutex_Seize_interrupt_trylock+0x128> 9e74: ea000003 b 9e88 <_CORE_mutex_Seize_interrupt_trylock+0x110><== NOT EXECUTED case CORE_MUTEX_NESTING_ACQUIRES: the_mutex->nest_count++; 9e78: e5932054 ldr r2, [r3, #84] ; 0x54 9e7c: e2822001 add r2, r2, #1 9e80: e5832054 str r2, [r3, #84] ; 0x54 _ISR_Enable( *level_p ); 9e84: ea000001 b 9e90 <_CORE_mutex_Seize_interrupt_trylock+0x118> return 0; case CORE_MUTEX_NESTING_IS_ERROR: executing->Wait.return_code = CORE_MUTEX_STATUS_NESTING_NOT_ALLOWED; 9e88: e3a03002 mov r3, #2 <== NOT EXECUTED 9e8c: e5803034 str r3, [r0, #52] ; 0x34 <== NOT EXECUTED 9e90: e5913000 ldr r3, [r1] 9e94: e129f003 msr CPSR_fc, r3 _ISR_Enable( *level_p ); return 0; 9e98: e3a00000 mov r0, #0 9e9c: e8bd8010 pop {r4, pc} /* * The mutex is not available and the caller must deal with the possibility * of blocking. */ return 1; 9ea0: e3a00001 mov r0, #1 9ea4: e8bd8010 pop {r4, pc} =============================================================================== 00006c50 <_Heap_Walk>: bool _Heap_Walk( Heap_Control *heap, int source, bool dump ) { 6c50: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr} uintptr_t const page_size = heap->page_size; uintptr_t const min_block_size = heap->min_block_size; 6c54: e5903014 ldr r3, [r0, #20] bool _Heap_Walk( Heap_Control *heap, int source, bool dump ) { 6c58: e24dd030 sub sp, sp, #48 ; 0x30 uintptr_t const page_size = heap->page_size; uintptr_t const min_block_size = heap->min_block_size; 6c5c: e58d3024 str r3, [sp, #36] ; 0x24 Heap_Block *const first_block = heap->first_block; Heap_Block *const last_block = heap->last_block; 6c60: e5903024 ldr r3, [r0, #36] ; 0x24 Heap_Block *block = first_block; Heap_Walk_printer printer = dump ? _Heap_Walk_print : _Heap_Walk_print_nothing; 6c64: e59f4500 ldr r4, [pc, #1280] ; 716c <_Heap_Walk+0x51c> ) { uintptr_t const page_size = heap->page_size; uintptr_t const min_block_size = heap->min_block_size; Heap_Block *const first_block = heap->first_block; Heap_Block *const last_block = heap->last_block; 6c68: e58d3028 str r3, [sp, #40] ; 0x28 Heap_Block *block = first_block; Heap_Walk_printer printer = dump ? _Heap_Walk_print : _Heap_Walk_print_nothing; 6c6c: e59f34fc ldr r3, [pc, #1276] ; 7170 <_Heap_Walk+0x520> 6c70: e31200ff tst r2, #255 ; 0xff 6c74: 11a04003 movne r4, r3 if ( !_System_state_Is_up( _System_state_Get() ) ) { 6c78: e59f34f4 ldr r3, [pc, #1268] ; 7174 <_Heap_Walk+0x524> 6c7c: e5933000 ldr r3, [r3] bool dump ) { uintptr_t const page_size = heap->page_size; uintptr_t const min_block_size = heap->min_block_size; Heap_Block *const first_block = heap->first_block; 6c80: e590c020 ldr ip, [r0, #32] Heap_Block *const last_block = heap->last_block; Heap_Block *block = first_block; Heap_Walk_printer printer = dump ? _Heap_Walk_print : _Heap_Walk_print_nothing; if ( !_System_state_Is_up( _System_state_Get() ) ) { 6c84: e3530003 cmp r3, #3 bool _Heap_Walk( Heap_Control *heap, int source, bool dump ) { 6c88: e1a06000 mov r6, r0 6c8c: e1a05001 mov r5, r1 uintptr_t const page_size = heap->page_size; 6c90: e5909010 ldr r9, [r0, #16] uintptr_t const min_block_size = heap->min_block_size; Heap_Block *const first_block = heap->first_block; 6c94: e58dc020 str ip, [sp, #32] Heap_Block *const last_block = heap->last_block; Heap_Block *block = first_block; Heap_Walk_printer printer = dump ? _Heap_Walk_print : _Heap_Walk_print_nothing; if ( !_System_state_Is_up( _System_state_Get() ) ) { 6c98: 1a000127 bne 713c <_Heap_Walk+0x4ec> Heap_Block *const first_free_block = _Heap_Free_list_first( heap ); Heap_Block *const last_free_block = _Heap_Free_list_last( heap ); Heap_Block *const first_block = heap->first_block; Heap_Block *const last_block = heap->last_block; (*printer)( 6c9c: e59dc024 ldr ip, [sp, #36] ; 0x24 6ca0: e58dc000 str ip, [sp] 6ca4: e5903018 ldr r3, [r0, #24] 6ca8: e58d3004 str r3, [sp, #4] 6cac: e590301c ldr r3, [r0, #28] 6cb0: e59d2020 ldr r2, [sp, #32] 6cb4: e58d3008 str r3, [sp, #8] 6cb8: e59d3028 ldr r3, [sp, #40] ; 0x28 6cbc: e58d200c str r2, [sp, #12] 6cc0: e58d3010 str r3, [sp, #16] 6cc4: e5903008 ldr r3, [r0, #8] 6cc8: e58d3014 str r3, [sp, #20] 6ccc: e590300c ldr r3, [r0, #12] 6cd0: e59f24a0 ldr r2, [pc, #1184] ; 7178 <_Heap_Walk+0x528> 6cd4: e58d3018 str r3, [sp, #24] 6cd8: e1a00001 mov r0, r1 6cdc: e1a03009 mov r3, r9 6ce0: e3a01000 mov r1, #0 6ce4: e1a0e00f mov lr, pc 6ce8: e12fff14 bx r4 heap->area_begin, heap->area_end, first_block, last_block, first_free_block, last_free_block ); if ( page_size == 0 ) { 6cec: e3590000 cmp r9, #0 6cf0: 1a000006 bne 6d10 <_Heap_Walk+0xc0> (*printer)( source, true, "page size is zero\n" ); 6cf4: e1a00005 mov r0, r5 6cf8: e3a01001 mov r1, #1 6cfc: e59f2478 ldr r2, [pc, #1144] ; 717c <_Heap_Walk+0x52c> 6d00: e1a0e00f mov lr, pc 6d04: e12fff14 bx r4 if ( !_System_state_Is_up( _System_state_Get() ) ) { return true; } if ( !_Heap_Walk_check_control( source, printer, heap ) ) { return false; 6d08: e1a08009 mov r8, r9 6d0c: ea00010b b 7140 <_Heap_Walk+0x4f0> (*printer)( source, true, "page size is zero\n" ); return false; } if ( !_Addresses_Is_aligned( (void *) page_size ) ) { 6d10: e2198003 ands r8, r9, #3 (*printer)( 6d14: 11a00005 movne r0, r5 6d18: 13a01001 movne r1, #1 6d1c: 159f245c ldrne r2, [pc, #1116] ; 7180 <_Heap_Walk+0x530> 6d20: 11a03009 movne r3, r9 6d24: 1a00010c bne 715c <_Heap_Walk+0x50c> RTEMS_INLINE_ROUTINE bool _Heap_Is_aligned( uintptr_t value, uintptr_t alignment ) { return (value % alignment) == 0; 6d28: e59d0024 ldr r0, [sp, #36] ; 0x24 6d2c: e1a01009 mov r1, r9 6d30: ebffe79b bl ba4 <__umodsi3> ); return false; } if ( !_Heap_Is_aligned( min_block_size, page_size ) ) { 6d34: e250b000 subs fp, r0, #0 6d38: 0a000006 beq 6d58 <_Heap_Walk+0x108> (*printer)( 6d3c: e1a00005 mov r0, r5 6d40: e3a01001 mov r1, #1 6d44: e59f2438 ldr r2, [pc, #1080] ; 7184 <_Heap_Walk+0x534> 6d48: e59d3024 ldr r3, [sp, #36] ; 0x24 6d4c: e1a0e00f mov lr, pc 6d50: e12fff14 bx r4 6d54: ea0000f9 b 7140 <_Heap_Walk+0x4f0> 6d58: e59dc020 ldr ip, [sp, #32] 6d5c: e1a01009 mov r1, r9 6d60: e28c0008 add r0, ip, #8 6d64: ebffe78e bl ba4 <__umodsi3> ); return false; } if ( 6d68: e250a000 subs sl, r0, #0 !_Heap_Is_aligned( _Heap_Alloc_area_of_block( first_block ), page_size ) ) { (*printer)( 6d6c: 11a00005 movne r0, r5 6d70: 13a01001 movne r1, #1 6d74: 159f240c ldrne r2, [pc, #1036] ; 7188 <_Heap_Walk+0x538> 6d78: 159d3020 ldrne r3, [sp, #32] 6d7c: 1a0000cc bne 70b4 <_Heap_Walk+0x464> block->size_and_flag = size | flag; } RTEMS_INLINE_ROUTINE bool _Heap_Is_prev_used( const Heap_Block *block ) { return block->size_and_flag & HEAP_PREV_BLOCK_USED; 6d80: e59d2020 ldr r2, [sp, #32] 6d84: e5928004 ldr r8, [r2, #4] ); return false; } if ( !_Heap_Is_prev_used( first_block ) ) { 6d88: e2188001 ands r8, r8, #1 (*printer)( 6d8c: 01a00005 moveq r0, r5 6d90: 03a01001 moveq r1, #1 6d94: 059f23f0 ldreq r2, [pc, #1008] ; 718c <_Heap_Walk+0x53c> 6d98: 0a000009 beq 6dc4 <_Heap_Walk+0x174> - HEAP_BLOCK_HEADER_SIZE); } RTEMS_INLINE_ROUTINE uintptr_t _Heap_Block_size( const Heap_Block *block ) { return block->size_and_flag & ~HEAP_PREV_BLOCK_USED; 6d9c: e59d3028 ldr r3, [sp, #40] ; 0x28 6da0: e5937004 ldr r7, [r3, #4] 6da4: e3c77001 bic r7, r7, #1 RTEMS_INLINE_ROUTINE Heap_Block *_Heap_Block_at( const Heap_Block *block, uintptr_t offset ) { return (Heap_Block *) ((uintptr_t) block + offset); 6da8: e0837007 add r7, r3, r7 block->size_and_flag = size | flag; } RTEMS_INLINE_ROUTINE bool _Heap_Is_prev_used( const Heap_Block *block ) { return block->size_and_flag & HEAP_PREV_BLOCK_USED; 6dac: e5978004 ldr r8, [r7, #4] ); return false; } if ( _Heap_Is_free( last_block ) ) { 6db0: e2188001 ands r8, r8, #1 6db4: 1a000005 bne 6dd0 <_Heap_Walk+0x180> (*printer)( 6db8: e59f23d0 ldr r2, [pc, #976] ; 7190 <_Heap_Walk+0x540> 6dbc: e1a00005 mov r0, r5 6dc0: e3a01001 mov r1, #1 6dc4: e1a0e00f mov lr, pc 6dc8: e12fff14 bx r4 6dcc: ea0000db b 7140 <_Heap_Walk+0x4f0> ); return false; } if ( 6dd0: e59dc020 ldr ip, [sp, #32] 6dd4: e157000c cmp r7, ip 6dd8: 0a000006 beq 6df8 <_Heap_Walk+0x1a8> _Heap_Block_at( last_block, _Heap_Block_size( last_block ) ) != first_block ) { (*printer)( 6ddc: e1a00005 mov r0, r5 <== NOT EXECUTED 6de0: e3a01001 mov r1, #1 <== NOT EXECUTED 6de4: e59f23a8 ldr r2, [pc, #936] ; 7194 <_Heap_Walk+0x544> <== NOT EXECUTED 6de8: e1a0e00f mov lr, pc <== NOT EXECUTED 6dec: e12fff14 bx r4 <== NOT EXECUTED if ( !_System_state_Is_up( _System_state_Get() ) ) { return true; } if ( !_Heap_Walk_check_control( source, printer, heap ) ) { return false; 6df0: e1a0800a mov r8, sl <== NOT EXECUTED 6df4: ea0000d1 b 7140 <_Heap_Walk+0x4f0> <== NOT EXECUTED int source, Heap_Walk_printer printer, Heap_Control *heap ) { uintptr_t const page_size = heap->page_size; 6df8: e596b010 ldr fp, [r6, #16] block = next_block; } while ( block != first_block ); return true; } 6dfc: e5968008 ldr r8, [r6, #8] Heap_Walk_printer printer, Heap_Control *heap ) { uintptr_t const page_size = heap->page_size; const Heap_Block *const free_list_tail = _Heap_Free_list_tail( heap ); 6e00: e1a0a006 mov sl, r6 6e04: ea000034 b 6edc <_Heap_Walk+0x28c> const Heap_Control *heap, const Heap_Block *block ) { return (uintptr_t) block >= (uintptr_t) heap->first_block && (uintptr_t) block <= (uintptr_t) heap->last_block; 6e08: e5963020 ldr r3, [r6, #32] 6e0c: e1530008 cmp r3, r8 6e10: 83a0c000 movhi ip, #0 6e14: 8a000003 bhi 6e28 <_Heap_Walk+0x1d8> 6e18: e596c024 ldr ip, [r6, #36] ; 0x24 6e1c: e15c0008 cmp ip, r8 6e20: 33a0c000 movcc ip, #0 6e24: 23a0c001 movcs ip, #1 const Heap_Block *const first_free_block = _Heap_Free_list_first( heap ); const Heap_Block *prev_block = free_list_tail; const Heap_Block *free_block = first_free_block; while ( free_block != free_list_tail ) { if ( !_Heap_Is_block_in_heap( heap, free_block ) ) { 6e28: e21cc0ff ands ip, ip, #255 ; 0xff (*printer)( 6e2c: 01a00005 moveq r0, r5 6e30: 03a01001 moveq r1, #1 6e34: 059f235c ldreq r2, [pc, #860] ; 7198 <_Heap_Walk+0x548> 6e38: 0a000012 beq 6e88 <_Heap_Walk+0x238> RTEMS_INLINE_ROUTINE bool _Heap_Is_aligned( uintptr_t value, uintptr_t alignment ) { return (value % alignment) == 0; 6e3c: e2880008 add r0, r8, #8 6e40: e1a0100b mov r1, fp 6e44: ebffe756 bl ba4 <__umodsi3> ); return false; } if ( 6e48: e250c000 subs ip, r0, #0 !_Heap_Is_aligned( _Heap_Alloc_area_of_block( free_block ), page_size ) ) { (*printer)( 6e4c: 11a00005 movne r0, r5 6e50: 13a01001 movne r1, #1 6e54: 159f2340 ldrne r2, [pc, #832] ; 719c <_Heap_Walk+0x54c> 6e58: 11a03008 movne r3, r8 6e5c: 1a0000be bne 715c <_Heap_Walk+0x50c> - HEAP_BLOCK_HEADER_SIZE); } RTEMS_INLINE_ROUTINE uintptr_t _Heap_Block_size( const Heap_Block *block ) { return block->size_and_flag & ~HEAP_PREV_BLOCK_USED; 6e60: e5983004 ldr r3, [r8, #4] 6e64: e3c33001 bic r3, r3, #1 block = next_block; } while ( block != first_block ); return true; } 6e68: e0883003 add r3, r8, r3 block->size_and_flag = size | flag; } RTEMS_INLINE_ROUTINE bool _Heap_Is_prev_used( const Heap_Block *block ) { return block->size_and_flag & HEAP_PREV_BLOCK_USED; 6e6c: e5933004 ldr r3, [r3, #4] ); return false; } if ( _Heap_Is_used( free_block ) ) { 6e70: e2133001 ands r3, r3, #1 6e74: e58d302c str r3, [sp, #44] ; 0x2c 6e78: 0a000009 beq 6ea4 <_Heap_Walk+0x254> (*printer)( 6e7c: e59f231c ldr r2, [pc, #796] ; 71a0 <_Heap_Walk+0x550> 6e80: e1a00005 mov r0, r5 6e84: e3a01001 mov r1, #1 6e88: e1a03008 mov r3, r8 6e8c: e58dc01c str ip, [sp, #28] 6e90: e1a0e00f mov lr, pc 6e94: e12fff14 bx r4 if ( !_System_state_Is_up( _System_state_Get() ) ) { return true; } if ( !_Heap_Walk_check_control( source, printer, heap ) ) { return false; 6e98: e59dc01c ldr ip, [sp, #28] 6e9c: e1a0800c mov r8, ip 6ea0: ea0000a6 b 7140 <_Heap_Walk+0x4f0> ); return false; } if ( free_block->prev != prev_block ) { 6ea4: e598300c ldr r3, [r8, #12] 6ea8: e153000a cmp r3, sl 6eac: 0a000008 beq 6ed4 <_Heap_Walk+0x284> (*printer)( 6eb0: e58d3000 str r3, [sp] 6eb4: e1a00005 mov r0, r5 6eb8: e1a03008 mov r3, r8 6ebc: e3a01001 mov r1, #1 6ec0: e59f22dc ldr r2, [pc, #732] ; 71a4 <_Heap_Walk+0x554> 6ec4: e1a0e00f mov lr, pc 6ec8: e12fff14 bx r4 if ( !_System_state_Is_up( _System_state_Get() ) ) { return true; } if ( !_Heap_Walk_check_control( source, printer, heap ) ) { return false; 6ecc: e59d802c ldr r8, [sp, #44] ; 0x2c 6ed0: ea00009a b 7140 <_Heap_Walk+0x4f0> return false; } prev_block = free_block; free_block = free_block->next; 6ed4: e1a0a008 mov sl, r8 6ed8: e5988008 ldr r8, [r8, #8] const Heap_Block *const free_list_tail = _Heap_Free_list_tail( heap ); const Heap_Block *const first_free_block = _Heap_Free_list_first( heap ); const Heap_Block *prev_block = free_list_tail; const Heap_Block *free_block = first_free_block; while ( free_block != free_list_tail ) { 6edc: e1580006 cmp r8, r6 6ee0: 1affffc8 bne 6e08 <_Heap_Walk+0x1b8> 6ee4: ea000000 b 6eec <_Heap_Walk+0x29c> block->prev_size ); } block = next_block; } while ( block != first_block ); 6ee8: e1a07008 mov r7, r8 return true; } 6eec: e5973004 ldr r3, [r7, #4] const Heap_Control *heap, const Heap_Block *block ) { return (uintptr_t) block >= (uintptr_t) heap->first_block && (uintptr_t) block <= (uintptr_t) heap->last_block; 6ef0: e5962020 ldr r2, [r6, #32] - HEAP_BLOCK_HEADER_SIZE); } RTEMS_INLINE_ROUTINE uintptr_t _Heap_Block_size( const Heap_Block *block ) { return block->size_and_flag & ~HEAP_PREV_BLOCK_USED; 6ef4: e3c3a001 bic sl, r3, #1 RTEMS_INLINE_ROUTINE Heap_Block *_Heap_Block_at( const Heap_Block *block, uintptr_t offset ) { return (Heap_Block *) ((uintptr_t) block + offset); 6ef8: e087800a add r8, r7, sl const Heap_Control *heap, const Heap_Block *block ) { return (uintptr_t) block >= (uintptr_t) heap->first_block && (uintptr_t) block <= (uintptr_t) heap->last_block; 6efc: e1520008 cmp r2, r8 6f00: 83a0b000 movhi fp, #0 6f04: 8a000003 bhi 6f18 <_Heap_Walk+0x2c8> 6f08: e596b024 ldr fp, [r6, #36] ; 0x24 6f0c: e15b0008 cmp fp, r8 6f10: 33a0b000 movcc fp, #0 6f14: 23a0b001 movcs fp, #1 bool const prev_used = _Heap_Is_prev_used( block ); Heap_Block *const next_block = _Heap_Block_at( block, block_size ); uintptr_t const next_block_begin = (uintptr_t) next_block; bool const is_not_last_block = block != last_block; if ( !_Heap_Is_block_in_heap( heap, next_block ) ) { 6f18: e21bb0ff ands fp, fp, #255 ; 0xff 6f1c: 1a000007 bne 6f40 <_Heap_Walk+0x2f0> (*printer)( 6f20: e58d8000 str r8, [sp] 6f24: e1a00005 mov r0, r5 6f28: e3a01001 mov r1, #1 6f2c: e59f2274 ldr r2, [pc, #628] ; 71a8 <_Heap_Walk+0x558> 6f30: e1a03007 mov r3, r7 6f34: e1a0e00f mov lr, pc 6f38: e12fff14 bx r4 6f3c: ea00005e b 70bc <_Heap_Walk+0x46c> uintptr_t const block_begin = (uintptr_t) block; uintptr_t const block_size = _Heap_Block_size( block ); bool const prev_used = _Heap_Is_prev_used( block ); Heap_Block *const next_block = _Heap_Block_at( block, block_size ); uintptr_t const next_block_begin = (uintptr_t) next_block; bool const is_not_last_block = block != last_block; 6f40: e59d2028 ldr r2, [sp, #40] ; 0x28 RTEMS_INLINE_ROUTINE bool _Heap_Is_aligned( uintptr_t value, uintptr_t alignment ) { return (value % alignment) == 0; 6f44: e1a0000a mov r0, sl 6f48: e1a01009 mov r1, r9 6f4c: e057b002 subs fp, r7, r2 6f50: 13a0b001 movne fp, #1 6f54: e58d301c str r3, [sp, #28] 6f58: ebffe711 bl ba4 <__umodsi3> ); return false; } if ( !_Heap_Is_aligned( block_size, page_size ) && is_not_last_block ) { 6f5c: e3500000 cmp r0, #0 6f60: e59d301c ldr r3, [sp, #28] 6f64: 0a000005 beq 6f80 <_Heap_Walk+0x330> 6f68: e35b0000 cmp fp, #0 (*printer)( 6f6c: 158da000 strne sl, [sp] 6f70: 11a00005 movne r0, r5 6f74: 13a01001 movne r1, #1 6f78: 159f222c ldrne r2, [pc, #556] ; 71ac <_Heap_Walk+0x55c> 6f7c: 1a000014 bne 6fd4 <_Heap_Walk+0x384> ); return false; } if ( block_size < min_block_size && is_not_last_block ) { 6f80: e59dc024 ldr ip, [sp, #36] ; 0x24 6f84: e15a000c cmp sl, ip 6f88: 2a000009 bcs 6fb4 <_Heap_Walk+0x364> 6f8c: e35b0000 cmp fp, #0 6f90: 0a000007 beq 6fb4 <_Heap_Walk+0x364> (*printer)( 6f94: e88d1400 stm sp, {sl, ip} 6f98: e1a00005 mov r0, r5 6f9c: e3a01001 mov r1, #1 6fa0: e59f2208 ldr r2, [pc, #520] ; 71b0 <_Heap_Walk+0x560> 6fa4: e1a03007 mov r3, r7 6fa8: e1a0e00f mov lr, pc 6fac: e12fff14 bx r4 6fb0: ea00006b b 7164 <_Heap_Walk+0x514> ); return false; } if ( next_block_begin <= block_begin && is_not_last_block ) { 6fb4: e1580007 cmp r8, r7 6fb8: 8a000009 bhi 6fe4 <_Heap_Walk+0x394> 6fbc: e35b0000 cmp fp, #0 6fc0: 0a000007 beq 6fe4 <_Heap_Walk+0x394> (*printer)( 6fc4: e58d8000 str r8, [sp] 6fc8: e59f21e4 ldr r2, [pc, #484] ; 71b4 <_Heap_Walk+0x564> 6fcc: e1a00005 mov r0, r5 6fd0: e3a01001 mov r1, #1 6fd4: e1a03007 mov r3, r7 6fd8: e1a0e00f mov lr, pc 6fdc: e12fff14 bx r4 6fe0: ea00005f b 7164 <_Heap_Walk+0x514> block->size_and_flag = size | flag; } RTEMS_INLINE_ROUTINE bool _Heap_Is_prev_used( const Heap_Block *block ) { return block->size_and_flag & HEAP_PREV_BLOCK_USED; 6fe4: e203b001 and fp, r3, #1 6fe8: e5983004 ldr r3, [r8, #4] ); return false; } if ( !_Heap_Is_prev_used( next_block ) ) { 6fec: e3130001 tst r3, #1 6ff0: 1a00003b bne 70e4 <_Heap_Walk+0x494> false, "block 0x%08x: size %u, prev 0x%08x%s, next 0x%08x%s\n", block, block_size, block->prev, block->prev == first_free_block ? 6ff4: e597200c ldr r2, [r7, #12] Heap_Block *const last_free_block = _Heap_Free_list_last( heap ); bool const prev_used = _Heap_Is_prev_used( block ); uintptr_t const block_size = _Heap_Block_size( block ); Heap_Block *const next_block = _Heap_Block_at( block, block_size ); (*printer)( 6ff8: e5963008 ldr r3, [r6, #8] 6ffc: e1520003 cmp r2, r3 block = next_block; } while ( block != first_block ); return true; } 7000: e596100c ldr r1, [r6, #12] Heap_Block *const last_free_block = _Heap_Free_list_last( heap ); bool const prev_used = _Heap_Is_prev_used( block ); uintptr_t const block_size = _Heap_Block_size( block ); Heap_Block *const next_block = _Heap_Block_at( block, block_size ); (*printer)( 7004: 059f01ac ldreq r0, [pc, #428] ; 71b8 <_Heap_Walk+0x568> 7008: 0a000003 beq 701c <_Heap_Walk+0x3cc> block, block_size, block->prev, block->prev == first_free_block ? " (= first free)" : (block->prev == free_list_head ? " (= head)" : ""), 700c: e59f31a8 ldr r3, [pc, #424] ; 71bc <_Heap_Walk+0x56c> 7010: e1520006 cmp r2, r6 7014: e59f01a4 ldr r0, [pc, #420] ; 71c0 <_Heap_Walk+0x570> 7018: 01a00003 moveq r0, r3 block->next, block->next == last_free_block ? 701c: e5973008 ldr r3, [r7, #8] Heap_Block *const last_free_block = _Heap_Free_list_last( heap ); bool const prev_used = _Heap_Is_prev_used( block ); uintptr_t const block_size = _Heap_Block_size( block ); Heap_Block *const next_block = _Heap_Block_at( block, block_size ); (*printer)( 7020: e1530001 cmp r3, r1 7024: 059f1198 ldreq r1, [pc, #408] ; 71c4 <_Heap_Walk+0x574> 7028: 0a000003 beq 703c <_Heap_Walk+0x3ec> " (= first free)" : (block->prev == free_list_head ? " (= head)" : ""), block->next, block->next == last_free_block ? " (= last free)" : (block->next == free_list_tail ? " (= tail)" : "") 702c: e59fc194 ldr ip, [pc, #404] ; 71c8 <_Heap_Walk+0x578> 7030: e1530006 cmp r3, r6 7034: e59f1184 ldr r1, [pc, #388] ; 71c0 <_Heap_Walk+0x570> 7038: 01a0100c moveq r1, ip Heap_Block *const last_free_block = _Heap_Free_list_last( heap ); bool const prev_used = _Heap_Is_prev_used( block ); uintptr_t const block_size = _Heap_Block_size( block ); Heap_Block *const next_block = _Heap_Block_at( block, block_size ); (*printer)( 703c: e58d2004 str r2, [sp, #4] 7040: e58d0008 str r0, [sp, #8] 7044: e58d300c str r3, [sp, #12] 7048: e58d1010 str r1, [sp, #16] 704c: e1a03007 mov r3, r7 7050: e58da000 str sl, [sp] 7054: e1a00005 mov r0, r5 7058: e3a01000 mov r1, #0 705c: e59f2168 ldr r2, [pc, #360] ; 71cc <_Heap_Walk+0x57c> 7060: e1a0e00f mov lr, pc 7064: e12fff14 bx r4 block->next == last_free_block ? " (= last free)" : (block->next == free_list_tail ? " (= tail)" : "") ); if ( block_size != next_block->prev_size ) { 7068: e5983000 ldr r3, [r8] 706c: e15a0003 cmp sl, r3 7070: 0a000009 beq 709c <_Heap_Walk+0x44c> (*printer)( 7074: e58d3004 str r3, [sp, #4] 7078: e58da000 str sl, [sp] 707c: e58d8008 str r8, [sp, #8] 7080: e1a00005 mov r0, r5 7084: e3a01001 mov r1, #1 7088: e59f2140 ldr r2, [pc, #320] ; 71d0 <_Heap_Walk+0x580> 708c: e1a03007 mov r3, r7 7090: e1a0e00f mov lr, pc 7094: e12fff14 bx r4 7098: ea000031 b 7164 <_Heap_Walk+0x514> ); return false; } if ( !prev_used ) { 709c: e35b0000 cmp fp, #0 70a0: 1a000007 bne 70c4 <_Heap_Walk+0x474> (*printer)( 70a4: e59f2128 ldr r2, [pc, #296] ; 71d4 <_Heap_Walk+0x584> 70a8: e1a00005 mov r0, r5 70ac: e3a01001 mov r1, #1 70b0: e1a03007 mov r3, r7 70b4: e1a0e00f mov lr, pc 70b8: e12fff14 bx r4 return false; } if ( !_Heap_Is_prev_used( next_block ) ) { if ( !_Heap_Walk_check_free_block( source, printer, heap, block ) ) { return false; 70bc: e1a0800b mov r8, fp 70c0: ea00001e b 7140 <_Heap_Walk+0x4f0> block = next_block; } while ( block != first_block ); return true; } 70c4: e5963008 ldr r3, [r6, #8] 70c8: ea000002 b 70d8 <_Heap_Walk+0x488> { const Heap_Block *const free_list_tail = _Heap_Free_list_tail( heap ); const Heap_Block *free_block = _Heap_Free_list_first( heap ); while ( free_block != free_list_tail ) { if ( free_block == block ) { 70cc: e1530007 cmp r3, r7 70d0: 0a000016 beq 7130 <_Heap_Walk+0x4e0> return true; } free_block = free_block->next; 70d4: e5933008 ldr r3, [r3, #8] ) { const Heap_Block *const free_list_tail = _Heap_Free_list_tail( heap ); const Heap_Block *free_block = _Heap_Free_list_first( heap ); while ( free_block != free_list_tail ) { 70d8: e1530006 cmp r3, r6 70dc: 1afffffa bne 70cc <_Heap_Walk+0x47c> 70e0: ea000019 b 714c <_Heap_Walk+0x4fc> if ( !_Heap_Is_prev_used( next_block ) ) { if ( !_Heap_Walk_check_free_block( source, printer, heap, block ) ) { return false; } } else if (prev_used) { 70e4: e35b0000 cmp fp, #0 70e8: 0a000007 beq 710c <_Heap_Walk+0x4bc> (*printer)( 70ec: e58da000 str sl, [sp] 70f0: e1a00005 mov r0, r5 70f4: e3a01000 mov r1, #0 70f8: e59f20d8 ldr r2, [pc, #216] ; 71d8 <_Heap_Walk+0x588> 70fc: e1a03007 mov r3, r7 7100: e1a0e00f mov lr, pc 7104: e12fff14 bx r4 7108: ea000008 b 7130 <_Heap_Walk+0x4e0> "block 0x%08x: size %u\n", block, block_size ); } else { (*printer)( 710c: e58da000 str sl, [sp] 7110: e5973000 ldr r3, [r7] 7114: e1a00005 mov r0, r5 7118: e58d3004 str r3, [sp, #4] 711c: e1a0100b mov r1, fp 7120: e59f20b4 ldr r2, [pc, #180] ; 71dc <_Heap_Walk+0x58c> 7124: e1a03007 mov r3, r7 7128: e1a0e00f mov lr, pc 712c: e12fff14 bx r4 block->prev_size ); } block = next_block; } while ( block != first_block ); 7130: e59d2020 ldr r2, [sp, #32] 7134: e1580002 cmp r8, r2 7138: 1affff6a bne 6ee8 <_Heap_Walk+0x298> Heap_Block *block = first_block; Heap_Walk_printer printer = dump ? _Heap_Walk_print : _Heap_Walk_print_nothing; if ( !_System_state_Is_up( _System_state_Get() ) ) { return true; 713c: e3a08001 mov r8, #1 block = next_block; } while ( block != first_block ); return true; } 7140: e1a00008 mov r0, r8 7144: e28dd030 add sp, sp, #48 ; 0x30 7148: e8bd8ff0 pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} return false; } if ( !_Heap_Walk_is_in_free_list( heap, block ) ) { (*printer)( 714c: e59f208c ldr r2, [pc, #140] ; 71e0 <_Heap_Walk+0x590> 7150: e1a00005 mov r0, r5 7154: e3a01001 mov r1, #1 7158: e1a03007 mov r3, r7 715c: e1a0e00f mov lr, pc 7160: e12fff14 bx r4 return false; } if ( !_Heap_Is_prev_used( next_block ) ) { if ( !_Heap_Walk_check_free_block( source, printer, heap, block ) ) { return false; 7164: e3a08000 mov r8, #0 7168: eafffff4 b 7140 <_Heap_Walk+0x4f0> =============================================================================== 00006070 <_Internal_error_Occurred>: bool is_internal, Internal_errors_t the_error ) { _Internal_errors_What_happened.the_source = the_source; 6070: e59f3038 ldr r3, [pc, #56] ; 60b0 <_Internal_error_Occurred+0x40> void _Internal_error_Occurred( Internal_errors_Source the_source, bool is_internal, Internal_errors_t the_error ) { 6074: e20110ff and r1, r1, #255 ; 0xff 6078: e52de004 push {lr} ; (str lr, [sp, #-4]!) _Internal_errors_What_happened.the_source = the_source; 607c: e5830000 str r0, [r3] _Internal_errors_What_happened.is_internal = is_internal; 6080: e5c31004 strb r1, [r3, #4] _Internal_errors_What_happened.the_error = the_error; 6084: e5832008 str r2, [r3, #8] void _Internal_error_Occurred( Internal_errors_Source the_source, bool is_internal, Internal_errors_t the_error ) { 6088: e1a04002 mov r4, r2 _Internal_errors_What_happened.the_source = the_source; _Internal_errors_What_happened.is_internal = is_internal; _Internal_errors_What_happened.the_error = the_error; _User_extensions_Fatal( the_source, is_internal, the_error ); 608c: eb0006d6 bl 7bec <_User_extensions_Fatal> RTEMS_INLINE_ROUTINE void _System_state_Set ( System_state_Codes state ) { _System_state_Current = state; 6090: e59f301c ldr r3, [pc, #28] ; 60b4 <_Internal_error_Occurred+0x44><== NOT EXECUTED 6094: e3a02005 mov r2, #5 <== NOT EXECUTED 6098: e5832000 str r2, [r3] <== NOT EXECUTED static inline uint32_t arm_interrupt_disable( void ) { uint32_t arm_switch_reg; uint32_t level; asm volatile ( 609c: e10f2000 mrs r2, CPSR <== NOT EXECUTED 60a0: e3823080 orr r3, r2, #128 ; 0x80 <== NOT EXECUTED 60a4: e129f003 msr CPSR_fc, r3 <== NOT EXECUTED _System_state_Set( SYSTEM_STATE_FAILED ); _CPU_Fatal_halt( the_error ); 60a8: e1a00004 mov r0, r4 <== NOT EXECUTED 60ac: eafffffe b 60ac <_Internal_error_Occurred+0x3c> <== NOT EXECUTED =============================================================================== 00013fc0 <_Timer_server_Body>: * @a arg points to the corresponding timer server control block. */ static rtems_task _Timer_server_Body( rtems_task_argument arg ) { 13fc0: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr} 13fc4: e24dd018 sub sp, sp, #24 13fc8: e28db00c add fp, sp, #12 RTEMS_INLINE_ROUTINE void _Chain_Initialize_empty( Chain_Control *the_chain ) { the_chain->first = _Chain_Tail(the_chain); the_chain->permanent_null = NULL; 13fcc: e3a03000 mov r3, #0 */ RTEMS_INLINE_ROUTINE Chain_Node *_Chain_Tail( Chain_Control *the_chain ) { return (Chain_Node *) &the_chain->permanent_null; 13fd0: e28ba004 add sl, fp, #4 13fd4: e28d7004 add r7, sp, #4 */ RTEMS_INLINE_ROUTINE void _Chain_Initialize_empty( Chain_Control *the_chain ) { the_chain->first = _Chain_Tail(the_chain); 13fd8: e58da00c str sl, [sp, #12] the_chain->permanent_null = NULL; 13fdc: e58d3010 str r3, [sp, #16] the_chain->last = _Chain_Head(the_chain); 13fe0: e58db014 str fp, [sp, #20] */ RTEMS_INLINE_ROUTINE void _Chain_Initialize_empty( Chain_Control *the_chain ) { the_chain->first = _Chain_Tail(the_chain); 13fe4: e58d7000 str r7, [sp] the_chain->permanent_null = NULL; 13fe8: e98d2008 stmib sp, {r3, sp} 13fec: e1a04000 mov r4, r0 */ RTEMS_INLINE_ROUTINE Chain_Node *_Chain_Tail( Chain_Control *the_chain ) { return (Chain_Node *) &the_chain->permanent_null; 13ff0: e1a0500d mov r5, sp */ Watchdog_Interval delta = snapshot - watchdogs->last_snapshot; watchdogs->last_snapshot = snapshot; _Watchdog_Adjust_to_chain( &watchdogs->Chain, delta, fire_chain ); 13ff4: e2809030 add r9, r0, #48 ; 0x30 { /* * Afterwards all timer inserts are directed to this chain and the interval * and TOD chains will be no more modified by other parties. */ ts->insert_chain = insert_chain; 13ff8: e584b078 str fp, [r4, #120] ; 0x78 /* * The current TOD is before the last TOD which indicates that * TOD has been set backwards. */ delta = last_snapshot - snapshot; _Watchdog_Adjust( &watchdogs->Chain, WATCHDOG_BACKWARD, delta ); 13ffc: e2848068 add r8, r4, #104 ; 0x68 static void _Timer_server_Process_interval_watchdogs( Timer_server_Watchdogs *watchdogs, Chain_Control *fire_chain ) { Watchdog_Interval snapshot = _Watchdog_Ticks_since_boot; 14000: e59f2150 ldr r2, [pc, #336] ; 14158 <_Timer_server_Body+0x198> 14004: e5923000 ldr r3, [r2] /* * We assume adequate unsigned arithmetic here. */ Watchdog_Interval delta = snapshot - watchdogs->last_snapshot; 14008: e594103c ldr r1, [r4, #60] ; 0x3c watchdogs->last_snapshot = snapshot; _Watchdog_Adjust_to_chain( &watchdogs->Chain, delta, fire_chain ); 1400c: e1a02005 mov r2, r5 /* * We assume adequate unsigned arithmetic here. */ Watchdog_Interval delta = snapshot - watchdogs->last_snapshot; watchdogs->last_snapshot = snapshot; 14010: e584303c str r3, [r4, #60] ; 0x3c _Watchdog_Adjust_to_chain( &watchdogs->Chain, delta, fire_chain ); 14014: e0611003 rsb r1, r1, r3 14018: e1a00009 mov r0, r9 1401c: eb001075 bl 181f8 <_Watchdog_Adjust_to_chain> static void _Timer_server_Process_tod_watchdogs( Timer_server_Watchdogs *watchdogs, Chain_Control *fire_chain ) { Watchdog_Interval snapshot = (Watchdog_Interval) _TOD_Seconds_since_epoch(); 14020: e59f3134 ldr r3, [pc, #308] ; 1415c <_Timer_server_Body+0x19c> Watchdog_Interval last_snapshot = watchdogs->last_snapshot; 14024: e5942074 ldr r2, [r4, #116] ; 0x74 static void _Timer_server_Process_tod_watchdogs( Timer_server_Watchdogs *watchdogs, Chain_Control *fire_chain ) { Watchdog_Interval snapshot = (Watchdog_Interval) _TOD_Seconds_since_epoch(); 14028: e5936000 ldr r6, [r3] /* * Process the seconds chain. Start by checking that the Time * of Day (TOD) has not been set backwards. If it has then * we want to adjust the watchdogs->Chain to indicate this. */ if ( snapshot > last_snapshot ) { 1402c: e1560002 cmp r6, r2 14030: 9a000004 bls 14048 <_Timer_server_Body+0x88> /* * This path is for normal forward movement and cases where the * TOD has been set forward. */ delta = snapshot - last_snapshot; _Watchdog_Adjust_to_chain( &watchdogs->Chain, delta, fire_chain ); 14034: e0621006 rsb r1, r2, r6 14038: e1a00008 mov r0, r8 1403c: e1a02005 mov r2, r5 14040: eb00106c bl 181f8 <_Watchdog_Adjust_to_chain> 14044: ea000003 b 14058 <_Timer_server_Body+0x98> /* * The current TOD is before the last TOD which indicates that * TOD has been set backwards. */ delta = last_snapshot - snapshot; _Watchdog_Adjust( &watchdogs->Chain, WATCHDOG_BACKWARD, delta ); 14048: 31a00008 movcc r0, r8 1404c: 33a01001 movcc r1, #1 14050: 30662002 rsbcc r2, r6, r2 14054: 3b00103f blcc 18158 <_Watchdog_Adjust> } watchdogs->last_snapshot = snapshot; 14058: e5846074 str r6, [r4, #116] ; 0x74 } static void _Timer_server_Process_insertions( Timer_server_Control *ts ) { while ( true ) { Timer_Control *timer = (Timer_Control *) _Chain_Get( ts->insert_chain ); 1405c: e5940078 ldr r0, [r4, #120] ; 0x78 14060: eb000285 bl 14a7c <_Chain_Get> if ( timer == NULL ) { 14064: e2506000 subs r6, r0, #0 14068: 0a000009 beq 14094 <_Timer_server_Body+0xd4> static void _Timer_server_Insert_timer( Timer_server_Control *ts, Timer_Control *timer ) { if ( timer->the_class == TIMER_INTERVAL_ON_TASK ) { 1406c: e5963038 ldr r3, [r6, #56] ; 0x38 14070: e3530001 cmp r3, #1 _Watchdog_Insert( &ts->Interval_watchdogs.Chain, &timer->Ticker ); 14074: 01a00009 moveq r0, r9 static void _Timer_server_Insert_timer( Timer_server_Control *ts, Timer_Control *timer ) { if ( timer->the_class == TIMER_INTERVAL_ON_TASK ) { 14078: 0a000002 beq 14088 <_Timer_server_Body+0xc8> _Watchdog_Insert( &ts->Interval_watchdogs.Chain, &timer->Ticker ); } else if ( timer->the_class == TIMER_TIME_OF_DAY_ON_TASK ) { 1407c: e3530003 cmp r3, #3 14080: 1afffff5 bne 1405c <_Timer_server_Body+0x9c> _Watchdog_Insert( &ts->TOD_watchdogs.Chain, &timer->Ticker ); 14084: e1a00008 mov r0, r8 14088: e2861010 add r1, r6, #16 1408c: eb001084 bl 182a4 <_Watchdog_Insert> 14090: eafffff1 b 1405c <_Timer_server_Body+0x9c> * of zero it will be processed in the next iteration of the timer server * body loop. */ _Timer_server_Process_insertions( ts ); _ISR_Disable( level ); 14094: ebffff97 bl 13ef8 if ( _Chain_Is_empty( insert_chain ) ) { 14098: e59d300c ldr r3, [sp, #12] 1409c: e153000a cmp r3, sl 140a0: 1a000006 bne 140c0 <_Timer_server_Body+0x100> ts->insert_chain = NULL; 140a4: e5846078 str r6, [r4, #120] ; 0x78 140a8: e129f000 msr CPSR_fc, r0 _Chain_Initialize_empty( &fire_chain ); while ( true ) { _Timer_server_Get_watchdogs_that_fire_now( ts, &insert_chain, &fire_chain ); if ( !_Chain_Is_empty( &fire_chain ) ) { 140ac: e59d3000 ldr r3, [sp] 140b0: e1530007 cmp r3, r7 ) { if ( !_Chain_Is_empty(the_chain)) return _Chain_Get_first_unprotected(the_chain); else return NULL; 140b4: 13a06000 movne r6, #0 140b8: 1a000002 bne 140c8 <_Timer_server_Body+0x108> 140bc: ea000013 b 14110 <_Timer_server_Body+0x150> 140c0: e129f000 msr CPSR_fc, r0 <== NOT EXECUTED 140c4: eaffffcd b 14000 <_Timer_server_Body+0x40> <== NOT EXECUTED /* * It is essential that interrupts are disable here since an interrupt * service routine may remove a watchdog from the chain. */ _ISR_Disable( level ); 140c8: ebffff8a bl 13ef8 */ RTEMS_INLINE_ROUTINE bool _Chain_Is_empty( Chain_Control *the_chain ) { return (the_chain->first == _Chain_Tail(the_chain)); 140cc: e59d3000 ldr r3, [sp] */ RTEMS_INLINE_ROUTINE Chain_Node *_Chain_Get_unprotected( Chain_Control *the_chain ) { if ( !_Chain_Is_empty(the_chain)) 140d0: e1530007 cmp r3, r7 140d4: 0a00000b beq 14108 <_Timer_server_Body+0x148> { Chain_Node *return_node; Chain_Node *new_first; return_node = the_chain->first; new_first = return_node->next; 140d8: e5932000 ldr r2, [r3] watchdog = (Watchdog_Control *) _Chain_Get_unprotected( &fire_chain ); if ( watchdog != NULL ) { 140dc: e3530000 cmp r3, #0 the_chain->first = new_first; 140e0: e58d2000 str r2, [sp] new_first->previous = _Chain_Head(the_chain); 140e4: e5825004 str r5, [r2, #4] 140e8: 0a000006 beq 14108 <_Timer_server_Body+0x148> watchdog->state = WATCHDOG_INACTIVE; 140ec: e5836008 str r6, [r3, #8] 140f0: e129f000 msr CPSR_fc, r0 /* * The timer server may block here and wait for resources or time. * The system watchdogs are inactive and will remain inactive since * the active flag of the timer server is true. */ (*watchdog->routine)( watchdog->id, watchdog->user_data ); 140f4: e2830020 add r0, r3, #32 140f8: e8900003 ldm r0, {r0, r1} 140fc: e1a0e00f mov lr, pc 14100: e593f01c ldr pc, [r3, #28] } 14104: eaffffef b 140c8 <_Timer_server_Body+0x108> 14108: e129f000 msr CPSR_fc, r0 1410c: eaffffb9 b 13ff8 <_Timer_server_Body+0x38> } else { ts->active = false; 14110: e3a03000 mov r3, #0 14114: e5c4307c strb r3, [r4, #124] ; 0x7c /* * Block until there is something to do. */ _Thread_Disable_dispatch(); 14118: ebffff7a bl 13f08 <_Thread_Disable_dispatch> _Thread_Set_state( ts->thread, STATES_DELAYING ); 1411c: e3a01008 mov r1, #8 14120: e5940000 ldr r0, [r4] 14124: eb000dcb bl 17858 <_Thread_Set_state> _Timer_server_Reset_interval_system_watchdog( ts ); 14128: e1a00004 mov r0, r4 1412c: ebffff7b bl 13f20 <_Timer_server_Reset_interval_system_watchdog> _Timer_server_Reset_tod_system_watchdog( ts ); 14130: e1a00004 mov r0, r4 14134: ebffff8d bl 13f70 <_Timer_server_Reset_tod_system_watchdog> _Thread_Enable_dispatch(); 14138: eb000b53 bl 16e8c <_Thread_Enable_dispatch> ts->active = true; 1413c: e3a03001 mov r3, #1 14140: e5c4307c strb r3, [r4, #124] ; 0x7c static void _Timer_server_Stop_interval_system_watchdog( Timer_server_Control *ts ) { _Watchdog_Remove( &ts->Interval_watchdogs.System_watchdog ); 14144: e2840008 add r0, r4, #8 14148: eb0010ab bl 183fc <_Watchdog_Remove> static void _Timer_server_Stop_tod_system_watchdog( Timer_server_Control *ts ) { _Watchdog_Remove( &ts->TOD_watchdogs.System_watchdog ); 1414c: e2840040 add r0, r4, #64 ; 0x40 14150: eb0010a9 bl 183fc <_Watchdog_Remove> 14154: eaffffa7 b 13ff8 <_Timer_server_Body+0x38> =============================================================================== 000096f4 <_Timespec_Greater_than>: bool _Timespec_Greater_than( const struct timespec *lhs, const struct timespec *rhs ) { if ( lhs->tv_sec > rhs->tv_sec ) 96f4: e5902000 ldr r2, [r0] 96f8: e5913000 ldr r3, [r1] 96fc: e1520003 cmp r2, r3 return true; 9700: c3a00001 movgt r0, #1 bool _Timespec_Greater_than( const struct timespec *lhs, const struct timespec *rhs ) { if ( lhs->tv_sec > rhs->tv_sec ) 9704: c12fff1e bxgt lr return true; if ( lhs->tv_sec < rhs->tv_sec ) 9708: ba000005 blt 9724 <_Timespec_Greater_than+0x30> #include #include #include bool _Timespec_Greater_than( 970c: e5900004 ldr r0, [r0, #4] 9710: e5913004 ldr r3, [r1, #4] 9714: e1500003 cmp r0, r3 9718: d3a00000 movle r0, #0 971c: c3a00001 movgt r0, #1 9720: e12fff1e bx lr { if ( lhs->tv_sec > rhs->tv_sec ) return true; if ( lhs->tv_sec < rhs->tv_sec ) return false; 9724: e3a00000 mov r0, #0 <== NOT EXECUTED /* ASSERT: lhs->tv_sec == rhs->tv_sec */ if ( lhs->tv_nsec > rhs->tv_nsec ) return true; return false; } 9728: e12fff1e bx lr <== NOT EXECUTED =============================================================================== 0000972c <_Timespec_Less_than>: bool _Timespec_Less_than( const struct timespec *lhs, const struct timespec *rhs ) { if ( lhs->tv_sec < rhs->tv_sec ) 972c: e5902000 ldr r2, [r0] 9730: e5913000 ldr r3, [r1] 9734: e1520003 cmp r2, r3 return true; 9738: b3a00001 movlt r0, #1 bool _Timespec_Less_than( const struct timespec *lhs, const struct timespec *rhs ) { if ( lhs->tv_sec < rhs->tv_sec ) 973c: b12fff1e bxlt lr return true; if ( lhs->tv_sec > rhs->tv_sec ) 9740: ca000005 bgt 975c <_Timespec_Less_than+0x30> #include #include #include bool _Timespec_Less_than( 9744: e5900004 ldr r0, [r0, #4] 9748: e5913004 ldr r3, [r1, #4] 974c: e1500003 cmp r0, r3 9750: a3a00000 movge r0, #0 9754: b3a00001 movlt r0, #1 9758: e12fff1e bx lr { if ( lhs->tv_sec < rhs->tv_sec ) return true; if ( lhs->tv_sec > rhs->tv_sec ) return false; 975c: e3a00000 mov r0, #0 <== NOT EXECUTED /* ASSERT: lhs->tv_sec == rhs->tv_sec */ if ( lhs->tv_nsec < rhs->tv_nsec ) return true; return false; } 9760: e12fff1e bx lr <== NOT EXECUTED =============================================================================== 00007bec <_User_extensions_Fatal>: void _User_extensions_Fatal ( Internal_errors_Source the_source, bool is_internal, Internal_errors_t the_error ) { 7bec: e92d41f0 push {r4, r5, r6, r7, r8, lr} Chain_Node *the_node; User_extensions_Control *the_extension; for ( the_node = _User_extensions_List.last ; 7bf0: e59f503c ldr r5, [pc, #60] ; 7c34 <_User_extensions_Fatal+0x48> void _User_extensions_Fatal ( Internal_errors_Source the_source, bool is_internal, Internal_errors_t the_error ) { 7bf4: e1a08000 mov r8, r0 7bf8: e1a07002 mov r7, r2 7bfc: e20160ff and r6, r1, #255 ; 0xff Chain_Node *the_node; User_extensions_Control *the_extension; for ( the_node = _User_extensions_List.last ; 7c00: e5954008 ldr r4, [r5, #8] 7c04: ea000007 b 7c28 <_User_extensions_Fatal+0x3c> !_Chain_Is_head( &_User_extensions_List, the_node ) ; the_node = the_node->previous ) { the_extension = (User_extensions_Control *) the_node; if ( the_extension->Callouts.fatal != NULL ) 7c08: e5943030 ldr r3, [r4, #48] ; 0x30 7c0c: e3530000 cmp r3, #0 (*the_extension->Callouts.fatal)( the_source, is_internal, the_error ); 7c10: 11a00008 movne r0, r8 7c14: 11a01006 movne r1, r6 7c18: 11a02007 movne r2, r7 7c1c: 11a0e00f movne lr, pc 7c20: 112fff13 bxne r3 Chain_Node *the_node; User_extensions_Control *the_extension; for ( the_node = _User_extensions_List.last ; !_Chain_Is_head( &_User_extensions_List, the_node ) ; the_node = the_node->previous ) { 7c24: e5944004 ldr r4, [r4, #4] ) { Chain_Node *the_node; User_extensions_Control *the_extension; for ( the_node = _User_extensions_List.last ; 7c28: e1540005 cmp r4, r5 7c2c: 1afffff5 bne 7c08 <_User_extensions_Fatal+0x1c> the_extension = (User_extensions_Control *) the_node; if ( the_extension->Callouts.fatal != NULL ) (*the_extension->Callouts.fatal)( the_source, is_internal, the_error ); } } 7c30: e8bd81f0 pop {r4, r5, r6, r7, r8, pc} <== NOT EXECUTED =============================================================================== 00007a8c : #include #include void rtems_iterate_over_all_threads(rtems_per_thread_routine routine) { 7a8c: e92d41f0 push {r4, r5, r6, r7, r8, lr} uint32_t i; uint32_t api_index; Thread_Control *the_thread; Objects_Information *information; if ( !routine ) 7a90: e2508000 subs r8, r0, #0 7a94: 08bd81f0 popeq {r4, r5, r6, r7, r8, pc} 7a98: e59f4048 ldr r4, [pc, #72] ; 7ae8 #endif #include #include void rtems_iterate_over_all_threads(rtems_per_thread_routine routine) 7a9c: e284700c add r7, r4, #12 #if defined(RTEMS_DEBUG) if ( !_Objects_Information_table[ api_index ] ) continue; #endif information = _Objects_Information_table[ api_index ][ 1 ]; 7aa0: e5b43004 ldr r3, [r4, #4]! 7aa4: e5936004 ldr r6, [r3, #4] if ( !information ) 7aa8: e3560000 cmp r6, #0 7aac: 13a05001 movne r5, #1 7ab0: 1a000006 bne 7ad0 7ab4: ea000008 b 7adc continue; for ( i=1 ; i <= information->maximum ; i++ ) { the_thread = (Thread_Control *)information->local_table[ i ]; 7ab8: e596301c ldr r3, [r6, #28] 7abc: e7930105 ldr r0, [r3, r5, lsl #2] if ( !the_thread ) 7ac0: e3500000 cmp r0, #0 continue; (*routine)(the_thread); 7ac4: 11a0e00f movne lr, pc 7ac8: 112fff18 bxne r8 information = _Objects_Information_table[ api_index ][ 1 ]; if ( !information ) continue; for ( i=1 ; i <= information->maximum ; i++ ) { 7acc: e2855001 add r5, r5, #1 7ad0: e1d631b0 ldrh r3, [r6, #16] 7ad4: e1550003 cmp r5, r3 7ad8: 9afffff6 bls 7ab8 Objects_Information *information; if ( !routine ) return; for ( api_index = 1 ; api_index <= OBJECTS_APIS_LAST ; api_index++ ) { 7adc: e1540007 cmp r4, r7 7ae0: 1affffee bne 7aa0 7ae4: e8bd81f0 pop {r4, r5, r6, r7, r8, pc} <== NOT EXECUTED =============================================================================== 0000b744 : rtems_status_code rtems_rate_monotonic_get_status( rtems_id id, rtems_rate_monotonic_period_status *status ) { b744: e92d4010 push {r4, lr} Objects_Locations location; Rate_monotonic_Period_time_t since_last_period; Rate_monotonic_Control *the_period; bool valid_status; if ( !status ) b748: e2514000 subs r4, r1, #0 rtems_status_code rtems_rate_monotonic_get_status( rtems_id id, rtems_rate_monotonic_period_status *status ) { b74c: e1a03000 mov r3, r0 b750: e24dd014 sub sp, sp, #20 Rate_monotonic_Period_time_t since_last_period; Rate_monotonic_Control *the_period; bool valid_status; if ( !status ) return RTEMS_INVALID_ADDRESS; b754: 03a00009 moveq r0, #9 Objects_Locations location; Rate_monotonic_Period_time_t since_last_period; Rate_monotonic_Control *the_period; bool valid_status; if ( !status ) b758: 0a000023 beq b7ec b75c: e1a01003 mov r1, r3 b760: e28d2010 add r2, sp, #16 b764: e59f0088 ldr r0, [pc, #136] ; b7f4 b768: ebfff221 bl 7ff4 <_Objects_Get> return RTEMS_INVALID_ADDRESS; the_period = _Rate_monotonic_Get( id, &location ); switch ( location ) { b76c: e59d2010 ldr r2, [sp, #16] b770: e3520000 cmp r2, #0 b774: e1a03000 mov r3, r0 #endif case OBJECTS_ERROR: break; } return RTEMS_INVALID_ID; b778: 13a00004 movne r0, #4 if ( !status ) return RTEMS_INVALID_ADDRESS; the_period = _Rate_monotonic_Get( id, &location ); switch ( location ) { b77c: 1a00001a bne b7ec case OBJECTS_LOCAL: status->owner = the_period->owner->Object.id; b780: e5932040 ldr r2, [r3, #64] ; 0x40 status->state = the_period->state; b784: e5933038 ldr r3, [r3, #56] ; 0x38 the_period = _Rate_monotonic_Get( id, &location ); switch ( location ) { case OBJECTS_LOCAL: status->owner = the_period->owner->Object.id; b788: e5922008 ldr r2, [r2, #8] status->state = the_period->state; /* * If the period is inactive, there is no information. */ if ( status->state == RATE_MONOTONIC_INACTIVE ) { b78c: e3530000 cmp r3, #0 the_period = _Rate_monotonic_Get( id, &location ); switch ( location ) { case OBJECTS_LOCAL: status->owner = the_period->owner->Object.id; b790: e884000c stm r4, {r2, r3} /* * If the period is inactive, there is no information. */ if ( status->state == RATE_MONOTONIC_INACTIVE ) { #ifndef __RTEMS_USE_TICKS_FOR_STATISTICS__ _Timespec_Set_to_zero( &status->since_last_period ); b794: 05843008 streq r3, [r4, #8] b798: 0584300c streq r3, [r4, #12] _Timespec_Set_to_zero( &status->executed_since_last_period ); b79c: 05843010 streq r3, [r4, #16] b7a0: 05843014 streq r3, [r4, #20] b7a4: 0a00000e beq b7e4 } else { /* * Grab the current status. */ valid_status = b7a8: e1a0100d mov r1, sp b7ac: e28d2008 add r2, sp, #8 b7b0: ebffe957 bl 5d14 <_Rate_monotonic_Get_status> _Rate_monotonic_Get_status( the_period, &since_last_period, &executed ); if (!valid_status) { b7b4: e3500000 cmp r0, #0 b7b8: 1a000002 bne b7c8 _Thread_Enable_dispatch(); b7bc: ebfff42a bl 886c <_Thread_Enable_dispatch> <== NOT EXECUTED return RTEMS_NOT_DEFINED; b7c0: e3a0000b mov r0, #11 <== NOT EXECUTED b7c4: ea000008 b b7ec <== NOT EXECUTED } #ifndef __RTEMS_USE_TICKS_FOR_STATISTICS__ _Timestamp_To_timespec( b7c8: e89d000c ldm sp, {r2, r3} b7cc: e5842008 str r2, [r4, #8] b7d0: e584300c str r3, [r4, #12] &since_last_period, &status->since_last_period ); _Timestamp_To_timespec( b7d4: e28d3008 add r3, sp, #8 b7d8: e893000c ldm r3, {r2, r3} b7dc: e5842010 str r2, [r4, #16] b7e0: e5843014 str r3, [r4, #20] status->since_last_period = since_last_period; status->executed_since_last_period = executed; #endif } _Thread_Enable_dispatch(); b7e4: ebfff420 bl 886c <_Thread_Enable_dispatch> return RTEMS_SUCCESSFUL; b7e8: e3a00000 mov r0, #0 case OBJECTS_ERROR: break; } return RTEMS_INVALID_ID; } b7ec: e28dd014 add sp, sp, #20 b7f0: e8bd8010 pop {r4, pc} =============================================================================== 0000b700 : rtems_status_code rtems_task_mode( rtems_mode mode_set, rtems_mode mask, rtems_mode *previous_mode_set ) { b700: e92d47f0 push {r4, r5, r6, r7, r8, r9, sl, lr} ASR_Information *asr; bool is_asr_enabled = false; bool needs_asr_dispatching = false; rtems_mode old_mode; if ( !previous_mode_set ) b704: e252a000 subs sl, r2, #0 rtems_status_code rtems_task_mode( rtems_mode mode_set, rtems_mode mask, rtems_mode *previous_mode_set ) { b708: e1a04000 mov r4, r0 b70c: e1a05001 mov r5, r1 bool is_asr_enabled = false; bool needs_asr_dispatching = false; rtems_mode old_mode; if ( !previous_mode_set ) return RTEMS_INVALID_ADDRESS; b710: 03a00009 moveq r0, #9 ASR_Information *asr; bool is_asr_enabled = false; bool needs_asr_dispatching = false; rtems_mode old_mode; if ( !previous_mode_set ) b714: 08bd87f0 popeq {r4, r5, r6, r7, r8, r9, sl, pc} return RTEMS_INVALID_ADDRESS; executing = _Thread_Executing; b718: e59f313c ldr r3, [pc, #316] ; b85c b71c: e5937004 ldr r7, [r3, #4] api = executing->API_Extensions[ THREAD_API_RTEMS ]; asr = &api->Signal; old_mode = (executing->is_preemptible) ? RTEMS_PREEMPT : RTEMS_NO_PREEMPT; b720: e5d78074 ldrb r8, [r7, #116] ; 0x74 if ( !previous_mode_set ) return RTEMS_INVALID_ADDRESS; executing = _Thread_Executing; api = executing->API_Extensions[ THREAD_API_RTEMS ]; b724: e5976100 ldr r6, [r7, #256] ; 0x100 asr = &api->Signal; old_mode = (executing->is_preemptible) ? RTEMS_PREEMPT : RTEMS_NO_PREEMPT; if ( executing->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_NONE ) b728: e597307c ldr r3, [r7, #124] ; 0x7c executing = _Thread_Executing; api = executing->API_Extensions[ THREAD_API_RTEMS ]; asr = &api->Signal; old_mode = (executing->is_preemptible) ? RTEMS_PREEMPT : RTEMS_NO_PREEMPT; b72c: e3580000 cmp r8, #0 if ( executing->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_NONE ) old_mode |= RTEMS_NO_TIMESLICE; else old_mode |= RTEMS_TIMESLICE; old_mode |= (asr->is_enabled) ? RTEMS_ASR : RTEMS_NO_ASR; b730: e5d69008 ldrb r9, [r6, #8] executing = _Thread_Executing; api = executing->API_Extensions[ THREAD_API_RTEMS ]; asr = &api->Signal; old_mode = (executing->is_preemptible) ? RTEMS_PREEMPT : RTEMS_NO_PREEMPT; b734: 03a08c01 moveq r8, #256 ; 0x100 b738: 13a08000 movne r8, #0 if ( executing->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_NONE ) b73c: e3530000 cmp r3, #0 old_mode |= RTEMS_NO_TIMESLICE; else old_mode |= RTEMS_TIMESLICE; b740: 13888c02 orrne r8, r8, #512 ; 0x200 old_mode |= (asr->is_enabled) ? RTEMS_ASR : RTEMS_NO_ASR; b744: e3590000 cmp r9, #0 b748: 03a09b01 moveq r9, #1024 ; 0x400 b74c: 13a09000 movne r9, #0 old_mode |= _ISR_Get_level(); b750: ebfff333 bl 8424 <_CPU_ISR_Get_level> if ( executing->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_NONE ) old_mode |= RTEMS_NO_TIMESLICE; else old_mode |= RTEMS_TIMESLICE; old_mode |= (asr->is_enabled) ? RTEMS_ASR : RTEMS_NO_ASR; b754: e1899000 orr r9, r9, r0 old_mode |= _ISR_Get_level(); b758: e1898008 orr r8, r9, r8 *previous_mode_set = old_mode; /* * These are generic thread scheduling characteristics. */ if ( mask & RTEMS_PREEMPT_MASK ) b75c: e3150c01 tst r5, #256 ; 0x100 old_mode |= RTEMS_TIMESLICE; old_mode |= (asr->is_enabled) ? RTEMS_ASR : RTEMS_NO_ASR; old_mode |= _ISR_Get_level(); *previous_mode_set = old_mode; b760: e58a8000 str r8, [sl] /* * These are generic thread scheduling characteristics. */ if ( mask & RTEMS_PREEMPT_MASK ) b764: 0a000003 beq b778 executing->is_preemptible = _Modes_Is_preempt(mode_set) ? true : false; b768: e3140c01 tst r4, #256 ; 0x100 b76c: 13a03000 movne r3, #0 b770: 03a03001 moveq r3, #1 b774: e5c73074 strb r3, [r7, #116] ; 0x74 if ( mask & RTEMS_TIMESLICE_MASK ) { b778: e3150c02 tst r5, #512 ; 0x200 b77c: 0a000006 beq b79c if ( _Modes_Is_timeslice(mode_set) ) { b780: e2143c02 ands r3, r4, #512 ; 0x200 executing->budget_algorithm = THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE; b784: 13a03001 movne r3, #1 b788: 1587307c strne r3, [r7, #124] ; 0x7c executing->cpu_time_budget = _Thread_Ticks_per_timeslice; b78c: 159f30cc ldrne r3, [pc, #204] ; b860 b790: 15933000 ldrne r3, [r3] } else executing->budget_algorithm = THREAD_CPU_BUDGET_ALGORITHM_NONE; b794: 0587307c streq r3, [r7, #124] ; 0x7c executing->is_preemptible = _Modes_Is_preempt(mode_set) ? true : false; if ( mask & RTEMS_TIMESLICE_MASK ) { if ( _Modes_Is_timeslice(mode_set) ) { executing->budget_algorithm = THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE; executing->cpu_time_budget = _Thread_Ticks_per_timeslice; b798: 15873078 strne r3, [r7, #120] ; 0x78 } /* * Set the new interrupt level */ if ( mask & RTEMS_INTERRUPT_MASK ) b79c: e3150080 tst r5, #128 ; 0x80 b7a0: 0a000001 beq b7ac */ RTEMS_INLINE_ROUTINE void _Modes_Set_interrupt_level ( Modes_Control mode_set ) { _ISR_Set_level( _Modes_Get_interrupt_level( mode_set ) ); b7a4: e2040080 and r0, r4, #128 ; 0x80 b7a8: ebfff318 bl 8410 <_CPU_ISR_Set_level> * This is specific to the RTEMS API */ is_asr_enabled = false; needs_asr_dispatching = false; if ( mask & RTEMS_ASR_MASK ) { b7ac: e2150b01 ands r0, r5, #1024 ; 0x400 b7b0: 0a000013 beq b804 * Output: * *previous_mode_set - previous mode set * always return RTEMS_SUCCESSFUL; */ rtems_status_code rtems_task_mode( b7b4: e3140b01 tst r4, #1024 ; 0x400 is_asr_enabled = false; needs_asr_dispatching = false; if ( mask & RTEMS_ASR_MASK ) { is_asr_enabled = _Modes_Is_asr_disabled( mode_set ) ? false : true; if ( is_asr_enabled != asr->is_enabled ) { b7b8: e5d62008 ldrb r2, [r6, #8] * Output: * *previous_mode_set - previous mode set * always return RTEMS_SUCCESSFUL; */ rtems_status_code rtems_task_mode( b7bc: 13a03000 movne r3, #0 b7c0: 03a03001 moveq r3, #1 is_asr_enabled = false; needs_asr_dispatching = false; if ( mask & RTEMS_ASR_MASK ) { is_asr_enabled = _Modes_Is_asr_disabled( mode_set ) ? false : true; if ( is_asr_enabled != asr->is_enabled ) { b7c4: e1520003 cmp r2, r3 /* * This is specific to the RTEMS API */ is_asr_enabled = false; needs_asr_dispatching = false; b7c8: 03a00000 moveq r0, #0 if ( mask & RTEMS_ASR_MASK ) { is_asr_enabled = _Modes_Is_asr_disabled( mode_set ) ? false : true; if ( is_asr_enabled != asr->is_enabled ) { b7cc: 0a00000c beq b804 asr->is_enabled = is_asr_enabled; b7d0: e5c63008 strb r3, [r6, #8] static inline uint32_t arm_interrupt_disable( void ) { uint32_t arm_switch_reg; uint32_t level; asm volatile ( b7d4: e10f3000 mrs r3, CPSR b7d8: e3832080 orr r2, r3, #128 ; 0x80 b7dc: e129f002 msr CPSR_fc, r2 { rtems_signal_set _signals; ISR_Level _level; _ISR_Disable( _level ); _signals = information->signals_pending; b7e0: e2861014 add r1, r6, #20 b7e4: e8910006 ldm r1, {r1, r2} information->signals_pending = information->signals_posted; information->signals_posted = _signals; b7e8: e5862014 str r2, [r6, #20] rtems_signal_set _signals; ISR_Level _level; _ISR_Disable( _level ); _signals = information->signals_pending; information->signals_pending = information->signals_posted; b7ec: e5861018 str r1, [r6, #24] static inline void arm_interrupt_enable( uint32_t level ) { ARM_SWITCH_REGISTERS; asm volatile ( b7f0: e129f003 msr CPSR_fc, r3 _ASR_Swap_signals( asr ); if ( _ASR_Are_signals_pending( asr ) ) { b7f4: e5960014 ldr r0, [r6, #20] /* * This is specific to the RTEMS API */ is_asr_enabled = false; needs_asr_dispatching = false; b7f8: e3500000 cmp r0, #0 b7fc: 13a00001 movne r0, #1 b800: 03a00000 moveq r0, #0 needs_asr_dispatching = true; } } } if ( _System_state_Is_up( _System_state_Get() ) ) { b804: e59f3058 ldr r3, [pc, #88] ; b864 b808: e5933000 ldr r3, [r3] b80c: e3530003 cmp r3, #3 b810: 1a00000f bne b854 bool are_signals_pending ) { Thread_Control *executing; executing = _Thread_Executing; b814: e59f2040 ldr r2, [pc, #64] ; b85c if ( are_signals_pending || b818: e3500000 cmp r0, #0 bool are_signals_pending ) { Thread_Control *executing; executing = _Thread_Executing; b81c: e5923004 ldr r3, [r2, #4] if ( are_signals_pending || b820: 1a000005 bne b83c b824: e5922008 ldr r2, [r2, #8] b828: e1530002 cmp r3, r2 b82c: 08bd87f0 popeq {r4, r5, r6, r7, r8, r9, sl, pc} (!_Thread_Is_heir( executing ) && executing->is_preemptible) ) { b830: e5d33074 ldrb r3, [r3, #116] ; 0x74 b834: e3530000 cmp r3, #0 b838: 08bd87f0 popeq {r4, r5, r6, r7, r8, r9, sl, pc} _Thread_Dispatch_necessary = true; b83c: e59f3018 ldr r3, [pc, #24] ; b85c b840: e3a02001 mov r2, #1 b844: e5c32010 strb r2, [r3, #16] if (_Thread_Evaluate_is_dispatch_needed( needs_asr_dispatching ) ) _Thread_Dispatch(); b848: ebffed16 bl 6ca8 <_Thread_Dispatch> } return RTEMS_SUCCESSFUL; b84c: e3a00000 mov r0, #0 b850: e8bd87f0 pop {r4, r5, r6, r7, r8, r9, sl, pc} b854: e3a00000 mov r0, #0 <== NOT EXECUTED } b858: e8bd87f0 pop {r4, r5, r6, r7, r8, r9, sl, pc} <== NOT EXECUTED