0
AARCH64_DISABLE_INLINE_ISR_DISABLE_ENABLE
AARCH64_MULTILIB_ARCH_V8_ILP32
AARCH64_MULTILIB_CACHE_LINE_MAX_64
AARCH64_MULTILIB_HAS_LOAD_STORE_EXCLUSIVE
AARCH64_MULTILIB_VFP
ARCH_ELFSIZ
ARM_CP15_TEXT_SECTION
ARM_DISABLE_INLINE_ISR_DISABLE_ENABLE
ARM_DISABLE_THREAD_ID_REGISTER_USE
ARM_MULTILIB_ARCH_V4
ARM_MULTILIB_ARCH_V7M
ARM_MULTILIB_CACHE_LINE_MAX_64
ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
ARM_MULTILIB_HAS_LOAD_STORE_EXCLUSIVE
ARM_MULTILIB_HAS_STORE_RETURN_STATE
ARM_MULTILIB_HAS_THREAD_ID_REGISTER
ARM_MULTILIB_HAS_WFI
ARM_MULTILIB_VFP
ARM_MULTILIB_VFP_D1
ARM_MULTILIB_VFP_D32
ASM
CLANGUAGE
COMPAT_16
COMPAT_FREEBSD32
CPU_ALIGNMENT
CPU_ENABLE_ROBUST_THREAD_DISPATCH
CPU_HARDWARE_FP
CPU_MODEL_NAME
CPU_PER_CPU_CONTROL_SIZ
CPU_PROVIDES_ISR_IS_IN_PROGRESS
CPU_SIMPLE_VECTORED_INTERRUPTS
CPU_SOFTWARE_FP
CPU_STACK_ALIGNMENT
CPU_THREAD_LOCAL_STORAGE_VARIANT0
CPU_THREAD_LOCAL_STORAGE_VARIANT1
CPU_USE_DEFERRED_FP_SWITCH
CPU_USE_GENERIC_BITFIELD_COD
CPU_USE_LIBC_INIT_FINI_ARRAY
DDB
DEBUG
DECLARE_CAUSE
DECLARE_CSR
DECLARE_INSN
ELFSIZ
ELFSIZE
EXECUTE_GLOBAL_CONSTRUCTORS
FFCLOCK
FUNCTIONALITY_NOT_CURRENTLY_USED_BY_ANY_API
HAVE_CONFIG_H
HEAP_PROTECTION
I386_DISABLE_INLINE_ISR_DISABLE_ENABLE
I386_HAS_BSWAP
I386_HAS_FPU
INSTRUMENT_EXECUTING_THREAD
INSTRUMENT_ISR_VECTORING
LIBCPU_AARCH64_MMU_VMSAV8_64_H
LIBCPU_AARCH64_VECTORS_H
LIBCPU_SHARED_ARM_CP15_H
M68K_HAS_BFFFO
M68K_HAS_EMA
M68K_HAS_FPSP_PACKAG
M68K_HAS_FPU
M68K_HAS_SEPARATE_STACKS
M68K_HAS_VBR
MIPS_HAS_FPU
NO_CPU_HAS_FPU
OR1K_64BIT_ARCH
OR1K_FAST_CONTEXT_SWITCH_ENABLED
PPC_ABI
PPC_ASM
PPC_ASMPPC_ASM_ELF
PPC_DISABLE_INLINE_ISR_DISABLE_ENABLE
PPC_HAS_DOUBL
PPC_HAS_FPU
PPC_MULTILIB_ALTIVE
PPC_MULTILIB_ALTIVEC
PPC_MULTILIB_FPU
PPC_STACK_RED_ZONE_SIZ
PPS_SYNC
R4650
REMOVED_BY_CCJ
RISCV_ENCODING_H
RTEMS_DEBUG
RTEMS_EXCEPTION_EXTENSIONS
RTEMS_HEAP_DEBUG
RTEMS_MULTIPROCESSING
RTEMS_PARAVIRT
RTEMS_PROFILING
RTEMS_SCORE_ARMV4_H
RTEMS_SCORE_ARMV7M_H
RTEMS_SCORE_COREMSG_ENABLE_BLOCKING_SEND
RTEMS_SCORE_COREMSG_ENABLE_MESSAGE_PRIORITY
RTEMS_SCORE_COREMSG_ENABLE_NOTIFICATION
RTEMS_SCORE_ROBUST_THREAD_DISPATCH
RTEMS_SCORE_THREAD_ENABLE_RESOURCE_COUNT
RTEMS_SMP
RTEMS_SMP_LOCK_DO_NOT_INLINE
SCTL_MASK32
SH4_USE_X_REGISTERS
SH_HAS_FPU
SH_HAS_SEPARATE_STACKS
SH_PARANOID_ISR
SIM_CRB
SIM_MM
SPARC_HAS_BITSCAN
SPARC_HAS_FPU
SPARC_NUMBER_OF_REGISTER_WINDOWS
SPARC_USE_LAZY_FP_SWITCH
SPARC_USE_SYNCHRONOUS_FP_SWITCH
SUN4U
TEST_MISMATCH
TIMER_ENABLxFFC00640L
V850_HAS_BYTE_SWAP_INSTRUCTION
WAIT
XDS
_AARCH64_ELF_MACHDEP_H_
_ARM_ELF_MACHDEP_H_
_CPU_Interrupt_stack_setup
_CPU_Start_multitasking
_KERNEL
_KERNEL_OPT
_LIBCPU_ACCESS_H
_LIBCPU_BYTEORDER_H
_LP64
_MICROBLAZE_ELF_MACHDEP_H_
_MIPS_ELF_MACHDEP_H_
_NIOS2_COUNT_ZEROS_H
_OR1K_CPU_H
_RISCV_CPU_H
_RISCV_ELF_MACHDEP_H_
_RTEMS_ASM_H
_RTEMS_BFIN_52x_H
_RTEMS_BFIN_533_H
_RTEMS_BFIN_BFIN_H
_RTEMS_M68K_M68302_H
_RTEMS_M68K_M68360_H
_RTEMS_M68K_QSM_H
_RTEMS_M68K_SIM_H
_RTEMS_MIPS_IDTCPU_H
_RTEMS_MIPS_IREGDEF_H
_RTEMS_POWERPC_REGISTERS_H
_RTEMS_SCORE_AARCH32_PMSA_H
_RTEMS_SCORE_AARCH32_SYSTEM_REGISTERS_H
_RTEMS_SCORE_AARCH64_H
_RTEMS_SCORE_AARCH64_SYSTEM_REGISTERS_H
_RTEMS_SCORE_ARM_H
_RTEMS_SCORE_BFIN_H
_RTEMS_SCORE_CPUIMPL_H
_RTEMS_SCORE_CPU_ASM_H
_RTEMS_SCORE_CPU_H
_RTEMS_SCORE_CPU_IRQ_H
_RTEMS_SCORE_I386_H
_RTEMS_SCORE_IDTR_H
_RTEMS_SCORE_IDT_H
_RTEMS_SCORE_INTERRUPTS_H
_RTEMS_SCORE_LM32_H
_RTEMS_SCORE_M68K_H
_RTEMS_SCORE_MICROBLAZE_H
_RTEMS_SCORE_MIPS_H
_RTEMS_SCORE_MOXIE_H
_RTEMS_SCORE_NIOS2_H
_RTEMS_SCORE_NIOS2_UTILITY_H
_RTEMS_SCORE_NO_CPU_H
_RTEMS_SCORE_OR1K_H
_RTEMS_SCORE_OR1K_UTILITY_H
_RTEMS_SCORE_PARAVIRT_H
_RTEMS_SCORE_POWERPC_H
_RTEMS_SCORE_REGISTERS_H
_RTEMS_SCORE_RISCV_H
_RTEMS_SCORE_RISCV_UTILITY_H
_RTEMS_SCORE_SH_H
_RTEMS_SCORE_SH_IO_H
_RTEMS_SCORE_SPARC_H
_RTEMS_SCORE_V850_H
_RTEMS_SCORE_X86_64_H
_SOFT_FLOAT
_SYS_SYSPROTO_H_
__AARCH64EB__
__ALTIVEC__
__ARMEB__
__ARM_ARCH
__ARM_ARCH5
__ARM_ARCH6
__ARM_ARCH_7A__
__ARM_ARCH_7EM__
__ARM_ARCH_7M__
__ARM_ARCH_PROFIL
__ARM_NEON
__ARM_NEON__
__ASM__
__ASSEMBLER__
__BFIN__
__FIX_LEON3FT_B2BST
__FIX_LEON3FT_TN0018
__FLOAT_REGISTER_PREFIX__
__GNUC__
__LITTLE_ENDIAN__
__LP64__
__MIPSEB__
__OR1K_ASM_h
__PPC_CPU_E6500__
__PPC_VRSAVE__
__PROC_LABEL_PREFIX__
__REGISTER_PREFIX__
__RISCV_ASM_H
__SH2E__
__SH3E__
__SH4__
__SIZEOF_POINTER__
__SOFTFP__
__SPE__
__SSE__
__USER_LABEL_PREFIX__
__USE_INIT_FINI__
__USE__MAIN__
__aarch64__
__amd64__
__arm__
__cplusplus
__i386__
__leon__
__linux__
__mc68060__
__mcoldfire__
__mips
__mips64
__mips_fpr32
__mips_fpr64
__mips_soft_float
__pentium__
__pentiumpro__
__powerpc64__
__riscv
__riscv_atomic
__riscv_cmodel_medany
__riscv_flen
__riscv_xlen
__rtems__
__sh1__
__sh2__
__thumb2__
__thumb__
ppc40
ppc403
ppc405
rtems_multilib
wait