RTEMS CPU Architecture Supplement
As discussed above, the bsr
and jsr
instructions do not
automatically save any registers. RTEMS uses the registers D0, D1,
A0, and A1 as scratch registers. These registers are not preserved by
RTEMS directives therefore, the contents of these registers should not
be assumed upon return from any RTEMS directive.
RTEMS CPU Architecture Supplement
Copyright © 1988-2008 OAR Corporation