RTEMS CPU Architecture Supplement
Most RTEMS target processors can be initialized to support a flat address space. Although the size of addresses varies between architectures, on most RTEMS targets, an address is 32-bits wide which defines addresses ranging from 0x00000000 to 0xFFFFFFFF (4 gigabytes). Each address is represented by a 32-bit value and is byte addressable. The address may be used to reference a single byte, word (2-bytes), or long word (4 bytes). Memory accesses within this address space may be performed in little or big endian fashion.
On smaller CPU architectures supported by RTEMS, the address space may only be 20 or 24 bits wide.
If the CPU model has support for virtual memory or segmentation, it is the responsibility of the Board Support Package (BSP) to initialize the MMU hardware to perform address translations which correspond to flat memory model.
In each of the architecture specific chapters, this subsection will describe any architecture characteristics that differ from this general description.
RTEMS CPU Architecture Supplement
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