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RTEMS 4.6.1 On-Line Library


Interrupt Processing Disabling of Interrupts by RTEMS

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4.6: Disabling of Interrupts by RTEMS

During the execution of directive calls, critical sections of code may be executed. When these sections are encountered, RTEMS disables external interrupts by setting the I bit in the PSW to 0 before the execution of this section and restores them to the previous level upon completion of the section. RTEMS has been optimized to insure that interrupts are disabled for less than XXX instructions when compiled with GNU CC at optimization level 4. The exact execution time will vary based on the based on the processor implementation, amount of cache, the number of wait states for primary memory, and processor speed present on the target board.

Non-maskable interrupts (NMI) such as high-priority machine checks cannot be disabled, and ISRs which execute at this level MUST NEVER issue RTEMS system calls. If a directive is invoked, unpredictable results may occur due to the inability of RTEMS to protect its critical sections. However, ISRs that make no system calls may safely execute as non-maskable interrupts.


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